AD9201ARSZ [ADI]

Dual Channel, 20 MHz 10-Bit Resolution CMOS ADC; 双通道， 20 MHz的10位分辨率的CMOS ADC


型号：	AD9201ARSZ
厂家：	ADI
描述：	Dual Channel, 20 MHz 10-Bit Resolution CMOS ADC 双通道， 20 MHz的10位分辨率的CMOS ADC
文件：	总4页 (文件大小：75K)
中文：	中文翻译
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Dual Channel, 20 MHz 10-Bit

Resolution CMOS ADC

AD9201

FUNCTIONAL BLOCK DIAGRAM

FEATURES

Complete Dual Matching ADCs

Low Power Dissipation: 215 mW (+3 V Supply)

Single Supply: 2.7 V to 5.5 V

Differential Nonlinearity Error: 0.4 LSB

On-Chip Analog Input Buffers

On-Chip Reference

Signal-to-Noise Ratio: 57.8 dB

Over Nine Effective Bits

Spurious-Free Dynamic Range: –73 dB

No Missing Codes Guaranteed

28-Lead SSOP

AVDD AVSS

DVDD DVSS

CLOCK

IINA

IINB

SLEEP

AD9201

"I" ADC

SELECT

REFERENCE

BUFFER

IREFB

IREFT

THREE-

QREFB

QREFT

ASYNCHRONOUS

MULTIPLEXER

STATE

OUTPUT

BUFFER

DATA

10 BITS

VREF

REFSENSE

CHIP

SELECT

QINB

QINA

"Q" ADC

PRODUCT DESCRIPTION

PRODUCT HIGHLIGHTS

The AD9201 is a complete dual channel, 20 MSPS, 10-bit

CMOS ADC. The AD9201 is optimized specifically for applica-

tions where close matching between two ADCs is required (e.g.,

I/Q channels in communications applications). The 20 MHz

sampling rate and wide input bandwidth will cover both narrow-

band and spread-spectrum channels. The AD9201 integrates two

10-bit, 20 MSPS ADCs, two input buffer amplifiers, an internal

voltage reference and multiplexed digital output buffers.

1. Dual 10-Bit, 20 MSPS ADCs

A pair of high performance 20 MSPS ADCs that are opti-

mized for spurious free dynamic performance are provided for

encoding of I and Q or diversity channel information.

2. Low Power

Complete CMOS Dual ADC function consumes a low

215 mW on a single supply (on 3 V supply). The AD9201

operates on supply voltages from 2.7 V to 5.5 V.

Each ADC incorporates a simultaneous sampling sample-and-

hold amplifier at its input. The analog inputs are buffered; no

external input buffer op amp will be required in most applica-

tions. The ADCs are implemented using a multistage pipeline

architecture that offers accurate performance and guarantees no

missing codes. The outputs of the ADCs are ported to a multi-

plexed digital output buffer.

3. On-Chip Voltage Reference

The AD9201 includes an on-chip compensated bandgap

voltage reference pin programmable for 1 V or 2 V.

4. On-chip analog input buffers eliminate the need for external

op amps in most applications.

5. Single 10-Bit Digital Output Bus

The AD9201 ADC outputs are interleaved onto a single

output bus saving board space and digital pin count.

The AD9201 is manufactured on an advanced low cost CMOS

process, operates from a single supply from 2.7 V to 5.5 V, and

consumes 215 mW of power (on 3 V supply). The AD9201 input

structure accepts either single-ended or differential signals,

providing excellent dynamic performance up to and beyond

its 10 MHz Nyquist input frequencies.

6. Small Package

The AD9201 offers the complete integrated function in a

compact 28-lead SSOP package.

7. Product Family

The AD9201 dual ADC is pin compatible with a dual 8-bit

ADC (AD9281) and has a companion dual DAC product,

the AD9761 dual DAC.

REV. D

Information furnished by Analog Devices is believed to be accurate and

reliable. However, no responsibility is assumed by Analog Devices for its

use, nor for any infringements of patents or other rights of third parties

which may result from its use. No license is granted by implication or

otherwise under any patent or patent rights of Analog Devices.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Tel: 781/329-4700

Fax: 781/326-8703

World Wide Web Site: http://www.analog.com

(AVDD = +3 V, DVDD = +3 V, F_SAMPLE= 20 MSPS, VREF = 2 V, INB = 0.5 V, T_MINto T_MAX,

AD9201–SPECIFICATIONS internal ref, differential input signal, unless otherwise noted)

Parameter

Symbol

Min

Typ

Max

Units

Bits

Condition

RESOLUTION

CONVERSION RATE

F_S

MHz

DC ACCURACY

Differential Nonlinearity

Integral Nonlinearity

Differential Nonlinearity (SE)

Integral Nonlinearity (SE)

Zero-Scale Error, Offset Error

Full-Scale Error, Gain Error

Gain Match

DNL

INL

DNL

INL

E_ZS

±0.4

1.2

LSB

% FS

LSB

REFT = 1 V, REFB = 0 V

±0.5

±1.5

±3.5

±0.5

±5

±1

±2.5

±3.8

±5.4

E_FS

Offset Match

ANALOG INPUT

Input Voltage Range

Input Capacitance

AIN

C_IN

t_AP

–0.5

AVDD/2

Aperture Delay

Aperture Uncertainty (Jitter)

Aperture Delay Match

Input Bandwidth (–3 dB)

Small Signal (–20 dB)

Full Power (0 dB)

t_AJ

240

245

MHz

INTERNAL REFERENCE

Output Voltage (1 V Mode)

Output Voltage Tolerance (1 V Mode)

Output Voltage (2 V Mode)

VREF

±10

REFSENSE = VREF

REFSENSE = GND

Output Voltage Tolerance (2 V Mode)

Load Regulation (1 V Mode)

Load Regulation (2 V Mode)

±15

±28

1 mA Load Current

±15

POWER SUPPLY

Operating Voltage

AVDD

DRVDD

I_AVDD

I_DRVDD

P_D

2.7

71.6

0.1

215

15.5

0.8

5.5

% FS

AVDD – DVDD ≤ 2.3 V

Supply Current

AVDD = 3 V

Power Consumption

Power-Down

Power Supply Rejection

245

1.3

AVDD = DVDD = 3 V

STBY = AVDD, Clock = AVSS

PSR

DYNAMIC PERFORMANCE¹

Signal-to-Noise and Distortion

f = 3.58 MHz

f = 10 MHz

Signal-to-Noise

SINAD

55.6

55.9

57.3

55.8

SNR

f = 3.58 MHz

f = 10 MHz

57.8

56.2

Total Harmonic Distortion

f = 3.58 MHz

f = 10 MHz

Spurious Free Dynamic Range

f = 3.58 MHz

THD

SFDR

–69

–66.3

–63.3

–66

–73

–70.5

–62

0.1

0.05

Degree

f = 10 MHz

Two-Tone Intermodulation Distortion²IMD

f = 44.49 MHz and 45.52 MHz

NTSC 40 IRE Mod Ramp

F_S= 14.3 MHz

Differential Phase

Differential Gain

Crosstalk Rejection

REV. D

–2–

AD9201

Parameter

Symbol

Min

Typ

Max

Units

Condition

DYNAMIC PERFORMANCE (SE)³

Signal-to-Noise and Distortion

f = 3.58 MHz

Signal-to-Noise

f = 3.58 MHz

Total Harmonic Distortion

f = 3.58 MHz

Spurious Free Dynamic Range

f = 3.58 MHz

SINAD

SNR

52.3

55.5

–55

THD

SFDR

–58

DIGITAL INPUTS

High Input Voltage

Low Input Voltage

DC Leakage Current

Input Capacitance

V_IH

V_IL

I_IN

2.4

µA

0.3

±6

C_IN

LOGIC OUTPUT (with DVDD = 3 V)

High Level Output Voltage

(I_OH= 50 µA)

Low Level Output Voltage

(I_OL= 1.5 mA)

V_OH

V_OL

2.88

0.095

LOGIC OUTPUT (with DVDD = 5 V)

High Level Output Voltage

(I_OH= 50 µA)

V_OH

4.5

Low Level Output Voltage

(I_OL= 1.5 mA)

Data Valid Delay

MUX Select Delay

Data Enable Delay

V_OL

t_OD

t_MD

t_ED

0.4

C_L= 20 pF. Output Level to

90% of Final Value

Data High-Z Delay

t_DHZ

CLOCKING

Clock Pulsewidth High

Clock Pulsewidth Low

Pipeline Latency

t_CH

t_CL

22.5

Cycles

3.0

NOTES

¹AIN differential 2 V p-p, REFT = 1.5 V, REFB = –0.5 V.

²IMD referred to larger of two input signals.

³SE is single ended input, REFT = 1.5 V, REFB = –0.5 V.

Specifications subject to change without notice.

CLOCK

INPUT

ADC SAMPLE

t_MD

I CHANNEL

OUTPUT ENABLED

SELECT

INPUT

Q CHANNEL

OUTPUT ENABLED

SAMPLE #1-1

Q CHANNEL

OUTPUT

SAMPLE #1

Q CHANNEL

OUTPUT

SAMPLE #2

Q CHANNEL

OUTPUT

SAMPLE #1-2

Q CHANNEL

OUTPUT

SAMPLE #1-3

Q CHANNEL

OUTPUT

DATA

OUTPUT

SAMPLE #1-1

I CHANNEL

OUTPUT

SAMPLE #1

I CHANNEL

OUTPUT

Figure 1. ADC Timing

REV. D

–3–

AD9201

ABSOLUTE MAXIMUM RATINGS*

PIN FUNCTION DESCRIPTIONS

Description

With

Respect

No. Name

Parameter

Min

Max

Units

DVSS

DVDD

Digital Ground

Digital Supply

Bit 0 (LSB)

Bit 1

AVDD

DVDD

AVSS

AVDD

AVSS

DVSS

DVDD

AVSS

DVSS

AVSS

–0.3

–6.5

–0.3

–1.0

–0.3

+6.5

+0.3

+6.5

AVDD + 0.3

DVDD + 0.3

AVDD + 0.3

+150

°C

CLK

Bit 2

Digital Outputs

AINA, AINB

VREF

REFSENSE

REFT, REFB

Bit 3

Bit 4

Bit 5

Bit 6

Junction Temperature

Storage Temperature

Lead Temperature

10 sec

Bit 7

–65

+150

Bit 8

Bit 9 (MSB)

+300

°C

SELECT

CLOCK

SLEEP

INA-I

Hi I Channel Out, Lo Q Channel Out

Clock

Hi Power Down, Lo Normal Operation

I Channel, A Input

*Stresses above those listed under Absolute Maximum Ratings may cause perma-

nent damage to the device. This is a stress rating only; functional operation of the

device at these or any other conditions above those indicated in the operational

sections of this specification is not implied. Exposure to absolute maximum ratings

for extended periods may effect device reliability.

INB-I

I Channel, B Input

REFT-I

REFB-I

AVSS

Top Reference Decoupling, I Channel

Bottom Reference Decoupling, I Channel

Analog Ground

ORDERING GUIDE

Temperature

Range

Package

Description

Package

Options*

Model

REFSENSE

VREF

Reference Select

AD9201ARS

–40°C to +85°C

28-Lead SSOP

RS-28

Internal Reference Output

Analog Supply

AD9201-EVAL

Evaluation Board

AVDD

*RS = Shrink Small Outline.

REFB-Q

REFT-Q

INB-Q

Bottom Reference Decoupling, Q Channel

Top Reference Decoupling, Q Channel

Q Channel, B Input

PIN CONFIGURATION

INA-Q

Q Channel, A Input

DVSS

DVDD

CHIP-SELECT

INA-Q

CHIP-SELECT Hi-High Impedance, Lo-Normal Operation

INB-Q

(LSB) D0

REFT-Q

REFB-Q

AVDD

DEFINITIONS OF SPECIFICATIONS

AD9201

INTEGRAL NONLINEARITY (INL)

TOP VIEW

(Not to Scale)

VREF

Integral nonlinearity refers to the deviation of each individual

code from a line drawn from “zero” through “full scale.” The

point used as “zero” occurs 1/2 LSB before the first code tran-

sition. “Full scale” is defined as a level 1 1/2 LSBs beyond the

last code transition. The deviation is measured from the center

of each particular code to the true straight line.

REFSENSE

AVSS

REFB-I

REFT-I

INB-I

(MSB) D9

SELECT

CLOCK

INA-I

DIFFERENTIAL NONLINEARITY (DNL, NO MISSING

CODES)

SLEEP

An ideal ADC exhibits code transitions that are exactly 1 LSB

apart. DNL is the deviation from this ideal value. It is often

specified in terms of the resolution for which no missing codes

(NMC) are guaranteed.

CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily

accumulate on the human body and test equipment and can discharge without detection.

Although the AD9201 features proprietary ESD protection circuitry, permanent damage may

occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD

precautions are recommended to avoid performance degradation or loss of functionality.

WARNING!

ESD SENSITIVE DEVICE

REV. D

–4–

AD9201ARSZ [ADI]

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