AD9631ARZ-REEL7 [ADI]
Ultralow Distortion, High Speed Op Amp, Stable at Gain of 1;
| 型号： | AD9631ARZ-REEL7 |
| 厂家： | 
ADI |
| 描述： | Ultralow Distortion, High Speed Op Amp, Stable at Gain of 1 放大器 光电二极管 |
| 文件： | 总20页 (文件大小：519K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Ultralow Distortion, Wide Bandwidth
Voltage Feedback Op Amps
AD9631/AD9632
Data Sheet
FEATURES
PIN CONFIGURATION
Wide bandwidth
AD9631, G = +1
AD9632, G = +2
Small signal
AD9631/
1
2
3
4
8
7
6
5
NC
+V
NC
–INPUT
+INPUT
AD9632
S
OUTPUT
NC
TOP VIEW
(Not to Scale)
–V
S
AD9631, 320 MHz
AD9632, 250 MHz
Large signal (4 V p-p)
NOTES
1. NC = NO CONNECT.
Figure 1. 8-Lead PDIP (N) and SOIC (R) Packages
AD9631, 175 MHz
AD9632, 180 MHz
A proprietary design architecture has produced an amplifier
that combines many of the best characteristics of both current
feedback and voltage feedback amplifiers. The AD9631/AD9632
exhibit exceptionally fast and accurate pulse response (16 ns to
0.01%) as well as extremely wide small signal and large signal
bandwidth and ultralow distortion. The AD9631 achieves
−72 dBc at 20 MHz, 320 MHz small signal bandwidth, and
175 MHz large signal bandwidths.
Ultralow distortion (SFDR), low noise
−113 dBc typical @ 1 MHz
−95 dBc typical @ 5 MHz
−72 dBc typical @ 20 MHz
46 dBm third-order intercept @ 25 MHz
7.0 nV/√Hz spectral noise density
High speed
Slew rate: 1300 V/μs
These characteristics position the AD9631/AD9632 ideally for
driving flash as well as high resolution ADCs. Additionally, the
balanced high impedance inputs of the voltage feedback archi-
tecture allow maximum flexibility when designing active filters.
Settling time to 0.01%, 2 V step: 16 ns
3 V to 5 V supply operation
17 mA supply current
APPLICATIONS
The AD9631/AD9632 are offered in the industrial (−40°C to
+85°C) temperature range. They are available in PDIP and SOIC.
ADC input driver
Differential amplifiers
IF/RF amplifiers
Pulse amplifiers
Professional video
–30
V
= ±5V
S
R
= 500Ω
= 2V p-p
L
–40
–50
V
OUT
DAC current to voltage
Baseband and video communications
Pin diode receivers
–60
–70
–80
Active filters/integrators/log amps
–90
SECOND HARMONIC
GENERAL DESCRIPTION
–100
–110
–120
–130
The AD9631/AD9632 are very high speed and wide bandwidth
amplifiers. The AD9631 is unity gain stable. The AD9632 is
stable at gains of 2 or greater. Using a voltage feedback
architecture, the exceptional settling time, bandwidth, and low
distortion of the AD9631/AD9632 meet the requirements of
many applications that previously depended on current feed-
back amplifiers. Its classical op amp structure works much more
predictably in many designs.
THIRD HARMONIC
10k
100k
1M
10M
100M
FREQUENCY (Hz)
Figure 2. AD9631 Harmonic Distortion vs. Frequency, G = +1
Rev. D
Document Feedback
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responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
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One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Technical Support
©2014 Analog Devices, Inc. All rights reserved.
www.analog.com
AD9631/AD9632
Data Sheet
TABLE OF CONTENTS
Features .............................................................................................. 1
General......................................................................................... 15
Feedback Resistor Choice.......................................................... 15
Pulse Response ........................................................................... 16
Large Signal Performance ......................................................... 16
Power Supply Bypassing............................................................ 16
Driving Capacitive Loads.......................................................... 16
Applications Information .............................................................. 17
Operation as a Video Line Driver............................................ 17
Active Filters ............................................................................... 17
Analog-to-Digital Converter (ADC) Driver .......................... 18
Layout Considerations............................................................... 18
Outline Dimensions....................................................................... 19
Ordering Guide .......................................................................... 20
Applications....................................................................................... 1
General Description ......................................................................... 1
Pin Configuration............................................................................. 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Electrical Characteristics............................................................. 3
Absolute Maximum Ratings............................................................ 5
Metallization Photo...................................................................... 5
Thermal Resistance ...................................................................... 5
Maximum Power Dissipation ..................................................... 5
ESD Caution.................................................................................. 5
Typical Performance Characteristics ............................................. 6
Theory of Operation ...................................................................... 15
REVISION HISTORY
2/14—Rev. C to Rev. D
Changes to Figure 33...................................................................... 10
Changes to Analog-to-Digital Converter (ADC) Driver Section
and Figure 66................................................................................... 18
Updated Outline Dimensions....................................................... 19
Changes to Ordering Guide .......................................................... 20
7/03—Rev. B to Rev. C
Deleted Evaluation Boards information..........................Universal
Deleted military CERDIP version....................................Universal
Change to Absolute Maximum Ratings......................................... 3
Change to TPC 4............................................................................... 4
Change to TPC 10............................................................................. 5
Change to Figure 6 ......................................................................... 14
Updated Outline Dimensions....................................................... 17
1/03—Rev. A to Rev. B
Deleted DIP (N) Inverter, SOIC (R) Inverter, and DIP (N)
Noninverter Evaluation Boards in Figures 12–14...................... 17
Updated Outline Dimensions....................................................... 18
Rev. D | Page 2 of 20
Data Sheet
AD9631/AD9632
SPECIFICATIONS
ELECTRICAL CHARACTERISTICS
VS = 5 V; RLOAD = 100 Ω; AV = 1 (AD9631); AV = 2 (AD9632), unless otherwise noted.
Table 1.
AD9631
AD9632
Parameter
Test Conditions/Comments
Min
Typ
Max
Min
Typ
Max
Unit
DYNAMIC PERFORMANCE
Bandwidth (–3 dB)
Small Signal
VOUT ≤ 0.4 V p-p
VOUT = 4 V p-p
220
150
320
175
180
155
250
180
MHz
MHz
Large Signal1
Bandwidth for 0.1 dB Flatness
VOUT = 300 mV p-p
RF = 140 Ω (AD9631);
RF = 425 Ω (AD9632)
130
130
MHz
Slew Rate, Average
Rise/Fall Time
VOUT = 4 V step
VOUT = 0.5 V step
VOUT = 4 V step
1000
1300
1.2
2.5
1200
1500
1.4
2.1
V/μs
ns
ns
Settling Time
To 0.1%
To 0.01%
VOUT = 2 V step
VOUT = 2 V step
11
16
11
16
ns
ns
HARMONIC/NOISE PERFORMANCE
Second Harmonic Distortion
2 V p-p; 20 MHz, RL = 100 Ω
RL = 500 Ω
2 V p-p; 20 MHz, RL = 100 Ω
RL = 500 Ω
25 MHz
RS = 50 Ω
−64
−72
−76
−81
46
−57
−65
−69
−74
−54
−72
−74
−81
41
−47
−65
−67
−74
dBc
dBc
dBc
dBc
dBm
dB
Third Harmonic Distortion
Third-Order Intercept
Noise Figure
18
14
Input Voltage Noise
Input Current Noise
Average Equivalent Integrated
Input Noise Voltage
1 MHz to 200 MHz
1 MHz to 200 MHz
0.1 MHz to 200 MHz
7.0
2.5
100
4.3
2.0
60
nA/√Hz
pA/√Hz
μV rms
Differential Gain Error (3.58 MHz)
Differential Phase Error (3.58 MHz)
Phase Nonlinearity
DC PERFORMANCE2
Input Offset Voltage3
RL = 150 Ω
RL = 150 Ω
DC to 100 MHz
RL = 150 Ω
0.03
0.02
1.1
0.06
0.04
0.02
0.02
1.1
0.04
0.04
%
Degree
Degree
3
10
13
2
5
8
mV
mV
µV/°C
µA
TMIN − TMAX
Offset Voltage Drift
Input Bias Current
10
2
10
2
7
7
TMIN − TMAX
TMIN − TMAX
10
3
5
10
3
5
µA
µA
µA
Input Offset Current
0.1
0.1
Common-Mode Rejection Ratio
Open-Loop Gain
VCM
VOUT
TMIN − TMAX
=
=
2.5 V
2.5 V
70
46
40
90
52
70
46
40
90
52
dB
dB
dB
INPUT CHARACTERISTICS
Input Resistance
Input Capacitance
500
1.2
3.4
500
1.2
3.4
kΩ
pF
V
Input Common-Mode Voltage Range
Rev. D | Page 3 of 20
AD9631/AD9632
Data Sheet
AD9631
Typ
AD9632
Typ
Parameter
Test Conditions/Comments
Min
Max
Min
Max
Unit
OUTPUT CHARACTERISTICS
Output Voltage Range
Output Current
Output Resistance
Short Circuit Current
POWER SUPPLY
RL = 150 Ω
3.2
3.9
70
0.3
3.2
3.9
70
0.3
V
mA
Ω
240
240
mA
Operating Range
Quiescent Current
3.0
50
5.0
17
6.0
18
21
3.0
56
5.0
16
6.0
17
20
V
mA
mA
dB
TMIN − TMAX
TMIN − TMAX
Power Supply Rejection Ratio
60
66
1 See the Absolute Maximum Ratings and Theory of Operation sections of this data sheet.
2 Measured at AV = 50.
3 Measured with respect to the inverting input.
Rev. D | Page 4 of 20
Data Sheet
AD9631/AD9632
ABSOLUTE MAXIMUM RATINGS
Table 2.
THERMAL RESISTANCE
Table 3.
Parameter
Rating
Supply Voltage (+VS to −VS)
Voltage Swing × Bandwidth Product
Internal Power Dissipation
PDIP (N)
12.6 V
550 V × MHz
Package Type1
8-Lead PDIP (N)
8-Lead SOIC (R)
θJA
Unit
°C/W
°C/W
90
140
1.3 W
0.9 W
VS
1.2 V
Observe Power
Derating Curves
−65°C to +125°C
−40°C to +85°C
300°C
1 For device in free air.
SOIC (R)
MAXIMUM POWER DISSIPATION
Input Voltage (Common Mode)
Differential Input Voltage
Output Short Circuit Duration
The maximum power that can be safely dissipated by these
devices is limited by the associated rise in junction temperature.
The maximum safe junction temperature for plastic encapsu-
lated devices is determined by the glass transition temperature
of the plastic, approximately 150°C. Exceeding this limit tempo-
rarily may cause a shift in parametric performance due to a
change in the stresses exerted on the die by the package.
Exceeding a junction temperature of 175°C for an extended
period can result in device failure.
Storage Temperature Range
Operating Temperature Range (A Grade)
Lead Temperature Range (Soldering 10 sec)
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
While the AD9631 and AD9632 are internally short circuit
protected, this may not be sufficient to guarantee that the max-
imum junction temperature (150°C) is not exceeded under all
conditions. To ensure proper operation, it is necessary to
observe the maximum power derating curves.
2.0
METALLIZATION PHOTO
+V
7
S
–IN
2
T = 150°C
J
8-LEAD PDIP PACKAGE
1.5
1.0
0.5
0
0.046
(1.17)
6
OUT
8-LEAD SOIC PACKAGE
3
+IN
4
–V
AD9631
–50 –40 –30 –20 –10
0
10 20 30 40 50 60 70 80 90
S
0.050 (1.27)
AMBIENT TEMPERATURE (°C)
+V
7
–IN
2
S
Figure 4. Maximum Power Dissipation vs. Temperature
ESD CAUTION
0.046
(1.17)
6
OUT
3
+IN
4
–V
AD9632
S
Figure 3. Dimensions shown in inches and (millimeters) Connect Substrate to −VS
Rev. D | Page 5 of 20
AD9631/AD9632
Data Sheet
TYPICAL PERFORMANCE CHARACTERISTICS
R
F
R
S
F
10µF
10µF
+V
+V
S
PULSE
GENERATOR
0.1µF
0.1µF
T
/T = 350ps
F
R
267Ω
V
PULSE
IN
GENERATOR
R
T
V
V
OUT
AD9631
49.9Ω
AD9631
OUT
T
/T = 350ps
F
R
130Ω
V
R
= 100Ω
IN
R
= 100Ω
L
0.1µF
10µF
0.1µF
L
R
49.9Ω
T
100Ω
10µF
–V
S
–V
S
Figure 5. AD9631 Noninverting Configuration, G = +1
Figure 8. AD9631 Inverting Configuration, G = −1
5ns
5ns
1V
1V
Figure 9. AD9631 Large Signal Transient Response; VOUT = 4 V p-p, G = −1,
RF = RIN = 267 Ω
Figure 6. AD9631 Large Signal Transient Response; VOUT = 4 V p-p,
G = +1, RF = 250 Ω
5ns
100mV
5ns
100mV
Figure 10. AD9631 Small Signal Transient Response; VOUT = 400 mV p-p,
G = −1, RF = RIN = 267 Ω
Figure 7. AD9631 Small Signal Transient Response; VOUT = 400 mV p-p,
G = +1, RF = 140 Ω
Rev. D | Page 6 of 20
Data Sheet
AD9631/AD9632
R
S
R
S
F
F
10µF
10µF
+V
+V
PULSE
PULSE
GENERATOR
GENERATOR
0.1µF
0.1µF
T
/T = 350ps
F
T
/T = 350ps
F
R
R
R
R
IN
IN
V
IN
R
49.9Ω
T
V
V
OUT
OUT
AD9632
AD9632
130Ω
V
IN
R
= 100Ω
R = 100Ω
L
0.1µF
L
0.1µF
R
49.9Ω
T
100Ω
10µF
10µF
–V
–V
S
S
Figure 11. AD9632 Noninverting Configuration, G = +2
Figure 14. AD9632 Inverting Configuration, G = −1
5ns
1V
5ns
1V
Figure 12. AD9632 Large Signal Transient Response; VOUT = 4 V p-p, G = +2,
RF = RIN = 422 Ω
Figure 15. AD9632 Large Signal Transient Response; VOUT = 4 V p-p, G = −1,
RF = RIN = 422 Ω, RT = 56.2 Ω
5ns
100mV
5ns
100mV
Figure 13. AD9632 Small Signal Transient Response; VOUT = 400 mV p-p,
G = +2, RF = RIN = 274 Ω
Figure 16. AD9632 Small Signal Transient Response; VOUT = 400 mV p-p,
G = −1, RF = RIN = 267 Ω, RT = 61.9 Ω
Rev. D | Page 7 of 20
AD9631/AD9632
Data Sheet
475
450
425
400
375
350
358
300
275
250
1
R
= 150Ω
R
F
F
V
R
= ±5V
= 100Ω
S
0
L
G = +1
–1
–2
–3
–4
–5
–6
–7
R
= 200Ω
F
AD9631
R
= 50Ω
F
130Ω
R
L
R
= 100Ω
F
N PACKAGE
R PACKAGE
V
R
= ±5V
= 100Ω
= 300mV p-p
S
–8
–9
L
V
OUT
1M
10M
100M
1G
20
40
60
80 100 120 140 160 180 200 220 240
FREQUENCY (Hz)
VALUE OF FEEDBACK RESISTOR, R (Ω)
F
Figure 17. AD9631 Small Signal Frequency Response, G = +1
Figure 20. AD9631 Small Signal −3 dB Bandwidth vs. RF
0.1
0
1
0
R
= 150Ω
= 140Ω
F
R = 250Ω
F
R
F
–0.1
–0.2
–0.3
–0.4
–0.5
–0.6
–0.7
–0.8
–0.9
–1
–2
–3
–4
–5
–6
–7
–8
–9
R
= 50Ω TO 250Ω
BY 50Ω
F
R
= 100Ω
F
R
F
= 120Ω
V
R
= ±5V
= 100Ω
S
V
R
= ±5V
= 100Ω
= 4V p-p
L
S
G = +1
V
L
= 300mV p-p
V
OUT
OUT
1M
10M
FREQUENCY (Hz)
100M
500M
1M
10M
FREQUENCY (Hz)
100M
500M
Figure 18. AD9631 0.1 dB Flatness, N Package (for R Package Add 20 Ω to RF)
Figure 21. AD9631 Large Signal Frequency Response, G = +1
90
80
70
60
50
40
30
20
10
0
100
80
1
0
PHASE
60
–1
–2
–3
40
20
R
= 267Ω
F
0
–4
–5
–6
–7
–8
–9
–20
–40
–60
–80
–100
–120
GAIN
V
= ±5V
S
R
= 100Ω
–10
–20
L
V
= 300mV p-p
OUT
10k
100k
1M
10M
100M
1G
1M
10M
100M
1G
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 19. AD9631 Open-Loop Gain and Phase Margin vs. Frequency,
RL = 100 Ω
Figure 22. AD9631 Small Signal Frequency Response, G = −1
Rev. D | Page 8 of 20
Data Sheet
AD9631/AD9632
0.10
0.05
0
–30
V
R
= ±5V
= 500Ω
S
L
–40
–50
G = +1
V
= 2V p-p
OUT
–60
–0.05
–70
SECOND
HARMONIC
–0.10
0.10
–80
–90
0.05
0
–100
–110
–120
–130
THIRD
HARMONIC
–0.05
–0.10
1ST 2ND 3RD 4TH 5TH 6TH 7TH 8TH 9TH 10TH 11TH
10k
100k
1M
10M
100M
FREQUENCY (Hz)
Figure 23. AD9631 Harmonic Distortion vs. Frequency, RL = 500 Ω
Figure 26. AD9631 Differential Gain and Phase Error, G = +2, RL = 150 Ω
–30
0.3
0.2
V
R
= ±5V
= 100Ω
S
L
–40
–50
G = +1
V
= 2V p-p
OUT
–60
0.1
–70
–80
0
SECOND
HARMONIC
–90
–0.1
–0.2
–0.3
–100
–110
–120
–130
THIRD
HARMONIC
10k
100k
1M
10M
100M
0
10
20
30
40
50
60
70
80
FREQUENCY (Hz)
SETTLING TIME (ns)
Figure 24. AD9631 Harmonic Distortion vs. Frequency, RL = 100 Ω
Figure 27. AD9631 Short-Term Settling Time, 2 V Step, RL = 100 Ω
60
55
50
45
40
35
30
25
20
0.3
0.2
0.1
0
–0.1
–0.2
10
100
0
1
2
3
4
5
6
7
8
9
10
FREQUENCY (MHz)
SETTLING TIME (µs)
Figure 25. AD9631 Third Order Intercept vs. Frequency
Figure 28. AD9631 Long-Term Settling Time, 2 V Step, RL = 100 Ω
Rev. D | Page 9 of 20
AD9631/AD9632
Data Sheet
7
375
350
325
300
275
250
225
200
175
150
125
V
R
= ±5V
= 100Ω
S
R
= 325Ω
F
L
6
G = +2
R
= 425Ω
F
5
R
= 125Ω
F
R
= 225Ω
4
N PACKAGE
F
3
2
R
F
1
R
IN
R PACKAGE
0
AD9632
100Ω
–1
R
L
V
R
= ±5V
= 100Ω
= 300mV p-p
S
49.9Ω
–2
–3
L
V
OUT
1M
10M
100M
1G
50 100 150 200 250 300 350 400 450 500 550 600
FREQUENCY (Hz)
VALUE OF R , R (Ω)
F
IN
Figure 29. AD9632 Small Signal Frequency Response, G = +2
Figure 32. AD9632 Small Signal −3 dB Bandwidth vs. RF, RIN
0.1
0
7
R
= 425Ω
F
6
5
–0.1
–0.2
–0.3
–0.4
–0.5
–0.6
–0.7
–0.8
–0.9
R
= 275Ω
F
4
R
= 125Ω TO 425Ω
BY 100Ω
R
= 325Ω
F
F
3
R
= 375Ω
F
2
R
= 425Ω
F
1
0
–1
–2
–3
V
R
= ±5V
= 100Ω
S
V
R
= ±5V
= 100Ω
= 4V p-p
S
L
G = +2
V
L
V
= 300mV p-p
OUT
OUT
1M
10M
FREQUENCY (Hz)
100M
500M
1M
10M
FREQUENCY (Hz)
100M
Figure 33. AD9632 Large Signal Frequency Response, G = +2
Figure 30. AD9632 0.1 dB Flatness, N Package (for R Package Add 20 Ω to RF)
1
0
150
100
50
65
60
55
50
45
40
35
30
25
20
15
10
5
–1
–2
–3
PHASE
0
R , R = 267Ω
–4
–5
–6
–7
–8
–9
–50
–100
–150
–200
–250
F
IN
GAIN
0
V
= ±5V
S
–5
–10
–15
R
= 100Ω
L
V
= 300mV p-p
OUT
1M
10M
100M
1G
10k
100k
1M
10M
100M
1G
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 34. AD9632 Small Signal Frequency Response, G = −1
Figure 31. AD9632 Open-Loop Gain and Phase Margin vs. Frequency,
RL = 100 Ω
Rev. D | Page 10 of 20
Data Sheet
AD9631/AD9632
–30
0.04
0.02
0
V
R
= ±5V
= 500Ω
S
L
–40
–50
G = +2
V
= 2V p-p
OUT
–60
–0.02
–70
–0.04
0.04
–80
SECOND
HARMONIC
–90
0.02
0
–100
–110
–120
–130
THIRD
HARMONIC
–0.02
–0.04
1ST 2ND 3RD 4TH 5TH 6TH 7TH 8TH 9TH 10TH 11TH
10k
100k
1M
10M
100M
FREQUENCY (Hz)
Figure 35. AD9632 Harmonic Distortion vs. Frequency, RL = 500 Ω
Figure 38. AD9632 Differential Gain and Phase Error G = +2, RL = 150 Ω
–30
0.2
V
= ±5V
S
R
= 100Ω
L
–40
–50
G = +2
V
= 2V p-p
OUT
0.1
0
–60
SECOND
HARMONIC
–70
–80
–90
–0.1
–0.2
–0.3
THIRD
HARMONIC
–100
–110
–120
–130
10k
100k
1M
10M
100M
0
10
20
30
40
50
60
70
80
FREQUENCY (Hz)
SETTLING TIME (ns)
Figure 36. AD9632 Harmonic Distortion vs. Frequency, RL = 100 Ω
Figure 39. AD9632 Short-Term Settling Time, 2 V Step, RL = 100 Ω
50
45
40
35
30
25
20
15
10
0.3
0.2
0.1
0
–0.1
–0.2
10
100
0
1
2
3
4
5
6
7
8
9
10
FREQUENCY (MHz)
SETTLING TIME (µs)
Figure 37. AD9632 Third Order Intercept vs. Frequency
Figure 40. AD9632 Long-Term Settling Time, 2 V Step, RL = 100 Ω
Rev. D | Page 11 of 20
AD9631/AD9632
Data Sheet
24
17
15
13
11
9
V
= ±5V
V = ±5V
S
S
21
18
15
12
9
7
6
5
3
3
10
100
1k
10k
100k
10
100
1k
10k
100k
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 41. AD9631 Noise vs. Frequency
Figure 44. AD9632 Noise vs. Frequency
80
80
75
70
65
60
55
50
45
40
35
30
25
20
15
10
5
75
70
65
60
55
50
45
40
35
30
25
20
15
10
5
–PSRR
–PSRR
+PSRR
+PSRR
0
0
10k
100k
1M
10M
100M
1G
10k
100k
1M
10M
100M
1G
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 42. AD9631 PSRR vs. Frequency
Figure 45. AD9632 PSRR vs. Frequency
100
100
V
= ±5V
V = ±5V
S
S
ΔV
= 1V
= 100Ω
ΔV
= 1V
CM
CM
90
80
70
60
50
40
30
20
90
80
70
60
50
40
30
20
R
R = 100Ω
L
L
100k
1M
10M
100M
1G
100k
1M
10M
100M
1G
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 43. AD9631 CMRR vs. Frequency
Figure 46. AD9632 CMRR vs. Frequency
Rev. D | Page 12 of 20
Data Sheet
AD9631/AD9632
1k
1350
1250
1150
1050
950
V
= ±5V
S
G = +1
100
10
+A
OL
OL
AD9632
–A
850
1
750
650
0.1
550
+A
–A
OL
AD9631
40
450
OL
0.01
10k
350
100k
1M
10M
100M
–60 –40 –20
0
20
60
80
100 120 140
FREQUENCY (Hz)
JUNCTION TEMPERATURE (°C)
Figure 47. AD9631 Output Resistance vs. Frequency
Figure 50. Open-Loop Gain vs. Temperature
1k
100
10
76
74
72
70
68
66
64
62
60
58
56
V
= ±5V
S
G = +1
AD9632
–PSRR
+PSRR
–PSRR
AD9632
AD9631
1
0.1
+PSRR
40
AD9631
0.01
10k
100k
1M
10M
100M
–60 –40 –20
0
20
60
80
100 120 140
FREQUENCY (Hz)
JUNCTION TEMPERATURE (°C)
Figure 48. AD9632 Output Resistance vs. Frequency
Figure 51. PSRR vs. Temperature
4.1
4.0
3.9
3.8
3.7
3.6
3.5
3.4
3.3
98
96
94
92
90
88
86
V
= ±5V
S
+V
OUT
R
= 150Ω
L
|–V
|
OUT
R
= 50Ω
L
+V
OUT
–CMRR
+CMRR
|–V
|
OUT
–60 –40 –20
0
20
40
60
80
100 120 140
–60 –40 –20
0
20
40
60
80
100 120 140
JUNCTION TEMPERATURE (°C)
JUNCTION TEMPERATURE (°C)
Figure 49. Output Swing vs. Temperature
Figure 52. CMRR vs. Temperature
Rev. D | Page 13 of 20
AD9631/AD9632
Data Sheet
21
20
19
18
17
16
15
14
250
240
230
220
210
200
190
180
AD9631
±6V
AD9631
SINK
SOURCE
AD9632
AD9631
±6V
±5V
SINK
AD9632
AD9632
SOURCE
±5V
–60 –40 –20
0
20
40
60
80
100 120 140
–60 –40 –20
0
20
40
60
80
100 120 140
JUNCTION TEMPERATURE (°C)
JUNCTION TEMPERATURE (°C)
Figure 53. Supply Current vs. Temperature
Figure 56. Short Circuit Current vs. Temperature
–1.0
–1.5
–2.0
–2.5
–3.0
–3.5
–4.0
–4.5
–5.0
2.0
1.5
AD9632
+I
–I
B
1.0
AD9631
AD9632
0.5
V
= ±5V
= ±6V
S
B
0
V
S
–0.5
–1.0
–1.5
–2.0
AD9631
–I
B
V
V
= ±5V
= ±6V
S
+I
B
S
–60 –40 –20
0
20
40
60
80
100 120 140
–60 –40 –20
0
20
40
60
80
100 120 140
JUNCTION TEMPERATURE (°C)
JUNCTION TEMPERATURE (°C)
Figure 54. Input Offset Voltage vs. Temperature
Figure 57. Input Bias Current vs. Temperature
220
200
180
160
140
120
100
80
100
90
80
70
60
50
40
30
20
10
0
180
160
140
120
100
80
100
90
80
70
60
50
40
30
20
10
0
3 WAFER LOTS
3 WAFER LOTS
COUNT = 573
COUNT = 1373
CUMULATIVE
CUMULATIVE
FREQUENCY
DISTRIBUTION
FREQUENCY
DISTRIBUTION
60
60
40
40
20
20
0
0
–7 –6 –5 –4 –3 –2 –1
0
1
2
3
4
5
6
7
–7 –6 –5 –4 –3 –2 –1
0
1
2
3
4
5
6
7
INPUT OFFSET VOLTAGE (mV)
INPUT OFFSET VOLTAGE (mV)
Figure 55. AD9631 Input Offset Voltage Distribution
Figure 58. AD9632 Input Offset Voltage Distribution
Rev. D | Page 14 of 20
Data Sheet
AD9631/AD9632
THEORY OF OPERATION
When the AD9631 is used in the transimpedance (I to V)
GENERAL
mode, such as in photodiode detection, the value of RF and
diode capacitance (CI) are usually known. Generally, the value
of RF selected will be in the kΩ range, and a shunt capacitor (CF)
across RF will be required to maintain good amplifier stability.
The value of CF required to maintain optimal flatness (<1 dB
peaking) and settling time can be estimated by
1
The AD9631/AD9632 are wide bandwidth, voltage feedback
amplifiers. Because their open-loop frequency response follows
the conventional 6 dB/octave roll-off, their gain bandwidth
product is basically constant. Increasing their closed-loop gain
results in a corresponding decrease in small signal bandwidth.
This can be observed by noting the bandwidth specification
between the AD9631 (gain of +1) and AD9632 (gain of +2). The
AD9631/AD9632 typically maintain 65° of phase margin. This
high margin minimizes the effects of signal and noise peaking.
2
2
CF ≅
where:
[
(
2ωOCI RF −1
)
/ωO2RF
]
ωO is equal to the unity gain bandwidth product of the amplifier
in rad/sec.
CI is the equivalent total input capacitance at the inverting input.
Typically ωO = 800 × 106 rad/sec (see Figure 19).
FEEDBACK RESISTOR CHOICE
The value of the feedback resistor is critical for optimum per-
formance on the AD9631 (gain of +1) and less critical as the
gain increases. Therefore, this section is specifically targeted
at the AD9631.
As an example, choosing RF = 10 kΩ and CI = 5 pF requires CF
to be 1.1 pF (Note that CI includes both source and parasitic
circuit capacitance). The bandwidth of the amplifier can be
estimated using CF:
At the minimum stable gain (+1), the AD9631 provides opti-
mum dynamic performance with RF = 140 Ω. This resistor acts
as a parasitic suppressor only against damped RF oscillations
that can occur due to lead (input, feedback) inductance and
parasitic capacitance. This value of RF provides the best combi-
nation of wide bandwidth, low parasitic peaking, and fast
settling time.
1.6
2πRFCF
f3dB
≅
R
F
In fact, for the same reasons, place a 100 Ω to 130 Ω resistor in
series with the positive input for other AD9631 noninverting
and all AD9631 inverting configurations. The correct connec-
tion is shown in Figure 59 and Figure 60.
C
F
I
C
I
I
AD9631
V
OUT
+V
S
R
10µF
F
G = 1 +
R
G
Figure 61. Transimpedance Configuration
100Ω TO
130Ω
0.1µF
For general voltage gain applications, the amplifier bandwidth
can be closely estimated as
V
IN
R
R
IN
TERM
AD9631/
AD9632
V
OUT
ωO
1+ RF / RG
R
f3dB
≅
F
2π
(
)
0.1µF
This estimation loses accuracy for gains of +2/−1 or lower due
to the damping factor of the amplifier. For these low gain cases,
the bandwidth will actually extend beyond the calculated value
(see Figure 17 and Figure 29).
R
G
10µF
–V
S
Figure 59. Noninverting Operation
As a general rule, Capacitor CF will not be required if
+V
S
R
R
10µF
F
NG
4ωO
G = 1 –
(
RF RG × CI ≤
)
G
100Ω TO
130Ω
0.1µF
where NG is the noise gain (1 + RF/RG) of the circuit. For most
voltage gain applications, this should be the case.
R
IN
AD9631/
AD9632
V
OUT
R
F
R
G
V
IN
0.1µF
R
TERM
10µF
–V
S
Figure 60. Inverting Operation
Rev. D | Page 15 of 20
AD9631/AD9632
Data Sheet
PULSE RESPONSE
DRIVING CAPACITIVE LOADS
Unlike a traditional voltage feedback amplifier, where the slew
speed is dictated by its front end dc quiescent current and gain
bandwidth product, the AD9631/AD9632 provide on-demand
current that increases proportionally to the input step signal
amplitude. This results in slew rates (1300 V/µs) comparable
to wideband current feedback designs. This, combined with
relatively low input noise current (2.0 pA/√Hz), gives the
AD9631/AD9632 the best attributes of both voltage and
current feedback amplifiers.
The AD9631/AD9632 were designed primarily to drive non-
reactive loads. If driving loads with a capacitive component is
desired, the best frequency response is obtained by the addition
of a small series resistance as shown in Figure 62. Figure 63
shows the optimum value for RSERIES vs. capacitive load. It is
worth noting that the frequency response of the circuit when
driving large capacitive loads will be dominated by the passive
roll-off of RSERIES and CL.
R
F
LARGE SIGNAL PERFORMANCE
R
SERIES
The outstanding large signal operation of the AD9631 and
AD9632 is due to a unique, proprietary design architecture. To
maintain this level of performance, the maximum 550 V × MHz
R
AD9631/
AD9632
IN
R
L
1kΩ
R
IN
C
L
product must be observed (for example, @ 100 MHz, VOUT
≤
5.5 V p-p).
Figure 62. Driving Capacitive Loads
40
30
20
10
POWER SUPPLY BYPASSING
Adequate power supply bypassing can be critical when optimiz-
ing the performance of a high frequency circuit. Inductance in
the power supply leads can form resonant circuits that produce
peaking in the amplifier’s response. In addition, if large current
transients must be delivered to the load, then bypass capacitors
(typically greater than 1 µF) will be required to provide the best
settling time and lowest distortion. A parallel combination of at
least 4.7 µF, and between 0.1 µF and 0.01 µF, is recommended.
Some brands of electrolytic capacitors will require a small series
damping resistor ≈4.7 Ω for optimum results.
0
5
10
15
20
25
C
(pF)
L
Figure 63. Recommended RSERIES vs. Capacitive Load
Rev. D | Page 16 of 20
Data Sheet
AD9631/AD9632
APPLICATIONS INFORMATION
The AD9631/AD9632 are voltage feedback amplifiers well
suited for applications such as photodetectors, active filters,
and log amplifiers. The wide bandwidth (320 MHz), phase
margin (65°), low current noise (2.0 pA/√Hz), and slew rate
(1300 V/µs) of the devices give higher performance capabilities
to these applications over previous voltage feedback designs.
Figure 65 is an example of a 20 MHz low-pass multiple feedback
active filter using an AD9632.
+5V
10µF
R4
154Ω
C1
50pF
0.1µF
R1
154Ω
R3
78.7Ω
V
IN
C2
100pF
V
AD9632
With a settling time of 16 ns to 0.01% and 11 ns to 0.1%, the
devices are an excellent choice for DAC I/V conversion. The
same characteristics along with low harmonic distortion make
them a good choice for ADC buffering/amplification. With
superb linearity at relatively high signal frequencies, the
AD9631/AD9632 are ideal drivers for ADCs up to 12 bits.
OUT
100Ω
0.1µF
10µF
–5V
Figure 65. Active Filter Circuit
OPERATION AS A VIDEO LINE DRIVER
Choose
The AD9631/AD9632 have been designed to offer outstanding
performance as video line drivers. The important specifications
of differential gain (0.02%) and differential phase (0.02°) meet
the most exacting HDTV demands for driving video loads.
FO = cutoff frequency = 20 MHz
α = damping ratio = 1/Q = 2
−R4
R1
274Ω
274Ω
H = absolute value of circuit gain =
=1
10µF
+V
S
Then
0.1µF
k = 2πFOC1
75Ω
CABLE
75Ω
AD9631/
AD9632
4C1(H +1)
75Ω
CABLE
V
OUT
C2 =
α2
75Ω
0.1µF
10µF
V
IN
75Ω
α
R1 =
2HK
–V
S
α
R3 =
Figure 64. Video Line Driver
2K(H +1)
ACTIVE FILTERS
R4 = H(R1)
The wide bandwidth and low distortion of the AD9631/
AD9632 are ideal for the realization of higher bandwidth active
filters. These characteristics, while being more common in
many current feedback op amps, are offered in the AD9631/
AD9632 in a voltage feedback configuration. Many active
filter configurations are not realizable with current feedback
amplifiers.
A multiple feedback active filter requires a voltage feedback
amplifier and is more demanding of op amp performance than
other active filter configurations, such as the Sallen-Key. In
general, the amplifier should have a bandwidth that is at least
10 times the bandwidth of the filter if problems due to phase
shift of the amplifier are to be avoided.
Rev. D | Page 17 of 20
AD9631/AD9632
Data Sheet
ANALOG-TO-DIGITAL CONVERTER (ADC) DRIVER
LAYOUT CONSIDERATIONS
As ADCs move toward higher speeds with higher resolutions,
there becomes a need for high performance drivers that will not
degrade the analog signal to the converter. It is desirable from a
system’s standpoint that the ADC be the element in the signal
chain that ultimately limits overall distortion. Figure 66 is such
an example.
The specified high speed performance of the AD9631/AD9632
requires careful attention to board layout and component
selection. Proper RF design techniques and low-pass parasitic
component selection are mandatory.
The PCB should have a ground plane covering all unused
portions of the component side of the board to provide a low
impedance path. Remove the ground plane from the area near
the input pins to reduce stray capacitance.
140Ω
+5V
Use chip capacitors for supply bypassing (see Figure 59 and
Figure 60). Connect one end to the ground plane, and the other
within 1/8 inch of each power pin. Connect an additional large
(0.47 μF to 10 μF) tantalum electrolytic capacitor in parallel,
though not necessarily so close, to supply current for fast, large
signal changes at the output.
ADC
AD9631
130Ω
ANALOG IN
–5V
Figure 66. AD9631 Used as Driver for an ADC Signal Chain
The feedback resistor should be located close to the inverting
input pin to keep the stray capacitance at this node to a mini-
mum. Capacitance variations of less than 1 pF at the inverting
input will significantly affect high speed performance.
Use stripline design techniques for long signal traces (greater
than about 1 inch). These should be designed with a
characteristic impedance of 50 Ω or 75 Ω and be properly
terminated at each end.
Rev. D | Page 18 of 20
Data Sheet
AD9631/AD9632
OUTLINE DIMENSIONS
0.400 (10.16)
0.365 (9.27)
0.355 (9.02)
8
1
5
4
0.280 (7.11)
0.250 (6.35)
0.240 (6.10)
0.325 (8.26)
0.310 (7.87)
0.300 (7.62)
0.100 (2.54)
BSC
0.060 (1.52)
MAX
0.195 (4.95)
0.130 (3.30)
0.115 (2.92)
0.210 (5.33)
MAX
0.015
(0.38)
MIN
0.150 (3.81)
0.130 (3.30)
0.115 (2.92)
0.015 (0.38)
GAUGE
0.014 (0.36)
0.010 (0.25)
0.008 (0.20)
PLANE
SEATING
PLANE
0.022 (0.56)
0.018 (0.46)
0.014 (0.36)
0.430 (10.92)
MAX
0.005 (0.13)
MIN
0.070 (1.78)
0.060 (1.52)
0.045 (1.14)
COMPLIANT TO JEDEC STANDARDS MS-001
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
CORNER LEADS MAY BE CONFIGURED AS WHOLE OR HALF LEADS.
Figure 67. 8-Lead Plastic Dual In-Line Package [PDIP]
Narrow Body
(N-8)
Dimensions shown in inches and (millimeters)
5.00 (0.1968)
4.80 (0.1890)
8
1
5
4
6.20 (0.2441)
5.80 (0.2284)
4.00 (0.1574)
3.80 (0.1497)
0.50 (0.0196)
0.25 (0.0099)
1.27 (0.0500)
BSC
45°
1.75 (0.0688)
1.35 (0.0532)
0.25 (0.0098)
0.10 (0.0040)
8°
0°
0.51 (0.0201)
0.31 (0.0122)
COPLANARITY
0.10
1.27 (0.0500)
0.40 (0.0157)
0.25 (0.0098)
0.17 (0.0067)
SEATING
PLANE
COMPLIANT TO JEDEC STANDARDS MS-012-AA
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
Figure 68. 8-Lead Standard Small Outline Package [SOIC_N]
Narrow Body
(R-8)
Dimensions shown in millimeters and (inches)
Rev. D | Page 19 of 20
AD9631/AD9632
Data Sheet
ORDERING GUIDE
Model1
AD9631ANZ
Temperature Range
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
Package Description
Package Option
N-8
8-Lead Plastic Dual In-Line Package [PDIP]
AD9631AR
8-Lead Standard Small Outline Package [SOIC_N] R-8
8-Lead Standard Small Outline Package [SOIC_N] R-8
8-Lead Standard Small Outline Package [SOIC_N] R-8
8-Lead Standard Small Outline Package [SOIC_N] R-8
8-Lead Standard Small Outline Package [SOIC_N] R-8
8-Lead Standard Small Outline Package [SOIC_N] R-8
AD9631 Evaluation Board
AD9631AR-REEL
AD9631AR-REEL7
AD9631ARZ
AD9631ARZ-REEL
AD9631ARZ-REEL7
AD9631AR-EBZ
AD9631ACHIPS
AD9632ANZ
AD9632AR
AD9632ARZ
AD9632ARZ-REEL
AD9632ARZ-REEL7
AD9632AR-EBZ
Die
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
8-Lead Plastic Dual In-Line Package [PDIP]
N-8
8-Lead Standard Small Outline Package [SOIC_N] R-8
8-Lead Standard Small Outline Package [SOIC_N] R-8
8-Lead Standard Small Outline Package [SOIC_N] R-8
8-Lead Standard Small Outline Package [SOIC_N] R-8
AD9632 Evaluation Board
1 Z = RoHS Compliant Part.
©2014 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D00601-0-2/14(D)
Rev. D | Page 20 of 20
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