ADA4412-3ARQZ-REEL [ADI]

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ADA4412-3ARQZ-REEL
型号: ADA4412-3ARQZ-REEL
厂家: ADI    ADI
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Integrated Triple Video Filter with Selectable  
Cutoff Frequencies for RGB, HD/SD  
ADA4412-3  
FUNCTIONAL BLOCK DIAGRAM  
FEATURES  
Sixth-order adjustable video filters  
36 MHz, 18 MHz, and 9 MHz  
Many video standards supported: RGB, YPbPr, YUV, SD, Y/C  
Ideal for 720p and 1080i resolutions  
−1 dB bandwidth of 31.5 MHz for HD  
Low quiescent power  
Only 265 mW for 3 channels on 5 V supply  
Disable feature cuts supply current to 10 μA  
DC output offset adjust: 0.5 V, input referred  
Fixed throughput gain of ×2  
Excellent video specifications  
Wide supply range: +4.5 V to 5 V  
Rail-to-rail output  
Output can swing 4.5 V p-p on single 5 V supply  
Small packaging: 20-lead QSOP  
Y/G OUT  
Pb/B OUT  
Pr/R OUT  
×1  
×1  
×1  
×2  
×2  
×2  
Y/G IN  
Pb/B IN  
Pr/R IN  
36MHz, 18MHz, 9MHz  
36MHz, 18MHz, 9MHz  
36MHz, 18MHz, 9MHz  
ADA4412-3  
DC  
OFFSET  
LEVEL1  
LEVEL2  
2
CUTOFF SELECT  
DISABLE  
Figure 1.  
APPLICATIONS  
Set-top boxes  
DVD players and recorders  
Personal video recorders  
HDTVs  
Projectors  
GENERAL DESCRIPTION  
The ADA4412-3 is a comprehensive filtering solution designed  
to give designers the flexibility to easily filter and drive various  
video signals, including high definition video. Cutoff frequen-  
cies of the sixth-order video filters range from 9 MHz to  
36 MHz and can be selected by two logic pins to obtain four  
filter combinations that are tuned for RGB, high definition, and  
standard definition video signals. The ADA4412-3 has a rail-to-  
rail output that can swing 4.5 V p-p on a single 5 V supply.  
The ADA4412-3 can operate on a single +5 V supply as  
well as on 5 V supplies. Single-supply operation is ideal in  
applications where power consumption is critical. The disable  
feature allows for further power conservation by reducing the  
supply current to typically 1ꢀ μA when a particular device is not  
in use.  
Dual-supply operation is best for applications where the  
negative-going video signal excursions must swing at or below  
ground while maintaining excellent video performance. The  
output buffers have the ability to drive two 75 Ω doubly  
terminated cables that are either dc-coupled or ac-coupled.  
The ADA4412-3 includes an output offset voltage adjustment  
feature. Output voltage offset is continuously adjustable over an  
input-referred range of 5ꢀꢀ mV by applying a differential  
voltage to an independent offset control input.  
The ADA4412-3 is available in a 2ꢀ-lead QSOP and is rated for  
operation over the extended industrial temperature range of  
−4ꢀ°C to +85°C.  
Rev. 0  
Information furnished by Analog Devices is believed to be accurate and reliable. However, no  
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other  
rights of third parties that may result from its use. Specifications subject to change without notice. No  
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.  
Trademarks and registeredtrademarks arethe property of their respective owners.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781.329.4700  
Fax: 781.461.3113  
www.analog.com  
© 2005 Analog Devices, Inc. All rights reserved.  
 
ADA4412-3  
TABLE OF CONTENTS  
Features .............................................................................................. 1  
Applications..................................................................................... 1ꢀ  
Overview ..................................................................................... 1ꢀ  
Disable ......................................................................................... 1ꢀ  
Cutoff Frequency Selection....................................................... 1ꢀ  
Output DC Offset Control........................................................ 1ꢀ  
Input and Output Coupling ...................................................... 11  
Printed Circuit Board Layout ................................................... 11  
Video Encoder Reconstruction Filter...................................... 11  
Outline Dimensions....................................................................... 13  
Ordering Guide .......................................................................... 13  
Applications....................................................................................... 1  
Functional Block Diagram .............................................................. 1  
General Description......................................................................... 1  
Revision History ............................................................................... 2  
Specifications..................................................................................... 3  
Absolute Maximum Ratings............................................................ 5  
Thermal Resistance ...................................................................... 5  
ESD Caution.................................................................................. 5  
Pin Configuration And Function Descriptions............................ 6  
Typical Performance Characteristics ............................................. 7  
Theory of Operation ........................................................................ 9  
REVISION HISTORY  
7/05—Revision 0: Initial Version  
Rev. 0 | Page 2 of 16  
 
ADA4412-3  
SPECIFICATIONS  
VS = 5 V, @ TA = 25°C, VO = 1.4 V p-p, RL = 15ꢀ Ω, unless otherwise noted.  
Table 1.  
Parameter  
Test Conditions/Comments  
Min  
Typ  
Max  
Unit  
OVERALL PERFORMANCE  
Offset Error  
Offset Adjust Range  
Input Voltage Range, All Inputs  
Output Voltage Swing, All Outputs  
Input referred, all channels  
Input referred  
9
23  
mV  
mV  
V
V
V
±±00  
VS− − 0.1  
VS+ − 2.0  
Positive swing  
Negative swing  
VS+ − 0.30 VS+ − 0.20  
VS− + 0.10 VS− + 0.1±  
Linear Output Current per Channel  
Integrated Voltage Noise, Referred to Input  
Filter Input Bias Current  
Total Harmonic Distortion at 1 MHz  
Gain Error Magnitude  
30  
0.±0  
6.6  
0.01/0.04  
mA  
mV rms  
μA  
%
All channels  
All channels  
FC = 36 MHz, FC = 18 MHz/FC = 9 MHz  
0.09  
0.49  
dB  
FILTER DYNAMIC PERFORMANCE  
−1 dB Bandwidth  
Cutoff frequency select = 36 MHz  
Cutoff frequency select = 18 MHz  
Cutoff frequency select = 9 MHz  
Cutoff frequency select = 36 MHz  
Cutoff frequency select = 18 MHz  
Cutoff frequency select = 9 MHz  
f = 7± MHz  
f = ± MHz, FC = 36 MHz  
f = ± MHz, FC = 36 MHz  
Cutoff frequency select = 36 MHz  
Cutoff frequency select = 18 MHz  
Cutoff frequency select = 9 MHz  
NTSC, FC = 9 MHz  
26.±  
13.±  
6.±  
34  
16  
8
31.±  
1±.±  
8.0  
37  
19  
9
−43  
−62  
19  
7
14  
MHz  
MHz  
MHz  
MHz  
MHz  
MHz  
dB  
dB  
ns  
ns  
ns  
−3 dB Bandwidth  
Out-of-Band Rejection  
Crosstalk  
Propagation Delay  
Group Delay Variation  
−31  
27  
0.16  
0.0±  
ns  
%
Degrees  
Differential Gain  
Differential Phase  
NTSC, FC = 9 MHz  
CUTOFF CONTROL INPUT PERFORMANCE  
Input Logic 0 Voltage  
Input Logic 1 Voltage  
Input Bias Current  
0.8  
1±  
V
V
μA  
2.0  
10  
DISABLE PERFORMANCE  
DISABLE Assert Voltage  
DISABLE Assert Time  
DISABLE Deassert Time  
DISABLE Input Bias Current  
Input-to-Output Isolation—Disabled  
POWER SUPPLY  
VS+ − 0.±  
100  
130  
12  
90  
V
ns  
ns  
μA  
dB  
f = 10 MHz  
Operating Range  
4.±  
12  
V
Quiescent Current  
±3  
10  
70  
60  
±6  
1±0  
mA  
μA  
dB  
dB  
Quiescent Current—Disabled  
PSRR, Positive Supply  
PSRR, Negative Supply  
All channels  
All channels  
64  
±8  
Rev. 0 | Page 3 of 16  
 
 
ADA4412-3  
VS = 5 V, @ TA = 25°C, VO = 1.4 V p-p, RL = 15ꢀ Ω, unless otherwise noted.  
Table 2.  
Parameter  
Test Conditions/Comments  
Min  
Typ  
Max  
Unit  
OVERALL PERFORMANCE  
Offset Error  
Offset Adjust Range  
Input Voltage Range, All Inputs  
Output Voltage Swing, All Outputs  
Input referred, all channels  
Input referred  
10  
±±00  
2±  
mV  
mV  
V
V
V
VS− − 0.1  
VS+ − 2.0  
Positive swing  
Negative swing  
VS+ − 0.33 VS+ − 0.24  
VS− + 0.24 VS− + 0.33  
Linear Output Current per Channel  
Integrated Voltage Noise, Referred to Input  
Filter Input Bias Current  
Total Harmonic Distortion at 1 MHz  
Gain Error Magnitude  
30  
0.±0  
6.3  
0.01/0.03  
mA  
mV rms  
μA  
%
All channels  
All channels  
FC = 36 MHz, FC = 18 MHz/FC = 9 MHz  
0.04  
0.±0  
dB  
FILTER DYNAMIC PERFORMANCE  
−1 dB Bandwidth  
Cutoff frequency select = 36 MHz  
Cutoff frequency select = 18 MHz  
Cutoff frequency select = 9 MHz  
Cutoff frequency select = 36 MHz  
Cutoff frequency select = 18 MHz  
Cutoff frequency select = 9 MHz  
f = 7± MHz  
f = ± MHz, FC = 36 MHz  
f = ± MHz, FC = 36 MHz  
Cutoff frequency select = 36 MHz  
Cutoff frequency select = 18 MHz  
Cutoff frequency select = 9 MHz  
NTSC, FC = 9 MHz  
30.0  
1±.±  
8.0  
36  
19  
9
−42  
−62  
19  
7
12  
MHz  
MHz  
MHz  
MHz  
MHz  
MHz  
dB  
dB  
ns  
ns  
ns  
−3 dB Bandwidth  
34  
17  
8
Out-of-Band Rejection  
Crosstalk  
Propagation Delay  
Group Delay Variation  
−31  
24  
0.04  
0.16  
ns  
%
Degrees  
Differential Gain  
Differential Phase  
NTSC, FC = 9 MHz  
CUTOFF CONTROL INPUT PERFORMANCE  
Input Logic 0 Voltage  
Input Logic 1 Voltage  
Input Bias Current  
0.8  
1±  
V
V
μA  
2.0  
10  
DISABLE PERFORMANCE  
DISABLE Assert Voltage  
DISABLE Assert Time  
DISABLE Deassert Time  
DISABLE Input Bias Current  
Input-to-Output Isolation—Disabled  
POWER SUPPLY  
VS+ − 0.±  
7±  
12±  
3±  
V
ns  
ns  
μA  
dB  
f = 10 MHz  
90  
Operating Range  
4.±  
12  
V
Quiescent Current  
±7  
10  
74  
62  
60  
1±0  
mA  
μA  
dB  
dB  
Quiescent Current—Disabled  
PSRR, Positive Supply  
PSRR, Negative Supply  
All channels  
All channels  
66  
±9  
Rev. 0 | Page 4 of 16  
ADA4412-3  
ABSOLUTE MAXIMUM RATINGS  
Table 3.  
Parameter  
Supply Voltage  
Power Dissipation  
Storage Temperature  
Operating Temperature Range  
Lead Temperature Range (Soldering 10 sec)  
Junction Temperature  
The power dissipated in the package (PD) is the sum of the  
Rating  
quiescent power dissipation and the power dissipated in the  
package due to the load drive for all outputs. The quiescent  
power is the voltage between the supply pins (VS) times the  
quiescent current (IS). The power dissipated due to load drive  
depends on the particular application. For each output, the  
power due to load drive is calculated by multiplying the load  
current by the associated voltage drop across the device. The  
power dissipated due to all of the loads is equal to the sum of  
the power dissipations due to each individual load. RMS  
voltages and currents must be used in these calculations.  
12 V  
See Figure 2  
–6±°C to +12±°C  
–40°C to +8±°C  
300°C  
1±0°C  
Stresses above those listed under Absolute Maximum Ratings  
may cause permanent damage to the device. This is a stress  
rating only; functional operation of the device at these or any  
other conditions above those indicated in the operational  
section of this specification is not implied. Exposure to absolute  
maximum rating conditions for extended periods may affect  
device reliability.  
Airflow increases heat dissipation, effectively reducing θJA.  
In addition, more metal directly in contact with the package  
leads from metal traces, through-holes, ground, and power  
planes reduces the θJA.  
THERMAL RESISTANCE  
Figure 2 shows the maximum safe power dissipation in the  
package vs. the ambient temperature for the 2ꢀ-lead QSOP  
(83°C/W) on a JEDEC standard 4-layer board. θJA values are  
approximations.  
θJA is specified for the worst-case conditions, that is, θJA is  
specified for device soldered in circuit board for surface-mount  
packages.  
Table 4. Thermal Resistance  
Package Type  
20-Lead QSOP  
2.5  
2.3  
2.1  
1.9  
1.7  
1.5  
1.3  
1.1  
0.9  
0.7  
0.5  
θJA  
Unit  
83  
°C/W  
Maximum Power Dissipation  
The maximum safe power dissipation in the ADA4412-3  
package is limited by the associated rise in junction temperature  
(TJ) on the die. At approximately 15ꢀ°C, which is the glass  
transition temperature, the plastic changes its properties.  
Even temporarily exceeding this temperature limit may change  
the stresses that the package exerts on the die, permanently  
shifting the parametric performance of the ADA4412-3.  
Exceeding a junction temperature of 15ꢀ°C for an extended  
period can result in changes in the silicon devices potentially  
causing failure.  
–40  
–20  
0
20  
40  
60  
80  
AMBIENT TEMPERATURE (°C)  
Figure 2. Maximum Power Dissipation vs. Temperature for a 4-Layer Board  
ESD CAUTION  
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on  
the human body and test equipment and can discharge without detection. Although this product features  
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy  
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance  
degradation or loss of functionality.  
Rev. 0 | Page ± of 16  
 
 
ADA4412-3  
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS  
1
2
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
LEVEL1  
DISABLE  
Y/G  
LEVEL2  
VCC  
3
Y/G_OUT  
VEE  
4
GND  
ADA4412-3  
5
Pb/B  
Pb/B_OUT  
VEE  
TOP VIEW  
(Not to Scale)  
6
GND  
7
Pr/R  
Pr/R_OUT  
VCC  
8
F_SEL_A  
F_SEL_B  
GND  
9
NC  
10  
DGND  
NC = NO CONNECT  
Figure 3. 20-Lead QSOP Pin Configuration  
Table 5. 20-Lead QSOP Pin Function Descriptions  
Pin No.  
Name  
LEVEL1  
DISABLE  
Y/G  
Description  
1
2
3
DC Level Adjust Pin 1  
Disable/Power Down  
Y/G Video Input  
4
±
GND  
Pb/B  
Signal Ground Reference  
Pb/B Video Input  
6
7
GND  
Pr/R  
Signal Ground Reference  
Pr/R Video Input  
8
9
F_SEL_A  
F_SEL_B  
GND  
DGND  
NC  
VCC  
Pr/R_OUT  
VEE  
Pb/B_OUT  
VEE  
Y/G_OUT  
VCC  
Filter Cutoff Select Input A  
Filter Cutoff Select Input B  
Signal Ground Reference  
Digital Ground Reference  
No Internal Connection  
Positive Power Supply  
Pr/R Video Output  
Negative Power Supply  
Pb/B Video Output  
Negative Power Supply  
Y/G Video Output  
10  
11  
12  
13  
14  
1±  
16  
17  
18  
19  
20  
Positive Power Supply  
DC Level Adjust Pin 2  
LEVEL2  
Rev. 0 | Page 6 of 16  
 
ADA4412-3  
TYPICAL PERFORMANCE CHARACTERISTICS  
Unless otherwise noted, RL = 15ꢀ ꢁ, VO = 1.4 V p-p, VS = 5 V, TA = 25°C.  
9
6
3
0
9
6
3
F
= 36MHz  
F = 36MHz  
C
C
0
F
= 9MHz  
–3  
–6  
–9  
–3  
–6  
–9  
C
F
F
= 9MHz  
C
= 18MHz  
–12  
–15  
–18  
–21  
–24  
–27  
–30  
–33  
–36  
–39  
–42  
–45  
–48  
–12  
–15  
–18  
–21  
–24  
–27  
–30  
–33  
–36  
–39  
–42  
–45  
–48  
C
F
= 18MHz  
C
BLACK LINE: V = +5V  
GRAY LINE: V = ±5V  
S
S
–40°C  
+25°C  
+85°C  
1
10  
FREQUENCY (MHz)  
100  
1
10  
FREQUENCY (MHz)  
100  
Figure 4. Frequency Response vs. Power Supply and Cutoff Frequency  
Figure 7. Frequency Response vs. Temperature and Cutoff Frequency  
6.5  
100  
F
= 36MHz  
BLACK LINE: V = +5V  
S
C
GRAY LINE: V = ±5V  
90  
80  
70  
60  
50  
40  
30  
20  
10  
S
6.0  
5.5  
5.0  
4.5  
4.0  
3.5  
3.0  
F
= 9MHz  
C
F
= 9MHz  
C
F
= 18MHz  
C
F
= 18MHz  
C
BLACK LINE: V = +5V  
GRAY LINE: V = ±5V  
S
S
F
= 36MHz  
C
1
10  
FREQUENCY (MHz)  
100  
1
10  
FREQUENCY (MHz)  
100  
Figure 5. Frequency Response Flatness vs. Cutoff Frequency  
Figure 8. Group Delay vs. Frequency, Power Supply, and Cutoff Frequency  
9
–40  
R
= 300Ω  
6
3
0
–3  
–6  
SOURCE  
F
= 36MHz  
C
Y AND Pr SOURCE CHANNELS  
Pb RECEPTOR CHANNEL  
–50  
–60  
F = 9MHz  
C
–9  
–12  
–15  
–18  
–21  
–24  
–27  
–30  
–33  
–36  
–39  
–42  
–45  
–48  
F
= 18MHz  
C
F
= 9MHz  
C
–70  
F
= 18MHz  
C
–80  
F
= 36MHz  
C
BLACK LINE:  
= 100mV p-p  
GRAY LINE:  
= 2V p-p  
–90  
V
OUT  
V
OUT  
–100  
1
10  
FREQUENCY (MHz)  
100  
0.1  
1
10  
FREQUENCY (MHz)  
100  
Figure 6. Frequency Response vs. Output Amplitude and Cutoff Frequency  
Figure 9. Channel-to-Channel Crosstalk vs. Frequency and Cutoff Frequency  
Rev. 0 | Page 7 of 16  
 
ADA4412-3  
5
5
–5  
–5  
–15  
–25  
–35  
–15  
–25  
–35  
–45  
–55  
–65  
–75  
F
= 9MHz  
C
F
= 9MHz  
F = 18MHz  
C
C
F
= 18MHz  
C
–45  
–55  
–65  
–75  
F
= 36MHz  
C
F
= 36MHz  
C
0.1  
1
10  
FREQUENCY (MHz)  
100  
0.1  
1
10  
FREQUENCY (MHz)  
100  
Figure 10. Positive Supply PSRR vs. Frequency and Cutoff Frequency  
Figure 13. Negative Supply PSRR vs. Frequency and Cutoff Frequency  
3.5  
3.3  
3.1  
2.9  
2.7  
2.5  
2.3  
2.1  
1.9  
1.7  
1.5  
2.5  
6
2 ×  
INPUT  
OUTPUT  
2.0  
F
= 36MHz  
2× INPUT  
C
5
4
1.5  
1.0  
0.5% (70ns)  
F
= 18MHz  
C
0.5  
ERROR  
3
0
F
= 9MHz  
C
2
–0.5  
–1.0  
–1.5  
–2.0  
–2.5  
1
1% (58ns)  
0
200ns/DIV  
50ns/DIV  
–1  
Figure 11. Settling Time  
Figure 14. Overdrive Recovery vs. Cutoff Frequency  
3.5  
3.3  
3.1  
2.9  
2.7  
2.5  
2.3  
2.1  
1.9  
1.7  
1.5  
F
= 36MHz  
= 18MHz  
C
F
C
F
= 9MHz  
C
NETWORK  
NETWORK  
R
= 150Ω  
ANALYZER Tx  
L
ANALYZER Rx  
50Ω  
118Ω  
DUT  
50Ω  
50Ω  
86.6Ω  
100ns/DIV  
MINIMUM-LOSS MATCHING NETWORK LOSS CALIBRATED OUT  
Figure 15. Basic Test Circuit for Swept Frequency Measurements  
Figure 12. Transient Response vs. Cutoff Frequency  
Rev. 0 | Page 8 of 16  
ADA4412-3  
THEORY OF OPERATION  
The ADA4412-3 is an integrated video filtering and driving  
solution that offers variable bandwidth to meet the needs of a  
number of different video resolutions. There are three filters  
targeted for use with component video signals. The filters  
have selectable bandwidths that correspond to the popular  
component video standards. Each filter has a sixth-order  
Butterworth response that includes group delay optimization.  
The group delay variation from 1 MHz to 36 MHz in the  
36 MHz section is 7 ns, which produces a fast settling pulse  
response.  
For single-supply applications (VS− = GND), the input voltage  
range extends from 1ꢀꢀ mV below ground to within 2.ꢀ V of  
the most positive supply. Each filter input includes level-shifting  
circuitry. The level-shifting circuitry adds a dc component to  
ground-referenced input signals so that they can be reproduced  
accurately without the output buffers hitting the negative rail.  
Because the filters have negative rail input and rail-to-rail  
output, dc level shifting is generally not necessary, unless  
accuracy greater than that of the saturated output of the driver  
is required at the most negative edge. This varies with load but  
is typically 1ꢀꢀ mV in a dc-coupled, single-supply application. If  
ac coupling is used, the saturated output level is higher because  
the drivers have to sink more current on the low side. If dual  
supplies are used (VS− < GND), no level shifting is required. In  
dual-supply applications, the level-shifting circuitry can be used  
to take a ground referenced signal and put the blanking level at  
ground while the sync level is below ground.  
The ADA4412-3 is designed to operate in many video environ-  
ments. The supply range is 5 V to 12 V, single supply or dual  
supply, and requires a relatively low nominal quiescent current  
of 15 mA per channel. In single-supply applications, the PSRR  
is greater than 6ꢀ dB, providing excellent rejection in systems  
with supplies that are noisy or under-regulated. In applications  
where power consumption is critical, the part can be powered  
down to draw typically 1ꢀ μA by pulling the DISABLE pin to  
the most positive rail. The ADA4412-3 is also well-suited for  
high encoding frequency applications because it maintains a  
stop-band attenuation of over 4ꢀ dB to 4ꢀꢀ MHz.  
The output drivers on the ADA4412-3 have rail-to-rail output  
capabilities with 6 dB gain. Each output is capable of driving  
two ac- or dc-coupled, 75 Ω source-terminated loads. If a large  
dc output level is required while driving two loads, ac coupling  
should be used to limit the power dissipation.  
The ADA4412-3 is intended to take dc-coupled inputs  
from an encoder or other ground referenced video signals.  
The ADA4412-3 input is high impedance. No minimum or  
maximum input termination is required, though input  
terminations above 1 kΩ can degrade crosstalk performance  
at high frequencies. No clamping is provided internally. For  
applications where dc restoration is required, dual supplies  
work best. Using a termination resistance of less than a few  
hundred ohms to ground on the inputs and suitably adjusting  
the level-shifting circuitry provides precise placement of the  
output voltage.  
Rev. 0 | Page 9 of 16  
 
ADA4412-3  
APPLICATIONS  
OVERVIEW  
OUTPUT DC OFFSET CONTROL  
With its high impedance inputs and high output drive, the  
ADA4412-3 is ideally suited to video reconstruction and  
antialias filtering applications. The high impedance inputs give  
designers flexibility with regard to how the input signals are  
terminated. Devices with DAC current source outputs that feed  
the ADA4412-3 can be loaded in whatever resistance provides  
the best performance, and devices with voltage outputs can be  
optimally terminated as well. The ADA4412-3 outputs can each  
drive up to two source-terminated 75 Ω loads and can therefore  
directly drive the outputs from set-top boxes, DVD players, and  
the like without the need for a separate output buffer.  
The LEVEL1 and LEVEL2 inputs work as a differential, input-  
referred output offset control. In other words, the output offset  
voltage of a given channel is equal to the difference in voltage  
between the LEVEL1 and LEVEL2 inputs multiplied by the  
overall filter gain. This relationship is expressed in Equation 1.  
VOS (OUT) =  
(2  
)(LEVEL1LEVEL2)  
(1)  
LEVEL1 and LEVEL2 are the voltages applied to the respective  
inputs, and the factor of 2 reflects the gain of ×2 in the output  
stage.  
For example, setting LEVEL1 to 3ꢀꢀ mV and LEVEL2 to ꢀ V  
shifts the offset voltages at the ADA4412-3 outputs to 6ꢀꢀ mV.  
This particular setting can be used in most single-supply  
applications to keep the output swings safely above the negative  
supply rail.  
Binary control inputs are provided to select the filter cutoff  
frequency. These inputs are compatible with 3 V and 5 V TTL  
and CMOS logic levels referenced to GND. The disable feature  
is asserted by pulling the DISABLE pin to the positive supply.  
The LEVEL1 and LEVEL2 inputs comprise a differential input  
that controls the dc level at the output pins.  
The maximum differential voltage that can be applied across the  
LEVEL1 and LEVEL2 inputs is 5ꢀꢀ mV. From a single-ended  
standpoint, the LEVEL1 and LEVEL2 inputs have the same  
range as the filter inputs. See the Specifications for the limits.  
The LEVEL1 and LEVEL2 inputs must each be bypassed to  
GND with a ꢀ.1 μF ceramic capacitor.  
DISABLE  
The ADA4412-3 includes a disable feature that can be used  
to save power when a particular device is not in use. As  
indicated in the Overview section, the disable feature is  
asserted by pulling the DISABLE pin to the positive supply.  
The DISABLE pin also functions as a reference level for the  
logic inputs and therefore must be connected to ground when  
the device is not disabled.  
In single-supply applications, a positive output offset must be  
applied to keep the negative-most excursions of the output  
signals above the specified minimum output swing limit.  
Figure 16 and Figure 17 illustrate several ways to use the  
LEVEL1 and LEVEL2 inputs. Figure 16 shows examples of how  
to generate fully adjustable LEVEL1 and LEVEL2 voltages from  
5 V and single +5 V supplies. These circuits show a general  
case, but a more practical approach is to fix one voltage and  
vary the other. Figure 17 illustrates an effective way to produce  
a 6ꢀꢀ mV output offset voltage in a single-supply application.  
Although the LEVEL2 input could simply be connected to  
GND, Figure 17 includes bypassed resistive voltage dividers for  
each input so that the input levels can be changed, if necessary.  
Additionally, many in-circuit testers require that I/O signals not  
be tied directly to the supplies or GND. DNP indicates do not  
populate.  
Table 6 summarizes the disable feature operation.  
Table 6. DISABLE Function  
DISABLE Pin Connection  
Status  
VS+  
GND  
Disabled  
Enabled  
CUTOFF FREQUENCY SELECTION  
Four combinations of cutoff frequencies are provided for the  
video signals. The cutoff frequencies have been selected to  
correspond with the most commonly deployed component  
video scanning systems. Selection between the cutoff frequency  
combinations is controlled by the logic signals applied to the  
F_SEL_A and F_SEL_B inputs. Table 7 summarizes cutoff  
frequency selection.  
Table 7. Filter Cutoff Frequency Selection  
F_SEL_A F_SEL_B Y/G Cutoff Pb/B Cutoff Pr/R Cutoff  
0
0
1
1
0
1
0
1
36 MHz  
36 MHz  
18 MHz  
9 MHz  
36 MHz  
18 MHz  
18 MHz  
9 MHz  
36 MHz  
18 MHz  
18 MHz  
9 MHz  
Rev. 0 | Page 10 of 16  
 
 
 
 
ADA4412-3  
75Ω  
DUAL SUPPLY  
CABLE  
220μF  
220μF  
+5V  
9.53kΩ  
+5V  
75Ω  
75Ω  
ADA4412-3  
9.53kΩ  
1kΩ  
75Ω  
75Ω  
LEVEL1  
0.1μF  
LEVEL2  
0.1μF  
75Ω  
CABLE  
1kΩ  
9.53kΩ  
9.53kΩ  
–5V  
–5V  
SINGLE SUPPLY  
Figure 18. Driving Two AC-Coupled Loads with Two Coupling Capacitors  
+5V  
+5V  
75Ω  
CABLE  
9.09kΩ  
1kΩ  
9.09kΩ  
1kΩ  
75Ω  
ADA4412-3  
LEVEL1  
0.1μF  
LEVEL2  
0.1μF  
470μF  
75Ω  
75Ω  
CABLE  
Figure 16. Generating Fully Adjustable Output Offsets  
75Ω  
75Ω  
+5V  
10kΩ  
+5V  
DNP  
Figure 19. Driving Two AC-Coupled Loads with One Common Coupling Capacitor  
PRINTED CIRCUIT BOARD LAYOUT  
LEVEL1  
0.1μF  
LEVEL2  
DNP  
As with all high speed applications, attention to printed  
circuit board layout is of paramount importance. Standard high  
speed layout practices should be adhered to when designing  
with the ADA4412-3. A solid ground plane is recommended,  
and surface-mount, ceramic power supply decoupling  
capacitors should be placed as close as possible to the supply  
pins. All of the ADA4412-3 GND pins should be connected to  
the ground plane with traces that are as short as possible.  
Controlled impedance traces of the shortest length possible  
should be used to connect to the signal I/O pins and should not  
pass over any voids in the ground plane. A 75 Ω impedance  
level is typically used in video applications. All signal outputs of  
the ADA4412-3 should include series termination resistors  
when driving transmission lines.  
634Ω  
0Ω  
Figure 17. Flexible Circuits to Set the LEVEL1 and LEVEL2 Inputs to  
Obtain a 600 mV Output Offset on a Single Supply  
INPUT AND OUTPUT COUPLING  
Inputs to the ADA4412-3 are normally dc-coupled. Ac coupling  
the inputs is not recommended; however, if ac coupling is  
necessary, suitable circuitry must be provided following the ac  
coupling element to provide proper dc level and bias currents at  
the ADA4412-3 input stages. The ADA4412-3 outputs can be  
either ac- or dc-coupled.  
When driving single ac-coupled loads in standard 75 Ω video  
distribution systems, 22ꢀ μF coupling capacitors are  
recommended for use on all but the chrominance signal output.  
Since the chrominance signal is a narrow-band modulated  
carrier, it has no low frequency content and can therefore be  
coupled with a ꢀ.1 μF capacitor.  
When the ADA4412-3 receives its inputs from a device  
with current outputs, the required load resistor value for  
the output current is often different from the characteristic  
impedance of the signal traces. In this case, if the interconnec-  
tions are sufficiently short (<< ꢀ.1 wavelength), the trace does  
not have to be terminated in its characteristic impedance.  
Traces of 75 ꢁ can be used in this instance, provided their  
lengths are an inch or two at the most. This is easily achieved  
because the ADA4412-3 and the device feeding it are usually  
adjacent to each other, and connections can be made that are  
less than one inch in length.  
There are two ac coupling options when driving two loads from  
one output. One simply uses the same value capacitor on the  
second load, while the other is to use a common coupling  
capacitor that is at least twice the value used for the single load  
(see Figure 18 and Figure 19).  
When driving two parallel 15ꢀ Ω loads (75 Ω effective load),  
the 3 dB bandwidth of the filters typically varies from that of  
the filters with a single 15ꢀ Ω load. For the 9 MHz and 18 MHz  
filters, the typical variation is within 1.ꢀ%; for the 36 MHz  
filters, the typical variation is within 2.5%.  
VIDEO ENCODER RECONSTRUCTION FILTER  
The ADA4412-3 is easily applied as a reconstruction filter at the  
DAC outputs of a video encoder. Figure 2ꢀ illustrates how to use  
the ADA4412-3 in this type of application with an ADV7322 video  
encoder in a single-supply application with ac-coupled outputs.  
Rev. 0 | Page 11 of 16  
 
 
 
 
 
ADA4412-3  
5V  
(ANALOG)  
0.1μF  
0.1μF  
DNP  
10kΩ  
634Ω  
13  
19  
VCC  
VCC  
0.1μF  
0Ω  
1
LEVEL1  
20  
LEVEL2  
ADA4412-3  
0.1μF  
2
DISABLE  
8
9
CUTOFF  
F_SEL_A  
F_SEL_B  
FREQUENCY  
SELECT  
ADV7322  
VIDEO ENCODER  
INPUT  
3
5
7
220μF  
220μF  
220μF  
75Ω  
75Ω  
75Ω  
Y/G  
18  
Y/G_OUT  
R
L
L
VIDEO  
DAC  
Pb/B  
16  
14  
OUTPUTS  
Pb/B_OUT  
Pr/R_OUT  
R
R
Pr/R  
GND  
L
DGND  
11  
VEE  
4, 6, 10  
15, 17  
Figure 20. The ADA4412-3 Applied as a Single-Supply Reconstruction Filter Following the ADV7322  
Rev. 0 | Page 12 of 16  
 
ADA4412-3  
OUTLINE DIMENSIONS  
0.341  
BSC  
20  
1
11  
10  
0.154  
BSC  
0.236  
BSC  
PIN 1  
0.065  
0.049  
0.069  
0.053  
8°  
0°  
0.010  
0.004  
0.025  
BSC  
0.012  
0.008  
SEATING  
PLANE  
0.050  
0.016  
0.010  
0.006  
COPLANARITY  
0.004  
COMPLIANT TO JEDEC STANDARDS MO-137-AD  
Figure 21. 20-Lead Shrink Small Outline Package [QSOP]  
(RQ-20)  
Dimensions shown in inches  
ORDERING GUIDE  
Model  
ADA4412-3ARQZ1  
ADA4412-3ARQZ-R71  
ADA4412-3ARQZ-RL1  
Temperature Range  
–40°C to +8±°C  
–40°C to +8±°C  
Package Description  
20-Lead QSOP  
20-Lead QSOP  
Order Quantity  
Package Option  
1
RQ-20  
RQ-20  
RQ-20  
1,000  
2,±00  
–40°C to +8±°C  
20-Lead QSOP  
1 Z = Pb-free part.  
Rev. 0 | Page 13 of 16  
 
 
ADA4412-3  
NOTES  
Rev. 0 | Page 14 of 16  
ADA4412-3  
NOTES  
Rev. 0 | Page 1± of 16  
ADA4412-3  
NOTES  
©
2005 Analog Devices, Inc. All rights reserved. Trademarks and  
registered trademarks are the property of their respective owners.  
D05528–0–7/05(0)  
Rev. 0 | Page 16 of 16  

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