ADA4637-1ACPZ-R2 [ADI]
30 V, High Speed, Low Noise, Low Bias Current; 30 V ，高速，低噪声，低偏置电流
| 型号： | ADA4637-1ACPZ-R2 |
| 厂家： | 
ADI |
| 描述： | 30 V, High Speed, Low Noise, Low Bias Current |
| 文件： | 总20页 (文件大小：761K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
30 V, High Speed, Low Noise, Low Bias
Current, JFET Operational Amplifier
Data Sheet
ADA4627-1/ADA4637-1
FEATURES
PIN CONFIGURATIONS
Low offset voltage: 200 μV maximum
Offset drift: 1 μV/°C typical
Very low input bias current: 5 pA maximum
Extended temperature range: −40°C to +125°C
5 V to 15 V dual supply
NULL
–IN
1
2
3
4
8
7
6
5
NC
ADA4627-1
V+
+IN
OUT
NULL
TOP VIEW
(Not to Scale)
V–
NC = NO CONNECT
ADA4627-1 GBW: 19 MHz
Figure 1. 8-Lead SOIC_N (R-8)
ADA4637-1 GBW: 79 MHz
Voltage noise: 6.1 nV/√Hz at 1 kHz
ADA4627-1 slew rate: 82 V/μs
ADA4637-1 slew rate: 170 V/μs
High gain: 120 dB typical
NULL
–IN
1
2
3
4
8
7
6
5
NC
ADA4637-1
V+
+IN
OUT
NULL
TOP VIEW
(Not to Scale)
V–
High CMRR: 116 dB typical
NC = NO CONNECT
High PSRR: 112 dB typical
Figure 2. 8-Lead SOIC_N (R-8)
APPLICATIONS
High impedance sensors
Photodiode amplifier
Precision instrumentation
Phase-locked loop filters
High end, professional audio
DAC output amplifier
ATE
PIN 1
NC
–IN
+IN
V–
1
2
3
4
8
7
6
5
NC
V+
INDICATOR
ADA4627-1/
ADA4637-1
TOP VIEW
OUT
NC
(Not toScale)
NOTES
1. NC = NO CONNECT.
2. IT IS RECOMMENDED
THAT THE EXPOSED PAD BE
CONNECTED TO V–.
Medical
Figure 3. 8-Lead LFCSP_VD (CP-8-2)
GENERAL DESCRIPTION
The ADA4627-1/ADA4637-1 are wide bandwidth precision
amplifiers featuring low noise, very low offset, drift, and bias
current. The parts operate from ±± ꢀ to ±1± ꢀ dual supply.
The ADA4627-1/ADA4637-1 are specified for both the
industrial temperature range of −2±°C to +8±°C and the
extended industrial temperature range of −40°C to +12±°C. The
ADA4627-1/ADA4637-1 are available in tiny 8-lead LFCSP and
8-lead SOIC packages.
The ADA4627-1/ADA4637-1 provide benefits previously found
in few amplifiers. These amplifiers combine the best specifications
of precision dc and high speed ac op amps. The ADA4637-1 is
a decompensated version of the ADA4627-1 and is stable at a
noise gain of ± or greater.
The ADA4627-1/ADA4637-1 are members of a growing series
of high speed, precision op amps offered by Analog Devices,
Inc. (see Table 1).
With a typical offset voltage of only 70 μꢀ, drift of less than
1 μꢀ/°C, and noise of only 0.86 μꢀ p-p (0.1 Hz to 10 Hz), the
ADA4627-1/ADA4637-1 are suited for applications where error
sources cannot be tolerated.
Table 1. High Speed Precision Op Amps
Supply
Single
Dual
5 V Low Cost
5 V
26 V Low Power
AD8610
30 V Low Cost
AD8510
30 V
AD8615
AD8651
AD8652
ADA4627-1/ADA4637-1
AD8616
AD8620
AD8512
Quad
AD8618
AD8513
Rev. E
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registeredtrademarks arethe property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2009–2014 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com
ADA4627-1/ADA4637-1
Data Sheet
TABLE OF CONTENTS
Features .............................................................................................. 1
Input Voltage Range................................................................... 14
Input Offset Voltage Adjust Range........................................... 14
Input Bias Current...................................................................... 14
Noise Considerations................................................................. 14
THD + N Measurements........................................................... 15
Printed Circuit Board Layout, Bias Current, and Bypassing 15
Output Phase Reversal............................................................... 15
Decompensated Op Amps ........................................................ 16
Driving Capacitive Loads.......................................................... 16
Outline Dimensions....................................................................... 17
Ordering Guide .......................................................................... 18
Applications....................................................................................... 1
Pin Configurations ........................................................................... 1
General Description......................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Electrical Characteristics—30 V Operation ............................. 3
Absolute Maximum Ratings............................................................ 5
Thermal Resistance ...................................................................... 5
ESD Caution.................................................................................. 5
Typical Performance Characteristics ............................................. 6
Theory of Operation ...................................................................... 14
REVISION HISTORY
1/14—Rev. D to Rev. E
10/09—Rev. A to Rev. B
Changes to Output Phase Reversal Section ................................ 15
Changes to Figure 2...........................................................................1
9/09—Rev. 0 to Rev. A
10/10—Rev. C to Rev. D
Changes to Figure 1 and General Description ............................. 1
Changes to Ordering Guide .......................................................... 18
Changes to General Description Section .......................................1
Changes to Table 2.............................................................................3
Updated Outline Dimensions....................................................... 14
Changes to Ordering Guide.......................................................... 15
7/10—Rev. B to Rev. C
Added ADA4637-1.............................................................Universal
Added Figure 2; Renumbered Sequentially .................................. 1
Changes to Table 2............................................................................ 3
Change to Table 3 ............................................................................. 5
Changes to Typical Performance Characteristics Section........... 6
Updated Outline Dimensions ....................................................... 17
Changes to Ordering Guide .......................................................... 18
7/09—Revision 0: Initial Version
Rev. E | Page 2 of 20
Data Sheet
ADA4627-1/ADA4637-1
SPECIFICATIONS
ELECTRICAL CHARACTERISTICS—30 V OPERATION
VSY
= 15 V, V CM = 0 V, TA = 25°C, unless otherwise noted.
Table 2.
B Grade
Typ
A Grade
Parameter
Symbol Test Conditions/Comments
Min
Max
Min
Typ
Max
Unit
INPUT CHARACTERISTICS
Offset Voltage1
VOS
70
200
350
400
2
120
300
410
660
3
µV
µV
µV
µV/°C
−40°C ≤ TA ≤ +85°C
−40°C ≤ TA ≤ +125°C
∆VOS/∆T −40°C ≤ TA ≤ +125°C
Offset Voltage Drift,
Average
1
1
Power Supply Rejection
Ratio
PSRR
VSY
=
4.5 V to 18 V
106
101
112
103
99
108
dB
−40°C ≤ TA ≤ +125°C
dB
pA
nA
nA
pA
nA
nA
Input Bias Current2
IB
1
5
0.5
2
5
0.5
2
1
5
0.5
2
5
0.5
2
−40°C ≤ TA ≤ +85°C
−40°C ≤ TA ≤ +125°C
Input Offset Current
IOS
0.5
0.5
−40°C ≤ TA ≤ +85°C
−40°C ≤ TA ≤ +125°C
NOISE PERFORMANCE
Voltage Noise Density
en
f = 10 Hz
f = 100 Hz
f = 1 kHz
16.5
7.9
6.1
4.8
0.7
1.6
30
40
20
8
6
1.6
16.5
7.9
6.1
4.8
0.7
2.5
48
40
20
8
6
1.6
nV/√Hz
nV/√Hz
nV/√Hz
nV/√Hz
µV p-p
fA/√Hz
fA p-p
TΩ
f = 10 kHz
Voltage Noise
Current Noise Density
Current Noise
en p-p
in
in p-p
RIN
0.1 Hz to 10 Hz
f = 100 Hz
0.1 Hz to 10 Hz
Input Resistance
10
10
Input Capacitance,
Differential Mode
CINDM
8
8
pF
Input Capacitance,
Common Mode
Input Voltage Range
CINCM
IVR
7
7
pF
−11
−10.5
+11
+10.5
−11
−10.5
+11
+10.5
V
V
−40°C ≤ TA ≤ +125°C
Common-Mode
Rejection Ratio
CMRR
TA = 25°C,
VCM = −11 V to +11 V
−40°C ≤ TA ≤ +125°C,
VCM = −10.5 V to +10.5 V
RL = 1 kΩ, VO = −10 V to +10 V
−40 ≤ TA ≤ +85°C
106
98
116
120
100
97
110
120
dB
dB
dB
dB
dB
Large Signal Voltage Gain AVO
112
110
102
106
104
100
−40 ≤ TA ≤ +125°C
DYNAMIC PERFORMANCE
Slew Rate ADA4627-1
Slew Rate ADA4637-1
SR
SR
10 V step, RL = 1 kΩ,
CL = 100 pF, AV = +1
10 V step, RL = 1 kΩ, CL = 100 pF, 40
Rs = Rf = 1 kΩ, AV = −1
10 V out, Cf = 4.8 pF, AV = −4
10 V out, Cf = 4.8 pF, AV = +5
40
56/783
82/843
40
40
56/783
82/843
V/µs
V/µs
SR
SR
170
170
170
170
V/µs
V/µs
Rev. E | Page 3 of 20
ADA4627-1/ADA4637-1
Data Sheet
B Grade
Typ
A Grade
Typ
Parameter
Symbol Test Conditions/Comments
tS
Min
Max
Min
Max
Unit
Settling Time to 0.01%
ADA4627-1
VIN = 10 V step, CL = 35 pF,
RL = +1 kΩ, AV = −1
VIN = 10 V step, CL = 35 pF,
RL = +1 kΩ, AV = −4
550
300
550
300
ns
ns
ADA4637-1
Settling Time to 0.1%
ADA4627-1
tS
VIN = 10 V step, CL = 35 pF,
RL = +1 kΩ, AV = −1
VOUT = 10 V step, CL = 35 pF,
RL = +1 kΩ, AV = −4
450
200
450
200
ns
ns
ADA4637-1
Gain Bandwidth Product GBP
ADA4627-1
ADA4637-1
RL = 1 kΩ, CL = 20 pF, AV = 1
AV = 10
164
19
79.9
164
19
79.9
MHz
Phase Margin
ADA4627-1
ADA4637-1
ΦM
RL = 1 kΩ, CL = 20 pF, AV = 1
AV = 10
72
85
72
85
Degrees
%
Total Harmonic
THD + N f = 1 kHz, AV = 1, ADA4627-1
0.000045
0.000045
Distortion + Noise
POWER SUPPLY
Supply Current per
Amplifier
ISY
IO = 0 mA
7.0
7.5
7.8
7.0
7.5
7.8
mA
mA
−40°C ≤ TA ≤ +125°C
OUTPUT CHARACTERISTICS
Output Voltage High
VOH
RL = 1 kΩ to VCM
−40°C ≤ TA ≤ +85°C
−40°C ≤ TA ≤ +125°C
RL = 1 kΩ to VCM
−40°C ≤ TA ≤ +85°C
−40°C ≤ TA ≤ +125°C
VO = 10 V
12.0
11.8
11.7
12.3
12.0
11.8
11.7
12.3
V
V
V
V
V
V
mA
mA
Ω
Output Voltage Low
VOL
−12.7
−12.3
−12.1
−12.0
−12.7
−12.3
−12.1
−12.0
Output Current
Short-Circuit Current
Closed-Loop Output
Impedance
IOUT
ISC
ZOUT
45
+70/−55
41
45
+70/−55
41
TA = 25°C
f = 1 MHz, AV = −100
1 VOS is measured fully warmed up.
2 Tested/extrapolated from 125°C.
3 Rising/falling.
4 Not tested. Guaranteed by simulation and characterization.
Rev. E | Page 4 of 20
Data Sheet
ADA4627-1/ADA4637-1
ABSOLUTE MAXIMUM RATINGS
Table 3.
THERMAL RESISTANCE
θJA is specified for the worst-case conditions, that is, a device
soldered in a circuit board for surface-mount packages. This
was measured using a standard 2-layer board. For the LFCSP
package, the exposed pad should be soldered to a copper plane.
Parameter
Rating
Supply Voltage
Input Voltage Range1
Input Current1
Differential Input Voltage2
Output Short-Circuit Duration to GND Indefinite
Storage Temperature Range
Operating Temperature Range
Junction Temperature Range
36 V
(V−) − 0.3 V to (V+) + 0.3 V
10 mA
VSY
Table 4. Thermal Resistance
Package Type
θJA
155
77
θJC
45
14
Unit
°C/W
°C/W
−65°C to +150°C
−40°C to +125°C
−65°C to +150°C
8-Lead SOIC_N (R-8)
8-Lead LFCSP (CP-8-2)
Lead Temperature (Soldering, 60 sec) 300°C
ESD Human Body Model 4 kV
ESD CAUTION
1 Input pin has clamp diodes to the power supply pins. Input current should
be limited to 10 mA or less whenever input signals exceed the power supply
rail by 0.3 V.
2 Differential input voltage is limited to 30 V or the supply voltage, whichever
is less.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Rev. E | Page 5 of 20
ADA4627-1/ADA4637-1
Data Sheet
TYPICAL PERFORMANCE CHARACTERISTICS
TA = 25°C, unless otherwise noted.
100
120
100
80
60
78°
10
40
20
0
ADA4627-1
= 25°C
19.1MHz
ADA4627-1
T
A
–20
–40
T
= 25°C
A
V
= ±15V
SY
V
= ±15V
SY
1
0.01
0.1
FREQUENCY (kHz)
1
10
1k
10k
100k
1M
10M
100M
100M
15
FREQUENCY (Hz)
Figure 7. Open-Loop Gain and Phase vs. Frequency
Figure 4. Voltage Noise Density vs. Frequency
100
10
140
120
100
80
R
= 1kΩ
L
A
= –10
V
R
= 600Ω
L
1
A
= –100
V
A
= –1
V
0.1
0.01
ADA4627-1
ADA4627-1
T
V
= 25°C
= ±15V
T
V
= 25°C
= ±15V
A
A
SY
SY
V
= ±11V
O
60
–50
100
1k
10k
100k
1M
10M
–25
0
25
50
75
100
125
FREQUENCY (Hz)
TEMPERATURE (°C)
Figure 8. Closed-Loop ZOUT vs. Frequency
Figure 5. Open-Loop Gain vs. Temperature
150
100
50
120
100
80
60
40
20
0
0
–50
–100
–150
ADA4627-1
= 25°C
= ±15V
T
ADA4627-1
= 25°C
A
V
T
SY
A
V
= ±15V
SY
–15
–10
–5
0
5
10
100
1k
10k
100k
1M
10M
V
(V)
CM
FREQUENCY (Hz)
Figure 9. VOS vs. Common-Mode Voltage
Figure 6. CMRR vs. Frequency
Rev. E | Page 6 of 20
Data Sheet
ADA4627-1/ADA4637-1
120
100
80
120
110
100
90
60
PSRR–
PSRR+
40
80
ADA4627-1
20
ADA4627-1
70
T
= 25°C
A
V
V
= ±15V
= ±11.5V
SY
V
= ±15V
SY
CM
0
100
60
–50
1k
10k
100k
1M
10M
–25
0
25
50
75
100
125
FREQUENCY (Hz)
TEMPERATURE (°C)
Figure 13. CMRR vs. Temperature
Figure 10. PSRR vs. Frequency
8
20
10
–40ºC
ADA4627-1
= 25°C
7
6
5
4
3
2
1
0
T
A
V
= ±15V
SY
+25ºC
+85ºC
+125ºC
ADA4627-1
1
0
4
8
12
16
20
24
28
32
36
10
0.001
0.01
0.1
1
100
SUPPLY VOLTAGE (V)
I
(mA)
LOAD
Figure 11. Supply Current vs. Supply Voltage and Temperature
Figure 14. VOUT Sinking vs. ILOAD Current
20
10
120
ADA4627-1
= 25°C
T
A
V
= ±15V
SY
110
ADA4627-1
R
= ∞
L
±4.5V < V < ±18V
SY
1
100
–40
10
0.001
0.01
0.1
1
100
–20
0
20
40
60
80
100
120
I
(mA)
LOAD
TEMPERATURE (°C)
Figure 15. VOUT Sourcing vs. ILOAD Current
Figure 12. PSRR vs. Temperature
Rev. E | Page 7 of 20
ADA4627-1/ADA4637-1
Data Sheet
8
7
6
5
4
3
0.01
0.001
ADA4627-1
= 25°C
T
A
V
V
R
= ±15V
= 810mV
= 600Ω
SY
IN
L
80kHz FILTER
0.0001
0.00001
2
ADA4627-1
T
= 25°C
1
0
A
SOIC PACKAGE
0.01
0.1
1
10
0
4
8
12
16
20
24
28
32
36
FREQUENCY (kHz)
SUPPLY VOLTAGE (V)
Figure 16. Supply Current vs. Supply Voltage
Figure 19. THD + N vs. Frequency
10,000
1,000
100
10
0.1
ADA4627-1
= ±15V
V
SY
0.01
0.001
MEASURED
ADA4627-1
T
V
= 25°C
= ±15V
A
0.0001
EXTRAPOLATED
SY
1
V
= 1kHz
IN
R
= 600Ω
L
0.0647x
y = 0.2895
2
80kHz FILTER
R
= 0.9991
0.1
0.00001
10
30
50
70
90
110
130
0.001
0.01
0.1
1
TEMPERATURE (°C)
AMPLITUDE (V rms)
Figure 20. Input Bias Current vs. Temperature
Figure 17. THD + N vs. VIN
60
50
100
75
ADA4627-1
= 25°C
I
+
B
T
A
V
= ±15V
SY
+85°C
+25ºC
I
–
B
40
50
A
= +100
V
V
30
25
I
+
B
20
0
A
= +10
I
–
B
10
–25
–50
–75
–100
0
A
= +1
100
V
ADA4627-1
= ±15V
–10
–20
V
SY
10
1k
10k
FREQUENCY (kHz)
100k
1M
10M
100M
–15
–10
–5
0
5
10
15
V
(V)
CM
Figure 18. Closed-Loop Gain vs. Frequency
Figure 21. Input Bias Current vs. VCM and Temperature
Rev. E | Page 8 of 20
Data Sheet
ADA4627-1/ADA4637-1
1200
1100
1000
900
800
I
+
B
I
–
700
B
1
600
ADA4627-1
500
T
A
= 25°C
= –1
A
V
400
V
= 20V p-p
IN
300
200
100
0
ADA4627-1
R
C
R
C
= R = 2kΩ
F
F
L
L
IN
= 10pF
= 1kΩ
= 1nF
T
V
= 125°C
= ±15V
A
SY
TIME (1µs/DIV)
–15
–10
–5
0
5
10
15
V
(V)
CM
Figure 22. Input Bias Current vs. VCM at 125°C
Figure 25. Large Signal Transient Response
80
60
ADA4627-1
ADA4627-1
T
= 25°C
A
T
= 25°C
= +1
A
V
= ±15V
SY
A
V
V
R
= 20V p-p
= 0Ω
IN
40
F
20
1
0
–20
–40
–60
–80
TIME (200ns/DIV)
0
60
120
180
240
300
TIME (Seconds)
Figure 23. Input Offset Voltage vs. Time
Figure 26. Large Signal Transient Response
60
50
40
30
20
10
ADA4627-1
T
A
= 25°C
= –1
A
V
OS–
V
= 20V p-p
IN
R
= R = 2kΩ
F
IN
OS+
1
ADA4627-1
= 25°C
T
A
V
= ±15V
= +1
SY
A
V
V
= 100mV p-p
IN
0
CH1 5.00V
TIME (200ns/DIV)
1
10
100
LOAD CAPACITANCE (pF)
1000
10,000
Figure 24. Small Signal Overshoot vs. Load Capacitance
Figure 27. Large Signal Transient Response
Rev. E | Page 9 of 20
ADA4627-1/ADA4637-1
Data Sheet
1
1
ADA4627-1
ADA4627-1
T
= 25°C
T
A
= 25°C
= +1
A
A
A
V
= –1
= 200mV p-p
V
V
V
R
R
C
= 20V p-p
= 0Ω
= 1kΩ
= 1nF
IN
IN
R
C
= R = 2kΩ
= 5pF
F
F
IN
F
L
L
TIME (1µs/DIV)
TIME (200ns/DIV)
Figure 28. Large Signal Transient Response
Figure 31. Small Signal Transient Response
ADA4627-1
T
A
= 25°C
= –1
A
V
V
= 20V p-p
IN
R
C
R
C
= R = 2kΩ
= 10pF
= 1kΩ
F
F
L
L
IN
= 100pF
1
1
ADA4627-1
T
A
= 25°C
= +1
A
V
V
= 200mV p-p
= 0Ω
= 1kΩ
IN
R
R
C
F
L
L
= 1nF
TIME (200ns/DIV)
TIME (200ns/DIV)
Figure 29. Large Signal Transient Response
Figure 32. Small Signal Transient Response
1
1
ADA4627-1
ADA4627-1
T
= 25°C
A
T
A
= 25°C
= +1
A
A
= –1
V
V
V
= 200mV p-p
IN
V
R
= 200mV p-p
= 0Ω
IN
R
C
R
C
= R = 2kΩ
= 5pF
= 1kΩ
= 100pF
F
F
L
L
IN
F
TIME (200ns/DIV)
TIME (200ns/DIV)
Figure 33. Small Signal Transient Response
Figure 30. Small Signal Transient Response
Rev. E | Page 10 of 20
Data Sheet
ADA4627-1/ADA4637-1
20
ADA4627-1
ADA4627-1
= 25°C
T
= 25°C
T
A
15
10
A
1
2
V
= ±15
SY
V
= ±15V
SY
5
V
OUT
0
–5
V
IN
V
OUT
–10
–15
–20
V
IN
TIME (200ns/DIV)
0
0.5
1.0
1.5
2.0
TIME (ms)
2.5
3.0
3.5
4.0
Figure 34. No Phase Reversal
Figure 37. Positive Settling Time to 0.01%
ADA4627-1
T
V
= 25°C
A
1
2
= ±15
SY
V
IN
1
V
OUT
ADA4627-1
= 25°C
T
A
V
= ±15V
SY
DUT GAIN = 100
4TH ORDER BAND PASS FIXTURE GAIN = 10k
TOTAL GAIN = 1M
TIME (200ns/DIV)
TIME (1s/DIV)
Figure 35. Negative Settling Time to 0.01%
Figure 38. 0.1 Hz to 10 Hz Noise
140
120
100
80
100
80
60
40
20
0
PHASE
60
GAIN
40
20
0
ADA4637-1
= ±15V
V
–20
–40
–60
–80
–100
SY
T
= 25ºC
A
A
R
R
C
C
= –4
V
= 500Ω
IN
= 2kΩ
= 4.8pF
= 35pF
F
F
L
ADA4637-1
V
T
= ±15V
SY
A
= 25ºC
10k
100k
1M
FREQUENCY (Hz)
10M
100M
10
100
1k
10k
100k
1M
10M
100M
FREQUENCY (Hz)
Figure 36. Open-Loop Gain and Phase vs. Frequency
Figure 39. CMRR vs. Frequency
Rev. E | Page 11 of 20
ADA4627-1/ADA4637-1
Data Sheet
120
ADA4637-1
T
A
= 25°C
= +5
PSRR+
A
V
100
V
= ±15V
SY
R
R
C
C
= 500ꢀ
= 2kꢀ
= 4.8pF
= 50pF
IN
PSRR–
F
F
L
80
60
40
ADA4637-1
20
V
= ±15V
SY
A
T
= +5
= 25°C
V
A
0
TIME (200ns/DIV)
10
100
1k
10k
100k
1M
10M
100M
FREQUENCY (Hz)
Figure 43. Small Signal Transient Response
Figure 40. PSRR vs. Frequency
50
40
30
20
10
0
ADA4637-1
A
T
= 25°C
= –4
A
= +100
V
A
V
V
SY
R
= ±15V
= 500ꢀ
IN
R
C
= 2kꢀ
= 4.8pF
F
F
A
= +10
V
A
= +5
V
V
–10
TIME (100ns/DIV)
100
1k
10k
100k
1M
10M
100M
FREQUENCY (Hz)
Figure 41. Closed-Loop Gain vs. Frequency
Figure 44. Slew Rate Falling
ADA4637-1
A
ADA4637-1
A
T
= 25°C
= +5
T
= 25°C
= –4
A
V
A
V
V
SY
R
V
SY
IN
F
F
= ±15V
= ±15V
= 500ꢀ
R
= 500ꢀ
IN
R
C
= 2kꢀ
= 3pF
R
C
= 2kꢀ
= 4.8pF
F
F
TIME (200ns/DIV)
TIME (100ns/DIV)
Figure 42. Large Signal Transient Response
Figure 45. Slew Rate Rising
Rev. E | Page 12 of 20
Data Sheet
ADA4627-1/ADA4637-1
100
ADA4637-1
SY
V
V
= ±15V
= 0V
CM
A
T
= 25°C
10
1
1
10
100
1k
10k
100k
FREQUENCY (Hz)
Figure 46. Voltage Noise Density vs. Frequency
Rev. E | Page 13 of 20
ADA4627-1/ADA4637-1
Data Sheet
THEORY OF OPERATION
The ADA4627-1 is a high speed, unity gain stable amplifier with
excellent dc characteristics. The ADA4637-1 is a decompensated
version that is stable at a gain of 5 or greater. The typical offset
voltage of 70 µV allows the amplifiers to be easily configured for
high gains without the risk of excessive output voltage errors. The
small temperature drift of 2 µV/°C ensures a minimum offset
voltage error over the entire temperature range of −40°C to
+125°C, making the amplifiers ideal for a variety of sensitive
measurement applications in harsh operating environments.
use the offset adjust pins, especially for offset adjust of a
complete signal chain. Signal chain offset can be addressed with
an auto-zero amplifier used to form a composite amplifier; or, if
the ADA4627-1 or the ADA4637-1 is in an inverting amplifier
stage, it can be modified easily to add a potentiometer (see
Figure 48). The LFCSP package does not have offset adjust pins.
R
F
R
IN
2
3
INPUT VOLTAGE RANGE
6
+
OUT
–
ADA4627-1
+
–
V
The ADA4627-1/ADA4637-1 are not rail-to-rail input
amplifiers; therefore, care is required to ensure that both inputs
do not exceed the input voltage range. Under normal negative
feedback operating conditions, the amplifier corrects its output
to ensure that the two inputs are at the same voltage. However,
if either input exceeds the input voltage range, the loop opens,
and large currents begin to flow through the ESD protection
diodes in the amplifier.
V
IN
+V
S
499kΩ
499kΩ
100kΩ
0.1µF
200Ω
–V
S
Figure 48. Alternate Offset Null Circuit for Inverting Stage
INPUT BIAS CURRENT
These diodes are connected between the inputs and each supply
rail to protect the input transistors against an electrostatic discharge
event, and they are normally reverse-biased. However, if the input
voltage exceeds the supply voltage, these ESD diodes can become
forward-biased. Without current limiting, excessive amounts
of current can flow through these diodes, causing permanent
damage to the device. If inputs are subject to overvoltage, insert
appropriate series resistors to limit the diode current to less
than 5 mA.
Because the ADA4627-1/ADA4637-1 have a JFET input stage,
the input bias current, due to the reverse-biased junction, has
a leakage current that approximately doubles every 10°C. The
power dissipation of the part, combined with the thermal resistance
of the package, results in the junction temperature increasing
up 20 degrees to 30 degrees Celsius above ambient. This
parameter is tested with high speed ATE equipment, which does
not result in the die temperature reaching equilibrium. This is
correlated with bench measurements to match the guaranteed
maximum at room temperature shown in Table 2.
INPUT OFFSET VOLTAGE ADJUST RANGE
The input current can be reduced by keeping the temperature as
low as possible and using a light load on the output.
The ADA4627-1/ADA4637-1 SOIC packages have offset
adjust pins for compatibility with some existing designs. The
recommended offset nulling circuit is shown in Figure 47.
NOISE CONSIDERATIONS
+V
S
The JFET input stage offers very low input voltage noise and
input current noise. The thermal noise of a 1 kΩ resistor at
room temperature is 4 nV/√Hz; therefore, low values of
resistance should be used for dc-coupled inverting and
noninverting amplifier configurations. In the case of
transimpedance amplifiers (TIAs), current noise is more
important.
100kΩ
7
2
1
5
6
ADA4627-1
3
4
The ADA4627-1/ADA4637-1 are an excellent choice for both of
these applications. Analog Devices offers a wide variety of low
voltage noise and low current noise op amps in a variety of
processes that are optimized for different supply voltage ranges.
Refer to Application Note AN-940 for a discussion of noise,
calculations, and selection tables for more than three dozen low
noise, op amp families.
–V
S
Figure 47. Standard Offset Null Circuit
With a 100 kΩ potentiometer, the adjustment range is
more than 11 mV. However, the VOS temperature drift
increases by several µV/°C for every millivolt of offset adjust.
The ADA4627-1/ADA4637-1 have matching thin film resistors
that are laser trimmed at two temperatures to minimize both
offset voltage and offset voltage drift. The offset voltage at room
temperature is less than 0.5 mV, and the offset voltage drift is
only a few µV/°C or less; therefore, it is not recommended to
Rev. E | Page 14 of 20
Data Sheet
ADA4627-1/ADA4637-1
C
F
THD + N MEASUREMENTS
GUARD
Total harmonic distortion plus noise (THD + N) is usually
measured with an audio analyzer, such as those from Audio
Precision, Inc™. The analyzer consists of a low distortion
oscillator that is swept from the starting frequency to the
ending frequency. The oscillator is connected to the circuit
under test, and the output of the circuit goes back to the
analyzer.
R
F
2
3
6
+
OUT
–
ADA4627-1
V
I
8
N
Figure 50. Inverting Amplifier with Guard
The analyzer has a tunable notch filter in lock step with the
swept oscillator. This removes the fundamental frequency
but allows all of the harmonics and wideband noise to be
measured with an integrating voltmeter. However, there is a
switchable low-pass filter in series with the notch filter. If the
sine wave is at 100 Hz, then the tenth harmonic is still at 1 kHz;
therefore, having a low pass at 80 kHz is not a problem. When
the oscillator reaches 20 kHz, the fourth harmonic (80 kHz)
is partially attenuated, resulting in a lower reading from the
voltmeter. When evaluating THD + N curves from any
manufacturer, careful attention should be paid to the test
conditions. The difference between an 80 kHz low-pass filter
and a 500 kHz filter is shown in Figure 49.
For a noninverting configuration, the trace can be driven from
the feedback divider, but the resistors should be chosen to offer
a low impedance drive to the trace (see Figure 51).
GUARD
3
V
OUT
6
+
ADA4627-1
+
–
R
F
V
8
S
2
R
I
–
0.01
Figure 51. Noninverting Amplifier with Guard
ADA4627-1
T
V
V
= 25°C
A
The board layout should be compact with traces as short as
possible. For second-order board considerations, such as
triboelectric effects and piezoelectric effects, as well as a table
of insulating material properties, see the AD549 data sheet.
= ±15V
= 810mV
= 600Ω
SY
IN
R
L
0.001
0.0001
In some cases, shielding from air currents may be helpful.
A general rule of thumb, for op amps with gain bandwidth
products higher than 1 MHz, bypass capacitors should be very
close to the part, within 3 mm. Each supply should be bypassed
with a 0.01 µF ceramic capacitor in parallel with a 1 µF bulk
decoupling capacitor. The ceramic capacitors should be closer
to the op amp. Sockets, which add inductance and capacitance,
should not be used.
500kHz FILTER
80kHz FILTER
0.00001
0.01
0.1
1
10
100
FREQUENCY (kHz)
Figure 49. THD + N vs. Frequency
OUTPUT PHASE REVERSAL
PRINTED CIRCUIT BOARD LAYOUT, BIAS
CURRENT, AND BYPASSING
Output phase reversal occurs in some amplifiers when the input
common-mode voltage range is exceeded. As common-mode
voltage is moved outside the common-mode range, the outputs
of these amplifiers can suddenly jump in the opposite direction
to the supply rail. This is the result of the differential input pair
shutting down, causing a radical shifting of internal voltages
that results in the erratic output behavior.
To take advantage of the very low input bias current of the
ADA4627-1/ADA4637-1 at room temperature, leakage paths
must be considered. A printed circuit board (PCB), with dust
and humidity, can have 100 MΩ of resistance over a few tenths
of an inch. A 1 mV differential between the two points results in
10 pA of leakage current, more than the guaranteed maximum.
The ADA4627-1/ADA4637-1 amplifiers are carefully designed
to prevent any output phase reversal if both inputs are maintained
within or slightly above the power supply rails. The ADA4627-1/
ADA4637-1 do not phase reverse, as shown in Figure 34.
The op amp inputs should be guarded by surrounding the nets
with a metal trace maintained at the predicted voltage. In the
case of an inverting configuration or transimpedance amplifier,
(see Figure 50), the inverting and noninverting nodes can be
surrounded by traces held at a quiet analog ground.
Rev. E | Page 15 of 20
ADA4627-1/ADA4637-1
Data Sheet
or oscillation. The ADA4627-1/ADA4637-1 have a high phase
margin and low output impedance, so they can drive reasonable
values of capacitance. This is a common situation when an
amplifier is used to drive the input of switched capacitor ADCs.
For other considerations and various circuit solutions, see the
Analog Dialogue article titled Ask the Applications Engineer-25,
Op Amps Driving Capacitive Loads, available at www.analog.com.
DECOMPENSATED OP AMPS
The ADA4637-1 is a decompensated op amp, and, as such, must
always be operated at a noise gain of 5 or greater. See tutorial
MT-033, Voltage Feedback Op Amp Gain and Bandwidth, at
www.analog.com for more information.
DRIVING CAPACITIVE LOADS
Adding capacitance to the output of any op amp results in addi-
tional phase shift, which reduces stability and leads to overshoot
Rev. E | Page 16 of 20
Data Sheet
ADA4627-1/ADA4637-1
OUTLINE DIMENSIONS
3.25
3.00 SQ
2.75
0.60 MAX
5
0.50
BSC
0.60 MAX
8
2.95
2.75 SQ
2.55
1.60
1.45
1.30
EXPOSED
PAD
TOP
VIEW
PIN 1
INDICATOR
(BOTTOM VIEW)
4
1
PIN 1
INDICATOR
0.50
0.40
0.30
1.89
1.74
1.59
12° MAX
0.70 MAX
0.65TYP
0.90 MAX
0.85 NOM
0.05 MAX
0.01 NOM
FOR PROPER CONNECTION OF
THE EXPOSED PAD, REFER TO
THE PIN CONFIGURATION AND
FUNCTION DESCRIPTIONS
0.30
0.23
0.18
SEATING
PLANE
0.20 REF
SECTION OF THIS DATA SHEET.
Figure 52. 8-Lead Lead Frame Chip Scale Package [LFCSP_VD]
3 mm × 3 mm Body, Very Thin, Dual Lead
(CP-8-2)
Dimensions shown in millimeters
5.00 (0.1968)
4.80 (0.1890)
8
1
5
4
6.20 (0.2441)
5.80 (0.2284)
4.00 (0.1574)
3.80 (0.1497)
0.50 (0.0196)
0.25 (0.0099)
1.27 (0.0500)
BSC
45°
1.75 (0.0688)
1.35 (0.0532)
0.25 (0.0098)
0.10 (0.0040)
8°
0°
0.51 (0.0201)
0.31 (0.0122)
COPLANARITY
0.10
1.27 (0.0500)
0.40 (0.0157)
0.25 (0.0098)
0.17 (0.0067)
SEATING
PLANE
COMPLIANT TO JEDEC STANDARDS MS-012-AA
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
Figure 53. 8-Lead Standard Small Outline Package [SOIC_N]
Narrow Body
(R-8)
Dimensions shown in millimeters and (inches)
Rev. E | Page 17 of 20
ADA4627-1/ADA4637-1
Data Sheet
ORDERING GUIDE
Model1
Temperature Range
Package Description
8-Lead LFCSP_VD
8-Lead LFCSP_VD
8-Lead LFCSP_VD
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead LFCSP_VD
8-Lead LFCSP_VD
8-Lead LFCSP_VD
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N
Package Option
CP-8-2
CP-8-2
CP-8-2
R-8
R-8
R-8
R-8
R-8
Branding
A29
A29
ADA4627-1ACPZ-R2
ADA4627-1ACPZ-RL
ADA4627-1ACPZ-R7
ADA4627-1ARZ
ADA4627-1ARZ-RL
ADA4627-1ARZ-R7
ADA4627-1BRZ
ADA4627-1BRZ-R7
ADA4627-1BRZ-RL
ADA4637-1ACPZ-R2
ADA4637-1ACPZ-RL
ADA4637-1ACPZ-R7
ADA4637-1ARZ
ADA4637-1ARZ-RL
ADA4637-1ARZ-R7
ADA4637-1BRZ
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
A29
R-8
CP-8-2
CP-8-2
CP-8-2
R-8
R-8
R-8
R-8
R-8
R-8
A2S
A2S
A2S
ADA4637-1BRZ-R7
ADA4637-1BRZ-RL
1 Z = RoHS Compliant Part.
Rev. E | Page 18 of 20
Data Sheet
NOTES
ADA4627-1/ADA4637-1
Rev. E | Page 19 of 20
ADA4627-1/ADA4637-1
NOTES
Data Sheet
©2009–2014 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D07559-0-1/14(E)
Rev. E | Page 20 of 20
相关型号：
SI9130DB
5- and 3.3-V Step-Down Synchronous ConvertersWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9135LG-T1
SMBus Multi-Output Power-Supply ControllerWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9135LG-T1-E3
SMBus Multi-Output Power-Supply ControllerWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9135_11
SMBus Multi-Output Power-Supply ControllerWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9136_11
Multi-Output Power-Supply ControllerWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9130CG-T1-E3
Pin-Programmable Dual Controller - Portable PCsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9130LG-T1-E3
Pin-Programmable Dual Controller - Portable PCsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9130_11
Pin-Programmable Dual Controller - Portable PCsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9137
Multi-Output, Sequence Selectable Power-Supply Controller for Mobile ApplicationsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9137DB
Multi-Output, Sequence Selectable Power-Supply Controller for Mobile ApplicationsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9137LG
Multi-Output, Sequence Selectable Power-Supply Controller for Mobile ApplicationsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9122E
500-kHz Half-Bridge DC/DC Controller with Integrated Secondary Synchronous Rectification DriversWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
©2020 ICPDF网 联系我们和版权申明