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ADA4638-1 [ADI]

30 V Zero-Drift, Rail-to-Rail Output Precision Amplifier; 30 V零漂移，轨到轨输出精密放大器
ADA4638-1
型号： ADA4638-1
厂家： ADI    ADI
描述：

30 V Zero-Drift, Rail-to-Rail Output Precision Amplifier
30 V零漂移，轨到轨输出精密放大器

放大器
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30 V Zero-Drift, Rail-to-Rail Output  
Precision Amplifier  
Data Sheet  
ADA4638-1  
FEATURES  
PIN CONFIGURATIONS  
ADA4638-1  
Single supply operation: 4.5 V to 30 V  
Dual supply operation: 2.25 V to 15 V  
Low offset voltage: 4 μV maximum  
Input offset voltage drift: 0.05 μV/°C maximum  
High gain: 130 dB minimum  
NC  
–IN  
+IN  
V–  
1
2
3
4
8
7
6
5
NC  
V+  
TOP VIEW  
(Not to Scale)  
OUT  
NC  
NOTES  
High PSRR: 120 dB minimum  
High CMRR: 130 dB minimum  
1. NC = NO CONNECT. DO NOT  
CONNECT TO THIS PIN.  
Input common-mode range includes lower supply rail  
Rail-to-rail output  
Low supply current: 0.95 mA maximum  
Figure 1. 8-Lead SOIC  
ADA4638-1  
NC  
–IN  
+IN  
V–  
1
2
3
4
8
7
6
5
NC  
V+  
APPLICATIONS  
TOP VIEW  
(Not to Scale)  
OUT  
NC  
Electronic weigh scale  
Pressure and position sensors  
Strain gage amplifiers  
NOTES  
1. NC = NO CONNECT. DO NOT CONNECT TO THIS PIN.  
2. IT IS RECOMMENDED THAT THE EXPOSED PAD BE  
CONNECTED TO V–.  
Medical instrumentation  
Thermocouple amplifiers  
Figure 2. 8-Lead LFCSP  
GENERAL DESCRIPTION  
The ADA4638-1 is a high voltage, high precision, zero-drift  
amplifier featuring rail-to-rail output swing. It is guaranteed to  
operate from 4.5 V to 30 V single supply or ±±.±5 V to ±15 V  
dual supplies while consuming less than 0.95 mA of supply  
current at ±5 V.  
Table 1. Analog Devices, Inc., Zero-Drift Op Amp Portfolio  
Offset  
Voltage  
(μV) Max (μV/°C) Max  
Offset  
Voltage Drift  
Operating  
Voltage  
Type  
Product  
30 V  
16 V  
Single ADA4638-1 4.5  
0.08  
0.06  
0.06  
0.015  
0.02  
0.1  
Single AD8638  
Dual AD8639  
9
9
With an offset voltage of 4 μV, offset drift less than 0.05 μV/°C,  
no 1/f noise, and input voltage noise of only 1.± μV p-p (0.1 Hz  
to 10 Hz), the ADA4638-1 is suited for high precision applications  
where large error sources cannot be tolerated. Pressure sensors,  
medical equipment, and strain gage amplifiers benefit greatly  
from nearly zero drift over the wide operating temperature  
range. Many applications can take advantage of the rail-to-rail  
output swing provided by the ADA4638-1 to maximize the signal-  
to-noise ratio (SNR).  
5 V  
Single ADA4528-1 2.5  
AD8628  
AD8538  
5
13  
ADA4051-1 15  
0.1  
Dual  
AD8629  
AD8539  
5
0.02  
0.1  
13  
ADA4051-2 15  
Quad AD8630  
0.1  
5
0.02  
The ADA4638-1 is specified for the extended industrial (−40°C  
to +1±5°C) temperature range and is available in 8-lead LFCSP  
(3 mm × 3 mm) and SOIC packages.  
Rev. 0  
Information furnished by Analog Devices is believed to be accurate and reliable. However, no  
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other  
rights of third parties that may result from its use. Specifications subject to change without notice. No  
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.  
Trademarks and registeredtrademarks arethe property of their respective owners.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781.329.4700  
Fax: 781.461.3113  
www.analog.com  
©2011 Analog Devices, Inc. All rights reserved.  
 
ADA4638-1  
Data Sheet  
TABLE OF CONTENTS  
Features .............................................................................................. 1  
Typical Performance Characteristics ..............................................7  
Applications Information.............................................................. 16  
Differentiation ............................................................................ 16  
Theory of Operation.................................................................. 17  
Input Protection ......................................................................... 17  
No Output Phase Reversal ........................................................ 17  
Noise Considerations................................................................. 18  
Comparator Operation.............................................................. 18  
Precision Low-Side Current Shunt Sensor.............................. ±0  
Printed Circuit Board Layout ................................................... ±0  
Outline Dimensions....................................................................... ±1  
Ordering Guide .......................................................................... ±1  
Applications....................................................................................... 1  
Pin Configurations ........................................................................... 1  
General Description......................................................................... 1  
Revision History ............................................................................... ±  
Specifications..................................................................................... 3  
Electrical Characteristics—30 V Operation ............................. 3  
Electrical Characteristics—10 V Operation ............................. 4  
Electrical Characteristics—5 V Operation................................ 5  
Absolute Maximum Ratings............................................................ 6  
Thermal Resistance ...................................................................... 6  
ESD Caution.................................................................................. 6  
REVISION HISTORY  
10/11—Revision 0: Initial Version  
Rev. 0 | Page 2 of 24  
 
Data Sheet  
ADA4638-1  
SPECIFICATIONS  
ELECTRICAL CHARACTERISTICS—30 V OPERATION  
VS = 30 V, VCM = VSY/± V, TA = ±5°C, unless otherwise specified.  
Table 2.  
Parameter  
Symbol  
Test Conditions/Comments  
Min  
Typ  
Max  
Unit  
INPUT CHARACTERISTICS  
Offset Voltage  
VOS  
0.5  
4.5  
μV  
−40°C ≤ TA ≤ +125°C; SOIC  
−40°C ≤ TA ≤ +125°C; LFCSP  
−40°C ≤ TA ≤ +125°C; SOIC  
−40°C ≤ TA ≤ +125°C; LFCSP  
12.5  
14.5  
0.08  
0.1  
μV  
μV  
Offset Voltage Drift  
Input Bias Current  
Input Offset Current  
ΔVOS/ΔT  
μV/°C  
μV/°C  
pA  
pA  
pA  
pA  
V
IB  
45  
25  
90  
−40°C ≤ TA ≤ +125°C  
−40°C ≤ TA ≤ +125°C  
500  
105  
170  
27  
IOS  
Input Voltage Range  
0
Common-Mode Rejection Ratio  
CMRR  
AVO  
VCM = 0 V to 27 V  
130  
130  
140  
140  
142  
165  
dB  
dB  
dB  
dB  
−40°C ≤ TA ≤ +125°C  
RL = 10 kΩ, VO = 1 V to 29 V  
−40°C ≤ TA ≤ +125°C  
Open-Loop Gain  
Input Resistance, Common Mode  
Input Capacitance, Differential Mode  
Input Capacitance, Common Mode  
OUTPUT CHARACTERISTICS  
RINCM  
CINDM  
CINCM  
330  
4
9
GΩ  
pF  
pF  
Output Voltage High  
VOH  
RL = 10 kΩ to VCM  
−40°C ≤ TA ≤ +125°C  
RL = 2 kΩ to VCM  
−40°C ≤ TA ≤ +125°C  
RL = 10 kΩ to VCM  
−40°C ≤ TA ≤ +125°C  
RL = 2 kΩ to VCM  
29.90 29.92  
29.85  
29.50 29.58  
29.35  
V
V
V
V
mV  
mV  
mV  
mV  
mA  
Ω
Output Voltage Low  
VOL  
50  
60  
95  
235  
270  
445  
−40°C ≤ TA ≤ +125°C  
Short-Circuit Current  
Closed-Loop Output Impedance  
POWER SUPPLY  
ISC  
ZOUT  
38  
220  
f = 1 MHz, AV = +1  
Power Supply Rejection Ratio  
PSRR  
ISY  
VS = 4.5 V to 30 V  
−40°C ≤ TA ≤ +125°C  
IO = 0 mA  
120  
120  
143  
dB  
dB  
mA  
mA  
Supply Current/Amplifier  
0.85  
1.05  
1.25  
−40°C ≤ TA ≤ +125°C  
DYNAMIC PERFORMANCE  
Slew Rate  
Overload Recovery Time  
Settling Time to 0.1%  
Unity-Gain Crossover  
Phase Margin  
Gain-Bandwidth Product  
−3 dB Closed-Loop Bandwidth  
NOISE PERFORMANCE  
Voltage Noise  
Voltage Noise Density  
Current Noise Density  
SR  
RL = 10 kΩ, CL = 20 pF, AV = +1  
RL = 10 kΩ, CL = 20 pF, AV = −100  
1.5  
8
4
1.3  
69  
1.5  
2.5  
V/μs  
μs  
ꢀs  
MHz  
Degrees  
MHz  
MHz  
tS  
UGC  
ΦM  
GBP  
f−3dB  
VIN = 5 V step, RL = 10 kΩ, CL = 20 pF, AV = −1  
VIN = 30 mV p-p, RL = 10 kΩ, CL = 20 pF, AV = +1  
VIN = 30 mV p-p, RL = 10 kΩ, CL = 20 pF, AV = +1  
VIN = 30 mV p-p, RL = 10 kΩ, CL = 20 pF, AV = +100  
VIN = 30 mV p-p, RL = 10 kΩ, CL = 20 pF, AV = +1  
en p-p  
en  
in  
f = 0.1 Hz to 10 Hz  
f = 1 kHz  
f = 1 kHz  
1.2  
66  
0.1  
ꢀV p-p  
nV/√Hz  
pA/√Hz  
Rev. 0 | Page 3 of 24  
 
ADA4638-1  
Data Sheet  
ELECTRICAL CHARACTERISTICS—10 V OPERATION  
VS = 10 V, VCM = VSY/± V, TA = ±5°C, unless otherwise specified.  
Table 3.  
Parameter  
Symbol Test Conditions/Comments  
VOS  
Min Typ Max Unit  
INPUT CHARACTERISTICS  
Offset Voltage  
0.1  
4
μV  
μV  
μV  
−40°C ≤ TA ≤ +125°C; SOIC  
−40°C ≤ TA ≤ +125°C; LFCSP  
9
12  
Offset Voltage Drift  
Input Bias Current  
Input Offset Current  
ΔVOS/ΔT −40°C ≤ TA ≤ +125°C; SOIC  
0.05 μV/°C  
0.08 μV/°C  
−40°C ≤ TA ≤ +125°C; LFCSP  
IB  
20  
20  
50  
250  
80  
140  
7
pA  
pA  
pA  
pA  
V
−40°C ≤ TA ≤ +125°C  
IOS  
−40°C ≤ TA ≤ +125°C  
Input Voltage Range  
0
Common-Mode Rejection Ratio  
CMRR  
AVO  
VCM = 0 V to 7 V  
130  
130  
130  
130  
155  
160  
dB  
dB  
dB  
dB  
GΩ  
pF  
pF  
−40°C ≤ TA ≤ +125°C  
RL = 10 kΩ, VO = 1 V to 9 V  
−40°C ≤ TA ≤ +125°C  
Open-Loop Gain  
Input Resistance, Common Mode  
Input Capacitance, Differential Mode  
Input Capacitance, Common Mode  
OUTPUT CHARACTERISTICS  
RINCM  
CINDM  
CINCM  
250  
4
9
Output Voltage High  
VOH  
RL = 10 kΩ to VCM  
−40°C ≤ TA ≤ +125°C  
RL = 2 kΩ to VCM  
−40°C ≤ TA ≤ +125°C  
RL = 10 kΩ to VCM  
−40°C ≤ TA ≤ +125°C  
RL = 2 kΩ to VCM  
9.96 9.97  
9.95  
9.85 9.86  
9.75  
V
V
V
V
mV  
mV  
mV  
mV  
mA  
Ω
Output Voltage Low  
VOL  
20  
25  
40  
80  
90  
145  
−40°C ≤ TA ≤ +125°C  
Short-Circuit Current  
Closed-Loop Output Impedance  
POWER SUPPLY  
ISC  
ZOUT  
22  
300  
f = 1 MHz, AV = +1  
Power Supply Rejection Ratio  
PSRR  
ISY  
VS = 4.5 V to 30 V  
−40°C ≤ TA ≤ +125°C  
IO = 0 mA  
120  
120  
143  
0.8  
dB  
dB  
Supply Current/Amplifier  
0.95 mA  
1.15 mA  
−40°C ≤ TA ≤ +125°C  
DYNAMIC PERFORMANCE  
Slew Rate  
Overload Recovery Time  
Settling Time to 0.1%  
Unity-Gain Crossover  
SR  
RL = 10 kΩ, CL = 20 pF, AV = +1  
RL = 10 kΩ, CL = 20 pF, AV = −100  
1.5  
14  
3
1.1  
67  
1.4  
1.9  
V/μs  
μs  
ꢀs  
MHz  
Degrees  
tS  
UGC  
ΦM  
GBP  
f−3dB  
VIN = 2 V step, RL = 10 kΩ, CL = 20 pF, AV = −1  
VIN = 30 mV p-p, RL = 10 kΩ, CL = 20 pF, AV = +1  
VIN = 30 mV p-p, RL = 10 kΩ, CL = 20 pF, AV = +1  
VIN = 30 mV p-p, RL = 10 kΩ, CL = 20 pF, AV = +100  
VIN = 30 mV p-p, RL = 10 kΩ, CL = 20 pF, AV = +1  
Phase Margin  
Gain Bandwidth Product  
−3 dB Closed-Loop Bandwidth  
NOISE PERFORMANCE  
Voltage Noise  
Voltage Noise Density  
Current Noise Density  
MHz  
MHz  
en p-p  
en  
in  
f = 0.1 Hz to 10 Hz  
f = 1 kHz  
f = 1 kHz  
1.2  
66  
0.1  
ꢀV p-p  
nV/√Hz  
pA/√Hz  
Rev. 0 | Page 4 of 24  
 
Data Sheet  
ADA4638-1  
ELECTRICAL CHARACTERISTICS—5 V OPERATION  
VS = 5 V, VCM = VSY/± V, TA = ±5°C, unless otherwise specified.  
Table 4.  
Parameter  
Symbol  
Test Conditions/Comments  
Min Typ  
Max  
Unit  
INPUT CHARACTERISTICS  
Offset Voltage  
VOS  
1
13  
μV  
−40°C ≤ TA ≤ +125°C; SOIC  
−40°C ≤ TA ≤ +125°C; LFCSP  
−40°C ≤ TA ≤ +125°C; SOIC  
−40°C ≤ TA ≤ +125°C; LFCSP  
18  
21  
μV  
μV  
Offset Voltage Drift  
Input Bias Current  
Input Offset Current  
ΔVOS/ΔT  
0.05  
0.08  
90  
230  
170  
200  
3
μV/°C  
μV/°C  
pA  
pA  
pA  
pA  
V
IB  
30  
60  
−40°C ≤ TA ≤ +125°C  
−40°C ≤ TA ≤ +125°C  
IOS  
Input Voltage Range  
0
Common-Mode Rejection Ratio  
CMRR  
AVO  
VCM = 0 V to 3 V  
118 140  
118  
125 150  
125  
75  
4
dB  
dB  
dB  
dB  
GΩ  
pF  
pF  
−40°C ≤ TA ≤ +125°C  
RL = 10 kΩ, VO = 0.5 V to +4.5 V  
−40°C ≤ TA ≤ +125°C  
Open-Loop Gain  
Input Resistance, Common Mode  
RINCM  
Input Capacitance, Differential Mode CINDM  
Input Capacitance, Common Mode CINCM  
OUTPUT CHARACTERISTICS  
9
Output Voltage High  
VOH  
RL = 10 kΩ to VCM  
−40°C ≤ TA ≤ +125°C  
RL = 2 kΩ to VCM  
−40°C ≤ TA ≤ +125°C  
RL = 10 kΩ to VCM  
−40°C ≤ TA ≤ +125°C  
RL = 2 kΩ to VCM  
4.98 4.984  
4.97  
4.90 4.92  
4.87  
V
V
V
V
mV  
mV  
mV  
mV  
mA  
Ω
Output Voltage Low  
VOL  
7.5  
10  
15  
45  
70  
37  
−40°C ≤ TA ≤ +125°C  
Short-Circuit Current  
Closed-Loop Output Impedance  
POWER SUPPLY  
ISC  
ZOUT  
22  
340  
f = 1 MHz, AV = +1  
Power Supply Rejection Ratio  
PSRR  
ISY  
VS = 4.5 V to 30 V  
−40°C ≤ TA ≤ +125°C  
IO = 0 mA  
120 143  
120  
dB  
dB  
mA  
mA  
Supply Current/Amplifier  
0.8  
0.95  
1.15  
−40°C ≤ TA ≤ +125°C  
DYNAMIC PERFORMANCE  
Slew Rate  
Overload Recovery Time  
Settling Time to 0.1%  
Unity-Gain Crossover  
Phase Margin  
Gain Bandwidth Product  
−3 dB Closed-Loop Bandwidth  
NOISE PERFORMANCE  
Voltage Noise  
Voltage Noise Density  
Current Noise Density  
SR  
RL = 10 kΩ, CL = 20 pF, AV = +1  
RL = 10 kΩ, CL = 20 pF, AV = −100  
1.5  
22  
3
1.0  
64  
1.3  
1.8  
V/μs  
μs  
ꢀs  
MHz  
Degrees  
MHz  
MHz  
tS  
UGC  
ΦM  
GBP  
f−3dB  
VIN = 1 V step, RL = 10 kΩ, CL = 20 pF, AV = −1  
VIN = 20 mV p-p, RL = 10 kΩ, CL = 20 pF, AV = +1  
VIN = 20 mV p-p, RL = 10 kΩ, CL = 20 pF, AV = +1  
VIN = 20 mV p-p, RL = 10 kΩ, CL = 20 pF, AV = +100  
VIN = 20 mV p-p, RL = 10 kΩ, CL = 20 pF, AV = +1  
en p-p  
en  
in  
f = 0.1 Hz to 10 Hz  
f = 1 kHz  
f = 1 kHz  
1.2  
70  
0.015  
ꢀV p-p  
nV/√Hz  
pA/√Hz  
Rev. 0 | Page 5 of 24  
 
ADA4638-1  
Data Sheet  
ABSOLUTE MAXIMUM RATINGS  
Table 5.  
THERMAL RESISTANCE  
θJA is specified for a device soldered on a 4-layer JEDEC  
standard board with zero airflow. For LFCSP packages, the  
exposed pad is soldered to the board.  
Parameter  
Rating  
Supply Voltage  
Input Voltage1  
33 V  
VSY  
Input Current  
10 mA  
VSY  
Indefinite  
−65°C to +150°C  
−40°C to +125°C  
−65°C to +150°C  
300°C  
Table 6. Thermal Resistance  
Package Type  
Differential Input Voltage  
Output Short-Circuit Duration to GND  
Storage Temperature Range  
Operating Temperature Range  
Junction Temperature Range  
Lead Temperature (Soldering, 60 sec)  
θJA  
120  
75  
θJC  
45  
12  
Unit  
°C/W  
°C/W  
8-Lead SOIC  
8-Lead LFCSP  
ESD CAUTION  
1 Input voltage should always be limited to less than 30 V.  
Stresses above those listed under Absolute Maximum Ratings  
may cause permanent damage to the device. This is a stress  
rating only; functional operation of the device at these or any  
other conditions above those indicated in the operational  
section of this specification is not implied. Exposure to absolute  
maximum rating conditions for extended periods may affect  
device reliability.  
Rev. 0 | Page 6 of 24  
 
Data Sheet  
ADA4638-1  
TYPICAL PERFORMANCE CHARACTERISTICS  
TA = ±5°C, unless otherwise noted.  
12  
30  
25  
20  
15  
10  
5
V
V
= ±2.5V  
V
= ±15V  
SY  
SY  
= V /2  
V
= V /2  
CM  
SY  
CM  
SY  
150 UNITS  
150 UNITS  
10  
8
6
4
2
0
0
OFFSET VOLTAGE (µV)  
OFFSET VOLTAGE (µV)  
Figure 3. Input Offset Voltage Distribution  
Figure 6. Input Offset Voltage Distribution  
20  
14  
12  
10  
8
V
V
= ±15V  
V
V
= ±2.5V  
18  
16  
14  
12  
10  
8
SY  
SY  
= V /2  
= V /2  
CM  
SY  
CM  
SY  
–40°C < T < +125°C  
140 LFCSP UNITS  
–40°C < T < +125°C  
140 LFCSP UNITS  
A
A
6
6
4
4
2
2
0
0
0
0.01  
0.02  
0.03  
0.04  
0.05  
0.06  
0.07  
0.08  
0
0.01  
0.02  
0.03  
0.04  
0.05  
0.06  
0.07  
0.08  
TCV (µV/°C)  
OS  
TCV (µV/°C)  
OS  
Figure 4. Input Offset Voltage Drift Distribution  
Figure 7. Input Offset Voltage Drift Distribution  
30  
25  
20  
15  
10  
5
18  
16  
14  
12  
10  
8
V
V
= ±2.5V  
SY  
V
V
= ±15V  
SY  
= V /2  
CM  
SY  
= V /2  
CM  
SY  
–40°C ≤ T ≤ +125°C  
140 SOIC UNITS  
A
–40°C ≤ T ≤ +125°C  
140 SOIC UNITS  
A
6
4
2
0
0
0
0.01  
0.02  
0.03  
0.04  
0.05  
0.06  
0.07  
0.08  
0
0.01  
0.02  
0.03  
0.04  
0.05  
0.06  
0.07  
0.08  
TCV (µV/°C)  
TCV (µV/°C)  
OS  
OS  
Figure 8. Input Offset Voltage Drift Distribution  
Figure 5. Input Offset Voltage Drift Distribution  
Rev. 0 | Page 7 of 24  
 
ADA4638-1  
Data Sheet  
10  
10  
8
V
= ±2.5V  
SY  
V
= ±15V  
8
6
SY  
6
4
4
2
2
0
0
–2  
–4  
–6  
–8  
–10  
–2  
–4  
–6  
–8  
–10  
0
2
4
6
8
10 12 14 16 18 20 22 24 26 28 30  
0
0.5  
1.0  
1.5  
2.0  
2.5  
3.0  
3.5  
4.0  
COMMON-MODE VOLTAGE (V)  
COMMON-MODE VOLTAGE (V)  
Figure 12. Input Offset Voltage vs. Common-Mode Voltage  
Figure 9. Input Offset Voltage vs. Common-Mode Voltage  
150  
100  
50  
200  
V
= ±2.5V  
V
= ±15V  
SY  
SY  
150  
100  
50  
0
I
–
B
I
I
–
+
B
–50  
–100  
–150  
–200  
–250  
I
+
B
0
B
–50  
–100  
–150  
–50  
–25  
0
25  
50  
75  
100  
125  
–50  
–25  
0
25  
50  
75  
100  
125  
TEMPERATURE (°C)  
TEMPERATURE (°C)  
Figure 10. Input Bias Current vs. Temperature  
Figure 13. Input Bias Current vs. Temperature  
150  
100  
50  
150  
100  
50  
V
= ±2.5V  
V
= ±15V  
SY  
SY  
I
–
+
B
0
0
I
I
+
–
B
I
B
–50  
–100  
–150  
–50  
–100  
–150  
B
0
0.5  
1.0  
1.5  
2.0  
2.5  
3.0  
0
3
6
9
12  
15  
18  
21  
24  
27  
COMMON-MODE VOLTAGE (V)  
COMMON-MODE VOLTAGE (V)  
Figure 11. Input Bias Current vs. Common-Mode Voltage  
Figure 14. Input Bias Current vs. Common-Mode Voltage  
Rev. 0 | Page 8 of 24  
Data Sheet  
ADA4638-1  
10  
100  
10  
V
= ±2.5V  
V
= ±15V  
SY  
SY  
1
0.1  
–40°C  
+25°C  
+85°C  
+125°C  
–40°C  
+25°C  
+85°C  
+125°C  
1
0.01  
1m  
0.1  
0.01  
0.1m  
0.01m  
0.001  
0.001  
0.01  
0.1  
1
10  
100  
0.001  
0.01  
0.1  
1
10  
100  
LOAD CURRENT (mA)  
LOAD CURRENT (mA)  
Figure 15. Output Voltage (VOL) to Supply Rail vs. Load Current  
Figure 18. Output Voltage (VOL) to Supply Rail vs. Load Current  
10  
100  
V
= ±2.5V  
V
= ±15V  
SY  
SY  
1
0.1  
10  
1
–40°C  
+25°C  
+85°C  
+125°C  
–40°C  
+25°C  
+85°C  
+125°C  
0.01  
1m  
0.1  
0.01  
1m  
0.1m  
0.01m  
0.001  
0.01  
0.1  
1
10  
100  
0.001  
0.01  
0.1  
1
10  
100  
LOAD CURRENT (mA)  
LOAD CURRENT (mA)  
Figure 16. Output Voltage (VOH) to Supply Rail vs. Load Current  
Figure 19. Output Voltage (VOH) to Supply Rail vs. Load Current  
450  
70  
V
= ±15V  
SY  
V
= ±2.5V  
SY  
400  
350  
300  
250  
200  
150  
100  
50  
60  
50  
40  
30  
20  
10  
0
R
= 2kΩ  
L
R
= 2kΩ  
L
R
= 10kΩ  
L
R
= 10kΩ  
L
R
= 100kΩ  
L
R
= 100kΩ  
L
0
–50  
–25  
0
25  
50  
75  
100  
125  
–50  
–25  
0
25  
50  
75  
100  
125  
TEMPERATURE (°C)  
TEMPERATURE (°C)  
Figure 20. Output Voltage (VOL) to Supply Rail vs. Temperature  
Figure 17. Output Voltage (VOL) to Supply Rail vs. Temperature  
Rev. 0 | Page 9 of 24  
ADA4638-1  
Data Sheet  
600  
500  
400  
300  
200  
100  
0
120  
V
= ±15V  
SY  
V
= ±2.5V  
SY  
100  
80  
60  
40  
20  
0
R
= 2kΩ  
L
R
= 2kΩ  
L
R
= 10kΩ  
R
= 10kΩ  
L
L
R
= 100kΩ  
R
= 100kΩ  
L
L
–50  
–25  
0
25  
50  
75  
100  
125  
–50  
–25  
0
25  
50  
75  
100  
125  
TEMPERATURE (°C)  
TEMPERATURE (°C)  
Figure 24. Output Voltage (VOH) to Supply Rail vs. Temperature  
Figure 21. Output Voltage (VOH) to Supply Rail vs. Temperature  
1.2  
1.0  
0.8  
0.6  
1.2  
1.1  
1.0  
V
= ±5V  
SY  
0.9  
0.8  
0.7  
0.6  
0.5  
V
= ±2.5V  
SY  
V
= ±15V  
SY  
–40°C  
+25°C  
0.4  
+85°C  
+125°C  
0.2  
0
0
2
4
6
8
10 12 14 16 18 20 22 24 26 28 30  
SUPPLY VOLTAGE (V)  
–50  
–25  
0
25  
50  
75  
100  
125  
TEMPERATURE (°C)  
Figure 22. Supply Current vs. Supply Voltage  
Figure 25. Supply Current vs. Temperature  
80  
60  
135  
90  
80  
60  
135  
90  
V
R
= ±2.5V  
= 10kΩ  
V
R
= ±15V  
= 10kΩ  
SY  
SY  
L
L
PHASE  
PHASE  
40  
45  
40  
45  
20pF  
GAIN  
20pF  
GAIN  
200pF  
200pF  
20  
0
20  
0
0
–45  
–90  
–135  
0
–45  
–90  
–135  
–20  
–20  
–40  
–40  
1k  
10k  
100k  
FREQUENCY (Hz)  
1M  
10M  
1k  
10k  
100k  
FREQUENCY (Hz)  
1M  
10M  
Figure 23. Open-Loop Gain and Phase vs. Frequency  
Figure 26. Open-Loop Gain and Phase vs. Frequency  
Rev. 0 | Page 10 of 24  
Data Sheet  
ADA4638-1  
60  
50  
60  
50  
V
R
= ±2.5V  
= 10kΩ  
V
R
= ±15V  
= 10kΩ  
SY  
SY  
L
L
A
= +100  
= +10  
= +1  
A
= +100  
= +10  
= +1  
V
V
40  
30  
40  
30  
A
A
V
V
20  
20  
10  
10  
A
A
V
V
0
0
–10  
–20  
–30  
–40  
–10  
–20  
–30  
–40  
10  
100  
1k  
10k  
100k  
1M  
10M  
10M  
10M  
10  
100  
1k  
10k  
100k  
1M  
10M  
FREQUENCY (Hz)  
FREQUENCY (Hz)  
Figure 27. Closed-Loop Gain vs. Frequency  
Figure 30. Closed-Loop Gain vs. Frequency  
120  
100  
80  
60  
40  
20  
0
120  
100  
80  
60  
40  
20  
0
V
V
= ±2.5V  
V
V
= ±15V  
SY  
SY  
= V /2  
= V /2  
CM  
SY  
CM  
SY  
100  
1k  
10k  
100k  
1M  
100  
1k  
10k  
100k  
1M  
10M  
FREQUENCY (Hz)  
FREQUENCY (Hz)  
Figure 28. CMRR vs. Frequency  
Figure 31. CMRR vs. Frequency  
140  
120  
100  
80  
140  
120  
100  
80  
V
V
= ±15V  
V
= ±2.5V  
= V /2  
SY  
SY  
= V /2  
V
CM  
SY  
CM  
SY  
PSRR+  
PSRR+  
60  
60  
40  
40  
PSRR–  
PSRR–  
20  
20  
0
0
–20  
100  
–20  
100  
1k  
10k  
100k  
1M  
1k  
10k  
100k  
1M  
10M  
FREQUENCY (Hz)  
FREQUENCY (Hz)  
Figure 32. PSRR vs. Frequency  
Figure 29. PSRR vs. Frequency  
Rev. 0 | Page 11 of 24  
ADA4638-1  
Data Sheet  
1k  
1k  
100  
10  
V
V
= ±2.5V  
V = ±15V  
SY  
SY  
= V /2  
V
= V /2  
CM  
SY  
CM  
SY  
A
= +10  
A = +10  
V
100  
10  
V
A
= +100  
A = +100  
V
V
A
= +1  
A
= +1  
V
V
1
1
0.1  
0.01  
1m  
0.1  
0.01  
1m  
100  
1k  
10k  
100k  
1M  
10M  
100  
1k  
10k  
100k  
1M  
10M  
FREQUENCY (Hz)  
FREQUENCY (Hz)  
Figure 33. Closed-Loop Output Impedance vs. Frequency  
Figure 36. Closed-Loop Output Impedance vs. Frequency  
V
V
A
R
C
= ±15V  
= 24V p-p  
= +1  
= 10kΩ  
= 100pF  
V
V
A
R
C
= ±2.5V  
= 1V p-p  
= +1  
= 10kΩ  
= 100pF  
SY  
IN  
SY  
IN  
V
L
L
V
L
L
TIME (10µs/DIV)  
TIME (1µs/DIV)  
Figure 37. Large Signal Transient Response  
Figure 34. Large Signal Transient Response  
V
V
A
R
C
= ±15V  
= 100mV p-p  
= +1  
= 10kΩ  
= 100pF  
V
V
A
R
C
= ±2.5V  
= 100mV p-p  
= +1  
= 10kΩ  
= 100pF  
SY  
SY  
IN  
IN  
V
L
L
V
L
L
TIME (1µs/DIV)  
TIME (1µs/DIV)  
Figure 38. Small Signal Transient Response  
Figure 35. Small Signal Transient Response  
Rev. 0 | Page 12 of 24  
Data Sheet  
ADA4638-1  
80  
80  
70  
60  
50  
40  
30  
20  
10  
0
V
V
A
R
= ±2.5V  
= 100mV p-p  
= +1  
V
V
A
R
= ±15V  
= 100mV p-p  
= +1  
SY  
SY  
70  
60  
50  
40  
30  
20  
10  
0
IN  
IN  
V
L
V
L
= 10kΩ  
= 10kΩ  
OS+  
OS–  
OS+  
OS–  
1
10  
100  
1000  
1
10  
100  
1000  
LOAD CAPACITANCE (pF)  
LOAD CAPACITANCE (pF)  
Figure 39. Small Signal Overshoot vs. Load Capacitance  
Figure 42. Small Signal Overshoot vs. Load Capacitance  
0.1  
0.5  
0
–0.1  
–0.2  
0
–0.5  
–1.0  
V
A
= ±2.5V  
= –100  
= 100mV p-p  
= 10kΩ  
SY  
20  
15  
10  
5
V
V
IN  
V
A
= ±15V  
= –100  
= 500mV p-p  
= 10kΩ  
SY  
R
C
L
L
3
V
= 100pF  
V
IN  
R
C
L
L
2
= 100pF  
1
0
0
–5  
–1  
TIME (10µs/DIV)  
TIME (10µs/DIV)  
Figure 40. Positive Overload Recovery  
Figure 43. Positive Overload Recovery  
1.0  
0.5  
0
0.2  
0.1  
0
–0.5  
5
V
A
= ±2.5V  
= –100  
SY  
–0.1  
V
0
V
R
C
= 100mV p-p  
= 10kΩ  
= 100pF  
IN  
L
L
1
–5  
–10  
–15  
–20  
V
= ±15V  
= –100  
= 500mV p-p  
= 10kΩ  
SY  
0
A
V
V
IN  
R
C
L
L
–1  
–2  
–3  
= 100pF  
TIME (10µs/DIV)  
TIME (10µs/DIV)  
Figure 44. Negative Overload Recovery  
Figure 41. Negative Overload Recovery  
Rev. 0 | Page 13 of 24  
ADA4638-1  
Data Sheet  
INPUT  
INPUT  
V
= ±15V  
V
= ±2.5V  
SY  
SY  
A
R
= –1  
= 10kΩ  
A
R
= –1  
= 10kΩ  
V
L
V
L
OUTPUT  
+25mV  
–25mV  
+5mV  
–5mV  
OUTPUT  
ERROR BAND  
POST GAIN = 5  
ERROR BAND  
POST GAIN = 5  
TIME (2µs/DIV)  
TIME (2µs/DIV)  
Figure 48. Positive Settling Time to 0.1%  
Figure 45. Positive Settling Time to 0.1%  
INPUT  
INPUT  
V
A
R
= ±15V  
= –1  
= 10kΩ  
V
A
R
= ±2.5V  
= –1  
= 10kΩ  
SY  
SY  
V
L
V
L
OUTPUT  
+25mV  
–25mV  
+5mV  
–5mV  
OUTPUT  
ERROR BAND  
POST GAIN = 5  
ERROR BAND  
POST GAIN = 5  
TIME (2µs/DIV)  
TIME (2µs/DIV)  
Figure 49. Negative Settling Time to 0.1%  
Figure 46. Negative Settling Time to 0.1%  
10k  
1k  
10k  
1k  
V
V
A
= ±15V  
SY  
CM  
V
V
V
A
= ±2.5V  
SY  
CM  
V
= V /2  
SY  
= V /2  
SY  
= +10  
= +10  
100  
10  
100  
10  
1
10  
100  
1k  
10k  
100k  
1
10  
100  
1k  
10k  
100k  
FREQUENCY (Hz)  
FREQUENCY (Hz)  
Figure 47. Voltage Noise Density vs. Frequency  
Figure 50. Voltage Noise Density vs. Frequency  
Rev. 0 | Page 14 of 24  
 
 
Data Sheet  
ADA4638-1  
V
V
= ±2.5V  
V
= ±15V  
SY  
SY  
= V /2  
V
= V /2  
CM  
SY  
CM  
SY  
A
= +100  
A
= +100  
V
V
TIME (1s/DIV)  
TIME (1s/DIV)  
Figure 54. 0.1 Hz to 10 Hz Noise  
Figure 51. 0.1 Hz to 10 Hz Noise  
100  
10  
1
100  
10  
500kHz  
FILTER  
1
500kHz  
FILTER  
80kHz  
FILTER  
80kHz  
FILTER  
0.1  
0.1  
V
= ±2.5V  
SY  
f = 1kHz  
A
R
= +1  
= 10kΩ  
0.01  
V
L
0.01  
0.001  
V
= ±15V  
SY  
f = 1kHz  
A
R
= +1  
V
= 10kΩ  
L
0.001  
0.001  
0.01  
0.1  
1
10  
0.001  
0.01  
0.1  
1
V
(V rms)  
V
(V rms)  
IN  
IN  
Figure 55. THD + N vs. Amplitude  
Figure 52. THD + N vs. Amplitude  
1
0.1  
1
0.1  
V
V
A
R
= ±15V  
= 7V rms  
= +1  
SY  
IN  
V
L
= 10kΩ  
500kHz FILTER  
80kHz FILTER  
0.01  
0.01  
500kHz FILTER  
80kHz FILTER  
0.001  
0.001  
0.0001  
V
V
A
R
= ±2.5V  
= 0.5V rms  
= +1  
= 10kΩ  
SY  
IN  
V
L
0.0001  
10  
100  
1k  
10k  
100k  
10  
100  
1k  
10k  
100k  
FREQUENCY (Hz)  
FREQUENCY (Hz)  
Figure 53. THD + N vs. Frequency  
Figure 56. THD + N vs. Frequency  
Rev. 0 | Page 15 of 24  
ADA4638-1  
Data Sheet  
APPLICATIONS INFORMATION  
The ADA4638-1, with its wide supply voltage range of 4.5 V to  
30 V, is a precision, rail-to-rail output, zero-drift operational  
amplifier that features a patented combination of auto-zeroing  
and chopping technique. This unique topology allows the  
ADA4638-1 to maintain its low offset voltage over a wide tempera-  
ture range and over its operating lifetime. This amplifier offers  
ultralow input offset voltage of 4.5 μV maximum and an input  
offset voltage drift of 80 nV/°C maximum. Offset voltage errors  
due to common-mode voltage swings and power supply varia-  
tions are also corrected by the auto-zeroing and chopping tech-  
nique, resulting in a superb typical CMRR figure of 14± dB and  
a PSRR figure of 143 dB at a ±15 V supply voltage. With ultrahigh  
dc accuracy and no 1/f noise component, the ADA4638-1 is  
ideal for high gain amplification of low level signals in dc or low  
frequency applications without the risk of excessive output  
voltage errors.  
DIFFERENTIATION  
Traditionally, zero-drift amplifiers are designed using either the  
auto-zeroing or chopping technique. Each technique has its  
benefits and drawbacks. Auto-zeroing usually results in low  
noise energy at the auto-zeroing frequency, at the expense of  
higher low frequency noise due to aliasing of wideband noise  
into the auto-zeroed frequency band. Chopping results in lower  
low frequency noise at the expense of larger noise energy at the  
chopping frequency. The ADA4638-1 uses both auto-zeroing  
and chopping in a patented ping-pong arrangement to obtain  
lower low frequency noise together with lower energy at the  
chopping and auto-zeroing frequencies, maximizing the signal-  
to-noise ratio for the majority of applications. The relatively  
high chopping frequency of 16 kHz and auto-zeroing frequency  
of 8 kHz simplifies filter requirements for a wide, useful  
bandwidth.  
Rev. 0 | Page 16 of 24  
 
Data Sheet  
ADA4638-1  
THEORY OF OPERATION  
Figure 57 shows the ADA4638-1 amplifier block diagram. The  
noninverting and inverting amplifier inputs are +IN and –IN,  
respectively. The transconductance amplifiers, A1 and A±, are  
the two input gain stages; the A3 and A4 transconductance  
amplifiers are the nulling amplifiers used to correct the offsets  
of A1 and A±, and AOUT is the output amplifier. A four-phase  
cycle (φ1 to φ4) controls the switches. In Phase 1 (φ1), A1 is  
auto-zeroed where both the inputs of A1 are connected to +IN.  
A1 produces a differential output current of VOS1 × gm1, where  
VOS1 is the input offset voltage of A1, and gm1 is the differential  
transconductance of A1. The outputs of A1 are then connected  
to the inputs and outputs of A3. A3 is designed to have an  
equivalent resistance of 1/gm3, where gm3 is the transconduct-  
Ф1  
Ф1  
Ф3  
Ф4  
Ф4  
Ф3  
OUT  
Ф4  
Ф3  
Ф1  
Ф1  
Ф3  
Ф4  
A
OUT  
CC  
+IN  
–IN  
A3  
A1  
C1  
C2  
Ф3  
Ф3  
Ф1  
Ф2  
Ф2  
Ф1  
Ф2  
Ф1  
Ф3  
Ф3  
Ф1  
Ф2  
A4  
A2  
C3  
C4  
ance of A3. The amplified version of VOS1, which is VOS1  
×
gm1/gm3, is stored on Capacitors C1 and C±. These capacitors,  
together with A3, are used to null out the offset of A1 when A1  
amplifies the signal during the φ3 and φ4 phases.  
Figure 57. ADA4638-1 Amplifier Block Diagram  
INPUT PROTECTION  
The ADA4638-1 has internal ESD protection diodes that are  
connected between the inputs and each supply rail. These diodes  
protect the input transistors in the event of electrostatic dis-  
charge and are reverse-biased during normal operation. However,  
if either input exceeds one of the supply rails, these ESD diodes  
become forward-biased and large amounts of current begin to  
flow through them. Without current limiting, this excessive  
fault current causes permanent damage to the device. If the  
inputs are expected to be subject to overvoltage conditions,  
insert a resistor in series with each input to limit the input  
current to 10 mA maximum. However, consider the resistor  
thermal noise effect on the entire circuit.  
While A1 is being auto-zeroed, A± (nulled by A4, C3, and C4)  
is used for signal amplification. The ADA4638-1 differs from  
traditional auto-zero amplifiers in that the input offset voltage  
is also chopped during signal amplification. During φ1, +IN  
and −IN are applied to the noninverting and inverting inputs,  
respectively, of A±. However, during φ±, both the inputs and  
outputs of A± are inverted, and the input offset voltage of A± is  
chopped.  
The combination of auto-zeroing and chopping offers two major  
benefits. First, any residual offset following the auto-zeroing  
process is reduced. During φ1, the output offset voltage of A± is  
+VOSAZ± and during φ±, it is –VOSAZ±, producing a theoretical  
average of zero. Second, the aliased noise spectrum density at dc  
due to auto-zeroing is modulated up to the chopping frequency,  
and the prechopped noise spectrum density at the chopping  
frequency is modulated down to dc. This noise transformation  
lowers the noise spectrum density at dc, thus making zero-drift  
amplifiers ideal for low frequency signal amplification.  
NO OUTPUT PHASE REVERSAL  
An undesired phenomenon, phase reversal (also known as  
phase inversion) occurs in many amplifiers when one or both of  
the inputs are driven beyond the specified input common-mode  
voltage range, in effect reversing the polarity of the output. In  
some cases, phase reversal can induce lockups and cause  
equipment damage as well as self destruction.  
During φ3 and φ4, the roles of A1 and A± are reversed. A±  
offset is nulled, and the input signal is chopped and amplified  
using A1.  
The ADA4638-1 has been carefully designed to prevent any  
output phase reversal, provided that both inputs are maintained  
within the supply voltages. If either one or both inputs may  
exceed either supply voltage, place resistors in series with the  
inputs to limit the current to less than 10 mA.  
The ADA4638-1 features rail-to-rail output with a supply volt-  
age from 4.5 V to 30 V. Figure 58 shows the input and output  
waveforms of the ADA4638-1 configured as a unity-gain buffer  
with a supply voltage of ±15 V and a resistive load of 10 kΩ.  
The ADA4638-1 does not exhibit phase reversal.  
Rev. 0 | Page 17 of 24  
 
 
ADA4638-1  
Data Sheet  
+V  
SY  
V
= ±15V  
SY  
R
= 10kΩ  
L
A1  
I
+
SY  
V
IN  
V
OUT  
100kΩ  
100kΩ  
ADA4638-1  
V
OUT  
A2  
I
–
SY  
–V  
SY  
TIME (2µs/DIV)  
Figure 59. Voltage Follower  
Figure 58. No Phase Reversal  
1.0  
0.8  
NOISE CONSIDERATIONS  
I
+
SY  
0.6  
1/f Noise  
0.4  
1/f noise, also known as pink noise or flicker noise, is inherent  
in semiconductor devices and increases as frequency decreases.  
At low frequency, 1/f noise is a major noise contributor and  
causes a significant output voltage offset when amplified by the  
noise gain of the circuit. However, the ADA4638-1 eliminates  
the 1/f noise internally, thus making it an excellent choice for dc  
or low frequency high precision applications. The 0.1 Hz to  
10 Hz voltage noise is only 1.± μV p-p at ±15 V of supply voltage.  
0.2  
0
–0.2  
–0.4  
–0.6  
–0.8  
–1.0  
I
–
SY  
The low frequency 1/f noise appears as a slow varying offset to  
the ADA4638-1 and is greatly reduced by the combination of  
auto-zeroing and chopping technique. This allows the ADA4638-1  
to have a much lower noise at dc and low frequency in comparison  
to standard low noise amplifiers that are susceptible to 1/f noise.  
Figure 47 and Figure 50 show the voltage noise density of the  
ADA4638-1 with no 1/f noise.  
0
5
10  
15  
(V)  
20  
25  
30  
V
SY  
Figure 60. Supply Current vs. Supply Voltage (Voltage Follower)  
In contrast to op amps, comparators are designed to work in an  
open-loop configuration and to drive logic circuits. Although  
op amps are different from comparators, occasionally an unused  
section of a dual op amp is used as a comparator to save board  
space and cost; however, this is not recommended.  
COMPARATOR OPERATION  
Op amps are designed to operate in a closed-loop configuration  
with feedback from its output to its inverting input. Figure 59  
shows the ADA4638-1 configured as a voltage follower with an  
input voltage, which is kept at midpoint of the power supplies.  
A1 and A± indicate the placement of ammeters to measure supply  
currents. ISY+ refers to the current flowing into the positive  
supply pin of the op amp, and ISY− refers to the current flowing  
out of the negative supply pin of the op amp. From Figure 60, as  
expected in normal operating condition, the current flowing  
into the op amp is equivalent to the current flowing out of the op  
amp, where ISY+ = ISY−.  
Figure 61 and Figure 6± show the ADA4638-1 configured as  
a comparator, with resistors RIN1 and RIN± in series with the  
input pins.  
+V  
SY  
A3  
I
I
+
TOTAL  
I
+
A1  
+
SY  
R
INPUT  
IN1  
V
OUT  
ADA4638-1  
I
R
INPUT–  
IN2  
A2  
A4  
I
I
–
SY  
–
TOTAL  
–V  
SY  
Figure 61. Comparator A  
Rev. 0 | Page 18 of 24  
 
 
 
 
 
Data Sheet  
ADA4638-1  
+V  
1.0  
0.8  
SY  
A1  
I
I
+
TOTAL  
0.6  
0.4  
I
+
A3  
+
SY  
R
INPUT  
IN1  
0.2  
I
I
I
I
+
–
TOTAL  
+
–
SY  
SY  
0
V
OUT  
ADA4638-1  
TOTAL  
–0.2  
–0.4  
–0.6  
–0.8  
–1.0  
I
R
INPUT–  
IN2  
A4  
A2  
I
I
–
SY  
–
TOTAL  
0
5
10  
15  
(V)  
20  
25  
30  
V
SY  
–V  
SY  
Figure 64. Supply Current vs. Supply Voltage  
(Comparator B, RIN1 = RIN2 = 100 kΩ)  
Figure 62. Comparator B  
Figure 63 and Figure 64 show the total supply current of the  
system, ITOTAL, and the actual currents, ISY, that flow into and  
12  
10  
8
out of the supply pins of the ADA4638-1. With RIN1 = RIN±  
=
100 kΩ and supply voltage of 30 V, the total supply current of  
the system is 800 μA to 900 ꢀA.  
6
4
2
With smaller input series resistors, total supply current of the  
system increases much more. Figure 65 and Figure 66 show the  
supply currents with RIN1 = RIN± = 0 Ω. The total current of the  
system increases to 10 mA.  
0
–2  
–4  
–6  
–8  
–10  
–12  
I
I
I
I
+
–
TOTAL  
I
TOTAL = ISY + IINPUT  
+
–
SY  
SY  
Note that, at 30 V of supply voltage, 8 mA to 9 mA of current  
flows through the input pins. This is undesirable. The ADA4638-1  
is not recommended to be used as a comparator. If absolutely  
necessary, place resistors in series with the inputs of the ampli-  
fier to limit input current to less than 10 mA.  
TOTAL  
0
5
10  
15  
(V)  
20  
25  
30  
V
SY  
Figure 65. Supply Current vs. Supply Voltage  
(Comparator A, RIN1 = RIN2 = 0 kΩ)  
For more details on op amps as comparators, refer to the  
AN-849 Application Note, Using Op Amps as Comparators.  
12  
10  
8
1.0  
0.8  
0.6  
0.4  
0.2  
6
4
2
I
I
I
I
+
–
0
TOTAL  
+
–
SY  
SY  
0
–0.2  
–0.4  
–0.6  
–0.8  
–1.0  
–2  
–4  
–6  
–8  
–10  
–12  
TOTAL  
I
I
I
I
+
–
TOTAL  
+
–
SY  
SY  
TOTAL  
0
5
10  
15  
(V)  
20  
25  
30  
V
0
5
10  
15  
(V)  
20  
25  
30  
SY  
V
SY  
Figure 66. Supply Current vs. Supply Voltage  
(Comparator B, RIN1 = RIN2 = 0 kΩ)  
Figure 63. Supply Current vs. Supply Voltage  
(Comparator A, RIN1 = RIN2 = 100 kΩ)  
Rev. 0 | Page 19 of 24  
 
 
 
 
 
ADA4638-1  
Data Sheet  
To avoid leakage currents, keep the surface of the board clean  
and free of moisture. Coating the board surface creates a barrier  
to moisture accumulation and reduces parasitic resistance on  
the board.  
PRECISION LOW-SIDE CURRENT SHUNT SENSOR  
Many applications require the sensing of signals near the  
positive or negative rails. Current shunt sensors are one such  
application and are mostly used for feedback control systems.  
They are also used in a variety of other applications, including  
power metering, battery fuel gauging and feedback controls in  
electrical power steering. In such application, it is desirable to  
use a shunt with very low resistance to minimize series voltage  
drop. This not only minimizes wasted power, but also allows the  
measurement of high currents while saving power. A typical  
shunt may be 100 mΩ. At a measured current of 1 A, the  
voltage produced from the shunt is 100 mV, and the amplifier  
error sources are not critical. However, at low measured current  
in the 1 mA range, the 100 μV generated across the shunt  
demands a very low offset voltage and drift amplifier to  
maintain absolute accuracy. The unique attributes of a zero-  
drift amplifier provides a solution. The ADA4638-1, with its  
input common-mode voltage that includes the lower supply rail,  
can be used for implementing low-side current shunt sensors.  
Properly bypassing the power supplies and keeping the supply  
traces short minimizes power supply disturbances caused by  
output current variation. Connect bypass capacitors as close as  
possible to the device supply pins. Stray capacitances are a  
concern at the outputs and the inputs of the amplifier. It is  
recommended that signal traces be kept at a distance of at least  
5 mm from supply lines to minimize coupling.  
A potential source of offset error is the Seebeck voltage on the  
circuit board. The Seebeck voltage occurs at the junction of two  
dissimilar metals and is a function of the temperature of the  
junction. The most common metallic junctions on a circuit  
board are solder-to-board trace and solder-to-component lead.  
Figure 68 shows a cross section of a surface-mount component  
soldered to a PCB. A variation in temperature across the board  
(where TA1 ≠ TA2) causes a mismatch in the Seebeck voltages at  
the solder joints thereby resulting in thermal voltage errors that  
degrade the performance of the ultralow offset voltage of the  
ADA4638-1.  
Figure 67 shows a low-side current sensing circuit using the  
ADA4638-1. The ADA4638-1 is configured as a difference  
amplifier with a gain of 1000. Although the ADA4638-1 has  
high common-mode rejection, the CMR of the system is limited  
by the external resistors. Therefore, the key to high CMR for the  
system are resistors that are well matched from both the  
resistive ratio and relative drift, where R1/R2 = R3/R4. The  
resistors are important in determining the performance over  
manufacturing tolerances, time, and temperature.  
COMPONENT  
LEAD  
V
V
SC2  
SOLDER  
SC1  
+
SURFACE-MOUNT  
COMPONENT  
+
+
V
V
TS1  
TS2  
+
PC BOARD  
T
T
A2  
A1  
IF T ≠ T , THEN  
COPPER  
TRACE  
A1  
+ V  
A2  
I
V
≠ V  
TS2  
+ V  
SC2  
TS1  
SC1  
Figure 68. Mismatch in Seebeck Voltages Causes Seebeck Voltage Error  
R
V
R
S
SY  
I
L
0.1Ω  
To minimize these thermocouple effects, orient resistors so that  
heat sources warm both ends equally. Where possible, the input  
signal paths should contain matching numbers and types of  
components to match the number and type of thermocouple  
junctions. For example, dummy components, such as zero value  
resistors, can be used to match the thermoelectric error source  
(real resistors in the opposite input path). Place matching compo-  
nents in close proximity and orient them in the same manner to  
ensure equal Seebeck voltages, thus cancelling thermal errors.  
Additionally, use leads that are of equal length to keep thermal  
conduction in equilibrium. Keep heat sources on the PCB as far  
away from amplifier input circuitry as is practical.  
R2  
R1  
100kΩ  
100Ω  
V
*
OUT  
V
SY  
ADA4638-1  
R4  
100kΩ  
R3  
100Ω  
*V  
= AMPLIFIER GAIN × VOLTAGE ACROSS R  
S
OUT  
= 1000 × R × I  
S
= 100 × I  
Figure 67. Low-Side Current Sensing Circuit  
PRINTED CIRCUIT BOARD LAYOUT  
It is highly recommended to use a ground plane. A ground plane  
helps distribute heat throughout the board, maintains a constant  
temperature across the board, and reduces EMI noise pickup.  
The ADA4638-1 is a high precision device with ultralow offset  
voltage and offset voltage drift. Therefore, care must be taken in  
the design of the printed circuit board (PCB) layout to achieve  
optimum performance of the ADA4638-1 at board level.  
Rev. 0 | Page 20 of 24  
 
 
 
Data Sheet  
ADA4638-1  
OUTLINE DIMENSIONS  
2.44  
2.34  
2.24  
3.10  
3.00 SQ  
2.90  
0.50 BSC  
8
5
PIN 1 INDEX  
EXPOSED  
PAD  
1.70  
1.60  
1.50  
AREA  
0.50  
0.40  
0.30  
4
1
PIN 1  
INDICATOR  
(R 0.15)  
TOP VIEW  
BOTTOM VIEW  
FOR PROPER CONNECTION OF  
THE EXPOSED PAD, REFER TO  
THE PIN CONFIGURATION  
0.80  
0.75  
0.70  
0.05 MAX  
0.02 NOM  
SECTION OF THIS DATA SHEET.  
COPLANARITY  
0.08  
SEATING  
PLANE  
0.30  
0.25  
0.20  
0.203 REF  
COMPLIANT TO JEDEC STANDARDS MO-229-WEED  
Figure 69. 8-Lead Lead Frame Chip Scale Package [LFCSP_WD]  
3 mm × 3 mm Body, Very Very Thin, Dual Lead  
(CP-8-11)  
Dimensions shown in millimeters  
5.00 (0.1968)  
4.80 (0.1890)  
8
1
5
4
6.20 (0.2441)  
5.80 (0.2284)  
4.00 (0.1574)  
3.80 (0.1497)  
0.50 (0.0196)  
0.25 (0.0099)  
1.27 (0.0500)  
BSC  
45°  
1.75 (0.0688)  
1.35 (0.0532)  
0.25 (0.0098)  
0.10 (0.0040)  
8°  
0°  
0.51 (0.0201)  
0.31 (0.0122)  
COPLANARITY  
0.10  
1.27 (0.0500)  
0.40 (0.0157)  
0.25 (0.0098)  
0.17 (0.0067)  
SEATING  
PLANE  
COMPLIANT TO JEDEC STANDARDS MS-012-AA  
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS  
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR  
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.  
Figure 70. 8-Lead Standard Small Outline Package [SOIC_N]  
Narrow Body  
(R-8)  
Dimensions shown in millimeters and (inches)  
ORDERING GUIDE  
Model1  
ADA4638-1ACPZ-R7  
ADA4638-1ACPZ-RL  
ADA4638-1ARZ  
Temperature Range  
Package Description  
Package Option  
Branding  
A2W  
A2W  
−40°C to +125°C  
−40°C to +125°C  
−40°C to +125°C  
−40°C to +125°C  
−40°C to +125°C  
8-Lead Lead Frame Chip Scale Package [LFCSP_WD]  
8-Lead Lead Frame Chip Scale Package [LFCSP_WD]  
8-Lead Standard Small Outline Package [SOIC_N]  
8-Lead Standard Small Outline Package [SOIC_N]  
8-Lead Standard Small Outline Package [SOIC_N]  
CP-8-11  
CP-8-11  
R-8  
R-8  
R-8  
ADA4638-1ARZ-R7  
ADA4638-1ARZ-RL  
1 Z = RoHS Compliant Part.  
Rev. 0 | Page 21 of 24  
 
ADA4638-1  
NOTES  
Data Sheet  
Rev. 0 | Page 22 of 24  
Data Sheet  
NOTES  
ADA4638-1  
Rev. 0 | Page 23 of 24  
ADA4638-1  
NOTES  
Data Sheet  
©2011 Analog Devices, Inc. All rights reserved. Trademarks and  
registered trademarks are the property of their respective owners.  
D10072-0-10/11(0)  
Rev. 0 | Page 24 of 24  
 

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