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ADA4806-1ARJZ-R2 [ADI]

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ADA4806-1ARJZ-R2
型号： ADA4806-1ARJZ-R2
厂家： ADI    ADI
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0.2 µV/°C Offset Drift, 105 MHz, Low Power,  
Multimode, Rail-to-Rail Amplifier  
ADA4806-1  
Data Sheet  
FEATURES  
TYPICAL APPLICATIONS CIRCUIT  
5V  
Ultralow supply current  
Full power mode: 500 µA  
Sleep mode: 74 µA  
ADA4806-1  
2.5V REF  
VDD  
C2  
10µF  
C3  
0.1µF  
C4  
100nF  
Shutdown mode: 2.9 µA  
5V  
Dynamic power scaling  
ADA4806-1  
0V TO V  
REF  
Turn-on time from shutdown mode: 1.5 µs  
Turn-on time from sleep mode: 0.45 µs  
High speed performance with dc precision  
Input offset voltage: 125 µV maximum  
Input offset voltage drift: 1.5 µV/°C maximum  
−3 dB bandwidth: 105 MHz  
Slew rate: 160 V/ µs  
Low noise and distortion  
5.9 nV/√Hz input voltage noise with 8 Hz 1/f corner  
−102 dBc/−126 dBc HD2/HD3 at 100 kHz  
Wide supply range: 2.7 V to 10 V  
Small package: 8-lead SOT-23  
REF VDD  
AD7980  
IN+  
IN–  
R3  
20Ω  
GND  
C1  
2.7nF  
Figure 1. Driving the AD7980 with the ADA4806-1  
Sleep mode reduces the amplifier quiescent current to 74 µA  
and provides a fast turn-on time of only 0.45 µs, enabling the  
use of dynamic power scaling for sample rates approaching  
2 MSPS. For additional power savings at lower samples rates,  
the shutdown mode further reduces the quiescent current to  
only 2.9 µA.  
The ADA4806-1 operates over a wide range of supply voltages  
and is fully specified at supplies of 3 V, 5 V and 5 V. This  
amplifier is available in a compact, 8-lead SOT-23 package and  
is rated to operate over the industrial temperature range of  
−40°C to +125°C.  
APPLICATIONS  
Portable and battery-powered instruments and systems  
High channel density data acquisition systems  
Precision analog-to-digital converter (ADC) drivers  
Voltage reference buffers  
3.5  
Portable point of sales terminals  
Active RFID readers  
3.0  
2.5  
GENERAL DESCRIPTION  
The ADA4806-1 is a high speed, voltage feedback, rail-to-rail  
output, single operational amplifier with three power modes:  
full power mode, sleep mode, and shutdown mode. In full  
power mode, this amplifier provides a wide bandwidth of 105 MHz  
at a gain of +1, a fast slew rate 160 V/μs, and excellent dc precision  
with a low input offset voltage of 125 μV (maximum) and an input  
offset voltage drift of 1.5 μV/°C (maximum), while consuming  
only 500 μA of quiescent current. Despite being a low power  
amplifier, the ADA4806-1 provides excellent overall  
SHUTDOWN MODE  
2.0  
1.5  
1.0  
0.5  
0
SLEEP MODE  
1
10  
100  
1000  
ADC SAMPLE RATE (ksps)  
performance, making it ideal for low power, high resolution  
data conversion systems.  
Figure 2. Quiescent Power Dissipation vs. ADC Sample Rate,  
Using Dynamic Power Scaling for the Two Low Power Modes  
For data conversion applications where minimizing power  
dissipation is paramount, the ADA4806-1 offers a method to  
reduce power by dynamically scaling the quiescent power of the  
ADC driver with the sampling rate of the system by switching the  
amplifier to a lower power mode between samples.  
Table 1. Complementary ADCs to the ADA4806-1  
Throughput Resolution SNR  
Product ADC Power (mW) (MSPS)  
(Bits)  
(dB)  
90.51  
98  
AD7980  
AD7982  
AD7984  
4.0  
7.0  
10.5  
1
1
1.33  
16  
18  
18  
98.5  
1 This SNR value is for the A Grade version of the AD7980.  
Rev. A  
Document Feedback  
Information furnished by Analog Devices is believed to be accurate and reliable. However, no  
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other  
rightsof third parties that may result fromits use. Specifications subject to change without notice. No  
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.  
Trademarks andregisteredtrademarks are the property of their respective owners.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781.329.4700  
Technical Support  
©2015-2017 Analog Devices, Inc. All rights reserved.  
www.analog.com  
 
 
 
 
ADA4806-1  
Data Sheet  
TABLE OF CONTENTS  
Features .............................................................................................. 1  
Theory of Operation ...................................................................... 18  
Amplifier Description................................................................ 18  
Input Protection ......................................................................... 18  
Shutdown/Sleep Mode Operation............................................ 18  
Noise Considerations................................................................. 19  
Applications Information .............................................................. 20  
Slew Enhancement..................................................................... 20  
Effect of Feedback Resistor on Frequency Response ............ 20  
Compensating Peaking in Large Signal Frequency Response... 20  
Applications....................................................................................... 1  
General Description ......................................................................... 1  
Typical Applications Circuit............................................................ 1  
Revision History ............................................................................... 2  
Specifications..................................................................................... 3  
5 V Supply ................................................................................... 3  
5 V Supply...................................................................................... 4  
3 V Supply...................................................................................... 6  
Absolute Maximum Ratings............................................................ 8  
Thermal Resistance ...................................................................... 8  
Maximum Power Dissipation ..................................................... 8  
ESD Caution.................................................................................. 8  
Pin Configurations and Function Descriptions ........................... 9  
Typical Performance Characteristics ........................................... 10  
Test Circuits..................................................................................... 17  
Driving Low Power, High Resolution Successive  
Approximation Register (SAR) ADCs..................................... 20  
Dynamic Power Scaling............................................................. 21  
Single-Ended to Differential Conversion ................................... 23  
Layout Considerations............................................................... 23  
Outline Dimensions ....................................................................... 24  
Ordering Guide .......................................................................... 24  
REVISION HISTORY  
5/2017—Rev. 0 to Rev. A  
Changes to Figure 1...........................................................................1  
9/2015—Revision 0: Initial Version  
Rev. A | Page 2 of 24  
 
Data Sheet  
ADA4806-1  
SPECIFICATIONS  
5 V SUPPLY  
VS = 5 V at TA = 25°C; RF = 0 Ω for G = +1; otherwise, RF = 1 kΩ; RL = 2 kΩ to ground; unless otherwise noted.  
Table 2.  
Parameter  
Test Conditions/Comments  
Min  
Typ  
Max  
Unit  
DYNAMIC PERFORMANCE  
−3 dB Bandwidth  
G = +1, VOUT = 0.02 V p-p  
G = +1, VOUT = 2 V p-p  
G = +1, VOUT = 0.02 V p-p  
G = +1, VOUT = 2 V step  
G = +2, VOUT = 4 V step  
G = +1, VOUT = 2 V step  
G = +2, VOUT = 4 V step  
120  
40  
18  
190  
250  
35  
MHz  
MHz  
MHz  
V/µs  
V/µs  
ns  
Bandwidth for 0.1 dB Flatness  
Slew Rate  
Settling Time to 0.1%  
78  
ns  
NOISE/DISTORTION PERFORMANCE  
Harmonic Distortion, HD2/HD31  
fC = 20 kHz, VOUT = 2 V p-p  
−114/−140  
−102/−128  
−109/−143  
−93/−130  
−113/−142  
−96/−130  
5.2  
8
44  
0.7  
dBc  
dBc  
dBc  
dBc  
dBc  
dBc  
nV/√Hz  
Hz  
nV rms  
pA/√Hz  
fC = 100 kHz, VOUT = 2 V p-p  
fC = 20 kHz, VOUT = 4 V p-p, G = +1  
fC = 100 kHz, VOUT = 4 V p-p, G = +1  
fC = 20 kHz, VOUT = 4 V p-p, G = +2  
fC = 100 kHz, VOUT = 4 V p-p, G = +2  
f = 100 kHz  
Input Voltage Noise  
Input Voltage Noise 1/f Corner Frequency  
0.1 Hz to 10 Hz Voltage Noise  
Input Current Noise  
f = 100 kHz  
DC PERFORMANCE  
Input Offset Voltage  
Full power mode  
13  
125  
µV  
Low power mode, SLEEP = −VS  
TMIN to TMAX, 4 σ  
Full power mode  
800  
0.2  
550  
3
µV  
Input Offset Voltage Drift2  
Input Bias Current (IB)  
1.5  
800  
µV/°C  
nA  
nA  
Low power mode, SLEEP = −VS  
Input Offset Current  
Open-Loop Gain  
INPUT CHARACTERISTICS  
Input Resistance  
Common Mode  
Differential Mode  
Input Capacitance  
Input Common-Mode Voltage Range  
Common-Mode Rejection Ratio (CMRR)  
SHUTDOWN PIN  
SHUTDOWN Voltage  
Low  
2.1  
111  
25  
nA  
dB  
VOUT = −4.0 V to +4.0 V  
107  
50  
260  
1
MΩ  
kΩ  
pF  
V
−5.1  
103  
+4  
VIN, CM = −4.0 V to +4.0 V  
130  
dB  
Powered down  
Enabled  
<−1.3  
>−0.9  
V
V
High  
SHUTDOWN Current  
Low  
High  
Powered down  
Enabled  
50% of SHUTDOWN to <10% of enabled  
quiescent current  
−1.0  
+0.2  
0.02  
1.25  
µA  
µA  
µs  
1.0  
2.75  
Turn-Off Time  
Turn-On Time  
50% of SHUTDOWN to >99% of final VOUT  
1
3
µs  
Rev. A | Page 3 of 24  
 
 
ADA4806-1  
Data Sheet  
Parameter  
SLEEP PIN  
SLEEP Voltage  
Low  
Test Conditions/Comments  
Min  
Typ  
Max  
Unit  
Powered down  
Enabled  
<−1.3  
>−0.9  
V
V
High  
SLEEP Current  
Low  
Low Power Mode, SLEEP = −VS  
Enabled  
−1.0  
+0.2  
0.02  
180  
µA  
µA  
ns  
High  
1.0  
240  
Turn-Off Time (Full Power Mode to Sleep Mode) 50% of SLEEP to 30% of enabled quiescent  
current  
Turn-On Time (Sleep Mode to Full Power Mode) 50% of SLEEP to >99% of final VOUT  
450  
600  
ns  
ns  
OUTPUT CHARACTERISTICS  
Output Overdrive Recovery Time  
(Rising/Falling Edge)  
VIN = +6 V to −6 V, G = +2  
95/100  
Output Voltage Swing  
Short-Circuit Current  
RL = 2 kΩ  
−4.98  
+4.98  
V
Sourcing/sinking; full power mode  
Sourcing/sinking; low power mode, SLEEP = −VS  
<1% total harmonic distortion (THD) at 100 kHz,  
85/73  
1.4/1.8  
58  
mA  
mA  
mA  
Linear Output Current  
V
OUT = 2 V p-p  
Off Isolation  
VIN = 0.5 V p-p, f = 1 MHz, SHUTDOWN = −VS  
30% overshoot  
41  
15  
dB  
pF  
Capacitive Load Drive  
POWER SUPPLY  
Operating Range  
2.7  
10  
V
Quiescent Current per Amplifier  
Full power mode  
Low power mode, SLEEP = −VS  
SHUTDOWN = −VS  
570  
85  
625  
µA  
µA  
µA  
7.4  
12  
Power Supply Rejection Ratio (PSRR)  
Positive  
Negative  
+VS = +3 V to +5 V, −VS = −5 V  
+VS = +5 V, −VS = −3 V to −5 V  
100  
100  
119  
122  
dB  
dB  
1 fC is the fundamental frequency.  
2 Guaranteed, but not tested.  
5 V SUPPLY  
VS = 5 V at TA = 25°C; RF = 0 Ω for G = +1; otherwise, RF = 1 kΩ; RL = 2 kΩ to midsupply; unless otherwise noted.  
Table 3.  
Parameter  
Test Conditions/Comments  
Min  
Typ  
Max  
Unit  
DYNAMIC PERFORMANCE  
−3 dB Bandwidth  
G = +1, VOUT = 0.02 V p-p  
G = +1, VOUT = 2 V p-p  
G = +1, VOUT = 0.02 V p-p  
G = +1, VOUT = 2 V step  
G = +2, VOUT = 4 V step  
G = +1, VOUT = 2 V step  
G = +2, VOUT = 4 V step  
105  
35  
20  
160  
220  
35  
MHz  
MHz  
MHz  
V/µs  
V/µs  
ns  
Bandwidth for 0.1 dB Flatness  
Slew Rate  
Settling Time to 0.1%  
82  
ns  
Rev. A | Page 4 of 24  
 
 
Data Sheet  
ADA4806-1  
Parameter  
Test Conditions/Comments  
Min  
Typ  
Max  
Unit  
NOISE/DISTORTION PERFORMANCE  
Harmonic Distortion, HD2/HD31  
fC = 20 kHz, VOUT = 2 V p-p  
fC = 100 kHz, VOUT = 2 V p-p  
fC = 20 kHz, G = +2, VOUT = 4 V p-p  
fC = 100 kHz, G = +2, VOUT = 4 V p-p  
f = 100 kHz  
−114/−135  
−102/−126  
−107/−143  
−90/−130  
5.9  
8
54  
0.6  
dBc  
dBc  
dBc  
dBc  
nV/√Hz  
Hz  
nV rms  
pA/√Hz  
Input Voltage Noise  
Input Voltage Noise 1/f Corner  
0.1 Hz to 10 Hz Voltage Noise  
Input Current Noise  
f = 100 kHz  
DC PERFORMANCE  
Input Offset Voltage  
Full power mode  
10  
125  
µV  
Low power mode, SLEEP = −VS  
TMIN to TMAX, 4 σ  
Full power mode  
500  
0.2  
470  
3
µV  
Input Offset Voltage Drift2  
Input Bias Current  
1.5  
720  
µV/°C  
nA  
nA  
Low power mode, SLEEP = −VS  
Input Offset Current  
Open-Loop Gain  
INPUT CHARACTERISTICS  
Input Resistance  
Common Mode  
Differential Mode  
Input Capacitance  
Input Common-Mode Voltage Range  
Common-Mode Rejection Ratio  
SHUTDOWN PIN  
SHUTDOWN Voltage  
Low  
0.4  
109  
nA  
dB  
VOUT = 1.25 V to 3.75 V  
105  
50  
260  
1
MΩ  
kΩ  
pF  
V
−0.1  
103  
+4  
VIN, CM = 1.25 V to 3.75 V  
133  
dB  
Powered down  
Enabled  
<1.5  
>1.9  
V
V
High  
SHUTDOWN Current  
Low  
High  
Powered down  
Enabled  
50% of SHUTDOWN to <10% of enabled  
quiescent current  
−1.0  
+0.1  
0.01  
0.9  
µA  
µA  
µs  
1.0  
1.25  
Turn-Off Time  
Turn-On Time  
50% of SHUTDOWN to >99% of final VOUT  
1.5  
4
µs  
SLEEP PIN  
SLEEP Voltage  
Low  
Powered down  
Enabled  
<1.5  
>1.9  
V
V
High  
SLEEP Current  
Low  
Low power mode, SLEEP = −VS  
−1.0  
+0.1  
0.01  
150  
µA  
µA  
ns  
High  
Enabled  
1.0  
185  
Turn-Off Time (Full Power Mode to  
Sleep Mode)  
50% of SLEEP to 30% of enabled quiescent  
current  
Turn-On Time (Sleep Mode to Full  
Power Mode)  
50% of SLEEP to >99% of final VOUT  
450  
600  
ns  
Rev. A | Page 5 of 24  
ADA4806-1  
Data Sheet  
Parameter  
Test Conditions/Comments  
Min  
Typ  
Max  
Unit  
OUTPUT CHARACTERISTICS  
Overdrive Recovery Time (Rising/Falling  
Edge)  
VIN = −1 V to +6 V, G = +2  
130/145  
ns  
Output Voltage Swing  
Short-Circuit Current  
RL = 2 kΩ  
0.02  
4.98  
V
Sourcing/sinking; full power mode  
Sourcing/sinking; low power mode, SLEEP = −VS  
<1% THD at 100 kHz, VOUT = 2 V p-p  
VIN = 0.5 V p-p, f = 1 MHz, SHUTDOWN = −VS  
30% overshoot  
73/63  
1.0/1.3  
47  
mA  
mA  
mA  
dB  
pF  
Linear Output Current  
Off Isolation  
41  
Capacitive Load Drive  
POWER SUPPLY  
15  
Operating Range  
2.7  
10  
V
Quiescent Current per Amplifier  
Full power mode  
Low power mode, SLEEP = −VS  
SHUTDOWN = −VS  
500  
74  
520  
µA  
µA  
µA  
2.9  
4
Power Supply Rejection Ratio  
Positive  
Negative  
+VS = 1.5 V to 3.5 V, −VS = −2.5 V  
+VS = 2.5 V, −VS = −1.5 V to −3.5 V  
100  
100  
120  
126  
dB  
dB  
1 fC is the fundamental frequency.  
2 Guaranteed, but not tested.  
3 V SUPPLY  
VS = 3 V at TA = 25°C; RF = 0 Ω for G = +1; otherwise, RF = 1 kΩ; RL = 2 kΩ to midsupply; unless otherwise noted.  
Table 4.  
Parameter  
Test Conditions/Comments  
Min Typ  
Max Unit  
DYNAMIC PERFORMANCE  
−3 dB Bandwidth  
G = +1, VOUT = 0.02 V p-p  
G = +1, VOUT = 1 V p-p, +VS = 2 V, −VS = −1 V  
G = +1, VOUT = 0.02 V p-p  
G = +1, VOUT = 1 V step, +VS = 2 V, −VS = −1 V  
G = +1, VOUT = 1 V step  
95  
30  
35  
85  
41  
MHz  
MHz  
MHz  
V/µs  
ns  
Bandwidth for 0.1 dB Flatness  
Slew Rate  
Settling Time to 0.1%  
NOISE/DISTORTION PERFORMANCE  
Harmonic Distortion, HD2/HD31  
fC = 20 kHz, VOUT = 1 V p-p, +VS = 2 V, −VS = −1 V  
fC = 100 kHz, VOUT = 1 V p-p, +VS = 2 V, −VS = −1 V  
f = 100 kHz  
−123/−143  
−107/−133  
6.3  
8
55  
0.8  
dBc  
dBc  
nV/√Hz  
Hz  
nV rms  
pA/√Hz  
Input Voltage Noise  
Input Voltage Noise 1/f Corner  
0.1 Hz to 10 Hz Voltage Noise  
Input Current Noise  
f = 100 kHz  
DC PERFORMANCE  
Input Offset Voltage  
Full power mode  
7
125  
µV  
Low power mode, SLEEP = −VS  
TMIN to TMAX, 4 σ  
Full power mode  
300  
0.2  
440  
3
µV  
Input Offset Voltage Drift2  
Input Bias Current  
1.5  
690  
µV/°C  
nA  
nA  
Low power mode, SLEEP = −VS  
Input Offset Current  
Open-Loop Gain  
0.5  
107  
nA  
dB  
VOUT = 1.1 V to 1.9 V  
100  
Rev. A | Page 6 of 24  
 
 
Data Sheet  
ADA4806-1  
Parameter  
Test Conditions/Comments  
Min Typ  
Max Unit  
INPUT CHARACTERISTICS  
Input Resistance  
Common Mode  
Differential Mode  
Input Capacitance  
Input Common-Mode Voltage Range  
Common-Mode Rejection Ratio  
SHUTDOWN PIN  
SHUTDOWN Voltage  
Low  
50  
260  
1
MΩ  
kΩ  
pF  
V
dB  
−0.1  
89  
+2  
VIN, CM = 0.5 V to 2 V  
117  
Powered down  
Enabled  
<0.7  
>1.1  
V
V
High  
SHUTDOWN Current  
Low  
High  
Powered down  
Enabled  
−1.0 +0.1  
0.01  
µA  
µA  
1.0  
Turn-Off Time  
50% of SHUTDOWN to <10% of enabled  
quiescent current  
0.9  
1.25 µs  
Turn-On Time  
50% of SHUTDOWN to >99% of final VOUT  
2.5  
8
µs  
SLEEP PIN  
SLEEP Voltage  
Low  
Powered down  
Enabled  
<0.7  
>1.1  
V
V
High  
SLEEP Current  
Low  
Low Power Mode, SLEEP = −VS  
Enabled  
−1.0 +0.1  
0.01  
µA  
µA  
ns  
High  
1.0  
210  
600  
Turn-Off Time (Full Power Mode to Sleep Mode) 50% of SLEEP to 30% of enabled quiescent current  
Turn-On Time (Sleep Mode to Full Power Mode) 50% of SLEEP to >99% of final VOUT  
OUTPUT CHARACTERISTICS  
155  
450  
ns  
Output Overdrive Recovery Time  
(Rising/Falling Edge)  
VIN = −1 V to +4 V, G = +2  
135/175  
ns  
Output Voltage Swing  
Short-Circuit Current  
RL = 2 kΩ  
0.02  
2.98  
V
Sourcing/sinking; full power mode  
Sourcing/sinking; low power mode, SLEEP = −VS  
<1% THD at 100 kHz, VOUT = 1 V p-p  
VIN = 0.5 V p-p, f = 1 MHz, SHUTDOWN = −VS  
30% overshoot  
65/47  
1.0/1.3  
40  
mA  
mA  
mA  
dB  
pF  
Linear Output Current  
Off Isolation  
41  
Capacitive Load Drive  
POWER SUPPLY  
15  
Operating Range  
2.7  
10  
V
Quiescent Current per Amplifier  
Full power mode  
Low power mode, SLEEP = −VS  
SHUTDOWN = −VS  
470  
70  
495  
µA  
µA  
µA  
1.3  
3
Power Supply Rejection Ratio  
Positive  
Negative  
+VS = 1.5 V to 3.5 V, −VS = −1.5 V  
+VS = 1.5 V, −VS = −1.5 V to −3.5 V  
96  
96  
119  
125  
dB  
dB  
1 fC is the fundamental frequency.  
2 Guaranteed, but not tested.  
Rev. A | Page 7 of 24  
 
ADA4806-1  
Data Sheet  
ABSOLUTE MAXIMUM RATINGS  
The quiescent power dissipation is the voltage between the supply  
pins (VS) multiplied by the quiescent current (IS).  
Table 5.  
Parameter  
Rating  
PD = Quiescent Power + (Total Drive Power − Load Power)  
Supply Voltage  
11 V  
Power Dissipation  
See Figure 3  
−VS − 0.7 V to +VS + 0.7 V  
1 V  
−65°C to +125°C  
−40°C to +125°C  
2
VS VOUT  
VOUT  
RL  
PD =  
(
VS × IS  
)
+
×
−
Common-Mode Input Voltage  
Differential Input Voltage  
Storage Temperature Range  
Operating Temperature Range  
Lead Temperature (Soldering, 10 sec) 300°C  
Junction Temperature 150°C  
2
RL  
RMS output voltages must be considered. If RL is referenced  
to −VS, as in single-supply operation, the total drive power is  
VS × IOUT. If the rms signal levels are indeterminate, consider the  
worst case, when VOUT = VS/4 for RL to midsupply.  
2
Stresses at or above those listed under Absolute Maximum  
Ratings may cause permanent damage to the product. This is a  
stress rating only; functional operation of the product at these  
or any other conditions above those indicated in the operational  
section of this specification is not implied. Operation beyond  
the maximum operating conditions for extended periods may  
affect product reliability.  
(
VS / 4  
)
PD =  
(
VS × IS +  
)
RL  
In single-supply operation with RL referenced to −VS, the worst  
case is VOUT = VS/2.  
Airflow increases heat dissipation, effectively reducing θJA.  
Additionally, more metal directly in contact with the package  
leads and exposed pad from metal traces, through holes,  
ground, and power planes reduces θJA.  
THERMAL RESISTANCE  
θJA is specified for the worst case conditions, that is, θJA is specified  
for a device soldered in a circuit board for surface-mount packages.  
Table 6 lists the θJA for the ADA4806-1.  
Figure 3 shows the maximum safe power dissipation in the  
package vs. the ambient temperature on a JEDEC standard,  
4-layer board. θJA values are approximations.  
1.0  
Table 6. Thermal Resistance  
T
= 150°C  
J
Package Type  
θJA  
Unit  
0.9  
0.8  
0.7  
0.6  
0.5  
0.4  
0.3  
0.2  
0.1  
0
8-Lead SOT-23  
209.1  
°C/W  
MAXIMUM POWER DISSIPATION  
The maximum safe power dissipation for the ADA4806-1 is  
limited by the associated rise in junction temperature (TJ) on  
the die. At approximately 150°C, which is the glass transition  
temperature, the properties of the plastic change. Even temporarily  
exceeding this temperature limit may change the stresses that the  
package exerts on the die, permanently shifting the parametric  
performance of the ADA4806-1. Exceeding a junction temperature  
of 175°C for an extended period of time can result in changes in  
silicon devices, potentially causing degradation or loss of  
functionality.  
–50  
–30  
–10  
10  
30  
50  
70  
90  
110  
130  
AMBIENT TEMPERATURE (°C)  
Figure 3. Maximum Power Dissipation vs. Ambient Temperature for a  
4-Layer Board  
The power dissipated in the package (PD) is the sum of the  
quiescent power dissipation and the power dissipated in the die  
due to the ADA4806-1 output load drive.  
ESD CAUTION  
Rev. A | Page 8 of 24  
 
 
 
 
 
 
Data Sheet  
ADA4806-1  
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS  
ADA4806-1  
V
1
2
3
4
8
7
6
5
+V  
S
OUT  
NC  
SHUTDOWN  
SLEEP  
–V  
S
+IN  
–IN  
NOTES  
1. NC = NO CONNECTION. DO NOT CONNECT TO THIS PIN.  
Figure 4. Pin Configuration  
Table 7. Pin Function Descriptions  
Pin No.  
Mnemonic  
Description  
1
2
3
4
5
6
7
8
VOUT  
NC  
−VS  
+IN  
Output.  
No Connection. Do not connect to this pin.  
Negative Supply.  
Noninverting Input.  
Inverting Input.  
Low Power Mode.  
Power-Down Mode.  
Positive Supply.  
−IN  
SLEEP  
SHUTDOWN  
+VS  
Rev. A | Page 9 of 24  
 
ADA4806-1  
Data Sheet  
TYPICAL PERFORMANCE CHARACTERISTICS  
RL = 2 kΩ, unless otherwise noted. When G = +1, RF = 0 Ω.  
3
0
3
G = +2  
G = +1  
0
G = +1  
G = +10  
G = +5  
–3  
–6  
–9  
–12  
–3  
G = +5  
–6  
G = +2  
G = +10  
–9  
V
V
= ±2.5V  
V
V
= ±2.5V  
OUT  
= 2kΩ  
S
S
= 2V p-p  
= 20mV p-p  
OUT  
R
R
= 1kΩ  
R
R
F
L
L
F
= 2kΩ  
= 1kΩ  
–12  
0.1  
0.1  
1
10  
100  
1
10  
100  
1000  
FREQUENCY (MHz)  
FREQUENCY (MHz)  
Figure 8. Large Signal Frequency Response for Various Gains  
Figure 5. Small Signal Frequency Response for Various Gains  
3
3
–40°C  
–40°C  
+25°C  
0
0
+25°C  
–3  
+125°C  
+125°C  
–3  
–6  
–9  
–6  
–9  
V
= ±2.5V  
V = ±2.5V  
S
S
G = +1  
= 20mV p-p  
G = +1  
V = 2V p-p  
OUT  
V
R
OUT  
= 2kΩ  
R = 2kΩ  
L
L
–12  
0.1  
0.1  
1
10  
FREQUENCY (MHz)  
100  
1
10  
FREQUENCY (MHz)  
100  
1000  
Figure 9. Large Signal Frequency Response for Various Temperatures  
Figure 6. Small Signal Frequency Response for Various Temperatures  
3
3
V
= ±5V  
V
= 0.5V p-p  
S
OUT  
V
= ±2.5V  
S
V
= 20mV p-p  
OUT  
0
–3  
V
= ±1.5V  
S
0
–3  
–6  
–6  
V
= 2V p-p  
OUT  
–9  
V
= 100mV p-p  
10  
V
= ±2.5V  
OUT  
G = +1  
= 20mV p-p  
L
S
G = +1  
= 2kΩ  
V
R
OUT  
R
= 2kΩ  
L
–12  
0.1  
0.1  
1
100  
1000  
1
10  
FREQUENCY (MHz)  
100  
1000  
FREQUENCY (MHz)  
Figure 10. Frequency Response for Various Output Voltages  
Figure 7. Small Signal Frequency Response for Various Supply Voltages  
Rev. A | Page 10 of 24  
 
Data Sheet  
ADA4806-1  
0.6  
0.5  
12  
V
= ±2.5V  
V
= ±2.5V  
S
S
C
L
= 15pF  
L
G = +1  
G = +1  
R
V
= 2kΩ  
9
6
R
V
= 2kΩ  
L
L
= 20mV p-p  
0.4  
= 20mV p-p  
OUT  
OUT  
C
= 10pF  
= 5pF  
0.3  
C
L
0.2  
3
0.1  
C
= 0pF  
L
0
0
C
R
= 15pF  
L
S
–0.1  
–0.2  
–0.3  
–0.4  
–0.5  
–0.6  
=
226Ω  
–3  
–6  
–9  
–12  
1
10  
100  
1
10  
FREQUENCY (MHz)  
100  
FREQUENCY (MHz)  
Figure 11. Small Signal Frequency Response for Various Capacitive Loads  
(See Figure 47)  
Figure 14. Small Signal 0.1 dB Bandwidth  
–50  
–60  
–50  
V
V
V
= ±5V, V  
= ±2.5V, V  
= +2V/–1V, V  
= 2V p-p  
= 2V p-p  
OUT  
V
= ±5V, V  
= 4V p-p  
S
OUT  
S
OUT  
S
S
–60  
–70  
= 1V p-p  
OUT  
–70  
HD2, G = +1  
HD2, G = +2  
HD2 V = ±5V  
S
–80  
–80  
–90  
–90  
–100  
–110  
–120  
–130  
–140  
–150  
–160  
–100  
–110  
–120  
–130  
–140  
–150  
–160  
HD2 V = +2V/–1V  
S
HD2 V = ±2.5V  
S
HD3, G = +2  
HD3 V = +2V/–1V  
S
HD3 V = ±2.5V  
S
HD3 V = ±5V  
S
HD3, G = +1  
1
10  
100  
FREQUENCY (kHz)  
1000  
1
10  
100  
FREQUENCY (kHz)  
1000  
Figure 12. Distortion vs. Frequency for Various Gains  
Figure 15. Distortion vs. Frequency for Various Supplies, G = +1  
–40  
–50  
–50  
V
V
V
= ±5V, V  
OUT  
= 4V p-p  
= 4V p-p  
V
V
= ±2.5V  
IN, CM  
INPUT COMMON-MODE  
VOLTAGE UPPER LIMIT  
S
S
S
S
= 0V  
= ±2.5V, V  
–60  
–70  
HD2 V = ±5V  
S
OUT  
(+V – 1V)  
G = +1  
R
= +2V/–1V, V  
= 1V p-p  
S
OUT  
= 2kΩ  
L
–60  
HD2 V = ±2.5V  
S
–80  
–70  
V
= 1MHz  
IN  
–90  
–80  
–100  
–110  
–120  
–130  
–140  
–150  
–160  
–90  
HD2 V = +2V/–1V  
S
–100  
–110  
–120  
–130  
–140  
V
V
= 100kHz  
= 10kHz  
IN  
HD3 V = +2V/–1V  
S
IN  
HD3 V = ±2.5V  
S
HD3 V = ±5V  
S
0.25  
0.50  
0.75  
1.00  
1.25  
1.50  
1.75  
2.00  
1
10  
100  
1000  
OUTPUT VOLTAGE (V peak)  
FREQUENCY (kHz)  
Figure 13. Total Harmonic Distortion vs. Output Voltage For Various  
Frequencies  
Figure 16. Distortion vs. Frequency, G = +2  
Rev. A | Page 11 of 24  
 
ADA4806-1  
Data Sheet  
90  
80  
70  
60  
50  
40  
30  
20  
10  
0
12  
10  
8
V
= ±2.5V  
V
= ±2.5V  
S
S
G = +1  
G = +1  
6
4
2
0
0.1  
1
10  
100  
1k  
10k 100k  
1M  
10M 100M  
1M  
10M  
1
10  
100  
1k  
10k  
100k  
FREQUENCY (Hz)  
FREQUENCY (Hz)  
Figure 17. Voltage Noise vs. Frequency  
Figure 20. Current Noise vs. Frequency (See Figure 48)  
300  
–10  
–20  
–30  
–40  
–50  
–60  
–70  
–80  
–90  
V
= ±2.5V  
S
V
= ±2.5V  
AVERAGE NOISE = 54nV rms  
250  
200  
150  
100  
50  
S
G = +1  
R
V
= 2kΩ  
= 0.5 Vp-p  
L
IN  
SHUTDOWN = –V  
S
SLEEP = –V  
S
0
–50  
–100  
–150  
–200  
–250  
–300  
0
1
2
3
4
5
6
7
8
9
10  
0.01  
0.1  
1
10  
100  
FREQUENCY (MHz)  
TIME (Seconds)  
Figure 21. Forward Isolation vs. Frequency  
Figure 18. 0.1 Hz to 10 Hz Voltage Noise  
0.3  
0.2  
20  
0
V
= ±2.5V  
V
= +5V  
S
S
G = +1  
= 2V STEP  
ΔV , ΔV  
= 100mV p-p  
S
CM  
V
R
OUT  
= 2kΩ  
L
–20  
–40  
–60  
–80  
–100  
–120  
–140  
–PSRR  
0.1  
0
CMRR  
–0.1  
–0.2  
–0.3  
+PSRR  
0
20  
40  
60  
80  
100  
120  
140  
160  
180  
10  
100  
1k  
10k  
100k  
1M  
10M  
100M  
TIME (ns)  
FREQUENCY (Hz)  
Figure 22. Settling Time to 0.1%  
Figure 19. CMRR, PSRR vs. Frequency  
Rev. A | Page 12 of 24  
 
 
Data Sheet  
ADA4806-1  
35  
30  
25  
20  
15  
10  
5
4500  
4000  
3500  
3000  
2500  
2000  
1500  
1000  
500  
V
= ±2.5V  
S
V
= ±2.5V  
= 9.8µV  
S
T = –40°C TO +125°C  
= –0.19µV/°C  
σ = 19.5µV  
σ = 0.28µV/°C  
0
0
–120  
–1.6  
–1.2  
–0.8  
–0.4  
0
0.4  
0.8  
1.2  
1.6  
–90  
–60  
–30  
0
30  
60  
90  
120  
INPUT OFFSET VOLTAGE DRIFT (µV/°C)  
INPUT OFFSET VOLTAGE (µV)  
Figure 23. Input Offset Voltage Distribution  
Figure 26. Input Offset Voltage Drift Distribution  
100  
80  
150  
V
= ±2.5V  
V
= ±2.5V  
S
S
10 UNITS  
30 UNITS  
100  
50  
60  
40  
20  
0
0
–20  
–40  
–60  
–80  
–50  
–100  
–150  
–100  
–
3.0  
–2.5  
–2.0  
–1.5 –1.0  
–0.5  
0
0.5  
1.0  
1.5  
2.0  
–40 –25 –10  
5
20  
35  
50  
65  
80  
95 110 125  
INPUT COMMON-MODE VOLTAGE (V)  
TEMPERATURE (°C)  
Figure 27. Input Offset Voltage vs. Temperature  
Figure 24. Input Offset Voltage vs. Input Common-Mode Voltage  
650  
630  
–400  
–450  
–500  
–550  
–600  
–650  
–700  
–750  
–800  
6
4
2
0
–
–
–
V
= ±5V  
I
S
B–  
610  
590  
570  
550  
530  
510  
490  
470  
450  
430  
410  
390  
I
B+  
INPUT OFFSET CURRENT  
V
= ±2.5V  
S
2
4
6
V
= ±1.5V  
S
–40 –25 –10  
5
20  
35  
50  
65  
80  
95 110 125  
–
0.4  
0
0.4 0.8 1.2 1.6 2.0 2.4 2.8 3.2 3.6 4.0  
INPUT COMMON-MODE VOLTAGE (V)  
TEMPERATURE (°C)  
Figure 25. Input Bias Current vs. Temperature for Various Supplies  
(See Figure 49)  
Figure 28. Input Bias Current and Input Offset Current vs.  
Input Common-Mode Voltage  
Rev. A | Page 13 of 24  
 
ADA4806-1  
Data Sheet  
15  
10  
5
1.5  
1.0  
G = +1  
= 20mV p-p  
V
= ±5V, V  
= 0V, V  
= 2V p-p  
G = +1  
S
IN, CM  
OUT  
V
OUT  
V
= ±2.5V, V  
= 0V, V  
= 2V p-p  
S
IN, CM  
OUT  
V
= ±2.5V  
S
0.5  
0
0
–5  
–10  
–15  
–0.5  
–1.0  
–1.5  
V
= ±1.5V  
= ±5V  
S
V
= ±1.5V, V  
50  
= –0.5V, V  
= 1V p-p  
OUT  
S
IN, CM  
V
S
0
50  
100  
150  
TIME (ns)  
200  
250  
300  
0
100  
150  
200  
250  
300  
350  
TIME (ns)  
Figure 29. Small Signal Transient Response for Various Supplies  
Figure 32. Large Signal Transient Response for Various Supplies  
4
5
V
= ±2.5V  
S
V
= ±2.5V  
2×V  
S
IN  
V
IN  
G = +1  
G = +2  
4
3
3
2
2
1
V
V
OUT  
OUT  
1
0
0
–1  
–2  
–3  
–4  
–5  
–1  
–2  
–3  
–4  
0
100 200 300 400 500 600 700 800 900 1000  
TIME (ns)  
0
100 200 300 400 500 600 700 800 900 1000  
TIME (ns)  
Figure 30. Input Overdrive Recovery Time  
Figure 33. Output Overdrive Recovery Time  
0.8  
0.7  
0.6  
0.5  
0.4  
0.3  
0.2  
0.1  
0
0.8  
0.7  
0.6  
0.5  
0.4  
0.3  
0.2  
0.1  
0
+125°C  
+125°C  
+25°C  
+25°C  
–40°C  
–40°C  
V
= ±2.5V  
S
G = +1  
= 2kΩ  
V = ±2.5V  
S
R
G = +1  
= 2kΩ  
L
R
L
–0.1  
–0.5  
–0.1  
–0.25  
0
0.5  
1.0  
1.5  
2.0  
0
0.25  
0.50  
0.75  
TIME (µs)  
TIME (µs)  
Figure 31. Turn-On Response Time from Shutdown for Various Temperatures  
(See Figure 50)  
Figure 34. Turn-On Response Time from Sleep for Various Temperatures  
(See Figure 50)  
Rev. A | Page 14 of 24  
 
 
Data Sheet  
ADA4806-1  
800  
700  
600  
500  
400  
300  
200  
100  
800  
700  
600  
500  
400  
300  
200  
100  
0
V
= ±2.5V  
V = ±2.5V  
S
S
G = +1  
R
+125°C  
G = +1  
= 2kΩ  
= 2kΩ  
L
R
L
+125°C  
+25°C  
–40°C  
+25°C  
–40°C  
0
–1  
0
1
2
3
4
5
6
–1  
0
1
2
3
4
5
6
TIME (µs)  
TIME (µs)  
Figure 35. Turn-Off Response Time to Shutdown for Various Temperatures  
(See Figure 51)  
Figure 38. Turn-Off Response Time to Sleep for Various Temperatures  
(See Figure 51)  
0.8  
0.7  
0.8  
0.7  
V
= ±5V  
S
V
= ±5V  
0.6  
0.5  
0.4  
0.3  
0.2  
0.1  
0
S
0.6  
0.5  
0.4  
0.3  
0.2  
0.1  
0
V
= ±2.5V  
S
V
= +2/–1V  
S
V
= +2V/–1V  
S
V
= ±2.5V  
S
G = +1  
= 2kΩ  
G = +1  
= 2kΩ  
R
L
R
L
–0.1  
–0.1  
–0.25  
–1  
0
1
TIME (µs)  
2
3
0
0.25  
TIME (µs)  
0.5  
0.75  
Figure 36. Turn-On Response Time from Shutdown for Various Supplies  
Figure 39. Turn-On Response Time from Sleep for Various Supplies  
800  
800  
G = +1  
L
R
= 2kΩ  
G = +1  
700  
600  
500  
400  
300  
200  
100  
0
700  
V
= ±5V  
S
R
= 2kΩ  
L
V
= ±5V  
S
600  
500  
400  
300  
200  
100  
0
V
= ±2.5V  
S
V
= ±2.5V  
S
V
= ±1.5V  
S
V
= ±1.5V  
S
–1  
0
1
2
3
4
5
6
–1  
0
1
2
3
4
5
6
TIME (µs)  
TIME (µs)  
Figure 37. Turn-Off Response Time to Shutdown for Various Supplies  
Figure 40. Turn-Off Response Time to Sleep for Various Supplies  
Rev. A | Page 15 of 24  
 
 
ADA4806-1  
Data Sheet  
800  
750  
700  
650  
600  
140  
130  
120  
110  
100  
90  
V
= ±2.5V  
S
V
= ±5.0V  
V
= ±5V  
S
S
550  
500  
450  
400  
350  
300  
80  
V
= ±1.5V  
S
70  
V
= ±2.5V  
S
V
= ±1.5V  
S
60  
50  
40  
–40 –25 –10  
5
20  
35  
50  
65  
80  
95 110 125  
–40 –25 –10  
5
20  
35  
50  
65  
80  
95 110 125  
TEMPERATURE (°C)  
TEMPERATURE (°C)  
Figure 41. Quiescent Supply Current vs. Temperature  
Figure 44. Sleep Mode Quiescent Supply Current vs. Temperature  
4.0  
3.5  
3.0  
2.5  
2.0  
1.5  
1.0  
0.5  
4.0  
V
= ±5.0V  
S
3.5  
3.0  
2.5  
2.0  
1.5  
1.0  
0.5  
0
V
= ±2.5V  
S
–40°C  
+125°C  
+25°C  
V
= ±1.5V  
S
3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 7.0 7.5 8.0 8.5 9.0 9.5 10.0  
–40 –25 –10  
5
20  
35  
50  
65  
80  
95 110 125  
SUPPLY VOLTAGE FROM GROUND (V)  
TEMPERATURE (°C)  
SHUTDOWN  
SLEEP  
and Threshold vs. Supply Voltage from Ground  
for Various Temperatures  
Figure 42.  
Figure 45. Sleep Mode Output Current vs. Temperature  
3
2
25.5  
25.0  
24.5  
24.0  
23.5  
23.0  
22.5  
22.0  
21.5  
120  
100  
80  
0
V
= ±2.5V  
S
6 UNITS, SOLDERED TO PCB  
–20  
–40  
–60  
–80  
–100  
–120  
–140  
–160  
–180  
GAIN  
1
OIL BATH  
TEMPERATURE  
0
60  
–1  
–2  
–3  
–4  
PHASE  
40  
20  
0
–5  
0
–20  
10  
200  
400  
600  
800  
1000  
1200  
1400  
100  
1k  
10k  
100k  
1M  
10M  
100M  
TIME (Hours)  
FREQUENCY (Hz)  
Figure 43. Long-Term VOS Drift  
Figure 46. Open-Loop Gain and Phase Margin  
Rev. A | Page 16 of 24  
Data Sheet  
ADA4806-1  
TEST CIRCUITS  
+2.5V  
–2.5V  
SHUTDOWN OR SLEEP  
V
OUT  
+2.5V  
–2.5V  
R
S
0.5V  
2kΩ  
V
OUT  
V
IN  
20mV p-p  
C
2kΩ  
L
50Ω  
+
–
5V  
–2.5V  
Figure 47. Output Capacitive Load Behavior Test Circuit (See Figure 11)  
Figure 50. Turn-On Response Test Circuit (See Figure 31 and Figure 34)  
+2.5V  
SHUTDOWN OR SLEEP  
I
S
+2.5V  
V
OUT  
V
OUT  
2kΩ  
75kΩ  
–2.5V  
–2.5V  
+
–
5V  
–2.5V  
Figure 48. Current Noise Test Circuit (See Figure 20)  
Figure 51. Turn-Off Response Test Circuit (See Figure 35 and Figure 38)  
I
+
B
I
–
B
Figure 49. Input Bias Current Temperature Test Circuit (See Figure 25)  
Rev. A | Page 17 of 24  
 
 
 
 
 
 
ADA4806-1  
Data Sheet  
THEORY OF OPERATION  
For differential voltages above approximately 1.2 V at room  
AMPLIFIER DESCRIPTION  
temperature, and 0.8 V at 125°C, the diode clamps begin to  
conduct. If large differential voltages must be sustained across  
the input terminals, the current through the input clamps must  
be limited to less than 10 mA. Series input resistors that are sized  
appropriately for the expected differential overvoltage provide  
the needed protection.  
The ADA4806-1 has a bandwidth of 105 MHz and a slew rate of  
160 V/µs. It has an input referred voltage noise of only 5.9 nV/√Hz.  
The ADA4806-1 operates over a supply voltage range of 2.7 V to  
10 V and consumes only 500 µA of supply current at VS = 5 V. The  
low end of the supply range allows −10% variation of a 3 V supply.  
The amplifier is unity-gain stable, and the input structure results in  
an extremely low input 1/f noise. The ADA4806-1 uses a slew  
enhancement architecture, as shown in Figure 52. The slew  
enhancement circuit detects the absolute difference between the  
two inputs. It then modulates the tail current, ITAIL, of the input  
stage to boost the slew rate. The architecture allows a higher  
slew rate and fast settling time with low quiescent current while  
maintaining low noise.  
The ESD clamps begin to conduct for input voltages that are  
more than 0.7 V above the positive supply and input voltages  
more than 0.7 V below the negative supply. If an overvoltage  
condition is expected, the input current must be limited to less  
than 10 mA.  
SHUTDOWN/SLEEP MODE OPERATION  
Figure 54 shows the ADA4806-1 shutdown circuitry. To  
SLEW ENHANCEMENT CIRCUIT  
maintain very low supply current in shutdown mode, no internal  
+V  
S
SHUTDOWN  
pull-up resistor is supplied; therefore, the  
be driven high or low externally and must not be left floating.  
SHUTDOWN  
pin must  
I
TAIL  
TO DETECT  
ABSOLUTE  
VALUE  
Pulling the  
pin to ≥1 V below midsupply turns the  
device off, reducing the supply current to 2.9 µA for a 5 V supply.  
When the amplifier is powered down, its output enters a high  
impedance state. The output impedance decreases as frequency  
increases. In shutdown mode, a forward isolation of −62 dB can  
be achieved at 100 kHz (see Figure 21).  
V
V
IN–  
IN+  
+IN  
–IN  
INPUT  
STAGE  
A second circuit similar to Figure 54 is used for sleep mode  
SLEEP  
operation. Pulling the  
pin low places the amplifier in a low  
Figure 52. Slew Enhancement Circuit  
power state, drawing only 74 µA from a 5 V supply. Leaving the  
amplifier biased on at a very low level greatly reduces the turn-  
on time from sleep to full power mode, thus enabling dynamic  
power scaling of the ADA4806-1 at higher sample rates.  
INPUT PROTECTION  
The ADA4806-1 is fully protected from ESD events,  
withstanding human body model ESD events of 3.5 kV and  
charged device model events of 1.25 kV with no measured  
performance degradation. The precision input is protected with  
an ESD network between the power supplies and diode clamps  
across the input device pair, as shown in Figure 53.  
The ADA4806-1 is not characterized for operation in sleep mode.  
+V  
S
2.2R  
1.1V  
ESD  
ESD  
+V  
S
SHUTDOWN  
BIAS  
ESD  
+IN  
ESD  
ESD  
ESD  
1.8R  
S
TO ENABLE  
AMPLIFIER  
–IN  
–V  
Figure 54. Shutdown/Sleep Equivalent Circuit  
–V  
S
SHUTDOWN  
SLEEP  
pin are protected by ESD  
The  
pin and the  
TO THE REST OF THE AMPLIFIER  
clamps, as shown in Figure 54. Voltages beyond the power supplies  
Figure 53. Input Stage and Protection Diodes  
SHUTDOWN  
cause these diodes to conduct. To protect the  
and  
SLEEP  
pins, ensure that the voltage to these pins does not  
exceed 0.7 V above the positive supply or 0.7 V below the  
negative supply. If an overvoltage condition is expected, the  
input current must be limited to less than 10 mA with a series  
resistor.  
Rev. A | Page 18 of 24  
 
 
 
 
 
 
 
Data Sheet  
ADA4806-1  
Table 8 summarizes the threshold voltages for the  
The output noise spectral density is calculated by  
SHUTDOWN  
SLEEP  
and  
shows the truth table for the  
pins for various supplies. Table 9  
vn _OUT  
=
SHUTDOWN  
SLEEP  
pins.  
and  
2  
2  
RF  
RG  
RF  
RG  
2
2
2
4kTRF + 1+  
[
4kTRs + in+2RS + vn  
]
+
4kTRG + in−2 RF  
Table 8. Threshold Voltages for Enabled Mode and  
Shutdown/Sleep Modes  
where:  
k is Boltzmann’s constant.  
T is the absolute temperature in degrees Kelvin.  
RF and RG are the feedback network resistances, as shown in  
Figure 55.  
Mode  
+3 V  
+5 V  
5 V  
+7 V/−2 V  
Enabled  
Shutdown/Sleep <+0.7 V  
Mode  
>+1.1 V  
>+1.9 V  
<+1.5 V  
>−0.9 V  
<−1.3 V  
>+1.6 V  
<+1.2 V  
RS is the source resistance, as shown in Figure 55.  
in+ and in− represent the amplifier input current noise spectral  
SHUTDOWN  
SLEEP  
Pins  
Table 9. Truth Table for the  
and  
density in pA/√Hz.  
vn is the amplifier input voltage noise spectral density in  
nV/√Hz.  
SHUTDOWN  
SLEEP  
Operating State  
Powered down  
Powered down  
Low power mode  
Full power mode  
Low  
Low  
High  
Low  
High  
Low  
Source resistance noise, amplifier input voltage noise (vn), and  
the voltage noise from the amplifier input current noise  
(in+ × RS) are all subject to the noise gain term (1 + RF/RG).  
High  
High  
NOISE CONSIDERATIONS  
Figure 56 shows the total referred to input (RTI) noise due to  
the amplifier vs. the source resistance. Note that with a  
5.9 nV/√Hz input voltage noise and 0.6 pA/√Hz input current  
noise, the noise contributions of the amplifier are relatively  
small for source resistances from approximately 2.6 kΩ to  
47 kΩ.  
Figure 55 shows the primary noise contributors for the typical  
gain configurations. The total output noise (vn_OUT) is the root  
sum square of all the noise contributions.  
R
V
=
4kTR  
F
n_RF  
F
V
n
R
V
=
=
G
S
4kTR  
4kTR  
n_RG  
G
The Analog Devices, Inc., silicon germanium (SiGe) bipolar  
process makes it possible to achieve a low noise of 5.9 nV/√Hz  
for the ADA4806-1. This noise is much improved compared to  
similar low power amplifiers with a supply current in the range  
of hundreds of microamperes.  
+ V  
i
n_OUT  
n–  
R
V
n_RS  
S
i
n+  
Figure 55. Noise Sources in Typical Connection  
1000  
TOTAL NOISE  
SOURCE RESISTANCE NOISE  
AMPLIFIER NOISE  
100  
10  
SOURCE RESISTANCE = 47kΩ  
SOURCE RESISTANCE = 2.6kΩ  
1
100  
1k  
10k  
100k  
1M  
SOURCE RESISTANCE (Ω)  
Figure 56. RTI Noise vs. Source Resistance  
Rev. A | Page 19 of 24  
 
 
 
 
 
ADA4806-1  
Data Sheet  
APPLICATIONS INFORMATION  
5
4
SLEW ENHANCEMENT  
V
= ±2.5V  
S
G = +2  
R
= 2.6kΩ  
F
The ADA4806-1 has an internal slew enhancement circuit that  
increases the slew rate as the feedback error voltage increases.  
This circuit allows the amplifier to settle a large step response  
faster, as shown in Figure 57. This is useful in ADC applications  
where multiple input signals are multiplexed. The impact of the  
slew enhancement can also be seen in the large signal frequency  
response, where larger input signals cause a slight increase in  
peaking, as shown in Figure 58.  
R
= 2 kΩ  
= 20mV p-p  
L
3
V
IN  
R
= 4.99kΩ  
F
2
1
0
–1  
–2  
–3  
–4  
–5  
–6  
R
= 1kΩ  
F
R
= 2.6kΩ, C = 1pF  
F
F
R
= 4.99kΩ, C = 1pF  
F
F
1.5  
V
= ±2.5V  
S
G = +1  
R
= 2kΩ  
L
V
V
= 2V p-p  
= 1V p-p  
OUT  
1.0  
0.5  
100k  
1M  
10M  
100M  
FREQUENCY (Hz)  
OUT  
Figure 59. Peaking in Frequency Response at Selected RF Values  
V
= 500mV p-p  
OUT  
0
COMPENSATING PEAKING IN LARGE SIGNAL  
FREQUENCY RESPONSE  
–0.5  
–1.0  
–1.5  
At high frequency, the slew enhancement circuit can contribute to  
peaking in the large signal frequency response. Figure 59 shows the  
effect of a feedback capacitor on the small signal response, whereas  
Figure 60 shows that the same technique is effective for reducing  
peaking in the large signal response.  
0
10  
20  
30  
40  
50  
60  
70  
80  
90  
100  
TIME (ns)  
6
V
= ±2.5V  
S
Figure 57. Step Response with Selected Output Steps  
G = +2  
R
V
= 2 kΩ  
= 632mV p-p  
L
3
0
2
1
IN  
V
= ±2.5V  
S
G = +1  
= 2kΩ  
R
L
R
F
= 2.6kΩ, C = 0pF  
F
F
0
R
= 1kΩ, C = 0pF  
–3  
F
F
R
= 2.6kΩ, C = 2.7pF  
V
= 2V p-p  
F
IN  
R
= 1 kΩ, C = 2 pF  
F
F
V
V
V
= 200mV p-p  
= 632mV p-p  
= 400mV p-p  
–1  
–2  
–3  
–4  
–5  
–6  
IN  
IN  
IN  
–6  
–9  
–12  
–15  
V
= 100mV p-p  
IN  
100k  
1M  
10M  
FREQUENCY (Hz)  
100M  
100k  
1M  
10M  
FREQUENCY (Hz)  
100M  
Figure 60. Peaking Mitigation in Large Signal Frequency Response  
DRIVING LOW POWER, HIGH RESOLUTION  
SUCCESSIVE APPROXIMATION REGISTER (SAR)  
ADCs  
Figure 58. Peaking in Frequency Responses as Signal Level Changes, G = +1  
EFFECT OF FEEDBACK RESISTOR ON FREQUENCY  
RESPONSE  
The ADA4806-1 is ideal for driving low power, high resolution  
SAR ADCs. The 5.9 nV/√Hz input voltage noise and rail-to-rail  
output stage of the ADA4806-1 help minimize distortion at  
large output levels. With its low power of 500 µA, the amplifier  
consumes power that is compatible with low power SAR ADCs,  
which are usually in the microwatt (µW) to low milliwatt (mW)  
range. Furthermore, the ADA4806-1 supports a single-supply  
configuration; the input common-mode range extends to 0.1 V  
below the negative supply, and 1 V below the positive supply.  
The amplifier input capacitance and feedback resistor form a  
pole that, for larger value feedback resistors, can reduce phase  
margin and contribute to peaking in the frequency response.  
Figure 59 shows the peaking for selected feedback resistors (RF)  
when the amplifier is configured in a gain of +2. Figure 59 also  
shows how peaking can be mitigated with the addition of a  
small value capacitor placed across the feedback resistor of the  
amplifier.  
Rev. A | Page 20 of 24  
 
 
 
 
 
 
 
 
 
Data Sheet  
ADA4806-1  
Figure 61 shows a typical 16-bit, single-supply application. The  
ADA4806-1 drives the AD7980, a 16-bit, 1 MSPS, SAR ADC in  
a low power configuration. The AD7980 operates on a 2.5 V  
supply and supports an input from 0 V to VREF. In this case, the  
ADR435 provides a 5 V reference. The ADA4806-1 is used both  
as a driver for the AD7980 and as a reference buffer for the  
ADR435.  
DYNAMIC POWER SCALING  
One of the merits of a SAR ADC, like the AD7980, is that its  
power scales with the sampling rate. This power scaling makes  
SAR ADCs very power efficient, especially when running at a  
low sampling frequency. However, the ADC driver used with  
the SAR ADC traditionally consumes constant power regardless  
of the sampling frequency.  
The low-pass filter formed by R3 and C1 reduces the noise to  
the input of the ADC (see Figure 61). In lower frequency  
applications, the designer can reduce the corner frequency of  
the filter to remove additional noise.  
Figure 62 illustrates a method by which the quiescent power of  
the ADC driver can be dynamically scaled with the sampling  
rate of the system. By providing properly timed signals to the  
SHUTDOWN  
convert input (CNV) pin of the ADC and the  
+7.5V  
SLEEP  
and  
pins of the ADA4806-1, both devices can be run at  
5V REF  
ADA4806-1  
ADR435  
optimum efficiency.  
VDD  
C4  
100nF  
+5V  
C2  
10µF  
C3  
0.1µF  
+6V  
+2.5V  
0.1µF  
V
IN  
REF  
VDD  
ADA4806-1  
+7.5V  
ADA4806-1  
20Ω  
AD7980  
2.7nF  
0V TO  
GND CNV  
REF VDD  
V
REF  
IN+  
IN–  
R3  
20Ω  
AD7980  
GND  
TIMING  
GENERATOR  
C1  
2.7nF  
Figure 62. ADA4806-1/AD7980 Power Management Circuitry  
Figure 61. Driving the AD7980 with the ADA4806-1  
Figure 63 illustrates the relative signal timing for power scaling  
the ADA4806-1 and the AD7980. To prevent any degradation in  
the performance of the ADC, the ADA4806-1 must have a fully  
settled output into the ADC before the activation of the  
CNV pin. The amplifier on-time (tAMP, ON) is the time the amplifier  
is enabled prior to the rising edge of the CNV signal; this time  
In this configuration, the ADA4806-1 consume 7.2 mW of  
quiescent power. The measured signal-to-noise ratio (SNR),  
THD, and signal-to-noise-and-distortion ratio (SINAD) of the  
whole system for a 10 kHz signal are 89.4 dB, 104 dBc, and  
89.3 dB, respectively. This translates to an effective number of  
bits (ENOB) of 14.5 at 10 kHz, which is compatible with the  
AD7980 performance. Table 10 shows the performance of this  
setup at selected input frequencies.  
SHUTDOWN  
SLEEP  
depends on whether the  
pin or  
pin is being  
driven. In the example shown in Figure 64, tAMP, ON is 3 µs for the  
SHUTDOWN  
conversion, the  
SLEEP  
pin and/or the  
pin and 0.5 µs for the  
SHUTDOWN  
pin. After a  
SLEEP  
pin of the  
ADA4806-1 are pulled low when the ADC input is inactive in  
between samples. While in shutdown mode, the ADA4806-1  
output impedance is high.  
Table 10. System Performance at Selected Input Frequencies for Driving the AD7980 Single-Ended  
ADC Driver Reference Buffer  
Results  
THD (dBc)  
Input Frequency (kHz)  
Supply (V)  
Gain  
Supply (V)  
Gain  
SNR (dB)  
89.8  
89.4  
89.9  
88.5  
SINAD (dB)  
89.6  
ENOB  
14.6  
14.5  
14.6  
14.3  
13.9  
1
7.5  
7.5  
7.5  
7.5  
7.5  
1
1
1
1
1
7.5  
7.5  
7.5  
7.5  
7.5  
1
1
1
1
1
103  
104  
103  
99  
10  
20  
50  
100  
89.3  
89.7  
88.1  
86.3  
93.7  
85.6  
Rev. A | Page 21 of 24  
 
 
 
 
ADA4806-1  
Data Sheet  
CNV  
SAMPLING PERIOD, tS  
ACQUISITION  
ACQUISITION  
CONVERSION  
CONVERSION  
ACQUISITION  
CONVERSION  
ADC  
POWERED  
POWERED  
POWERED  
ADA4806-1  
SHUTDOWN/  
SLEEP  
ON  
ON  
ON  
SHUTDOWN/SLEEP  
SHUTDOWN/SLEEP  
SHUTDOWN/SLEEP  
tAMP, ON  
tAMP, ON  
tAMP, ON  
I
Q, ON  
ADA4806-1  
QUIESCENT  
CURRENT  
tAMP, OFF  
tAMP, OFF  
tAMP, OFF  
Figure 63. Timing Waveforms  
10  
1.0  
0.1  
Figure 64 shows the quiescent power of the ADA4806-1,  
operating from a single +6 V supply, without power scaling and  
CONTINUOUSLY ON  
SLEEP MODE  
SHUTDOWN  
SLEEP  
while power scaling via the  
pin and the  
pin.  
Without power scaling, the ADA4806-1 consumes constant  
power regardless of the sampling frequency, as shown in  
Equation 1.  
PQ = IQ × VS  
(1)  
With power scaling, the quiescent power becomes proportional  
to the ratio between the amplifier on time, tAMP, ON, and the  
sampling time, tS:  
AD7980 ADC  
SHUTDOWN MODE  
tAMP,ON  
tS − tAMP,ON  
(2)  
0.01  
0.01  
P = IQ _ on ×VS ×  
+ IQ _ off ×VS ×  
Q
0.1  
1
10  
100  
1000  
tS  
tS  
ADC SAMPLE RATE (ksps)  
Thus, by dynamically switching the ADA4806-1 between  
Figure 64. Quiescent Power Consumption of the ADA4806-1 vs.  
ADC Sample Rate, Using Dynamic Power Scaling  
shutdown/sleep and full power modes between consecutive  
samples, the quiescent power of the driver scales with the  
sampling rate.  
SHUTDOWN  
Note that tAMP, O N in Figure 64 is 3 µs for the  
SLEEP  
pin and  
0.5 µs for the  
pin.  
Rev. A | Page 22 of 24  
 
 
Data Sheet  
ADA4806-1  
SINGLE-ENDED TO DIFFERENTIAL CONVERSION  
LAYOUT CONSIDERATIONS  
Most high resolution ADCs have differential inputs to reduce  
common-mode noise and harmonic distortion. Therefore, it is  
necessary to use an amplifier to convert a single-ended signal  
into a differential signal to drive the ADCs.  
To ensure optimal performance, careful and deliberate attention  
must be paid to the board layout, signal routing, power supply  
bypassing, and grounding.  
Ground Plane  
There are two common ways the user can convert a single-ended  
signal into a differential signal: either use a differential  
amplifier, or configure two amplifiers as shown in Figure 65.  
The use of a differential amplifier yields better performance,  
whereas the 2-op-amp solution results in lower system cost. The  
ADA4806-1 solves this dilemma of choosing between the two  
methods by combining the advantages of both. Its low harmonic  
distortion, low offset voltage, and low bias current mean that it can  
produce a differential output that is well matched with the  
performance of the high resolution ADCs.  
It is important to avoid ground in the areas under and around the  
input and output of the ADA4806-1. Stray capacitance between  
the ground plane and the input and output pads of a device is  
detrimental to high speed amplifier performance. Stray  
capacitance at the inverting input, together with the amplifier  
input capacitance, lowers the phase margin and can cause  
instability. Stray capacitance at the output creates a pole in the  
feedback loop, which can reduce phase margin and cause the  
circuit to become unstable.  
Power Supply Bypassing  
Figure 65 shows how the ADA4806-1 converts a single-ended  
signal into a differential output. The first amplifier is configured  
in a gain of +1 with its output then inverted to produce the  
complementary signal. The differential output then drives the  
AD7982, an 18-bit, 1 MSPS SAR ADC. To further reduce noise,  
the user can reduce the values of R1 and R2. However, note that  
this increases the power consumption. The low-pass filter of the  
ADC driver limits the noise to the ADC.  
Power supply bypassing is a critical aspect in the performance  
of the ADA4806-1. A parallel connection of capacitors from  
each power supply pin to ground works best. Smaller value  
ceramic capacitors offer better high frequency response,  
whereas larger value ceramic capacitors offer better low  
frequency performance.  
Paralleling different values and sizes of capacitors helps to ensure  
that the power supply pins are provided with a low ac impedance  
across a wide band of frequencies. This is important for minimizing  
the coupling of noise into the amplifier—especially when the  
amplifier PSRR begins to roll off—because the bypass capacitors  
can help lessen the degradation in PSRR performance.  
The measured SNR, THD, and SINAD of the whole system for a  
10 kHz signal are 93 dB, 113 dBc, and 93 dB, respectively. This  
translates to an ENOB of 15.1 at 10 kHz, which is compatible  
with the performance of the AD7982. Table 11 shows the  
performance of this setup at selected input frequencies.  
Place the smallest value capacitor on the same side of the board  
as the amplifier and as close as possible to the amplifier power  
supply pins. Connect the ground end of the capacitor directly to  
the ground plane.  
Table 11. System Performance at Selected Input Frequencies  
for Driving the AD7982 Differentially  
Results  
SNR  
THD  
(dBc)  
SINAD  
(dB)  
It is recommended that a 0.1 µF ceramic capacitor with a  
0508 case size be used. The 0508 case size offers low series  
inductance and excellent high frequency performance. Place a  
10 µF electrolytic capacitor in parallel with the 0.1 µF capacitor.  
Depending on the circuit parameters, some enhancement to  
performance can be realized by adding additional capacitors.  
Each circuit is different and must be analyzed individually for  
optimal performance.  
Input Frequency (kHz) (dB)  
ENOB  
15.1  
15.1  
15.1  
14.8  
14.3  
1
93  
93  
93  
92  
89  
104  
113  
110  
102  
96  
93  
93  
93  
91  
88  
10  
20  
50  
100  
VDD  
R3  
22Ω  
C4  
0.1µF  
+5V  
R2  
1kΩ  
C2  
2.7nF  
+7.5V  
REF VDD  
IN+  
IN–  
+7.5V  
R1  
1kΩ  
AD7982  
R4  
22Ω  
ADA4806-1  
C3  
2.7nF  
ADA4806-1  
V
C1  
0.1µF  
IN  
+2.5V  
+2.5V  
Figure 65. Driving the AD7982 with the ADA4806-1  
Rev. A | Page 23 of 24  
 
 
 
 
ADA4806-1  
Data Sheet  
OUTLINE DIMENSIONS  
3.00  
2.90  
2.80  
8
1
7
6
3
5
4
3.00  
2.80  
2.60  
1.70  
1.60  
1.50  
2
PIN 1  
INDICATOR  
0.65 BSC  
1.95  
BSC  
1.30  
1.15  
0.90  
0.22 MAX  
0.08 MIN  
1.45 MAX  
0.95 MIN  
0.60  
0.45  
0.30  
0.15 MAX  
0.05 MIN  
8°  
4°  
0°  
SEATING  
PLANE  
0.60  
BSC  
0.38 MAX  
0.22 MIN  
COMPLIANT TO JEDEC STANDARDS MO-178-BA  
Figure 66. 8-Lead Small Outline Transistor Package [SOT-23]  
(RJ-8)  
Dimensions shown in millimeters  
ORDERING GUIDE  
Model1  
Temperature Range  
−40°C to +125°C  
−40°C to +125°C  
Package Description  
Package Option  
ADA4806-1ARJZ-R2  
ADA4806-1ARJZ-R7  
ADA4806-1RJ-EBZ  
8-Lead Small Outline Transistor Package [SOT-23]  
8-Lead Small Outline Transistor Package [SOT-23]  
Evaluation Board for 8-Lead SOT-23  
RJ-8  
RJ-8  
1 Z = RoHS Compliant Part.  
©2015-2017 Analog Devices, Inc. All rights reserved. Trademarks and  
registered trademarks are the property of their respective owners.  
D13391-0-5/17(A)  
Rev. A | Page 24 of 24  
 
 

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SI9130DB

 5- and 3.3-V Step-Down Synchronous Converters

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VISHAY

SI9135LG-T1

 SMBus Multi-Output Power-Supply Controller

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VISHAY

SI9135LG-T1-E3

 SMBus Multi-Output Power-Supply Controller

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SI9135_11

 SMBus Multi-Output Power-Supply Controller

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SI9136_11

 Multi-Output Power-Supply Controller

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SI9130CG-T1-E3

 Pin-Programmable Dual Controller - Portable PCs

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SI9130LG-T1-E3

 Pin-Programmable Dual Controller - Portable PCs

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SI9130_11

 Pin-Programmable Dual Controller - Portable PCs

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SI9137

 Multi-Output, Sequence Selectable Power-Supply Controller for Mobile Applications

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SI9137DB

 Multi-Output, Sequence Selectable Power-Supply Controller for Mobile Applications

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VISHAY

SI9137LG

 Multi-Output, Sequence Selectable Power-Supply Controller for Mobile Applications

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VISHAY

SI9122E

 500-kHz Half-Bridge DC/DC Controller with Integrated Secondary Synchronous Rectification Drivers

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VISHAY
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