ADD8702 [ADI]
12-Channel Gamma Buffers with Vcom Buffer; 12通道伽玛缓冲器，具有VCOM缓冲器
| 型号： | ADD8702 |
| 厂家： | 
ADI |
| 描述： | 12-Channel Gamma Buffers with Vcom Buffer |
| 文件： | 总8页 (文件大小：223K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
12-Channel Gamma Buffers
with VCOM Buffer
ADD8702
FEATURES
FUNCTIONAL BLOCK DIAGRAM
Programmable 12-Channel Gamma Reference Generator
Mask Programmable Adjustable VCOM Buffer
Upper/Lower Outputs Swing to VDD/GND
Continuous Output Current: 10 mA
32 31 30 26 28 27 26 25
V
COM Peak Output Current: 250 mA
V
1
2
3
4
5
6
7
8
24
23
22
21
20
Outputs with Fast Settling Time for Load Change
Output Pins Are Compatible with ADD8701
Single-Supply Operation: 7 V to 16 V
Supply Current: 15 mA Max
DD
GND
V
ADJ
HIGH
V
COM
DD
V
VGMA6
VGMA5
VGMA4
V
V
11
10
IN
IN
V
V
V
9
19 VGMA3
18 VGMA2
17 VGMA1
APPLICATIONS
TFT LCD Panels
IN
8
IN
IN
7
9
10 11 12 13 14 15 16
GENERAL DESCRIPTION
The ADD8702 is a low cost, mask programmable, 12-channel
gamma reference generator, plus an adjustable VCOM driver. This
part is designed to provide gamma correction for high resolution
TFT LCD panels. The 12 gamma reference levels and VCOM are
mask programmable to 0.3% resolution using the on-chip 500
chain resistor string. This reduces component and board costs.
The output pins are compatible with the ADD8701. This allows
for single board design and fast turns for prototyping using the
initial ADD8701 board design.
The ADD8702 is specified over the temperature range of –40°C
to +85°C and comes in the 32-lead lead frame chip scale pack-
age (LFCSP) for compact board space.
The ADD8702 provides a complete programmed set of gamma
voltage references for the LCD source drivers. These references
settle quickly to load change. The VCOM output is stable with
high capacitive loads and can source or sink 250 mA peak cur-
rent. The VCOM output level can be adjusted using an external
trim-potentiometer or discrete resistors.
PANEL
TIMING
CONTROLLER
ADD8702
TIMING AND CONTROL
GAMMA
REFERENCE
VOLTAGES
GAMMA
SCAN DRIVER CONTROL
V
COM
SOURCE DRIVER
SOURCE DRIVER
NO. 2
SOURCE DRIVER
NO. 1
NO. 8
384
384
384
R
G
B
TFT COLOR PANEL
SCAN
DRIVERS
768
1024 ꢀ 768
Figure 1. Typical SVGA TFT LCD Application
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, norforanyinfringementsofpatentsorotherrightsofthirdpartiesthat
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective companies.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
Fax: 781/326-8703
www.analog.com
© 2003 Analog Devices, Inc. All rights reserved.
ADD8702–SPECIFICATIONS
ELECTRICAL CHARACTERISTICS (VDD = 16 V, TA = 25؇C, unless otherwise specified.)
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
OUTPUT ACCURACY
VSYSTEM ERROR
VSY ERROR
10
50
mV
MASK PROGRAMMABLE
RESISTOR STRING
Total Resistor String
Resistor Matching
RTOTAL
RMATCH
500 Elements VLOW to VHIGH
Any Two Segments
22.5
1
kΩ
%
OUTPUT CHARACTERISTICS
Output Voltage High
(VGMA11, VGMA12)
VOUT
IL = 100 µA
15.995
15.85 15.95
15.75
V
V
V
V
IL = 5 mA
–40°C ≤ TA ≤ +85°C
IL = 5 mA
Output Voltage Mid
(VGMA3 to VGMA10)
Output Voltage Low
(VGMA1, VGMA2)
VOUT
VOUT
14.6
IL = 100 µA
IL = 5 mA
–40°C ≤ TA ≤ +85°C
5
50
mV
mV
mV
mA
mA
µs
150
250
Continuous Output Current
Peak Output Current
Settling Time—Voltage
IOUT
IPK
tS
10
150
1
1 V Step 0.1%, RL = 10 kΩ, CL = 200 pF
VCOM CHARACTERISTICS
Continuous Output Current
Peak Output Current
IOUT
IPK
tS
35
250
0.8
mA
mA
µs
Settling Time—Voltage
1 V Step 0.1%, RL = 10 kΩ, CL = 200 pF
VS = 6 V to 17 V, –40°C ≤ TA ≤ +85°C
SUPPLY CHARACTERISTICS
Supply Voltage
Power Supply Rejection Ratio
VDD
PSRR
7
68
16
V
dB
75
11
SUPPLY CURRENT
ISYS
No Load
–40°C ≤ TA ≤ +85°C
15
16
mA
mA
Specifications subject to change without notice.
–2–
REV. 0
ADD8702
ABSOLUTE MAXIMUM RATINGS*
1
2
Package Type
ꢁJA
ꢂJB
13
Unit
Supply Voltage (VS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 V
Storage Temperature Range . . . . . . . . . . . . . –65°C to +150°C
Operating Temperature Range . . . . . . . . . . . . –40°C to +85°C
Junction Temperature Range . . . . . . . . . . . . . –65°C to +150°C
Lead Temperature Range (Soldering, 60 sec.) . . . . . . . . 300°C
ESD Tolerance (HBM) . . . . . . . . . . . . . . . . . . . . . . . 1,000 V
32-Lead LFCSP (CP)
35
°C/W
NOTES
1θJA is specified for worst-case conditions, i.e., θJA is specified for device soldered
in circuit board for surface-mount packages.
2ψJB is applied for calculating the junction temperature by reference to the board
temperature.
*Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
ORDERING GUIDE
Temperature
Range
Package
Description
Package
Option
Model
ADD8702ACP-R2
ADD8702ACP-REEL
ADD8702ACP-REEL7 –40°C to +85°C
–40°C to +85°C
–40°C to +85°C
32-Lead LFCSP
32-Lead LFCSP
32-Lead LFCSP
CP-32
CP-32
CP-32
PIN CONFIGURATION
V
1
24 GND
23 V
PIN 1
DD
INDICATOR
V
ADJ 2
3
COM
V
V
V
DD
22 VGMA6
21 VGMA5
20 VGMA4
19 VGMA3
18 VGMA2
17 VGMA1
HIGH
11 4
10 5
9 6
8 7
7 8
IN
ADD8702
TOP VIEW
IN
V
IN
V
IN
V
IN
PIN FUNCTION DESCRIPTIONS
Pin No.
Mnemonic
Description
1, 15, 23
2
VDD
Power (+)
V
COM ADJ
VCOM Adjust Input
3
4–13
14
VHIGH
VIN11–VIN2
VLOW
Highest Gamma Input Voltage
Gamma Buffer Inputs
Lowest Gamma Input Voltage
16, 24, 31
17–22, 25–30
32
GND
Power (–)
VGMA1–VGMA12
VCOM OUT
Gamma Buffer Outputs
VCOM Buffer Output
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although the
ADD8702 features proprietary ESD protection circuitry, permanent damage may occur on devices
subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended
to avoid performance degradation or loss of functionality.
REV. 0
–3–
ADD8702–Typical Performance Characteristics
12
10
0
12
V
DD
= 16V
V
= 16V
DD
GAMMA 1TO 9
T
A
= 25ꢃC
11
10
9
2kꢄ, 10kꢄ
10
8
–10
–20
–30
–40
150ꢄ
6
8
4
7
2
6
5
0
–40
25
TEMPERATURE (ꢃC)
85
0
4
8
12
16
100k
1M
FREQUENCY (Hz)
10M
30M
SUPPLY VOLTAGE (V)
TPC 1. Supply Current vs.
Supply Voltage
TPC 2. Supply Current vs.
Temperature
TPC 3. Frequency Response
vs. Resistive Loading
10
0
10
0
20
10
V
= 16V
V
= 16V
DD
DD
V
= 16V
DD
GAMMA 10TO 12
V
COM
GAMMA 1TO 9
2kꢄ, 10kꢄ
2kꢄ, 10kꢄ
–10
–20
–30
–40
–50
50pF
100pF
–10
–20
–30
–40
0
150ꢄ
150ꢄ
340pF
–10
–20
–30
540pF
1040pF
100k
1M
FREQUENCY (Hz)
10M
30M
100k
1M
FREQUENCY (Hz)
10M
30M
100k
1M
FREQUENCY (Hz)
10M
30M
TPC 4. Frequency Response
vs. Resistive Loading
TPC 5. Frequency Response
vs. Resistive Loading
TPC 6. Frequency Response
vs. Capacitive Loading
20
10
20
10
180
160
140
120
100
80
V
= 16V
DD
GAMMA 1 TO 12
L
V
= 16V
V
= 16V
DD
DD
GAMMA 10TO 12
GAMMA 12
GAMMA 1
V
COM
R
= 2kꢄ
50pF
100pF
0
0
340pF
540pF
–10
–20
–30
–10
–20
–30
340pF
540pF
1040pF
100pF
50pF
60
1040pF
40
0
200
400
600
800 1,000 1,200
100k
1M
FREQUENCY (Hz)
10M
30M
100k
1M
FREQUENCY (Hz)
10M
30M
CAPACITIVE LOAD (pF)
TPC 7. Frequency Response
vs. Capacitive Loading
TPC 8. Frequency Response
vs. Capacitive Loading
TPC 9. Input and Output Phase
Shift vs. Capacitive Load
–4–
REV. 0
ADD8702
16
14
12
10
8
V
R
C
= 16V
= 10kꢄ
= 100pF
DD
V
R
C
= 16V
DD
L
L
= 33ꢄ
NULL
= 100pF
L
V
SLEW RATE FALLING
SLEW RATE RISING
COM
V
COM
6
4
7V <V
< 16V
DD
= 33ꢄ
2
R
NULL
= 0.1ꢅF
C
L
0
–40
25
85
TIME (2ꢅs/DIV)
TIME (20ꢅs/DIV)
TEMPERATURE (ꢃC)
TPC 10. Large Signal Transient
Response
TPC 11. Slew Rate vs. Temperature
TPC 12. Small Signal Transient
Response
11
11
11
V
= 16V
V
= 16V
V
= 16V
DD
GAMMA = 2
DD
GAMMA = 11
DD
10
9
8
7
6
5
4
3
2
1
0
10
9
8
7
6
5
4
3
2
1
0
10
9
8
7
6
5
4
3
2
1
0
V
COM
320pF
120pF
120pF
320pF
120pF
320pF
10ꢅF
10ꢅF
1ꢅF
1ꢅF 10ꢅF
1ꢅF
520pF
520pF
520pF
–200
200
600
1,000
1,400
1,800
–200
200
600
1,000
1,400
1,800
–200
200
600
1,000
1,400
1,800
TIME (ns)
TIME (ns)
TIME (ns)
TPC 13. Transient Load
TPC 14. Transient Load
TPC 15. Transient Load
Response vs. Capacitive Load
Response vs. Capacitive Load
Response vs. Capacitive Load
100
1,400
50
V
= 16V
V
= 16V
V
= 16V
DD
GAMMA 1 TO 9
DD
DD
90
80
70
60
50
40
30
20
10
0
GAMMA 10 TO 12
45
40
35
30
25
20
15
10
5
V
COM
1,200
1,000
800
600
400
200
0
SINK
SINK
SOURCE
SOURCE
SOURCE
10
SINK
0
0.001 0.01
0.1
1
10
100
0.001 0.01
0.1
1
100
0.001 0.01
0.1
1
10
100
LOAD CURRENT (mA)
LOAD CURRENT (mA)
LOAD CURRENT (mA)
TPC 16. Output Voltage
Error vs. Load Current
TPC 17. Output Voltage
Error vs. Load Current
TPC 18. Output Voltage
Error vs. Load Current
REV. 0
–5–
ADD8702
6,000
80
60
ALL CHANNELS
8V
V
DD
= 16V
V
DD
=
T
A
= 25ꢃC
T
= 25ꢃC
5,000
4,000
3,000
2,000
1,000
0
A
ALL CHANNELS
40
20
0
–20
–40
–60
–80
–100
–120
PSRR
100
1k
10k
100k
1M
10M
–22 –14
–6
2
10
18
26
34
TIME (40ꢅs/DIV)
OUTPUT VOLTAGE ERROR (mV)
FREQUENCY (Hz)
TPC 21. No Phase Reversal
TPC 19. Output Voltage Error
Distribution
TPC 20. Power Supply Rejection
Ratio vs. Frequency
70
60
70
V
= 16V
AND BUFFERS 1TO 9
V
= 16V
DD
DD
60
V
COM
BUFFERS 10TO 12
MARKER SET @ 10kHz
MARKER READING = 36.6nV/ Hz
MARKER SET @ 10kHz
MARKER READING = 25.7nV/ Hz
50
40
30
20
50
40
30
20
10
0
10
0
–10
–10
0
5
10
15
20
25
0
5
10
15
20
25
FREQUENCY (Hz)
FREQUENCY (Hz)
TPC 22. Voltage Noise Density
vs. Frequency
TPC 23. Voltage Noise Density
vs. Frequency
–6–
REV. 0
ADD8702
APPLICATIONS
Figure 1 is a block diagram of the configuration of an XGA-
compatible (1024 ϫ 768) TFT color panel with the ADD8702
providing gamma correction reference voltages to the source
drivers and an integrated VCOM driver for LCD common node.
GMA 12
GMA 11
GMA 10
GMA 9
GMA 8
GMA 7
GMA 6
GMA 5
GMA 4
V
A12
A11
A10
A9
HIGH
V
V
11
10
IN
16V
IN
BUFFER
R
NULL
C
R
T
L
V
IN
V
IN
V
IN
V
IN
V
IN
V
IN
9
8
7
6
5
4
Figure 2. Bandwidth Measurement Information
A8
Panel size and resolution determine the number of gamma
reference voltages required. For a 256-grayscale level, 8-bit color
scheme, 6 ϫ 2 external reference nodes should be sufficient to
match the characteristics of the LCD driver to the characteristics
of the actual LCD panel for improved picture quality. External
reference gamma correction voltages are often generated using
a simple resistor ladder. Using the ADD8702, the resistor
ladder is incorporated in the IC for reduced cost and number
of components.
A7
A6
A5
16V
A4
0.1ꢁs
10V
5V
BUFFER
33ꢀ
1kꢀ
V
TH
V
TH
5V
0V
GMA 3
GMA 2
V
V
3
2
A3
A2
A1
IN
Figure 3. Transient Load Regulation Test Circuit
The ADD8702 is designed to meet the rail-to-rail capability
IN
needed by the application, yet offers the lowest cost per channel
solution. The ADD8702 gamma buffers offer 10 mA continuous
drive current capability. To be more competitive, the design
maximizes the die area by allowing specific channels to swing to
the positive rail and negative rail. So it is imperative that the
channels swinging close to the supply rail be used for the posi-
tive gamma references and the channels swinging close to GND
be used for the negative gamma references. The VCOM buffer can
handle up to 35 mA continuous output current and can drive up
to 1,000 pF pure capacitive load. Provision is available to adjust
the VCOM voltage to a desired level. Refer to Figure 4 for an
example of an application circuit for adjusting the output of the
VCOM buffer.
GMA 1
V
LOW
V
LCD SOURCE DRIVER
DD
V
AMP
COM
LCD COMMON PLANE
32kꢀ
GND
ADJUST
2kꢀ
V
COM
ADD8702
Figure 4. Application Circuit
Table I. ADD8702 – 000 Mask Option, Resistor Tap Points
(0 ≤ ꢂ ≤ 500) VDD = 12.5 V, VHIGH = 12.5 V, and VLOW = GND
Tap Point (ꢂ)
Voltage
Unit
VGMA1
VGMA2
VGMA3
VGMA4
VGMA5
VGMA6
VGMA7
VGMA8
VGMA9
VGMA10
VGMA11
VGMA12
VCOM
8
57
84
0.2
V
V
V
V
V
V
V
V
V
V
V
V
V
1.43
2.11
2.89
3.48
4.86
5.45
7.45
9.29
10.45
11.04
12.2
5
115
139
194
218
298
371
418
442
488
200
REV. 0
–7–
ADD8702
OUTLINE DIMENSIONS
32-Lead Lead Frame Chip Scale Package [LFCSP]
(CP-32)
Dimensions shown in millimeters
5.00
BSC SQ
0.60 MAX
PIN 1
0.60 MAX
INDICATOR
25
24
32
1
PIN 1
INDICATOR
0.50
BSC
3.25
3.10
2.95
4.75
BSC SQ
TOP
VIEW
BOTTOM
VIEW
SQ
0.50
0.40
0.30
17
16
8
9
3.50
REF
0.80 MAX
0.65 NOM
12ꢃ MAX
0.05 MAX
0.02 NOM
1.00
0.90
0.80
0.30
0.23
0.18
COPLANARITY
0.08
0.20 REF
SEATING
PLANE
COMPLIANT TO JEDEC STANDARDS MO-220-VHHD-2
–8–
REV. 0
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