ADG409BRZ-REEL7 [ADI]
LC2MOS ±15 V 4 Channel High Performance Analog Multiplexer;
| 型号： | ADG409BRZ-REEL7 |
| 厂家： | 
ADI |
| 描述： | LC2MOS ±15 V 4 Channel High Performance Analog Multiplexer PC 光电二极管 |
| 文件： | 总12页 (文件大小：342K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LC2MOS 4-/8-Channel
High Performance Analog Multiplexers
a
ADG408/ADG409
FEATURES
FUNCTIONAL BLOCK DIAGRAMS
44 V Supply Maximum Ratings
VSS to VDD Analog Signal Range
Low On Resistance (100 ⍀ max)
Low Power (ISUPPLY < 75 A)
Fast Switching
ADG408
ADG409
S1
S1A
S4A
DA
DB
Break-Before-Make Switching Action
Plug-in Replacement for DG408/DG409
D
APPLICATIONS
S1B
S4B
Audio and Video Routing
Automatic Test Equipment
Data Acquisition Systems
Battery-Powered Systems
Sample-and-Hold Systems
Communication Systems
S8
1-OF-8
DECODER
1-OF-4
DECODER
A0 A1 A2 EN
A0 A1 EN
GENERAL DESCRIPTION
PRODUCT HIGHLIGHTS
The ADG408 and ADG409 are monolithic CMOS analog
multiplexers comprising eight single channels and four differen-
tial channels, respectively. The ADG408 switches one of eight
inputs to a common output as determined by the 3-bit binary
address lines A0, A1, and A2. The ADG409 switches one of
four differential inputs to a common differential output as
determined by the 2-bit binary address lines A0 and A1. An
EN input on both devices is used to enable or disable the
device. When disabled, all channels are switched OFF.
The ADG408/ADG409 are designed on an enhanced LC2MOS
process that provides low power dissipation yet gives high
switching speed and low on resistance. Each channel conducts
equally well in both directions when ON and has an input signal
range that extends to the supplies. In the OFF condition, signal
levels up to the supplies are blocked. All channels exhibit break-
before-make switching action, preventing momentary shorting
when switching channels. Inherent in the design is low charge
injection for minimum transients when switching the digital inputs.
1. Extended Signal Range.
The ADG408/ADG409 are fabricated on an enhanced
LC2MOS process, giving an increased signal range that
extends to the supply rails.
2. Low Power Dissipation.
3 Low RON
.
4. Single-Supply Operation.
For applications where the analog signal is unipolar, the
ADG408/ADG409 can be operated from a single rail power
supply. The parts are fully specified with a single 12 V power
supply and will remain functional with single supplies as
low as 5 V.
The ADG408/ADG409 are improved replacements for the
DG408/DG409 analog multiplexers.
REV. B
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, norforanyinfringementsofpatentsorotherrightsofthirdpartiesthat
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective companies.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
Fax: 781/326-8703
www.analog.com
© 2003 Analog Devices, Inc. All rights reserved.
ADG408/ADG409–SPECIFICATIONS
DUAL SUPPLY1
(VDD = +15 V, VSS = –15 V, GND = 0 V, unless otherwise noted.)
B Version
–40؇C to
+85؇C
T Version
–55؇C to
+25؇C +125؇C
Parameter
+25؇C
Unit
Test Conditions/Comments
ANALOG SWITCH
Analog Signal Range
RON
V
SS to VDD
VSS to VDD
V
40
100
15
40
100
15
W typ
W max
W max
VD = ±10 V, IS = –10 mA
125
125
DRON
VD = +10 V, –10 V
LEAKAGE CURRENTS
Source OFF Leakage IS (OFF)
±0.5
±50
±0.5
±50
nA max
VD = ±10 V, VS = ꢀ10 V;
Test Circuit 2
Drain OFF Leakage ID (OFF)
ADG408
VD = ±10 V; VS = ꢀ10 V;
±1
±1
±100
±50
±1
±1
±100
±50
nA max
nA max
Test Circuit 3
ADG409
Channel ON Leakage ID, IS (ON)
ADG408
VS = VD = ±10 V;
Test Circuit 4
±1
±1
±100
±50
±1
±1
±100
±50
nA max
nA max
ADG409
DIGITAL INPUTS
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current
2.4
0.8
2.4
0.8
V min
V max
I
INL or IINH
±10
±10
mA max
pF typ
VIN = 0 or VDD
f = 1 MHz
CIN, Digital Input Capacitance
8
8
DYNAMIC CHARACTERISTICS2
tTRANSITION
120
250
120
250
ns typ
RL = 300 W, CL = 35 pF;
ns max
VS1 = ±10 V, VS8 = ꢀ10 V;
Test Circuit 5
tOPEN
10
10
10
10
ns min
RL = 300 W, CL = 35 pF;
VS = 5 V; Test Circuit 6
RL = 300 W, CL = 35 pF;
VS = 5 V; Test Circuit 7
RL = 300 W, CL = 35 pF;
VS = 5 V; Test Circuit 7
VS = 0 V, RS = 0 W, CL = 10 nF;
Test Circuit 8
t
t
ON (EN)
OFF (EN)
85
150
125
225
65
85
150
125
225
65
ns typ
ns max
ns typ
ns max
pC typ
150
150
Charge Injection
OFF Isolation
20
20
–75
85
–75
85
dB typ
dB typ
pF typ
RL = 1 kW, f = 100 kHz;
V
EN = 0 V; Test Circuit 9
Channel-to-Channel Crosstalk
CS (OFF)
RL = 1 kW, f = 100 kHz;
Test Circuit 10
f = 1 MHz
11
11
C
D (OFF)
ADG408
ADG409
f = 1 MHz
40
20
40
20
pF typ
pF typ
CD, CS (ON)
ADG408
f = 1 MHz
54
34
54
34
pF typ
pF typ
ADG409
POWER REQUIREMENTS
IDD
1
5
1
5
1
5
1
5
mA typ
mA max
mA typ
mA max
mA typ
mA max
VIN = 0 V, VEN = 0 V
VIN = 0 V, VEN = 2.4 V
ISS
IDD
100
200
100
200
500
500
NOTES
1Temperature ranges are as follows: B Version: –40∞C to +85∞C; T Version: –55∞C to +125∞C.
2Guaranteed by design, not subject to production test.
Specifications subject to change without notice.
–2–
REV. B
ADG408/ADG409
SINGLE SUPPLY1
(VDD = 12 V, VSS = 0 V, GND = 0 V, unless otherwise noted.)
B Version
T Version
–40؇C to
–55؇C to
Parameter
+25؇C
+85؇C
+25؇C +125؇C
Unit
Test Conditions/Comments
ANALOG SWITCH
Analog Signal Range
RON
0 to VDD
0 to VDD
90
V
W typ
90
VD = 3 V, 10 V, IS = –1 mA
LEAKAGE CURRENTS
Source OFF Leakage IS (OFF)
±0.5
±50
±0.5
±50
nA max
VD = 8 V/0 V, VS = 0 V/8 V;
Test Circuit 2
Drain OFF Leakage ID (OFF)
ADG408
VD = 8 V/0 V, VS = 0 V/8 V;
Test Circuit 3
±1
±1
±100
±50
±1
±1
±100
±50
nA max
nA max
ADG409
Channel ON Leakage ID, IS (ON)
ADG408
VS = VD = 8 V/0 V;
Test Circuit 4
±1
±1
±100
±50
±1
±1
±100
±50
nA max
nA max
ADG409
DIGITAL INPUTS
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current
2.4
0.8
2.4
0.8
V min
V max
I
INL or IINH
±10
±10
mA max
pF typ
VIN = 0 or VDD
f = 1 MHz
CIN, Digital Input Capacitance
8
8
DYNAMIC CHARACTERISTICS2
tTRANSITION
130
130
ns typ
RL = 300 W, CL = 35 pF;
V
S1 = 8 V/0 V, VS8 = 0 V/8 V;
Test Circuit 5
tOPEN
10
140
60
5
10
140
60
5
ns typ
ns typ
ns typ
pC typ
dB typ
dB typ
pF typ
RL = 300 W, CL = 35 pF;
VS = 5 V; Test Circuit 6
RL = 300 W, CL = 35 pF;
VS = 5 V; Test Circuit 7
RL = 300 W, CL = 35 pF;
VS = 5 V; Test Circuit 7
VS = 0 V, RS = 0 W, CL = 10 nF;
Test Circuit 8
t
t
ON (EN)
OFF (EN)
Charge Injection
OFF Isolation
–75
85
11
–75
85
11
RL = 1 kW, f = 100 kHz;
V
EN = 0 V; Test Circuit 9
Channel-to-Channel Crosstalk
CS (OFF)
RL = 1 kW, f = 100 kHz;
Test Circuit 10
f = 1 MHz
C
D (OFF)
ADG408
ADG409
f = 1 MHz
40
20
40
20
pF typ
pF typ
CD, CS (ON)
ADG408
f = 1 MHz
54
34
54
34
pF typ
pF typ
ADG409
POWER REQUIREMENTS
IDD
1
5
1
5
mA typ
mA max
mA typ
mA max
VIN = 0 V, VEN = 0 V
VIN = 0 V, VEN = 2.4 V
IDD
100
200
100
200
500
500
NOTES
1Temperature ranges are as follows: B Version: –40∞C to +85∞C; T Version: –55∞C to +125∞C.
2Guaranteed by design, not subject to production test.
Specifications subject to change without notice.
REV. B
–3–
ADG408/ADG409
ABSOLUTE MAXIMUM RATINGS1
(TA = 25∞C, unless otherwise noted.)
ORDERING GUIDE
Temperature Range
Model1
Package Option2
VDD to VSS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 V
VDD to GND . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +25 V
VSS to GND . . . . . . . . . . . . . . . . . . . . . . . . . . +0.3 V to –25 V
Analog, Digital Inputs2 . . . VSS – 2 V to VDD + 2 V or 20 mA,
Whichever Occurs First
ADG408BN
ADG408BR
ADG408BRU
ADG408TQ
–40∞C to +85∞C
–40∞C to +85∞C
–40∞C to +85∞C
–55∞C to +125∞C
N-16
R-16A
RU-16
Q-16
Continuous Current, S or D . . . . . . . . . . . . . . . . . . . . . 20 mA
Peak Current, S or D
(Pulsed at 1 ms, 10% Duty Cycle max) . . . . . . . . . . . 40 mA
Operating Temperature Range
ADG409BN
ADG409BR
ADG409BRU
ADG409TQ
–40∞C to +85∞C
–40∞C to +85∞C
–40∞C to +85∞C
–55∞C to +125∞C
N-16
R-16A
RU-16
Q-16
Industrial (B Version) . . . . . . . . . . . . . . . . –40∞C to +85∞C
Extended (T Version) . . . . . . . . . . . . . . . –55∞C to +125∞C
Storage Temperature Range . . . . . . . . . . . –65∞C to +150∞C
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . 150∞C
CERDIP Package, Power Dissipation . . . . . . . . . . . . 900 mW
qJA, Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 76∞C/W
Lead Temperature, Soldering (10 sec) . . . . . . . . . . . . 300∞C
PDIP Package, Power Dissipation . . . . . . . . . . . . . . . 470 mW
qJA, Thermal Impedance . . . . . . . . . . . . . . . . . . . . 117∞C/W
Lead Temperature, Soldering (10 sec) . . . . . . . . . . . . 260∞C
TSSOP Package, Power Dissipation . . . . . . . . . . . . . 450 mW
qJA, Thermal Impedance . . . . . . . . . . . . . . . . . . . . 155∞C/W
qJC, Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 50∞C/W
SOIC Package, Power Dissipation . . . . . . . . . . . . . . . . 600 mW
qJA, Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 77∞C/W
Lead Temperature, Soldering
NOTES
1To order MIL-STD-883, Class B processed parts, add /883B to T grade part
numbers.
2N = PDIP; Q = CERDIP; R = 0.15" Small Outline IC (SOIC);
RU = Thin Shrink Small Outline Package (TSSOP).
Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . 215∞C
Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . 220∞C
NOTES
1 Stresses above those listed under Absolute Maximum Ratings may cause per-
manent damage to the device. This is a stress rating only; functional operation
of the device at these or any other conditions above those listed in the opera-
tional sections of this specification is not implied. Exposure to absolute maxi-
mum rating conditions for extended periods may affect device reliability. Only
one absolute maximum rating may be applied at any one time.
2 Overvoltages at A, EN, S, or D will be clamped by internal diodes. Current
should be limited to the maximum ratings given.
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the ADG408/ADG409 feature proprietary ESD protection circuitry, permanent
damage may occur on devices subjected to high energy electrostatic discharges. Therefore,
proper ESD precautions are recommended to avoid performance degradation or loss of functionality.
–4–
REV. B
ADG408/ADG409
PIN CONFIGURATIONS (DIP/SOIC/TSSOP)
TERMINOLOGY
VDD
VSS
Most positive power supply potential.
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
16
A0
EN
A1
A0
EN
A1
Most negative power supply potential in dual
supplies. In single supply applications, it may
be connected to ground.
15 GND
A2
V
14
13
12
11
10
9
V
DD
V
GND
SS
SS
ADG408
S1A
S1B
S2B
S3B
S4B
DB
S1
V
ADG409
TOP VIEW
DD
TOP VIEW
GND
Ground (0 V) reference.
S2A
S3A
S4A
DA
S2
S3
S4
D
S5
S6
S7
S8
(Not to Scale)
(Not to Scale)
RON
Ohmic resistance between D and S.
DRON
Difference between the RON of any two channels.
Source leakage current when the switch is off.
Drain leakage current when the switch is off.
Channel leakage current when the switch is on.
Analog voltage on terminals D, S.
IS (OFF)
ID (OFF)
ID, IS (ON)
ADG408 Truth Table
V
D (VS)
CS (OFF)
D (OFF)
ON
SWITCH
A2
A1
A0
EN
Channel input capacitance for OFF condition.
Channel output capacitance for OFF condition.
C
X
0
0
0
0
1
1
1
1
X
0
0
1
1
0
0
1
1
X
0
1
0
1
0
1
0
1
0
1
1
1
1
1
1
1
1
NONE
1
2
3
4
5
6
7
8
CD, CS (ON) ON switch capacitance.
CIN
Digital input capacitance.
t
ON (EN)
Delay time between the 50% and 90% points of
the digital input and switch ON condition.
t
OFF (EN)
Delay time between the 50% and 90% points of
the digital input and switch OFF condition.
tTRANSITION
Delay time between the 50% and 90% points of
the digital inputs and the switch ON condition
when switching from one address state to another.
ADG409 Truth Table
tOPEN
OFF time measured between the 80% point
of both switches when switching from one
address state to another.
ON SWITCH
PAIR
Al
A0
EN
X
0
0
1
1
X
0
1
0
1
0
1
1
1
1
NONE
VINL
VINH
Maximum input voltage for Logic 0.
Minimum input voltage for Logic 1.
Input current of the digital input.
1
2
3
4
IINL (IINH
)
Crosstalk
A measure of unwanted signal that is coupled
through from one channel to another as a result
of parasitic capacitance.
Off Isolation A measure of unwanted signal coupling through
an OFF channel.
Charge
Injection
A measure of the glitch impulse transferred
from the digital input to the analog output
during switching.
IDD
ISS
Positive supply current.
Negative supply current.
REV. B
–5–
ADG408/ADG409
–Typical Performance Characteristics
120
180
T
= 25؇C
A
T
= 25؇C
A
V
V
= 5V
= 0V
160
140
120
100
80
V
V
= +5V
= –5V
DD
SS
DD
SS
100
80
V
V
= +12V
= –12V
DD
SS
V
V
= +10V
= –10V
DD
SS
V
= 12V
V
V
= 10V
= 0V
DD
DD
SS
60
V
= 0V
SS
40
20
V
= 15V
= 0V
V
V
= +15V
= –15V
DD
DD
SS
60
V
SS
40
–15
–10
–5
0
5
10
15
0
3
6
9
12
15
V
(V ) – V
S
V
(V ) – V
S
D
D
TPC 1. RON as a Function of VD (VS): Dual Supply Voltage
TPC 4. RON as a Function of VD (VS): Single Supply
Voltage
100
130
V
V
= +15V
= –15V
DD
SS
V
V
= 12V
= 0V
DD
SS
90
80
70
60
50
40
30
120
110
100
90
125؇C
125؇C
85؇C
85؇C
25؇C
80
25؇C
70
60
–15
–10
–5
0
5
10
15
0
2
4
6
8
10
12
V
(V ) – V
S
D
V (V ) – V
D S
TPC 2. RON as a Function of VD (VS) for Different
Temperatures
TPC 5. RON as a Function of VD (VS) for Different
Temperatures
0.2
0.04
T
= 25؇C
A
T
V
V
= 25؇C
A
V
V
= +15V
= –15V
DD
SS
= 12V
= 0V
DD
SS
0.02
0
0.1
0
I
(OFF)
S
I
(ON)
D
I
(OFF)
D
I
(OFF)
D
I
(OFF)
S
–0.02
–0.04
–0.06
I
(ON)
D
–0.1
–0.2
–15
–10
–5
0
5
10
15
0
2
4
6
8
10
12
V
(V ) – V
S
D
V
(V ) – V
S
D
TPC 3. Leakage Currents as a Function of VD (VS)
TPC 6. Leakage Currents as a Function of VD (VS)
–6–
REV. B
ADG408/ADG409
120
100
80
140
120
100
80
V
V
= +15V
= –15V
V
V
= 12V
= 0V
DD
SS
DD
SS
t
TRANSITION
t
TRANSITION
t
(EN)
ON
t
(EN)
ON
60
t
(EN)
OFF
40
60
t
(EN)
9
OFF
20
40
1
3
5
7
9
11
13
15
1
3
5
7
11
13
V
– V
V
– V
IN
IN
TPC 7. Switching Time vs. VIN (Bipolar Supply)
TPC 10. Switching Time vs. VIN (Single Supply)
300
400
V
= 5V
V
= 5V
IN
IN
300
200
100
0
200
100
0
t
TRANSITION
t
TRANSITION
t
(EN)
ON
t
(EN)
ON
t
(EN)
OFF
t
(EN)
7
OFF
5
9
11
– V
13
15
؎5
؎7
؎9
؎11
– V
؎13
؎15
V
V
SUPPLY
SUPPLY
TPC 8. Switching Time vs. Single Supply
TPC 11. Switching Time vs. Bipolar Supply
4
4
10
10
10
10
10
10
10
10
V
V
= +15V
= –15V
DD
SS
V
V
= +15V
= –15V
DD
SS
3
2
1
0
3
EN = 2.4V
EN = 0V
100k
EN = 2.4V
EN = 0V
2
–1
10
10
100
1k
10k
100k
1M
10M
10
100
1k
10k
1M
10M
FREQUENCY – Hz
FREQUENCY – Hz
TPC 9. Positive Supply Current vs. Switching Frequency
TPC 12. Negative Supply Current vs. Switching
Frequency
REV. B
–7–
ADG408/ADG409
110
110
100
90
V
V
= +15V
= –15V
V
V
= +15V
= –15V
DD
SS
DD
SS
100
90
80
80
70
70
1k
60
10k
100k
1M
1k
10k
100k
1M
FREQUENCY – Hz
FREQUENCY – Hz
TPC 13. Off Isolation vs. Frequency
TPC 14. Crosstalk vs. Frequency
Test Circuits
I
DS
V1
V
V
SS
DD
V
V
SS
DD
S1
S2
S8
D
I
(OFF)
D
0.8V
S
D
A
EN
GND
V
S
V
S
V
D
R
= V1/I
ON
DS
Test Circuit 3. ID (OFF)
Test Circuit 1. On Resistance
V
V
SS
DD
V
V
SS
DD
V
V
SS
DD
V
V
SS
DD
S1
S1
S8
D
I
(OFF)
S
I
(ON)
D
S2
S8
D
A
A
2.4V
0.8V
EN
EN
GND
V
V
GND
S
D
V
V
D
S
Test Circuit 2. IS (OFF)
Test Circuit 4. ID (ON)
–8–
REV. B
ADG408/ADG409
V
V
SS
DD
3V
t < 20ns
r
V
V
SS
t < 20ns
DD
f
ADDRESS
DRIVE (V
50%
50%
)
A0
A1
A2
IN
S1
V
S1
S8
0V
V
IN
50⍀
S2 THRU S7
t
t
TRANSITION
TRANSITION
V
S8
90%
ADG408*
OUTPUT
D
OUTPUT
2.4V
EN
300⍀
GND
35pF
90%
*SIMILAR CONNECTION FOR ADG409
Test Circuit 5. Switching Time of Multiplexer, tTRANSlTlON
V
V
SS
DD
3V
V
V
SS
DD
ADDRESS
A0
A1
A2
DRIVE (V
)
IN
S1
V
S
V
IN
50⍀
0V
S2 THRU S7
S8
ADG408*
80%
80%
OUTPUT
OUTPUT
D
2.4V
EN
300⍀
GND
35pF
t
OPEN
*SIMILAR CONNECTION FOR ADG409
Test Circuit 6. Break-Before-Make Delay, tOPEN
V
V
SS
DD
3V
V
V
SS
DD
ENABLE
A0
A1
A2
50%
50%
DRIVE (V
)
IN
S1
V
S
0V
S2 THRU S8
t
(EN)
t
(EN)
OFF
ON
ADG408*
OUTPUT
0.9V
0.9V
O
O
D
EN
OUTPUT
300⍀
GND
35pF
V
IN
50⍀
*SIMILAR CONNECTION FOR ADG409
Test Circuit 7. Enable Delay, tON (EN), tOFF (EN)
REV. B
–9–
ADG408/ADG409
V
V
DD
SS
V
V
SS
DD
3V
A0
A1
A2
V
IN
ADG408*
R
V
S
OUT
⌬ V
S
D
OUT
V
OUT
EN
Q
= C
؋
⌬ V C
INJ
L
OUT
L
V
S
GND
10nF
V
IN
*SIMILAR CONNECTION FOR ADG409
Test Circuit 8. Charge Injection
V
V
DD
V
SS
V
DD
SS
V
V
SS
DD
V
V
SS
DD
2.4V
A0
A0
A1
A2
EN
D
A1
A2
S1
ADG408
ADG408
V
D
OUT
V
OUT
S1
S8
EN
1k⍀
1k⍀
1k⍀
S2
S8
0V
V
S
GND
V
S
GND
CROSSTALK = 20 LOG V
/V
OUT IN
OFF ISOLATION = 20 LOG V
/V
OUT IN
Test Circuit 9. OFF Isolation
Test Circuit 10. Channel-to-Channel Crosstalk
–10–
REV. B
ADG408/ADG409
OUTLINE DIMENSIONS
16-Lead Standard Small Outline Package [SOIC]
16-Lead Plastic Dual In-Line Package [PDIP]
(N-16)
Narrow Body
(R-16)
Dimensions shown in inches and (millimeters)
Dimensions shown in millimeters and (inches)
0.700 (17.78)
0.295 (7.49)
BSC
0.285 (7.24)
0.275 (6.99)
10.00 (0.3937)
9.80 (0.3858)
16
1
9
8
16
1
9
8
6.20 (0.2441)
5.80 (0.2283)
4.00 (0.1575)
3.80 (0.1496)
0.325 (8.26)
0.310 (7.87)
0.300 (7.62)
0.100 (2.54)
BSC
0.015 (0.38)
MIN
0.150 (3.81)
0.135 (3.43)
0.120 (3.05)
1.75 (0.0689)
1.35 (0.0531)
1.27 (0.0500)
BSC
0.50 (0.0197)
0.25 (0.0098)
0.180 (4.57)
MAX
؋
45؇ 0.25 (0.0098)
0.10 (0.0039)
0.150 (3.81)
0.135 (3.43)
0.120 (3.05)
8؇
0؇
0.015 (0.38)
0.010 (0.25)
0.008 (0.20)
SEATING
PLANE
0.51 (0.0201)
0.33 (0.0130)
SEATING
PLANE
1.27 (0.0500)
0.40 (0.0157)
0.060 (1.52)
0.050 (1.27)
0.045 (1.14)
0.022 (0.56)
0.018 (0.46)
0.014 (0.36)
0.25 (0.0098)
0.19 (0.0075)
COPLANARITY
0.10
COMPLIANT TO JEDEC STANDARDS MS-012AC
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
COMPLIANT TO JEDEC STANDARDS MO-095AC
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
16-Lead Ceramic Dual In-Line Package [CERDIP]
(Q-16)
16-Lead Thin Shrink Small Outline Package [TSSOP]
(RU-16)
Dimensions shown in inches and (millimeters)
Dimensions shown in millimeters
0.005
(0.13)
MIN
0.098 (2.49)
MAX
5.10
5.00
4.90
0.310 (7.87)
0.220 (5.59)
16
9
8
PIN 1
1
16
9
8
0.060 (1.52)
0.015 (0.38)
0.320 (8.13)
0.290 (7.37)
0.200 (5.08)
MAX
0.840 (21.34) MAX
4.50
4.40
4.30
6.40
BSC
0.150 (3.81)
MIN
0.015 (0.38)
0.008 (0.20)
0.200 (5.08)
0.125 (3.18)
15
0
1
SEATING
PLANE
0.070 (1.78)
0.030 (0.76)
0.100
(2.54)
BSC
PIN 1
0.023 (0.58)
0.014 (0.36)
1.20
MAX
0.15
0.05
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETERS DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
0.20
0.09
0.75
0.60
0.45
8؇
0؇
0.30
0.19
0.65
BSC
SEATING
PLANE
COPLANARITY
0.10
COMPLIANT TO JEDEC STANDARDS MS-153AB
REV. B
–11–
ADG408/ADG409
Revision History
Location
Page
3/03—Data Sheet changed from REV. A to REV. B.
Changes to Ordering Guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Updated OUTLINE DIMENSIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
–12–
REV. B
相关型号：
©2020 ICPDF网 联系我们和版权申明