ADG419BRZ-REEL71 [ADI]

LC2MOS Precision Mini-DIP Analog Switch; LC2MOS精密的Mini- DIP模拟开关
ADG419BRZ-REEL71
型号: ADG419BRZ-REEL71
厂家: ADI    ADI
描述:

LC2MOS Precision Mini-DIP Analog Switch
LC2MOS精密的Mini- DIP模拟开关

开关
文件: 总16页 (文件大小:317K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
LC2MOS Precision  
Mini-DIP Analog Switch  
ADG419  
FUNCTIONAL BLOCK DIAGRAM  
FEATURES  
44 V supply maximum ratings  
D
S2  
VSS to VDD analog signal range  
Low on resistance: <35 Ω  
S1  
Ultralow power dissipation: < 35 μW  
Fast transition time: 160 ns maximum  
Break-before-make switching action  
Plug-in replacement for DG419  
IN  
ADG419  
SWITCH SHOWN FOR A  
LOGIC 1 INPUT  
Figure 1.  
APPLICATIONS  
Precision test equipment  
Precision instrumentation  
Battery-powered systems  
Sample hold systems  
GENERAL DESCRIPTION  
The ADG419 is a monolithic CMOS SPDT switch. This switch  
is designed on an enhanced LC2MOS process that provides low  
power dissipation yet gives high switching speed, low on resistance,  
and low leakage currents.  
PRODUCT HIGHLIGHTS  
1. Extended Signal Range.  
The ADG419 is fabricated on an enhanced LC2MOS  
process, giving an increased signal range that extends to  
the supply rails.  
The on resistance profile of the ADG419 is very flat over the full  
analog input range, ensuring excellent linearity and low distortion.  
The part also exhibits high switching speed and high signal  
bandwidth. CMOS construction ensures ultralow power  
dissipation, making the parts ideally suited for portable and  
battery-powered instruments.  
2. Ultralow Power Dissipation.  
3. Low RON  
.
4. Single-Supply Operation.  
For applications where the analog signal is unipolar, the  
ADG419 can be operated from a single rail power supply.  
The part is fully specified with a single 12 V power supply  
and remains functional with single supplies as low as 5 V.  
Each switch of the ADG419 conducts equally well in both  
directions when on and has an input signal range that extends  
to the supplies. In the off condition, signal levels up to the  
supplies are blocked. The ADG419 exhibits break-before-make  
switching action.  
Rev. B  
Information furnished by Analog Devices is believed to be accurate and reliable. However, no  
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other  
rights of third parties that may result from its use. Specifications subject to change without notice. No  
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.  
Trademarks and registeredtrademarks arethe property of their respective owners.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781.329.4700  
Fax: 781.461.3113  
www.analog.com  
©2009 Analog Devices, Inc. All rights reserved.  
 
ADG419  
TABLE OF CONTENTS  
Features .............................................................................................. 1  
Absolute Maximum Ratings ............................................................5  
ESD Caution...................................................................................5  
Pin Configuration and Function Descriptions..............................6  
Typical Performance Characteristics ..............................................7  
Test Circuits........................................................................................9  
Terminology.................................................................................... 11  
Outline Dimensions....................................................................... 12  
Ordering Guide .......................................................................... 13  
Applications....................................................................................... 1  
Functional Block Diagram .............................................................. 1  
General Description......................................................................... 1  
Product Highlights ........................................................................... 1  
Revision History ............................................................................... 2  
Specifications..................................................................................... 3  
Dual Supply ................................................................................... 3  
Single Supply ................................................................................. 4  
REVISION HISTORY  
8/09—Rev. B to Rev. C  
Updated Format..................................................................Universal  
Changes to Table 1............................................................................ 3  
Changes to Table 2............................................................................ 4  
Updated Outline Dimensions....................................................... 12  
Changes to Ordering Guide .......................................................... 13  
Rev. B | Page 2 of 16  
 
ADG419  
SPECIFICATIONS  
DUAL SUPPLY  
VDD = 15 V 10%, VSS = −15 V 10%, VL = 5 V 10%, GND = 0 V, unless otherwise noted.  
Table 1.  
B Version  
−40°C to  
+25°C +85°C  
T Version  
−55°C to  
+25°C +125°C  
−40°C to  
+125°C  
Parameter1  
ANALOG SWITCH  
Analog Signal Range  
RON  
Unit  
Test Conditions/Comments  
VSS to VDD  
45  
VSS to VDD  
45  
25  
35  
25  
35  
Ω typ  
Ω max  
VD = 12.5 V, IS = −10 mA  
VDD = +13.5 V, VSS = −13.5 V  
VDD = +16.5 V, VSS = −16.5 V  
45  
5
LEAKAGE CURRENTS  
Source Off Leakage, IS (Off)  
0.1  
0.1  
nA typ  
VD = 15.5 V, VS = 15.5 V;  
see Figure 12  
0.25  
0.1  
15  
0.25  
0.1  
15  
nA max  
nA typ  
Drain Off Leakage, ID (Off)  
VD = 15.5 V, VS = 15.5 V;  
see Figure 12  
0.ꢀ5  
0.4  
0.ꢀ5  
5
5
30  
30  
0.ꢀ5  
0.4  
0.ꢀ5  
30  
30  
nA max  
nA typ  
nA max  
Channel On Leakage, ID, IS (On)  
VS = VD = 15.5 V; see Figure 13  
DIGITAL INPUTS  
Input High Voltage, VINH  
Input Low Voltage, VINL  
Input Current  
2.4  
0.8  
2.4  
0.8  
2.4  
0.8  
V min  
V max  
IINL or IINH  
0.005  
0.5  
0.005  
0.5  
0.005  
0.5  
μA typ  
μA max  
VIN = VINL or VINH  
DYNAMIC CHARACTERISTICS2  
tTRANSITION  
160  
200  
200  
145  
200  
ns max RL = 300 Ω, CL = 35 pF; VS1 = 10 V,  
VS2 = 10 V; see Figure 14  
Break-Before-Make Time Delay, tD 30  
5
30  
ns typ  
RL = 300 Ω, CL = 35 pF;  
VS1 = VS2 = 10 V; see Figure 15  
5
ns min  
dB typ  
dB typ  
pF typ  
pF typ  
Off Isolation  
Channel-to-Channel Crosstalk  
CS (Off)  
80  
90  
6
80  
ꢀ0  
6
RL = 50 Ω, f = 1 MHz; see Figure 16  
RL = 50 Ω, f = 1 MHz; see Figure 1ꢀ  
f = 1 MHz  
CD, CS (On)  
55  
55  
f = 1 MHz  
POWER REQUIREMENTS  
IDD  
VDD = +16.5 V, VSS = −16.5 V  
VIN = 0 V or 5 V  
0.0001  
1
0.0001  
1
0.0001  
1
0.0001  
1
0.0001  
1
0.0001  
1
μA typ  
μA max  
μA typ  
μA max  
μA typ  
μA max  
2.5  
2.5  
2.5  
2.5  
2.5  
2.5  
2.5  
2.5  
2.5  
ISS  
IL  
VL = 5.5 V  
1 Temperature ranges are as follows: B Version: −40°C to +125°C; T Version: −55°C to +125°C.  
2 Guaranteed by design, not subject to production test.  
Rev. B | Page 3 of 16  
 
ADG419  
SINGLE SUPPLY  
VDD = 12 V 10%, VSS = 0 V, VL = 5 V 10%, GND = 0 V, unless otherwise noted.  
Table 2.  
B Version  
T Version  
−40°C to −40°C to  
−55°C to  
+25°C +125°C  
Parameter1  
ANALOG SWITCH  
Analog Signal Range  
RON  
+25°C +85°C  
+125°C  
0 to VDD  
ꢀ0  
Unit  
Test Conditions/Comments  
0 to VDD  
V
40  
40  
Ω typ  
Ω max  
VD = 3 V, 8.5 V, IS = −10 mA  
VDD = 10.8 V  
60  
5
ꢀ0  
LEAKAGE CURRENT  
Source OFF Leakage, IS (Off)  
VDD = 13.2 V  
VD = 12.2 V/1 V, VS = 1 V/12.2 V;  
see Figure 12  
0.1  
0.1  
nA typ  
0.25  
0.1  
15  
0.25  
0.1  
15  
nA max  
nA typ  
Drain OFF Leakage, ID (Off)  
VD = 12.2 V/1 V, VS = 1 V/12.2 V;  
see Figure 12  
0.ꢀ5  
0.4  
0.ꢀ5  
5
5
30  
30  
0.ꢀ5  
0.4  
0.ꢀ5  
30  
30  
nA max  
nA typ  
nA max  
Channel ON Leakage, ID, IS (On)  
VS = VD = 12.2 V/1 V; see Figure 13  
DIGITAL INPUTS  
Input High Voltage, VINH  
Input Low Voltage, VINL  
Input Current  
2.4  
0.8  
2.4  
0.8  
2.4  
0.8  
V min  
V max  
IINL or IINH  
0.005  
0.5  
0.005  
0.5  
0.005  
0.5  
μA typ  
μA max  
VIN = VINL or VINH  
DYNAMIC CHARACTERISTICS2  
tTRANSITION  
180  
250  
250  
1ꢀ0  
250  
ns max RL = 300 Ω, CL = 35 pF; VS1 = 0 V/8 V,  
VS2 = 8 V/0 V; see Figure 14  
Break-Before-Make Time Delay, tD 60  
60  
ns typ  
RL = 300 Ω, CL = 35 pF;  
VS1 = VS2 = 8 V; see Figure 15  
Off Isolation  
Channel-to-Channel Crosstalk  
CS (Off)  
80  
90  
13  
65  
80  
ꢀ0  
13  
65  
dB typ  
dB typ  
pF typ  
pF typ  
RL = 50 Ω, f = 1 MHz; see Figure 16  
RL = 50 Ω, f = 1 MHz; see Figure 1ꢀ  
f = 1 MHz  
CD, CS (On)  
f = 1 MHz  
POWER REQUIREMENTS  
IDD  
VDD = 13.2 V  
VIN = 0 V or 5 V  
0.0001  
1
0.0001  
1
0.0001  
1
0.0001  
1
μA typ  
μA max  
μA typ  
μA max  
2.5  
2.5  
2.5  
2.5  
2.5  
2.5  
IL  
VL = 5.5 V  
1 Temperature ranges are as follows: B Version: −40°C to +125°C; T Version: −55°C to +125°C.  
2 Guaranteed by design, not subject to production test.  
Rev. B | Page 4 of 16  
 
ADG419  
ABSOLUTE MAXIMUM RATINGS  
TA= 25°C unless otherwise noted.  
Stresses above those listed under Absolute Maximum Ratings  
may cause permanent damage to the device. This is a stress  
rating only; functional operation of the device at these or any  
other conditions above those indicated in the operational  
section of this specification is not implied. Exposure to absolute  
maximum rating conditions for extended periods may affect  
device reliability.  
Table 3.  
Parameter  
Rating  
VDD to VSS  
44 V  
VDD to GND  
VSS to GND  
VL to GND  
Analog, Digital Inputs1  
−0.3 V to +25 V  
+0.3 V to −25 V  
−0.3 V to VDD + 0.3 V  
VSS − 2 V to VDD + 2 V  
or 30 mA, whichever  
occurs first  
ESD CAUTION  
Continuous Current, S or D  
30 mA  
Peak Current, S or D (Pulsed at 1 ms,  
10% Duty-Cycle Maximum)  
100 mA  
Operating Temperature Range  
Industrial (B Version)  
Extended (T Version)  
Storage Temperature Range  
Junction Temperature  
−40°C to +125°C  
−55°C to +125°C  
−65°C to +150°C  
150°C  
CERDIP Package, Power Dissipation  
θJA, Thermal Impedance  
600 mW  
110°C/W  
Lead Temperature, Soldering (10 sec)  
PDIP Package, Power Dissipation  
θJA, Thermal Impedance  
300°C  
400 mW  
100°C/W  
Lead Temperature, Soldering (10 sec)  
SOIC Package, Power Dissipation  
θJA, Thermal Impedance  
260°C  
400 mW  
155°C/W  
MSOP Package, Power Dissipation  
θJA, Thermal Impedance  
315 mW  
205°C/W  
Lead Temperature, Soldering  
Vapor Phase (60 sec)  
Infrared (15 sec)  
215°C  
220°C  
1Overvoltages at IN, S or D is clamped by internal diodes. Limit current to the  
maximum ratings given.  
Rev. B | Page 5 of 16  
 
ADG419  
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS  
1
2
3
4
8
7
6
5
S2  
V
D
S1  
ADG419  
TOP VIEW  
(Not to Scale)  
SS  
GND  
IN  
V
V
DD  
L
Figure 2. Pin Configuration  
Table 4. Pin Function Description  
Pin No.  
Mnemonic  
Description  
1
2
3
4
5
6
D
S1  
GND  
VDD  
VL  
Drain terminal. May be an input or an output.  
Source terminal. May be an input or an output.  
Ground (0 V) reference.  
Most positive power supply potential.  
Logic power supply (5 V).  
IN  
VSS  
Logic control input.  
Most negative power supply potential in dual-supply applications. In single-supply applications, it may be  
connected to GND.  
8
S2  
Source terminal. May be an input or an output.  
Table 5. Truth Table  
Logic  
Switch 1  
On  
Off  
Switch 2  
Off  
On  
0
1
Rev. B | Page 6 of 16  
 
ADG419  
TYPICAL PERFORMANCE CHARACTERISTICS  
50  
100  
T
= 25°C  
T = 25°C  
A
A
V
V
= +5V  
= –5V  
DD  
SS  
V
V
= 5V  
= 0V  
DD  
SS  
40  
80  
60  
40  
30  
20  
V
V
= +10V  
= –10V  
DD  
V
V
= 10V  
= 0V  
DD  
SS  
SS  
V
V
= 12V  
= 0V  
DD  
SS  
V
V
= +12V  
= –12V  
SS  
DD  
20  
0
10  
0
V
V
= +15V  
= –15V  
DD  
V
V
= 15V  
= 0V  
DD  
SS  
SS  
–15  
–10  
–5  
0
V , V (V)  
5
10  
15  
0
5
10  
15  
V , V (V)  
S
D
S
D
Figure 3. RON as a Function of VD (VS), Dual-Supply Voltage  
Figure 6. RON as a Function of VD (VS), Single-Supply Voltage  
50  
100  
80  
60  
40  
20  
0
V
V
V
= +15V  
= –15V  
= +5V  
V
V
V
= 12V  
= 0V  
= 5V  
DD  
SS  
DD  
SS  
L
L
40  
30  
20  
10  
0
125°C  
125°C  
85°C  
–5  
85°C  
25°C  
10  
25°C  
–15  
–10  
0
5
15  
0
3
6
9
12  
V , V (V)  
V , V (V)  
S D  
S
D
Figure 4. RON as a Function of VD (VS) for Different Temperatures  
Figure 7. RON as a Function of VD (VS) for Different Temperatures  
0.02  
0.006  
I
(ON)  
V
V
= +15V  
= –15V  
V
V
= 12V  
= 0V  
D
DD  
SS  
DD  
SS  
T
= 25°C  
T = 25°C  
A
A
I
(ON)  
0.01  
0
0.004  
0.002  
0
D
I
(OFF)  
S
I
(OFF)  
S
I
(OFF)  
D
I
(OFF)  
–0.01  
–0.02  
–0.03  
D
–0.002  
–0.004  
–15  
–10  
–5  
0
5
10  
15  
0
2
4
6
V , V (V)  
8
10  
12  
V , V (V)  
S
D
S
D
Figure 5. Leakage Currents as a Function of VS (VD)  
Figure 8. Leakage Currents as a Function of VS (VD)  
Rev. B | Page ꢀ of 16  
 
ADG419  
10mA  
220  
200  
180  
160  
140  
V
V
V
= +15V  
= –15V  
= +5V  
DD  
SS  
1mA  
100µA  
10µA  
1µA  
L
I+, I–  
SINGLE SUPPLY  
= 0V/+5V  
V
IN  
I
L
100nA  
10nA  
120  
100  
DUAL SUPPLY  
V
= ±5V  
IN  
1nA  
100  
80  
1k  
10k  
100k  
1M  
10M  
6
8
10  
12  
14  
16  
FREQUENCY (Hz)  
SUPPLY VOLTAGE (V)  
Figure 9. Supply Current (ISUPPLY) vs. Input Switching Frequency  
Figure 10. Transition Time (tTRANSITION) vs. Power Supply Voltage  
Rev. B | Page 8 of 16  
ADG419  
TEST CIRCUITS  
I
DS  
V1  
I
(OFF)  
A
I
(OFF)  
A
I
(ON)  
A
S
D
D
S
D
S
D
S
D
V
S
V
S
V
D
V
V
D
S
R
= V /I  
DS  
ON  
1
Figure 12. Off Leakage  
Figure 11. On Resistance  
Figure 13. On Leakage  
+15V  
+5V  
3V  
V
V
L
V
50%  
50%  
DD  
IN  
S1  
0V  
D
V
V
V
OUT  
S1  
S2  
tTRANSITION  
tTRANSITION  
90%  
S2  
IN  
R
300  
C
L
L
35pF  
OUTPUT  
V
V
SS  
IN  
GND  
90%  
–15V  
Figure 14. Transition Time, tTRANSITION  
+15V  
+5V  
V
V
L
DD  
3V  
S1  
D
V
V
OUT  
ADDRESS  
DRIVE (V  
S1  
S2  
)
IN  
S2  
IN  
V
R
300  
C
L
L
0V  
35pF  
tD  
tD  
V
OUT  
0.9V  
O
0.9V  
0.9V  
0.9V  
O
V
V
O
O
IN  
GND  
SS  
–15V  
Figure 15. Break-Before-Make Time Delay, tD  
Rev. B | Page 9 of 16  
 
 
 
 
 
ADG419  
+15V  
0.1µF  
+5V  
0.1µF  
V
V
L
DD  
S1  
+15V  
0.1µF  
+5V  
0.1µF  
D
50  
V
S
V
V
L
DD  
S
D
S2  
V
V
OUT  
OUT  
R
L
R
50Ω  
L
50  
V
IN  
IN  
V
GND  
SS  
V
SS  
GND  
V
S
V
0.1µF  
–15V  
IN  
0.1µF  
–15V  
CHANNEL-TO-CHANNEL CROSSTALK = 20 × log | V /V  
S
|
OUT  
Figure 17. Crosstalk  
Figure 16. Off Isolation  
Rev. B | Page 10 of 16  
 
ADG419  
TERMINOLOGY  
CS (Off)  
Off switch source capacitance.  
VDD  
Most positive power supply potential.  
CD, CS (On)  
On switch capacitance.  
VSS  
Most negative power supply potential in dual-supply applications.  
In single-supply applications, it may be connected to GND.  
tTRANSITION  
Delay time between the 50% and 90% points of the digital  
inputs and the switch on condition when switching from one  
address state to another.  
VL  
Logic power supply (5 V).  
GND  
tD  
Ground (0 V) reference.  
Off time or on time measured between the 90% points of both  
switches when switching from one address state to the other.  
S
Source terminal. May be an input or an output.  
VINL  
D
Maximum input voltage for Logic 0.  
Drain terminal. May be an input or an output.  
VINH  
IN  
Minimum input voltage for Logic 1.  
Logic control input.  
I
INL (IINH)  
RON  
Input current of the digital input.  
Ohmic resistance between D and S.  
Crosstalk  
IS (Off)  
A measure of unwanted signal that is coupled through from one  
channel to another as a result of parasitic capacitance.  
Source leakage current with the switch off.  
ID (Off)  
Off Isolation  
Drain leakage current with the switch off.  
A measure of unwanted signal coupling through an off channel.  
ID, IS (On)  
IDD  
Channel leakage current with the switch on.  
Positive supply current.  
VD (VS)  
ISS  
Analog voltage on terminals D, S.  
Negative supply current.  
Rev. B | Page 11 of 16  
 
ADG419  
OUTLINE DIMENSIONS  
0.400 (10.16)  
0.365 (9.27)  
0.355 (9.02)  
8
1
5
4
0.280 (7.11)  
0.250 (6.35)  
0.240 (6.10)  
0.325 (8.26)  
0.310 (7.87)  
0.300 (7.62)  
0.100 (2.54)  
BSC  
0.060 (1.52)  
MAX  
0.195 (4.95)  
0.130 (3.30)  
0.115 (2.92)  
0.210 (5.33)  
MAX  
0.015  
(0.38)  
MIN  
0.150 (3.81)  
0.130 (3.30)  
0.115 (2.92)  
0.015 (0.38)  
GAUGE  
0.014 (0.36)  
0.010 (0.25)  
0.008 (0.20)  
PLANE  
SEATING  
PLANE  
0.022 (0.56)  
0.018 (0.46)  
0.014 (0.36)  
0.430 (10.92)  
MAX  
0.005 (0.13)  
MIN  
0.070 (1.78)  
0.060 (1.52)  
0.045 (1.14)  
COMPLIANT TO JEDEC STANDARDS MS-001  
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS  
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR  
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.  
CORNER LEADS MAY BE CONFIGURED AS WHOLE OR HALF LEADS.  
Figure 18. 8-Lead Plastic Dual In-Line Package [PDIP]  
Narrow Body  
(N-8)  
Dimensions shown in inches and (millimeters)  
0.005 (0.13)  
MIN  
0.055 (1.40)  
MAX  
8
5
0.310 (7.87)  
0.220 (5.59)  
1
4
0.100 (2.54) BSC  
0.405 (10.29) MAX  
0.320 (8.13)  
0.290 (7.37)  
0.060 (1.52)  
0.015 (0.38)  
0.200 (5.08)  
MAX  
0.150 (3.81)  
MIN  
0.200 (5.08)  
0.125 (3.18)  
0.015 (0.38)  
0.008 (0.20)  
SEATING  
PLANE  
0.023 (0.58)  
0.014 (0.36)  
15°  
0°  
0.070 (1.78)  
0.030 (0.76)  
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS  
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR  
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.  
Figure 19. 8-Lead Ceramic Dual In-Line Package [CERDIP]  
(Q-8)  
Dimensions shown in inches and (millimeters)  
Rev. B | Page 12 of 16  
 
ADG419  
3.20  
3.00  
2.80  
8
1
5
4
5.15  
4.90  
4.65  
3.20  
3.00  
2.80  
PIN 1  
0.65 BSC  
0.95  
0.85  
0.75  
1.10 MAX  
0.80  
0.60  
0.40  
8°  
0°  
0.15  
0.00  
0.38  
0.22  
0.23  
0.08  
SEATING  
PLANE  
COPLANARITY  
0.10  
COMPLIANT TO JEDEC STANDARDS MO-187-AA  
Figure 20. 8-Lead Mini Small Outline Package [MSOP]  
(RM-8)  
Dimensions shown in millimeters  
5.00 (0.1968)  
4.80 (0.1890)  
8
1
5
4
6.20 (0.2441)  
5.80 (0.2284)  
4.00 (0.1574)  
3.80 (0.1497)  
0.50 (0.0196)  
0.25 (0.0099)  
1.27 (0.0500)  
BSC  
45°  
1.75 (0.0688)  
1.35 (0.0532)  
0.25 (0.0098)  
0.10 (0.0040)  
8°  
0°  
0.51 (0.0201)  
0.31 (0.0122)  
COPLANARITY  
0.10  
1.27 (0.0500)  
0.40 (0.0157)  
0.25 (0.0098)  
0.17 (0.0067)  
SEATING  
PLANE  
COMPLIANT TO JEDEC STANDARDS MS-012-AA  
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS  
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR  
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.  
Figure 21. 8-Lead Standard Small Outline Package [SOIC_N]  
Narrow Body (R-8)  
Dimensions shown in millimeters and (inches)  
ORDERING GUIDE  
Model  
Temperature Range Package Description  
Package Option Branding  
ADG419BN  
−40°C to +125°C  
−40°C to +125°C  
−40°C to +125°C  
−40°C to +125°C  
−40°C to +125°C  
−40°C to +125°C  
−40°C to +125°C  
−40°C to +125°C  
−40°C to +125°C  
−40°C to +125°C  
−40°C to +125°C  
−40°C to +125°C  
−40°C to +125°C  
8-Lead Plastic Dual In-Line Package [PDIP]  
8-Lead Plastic Dual In-Line Package [PDIP]  
8-Lead Standard Small Outline Package [SOIC_N]  
8-Lead Standard Small Outline Package [SOIC_N]  
8-Lead Standard Small Outline Package [SOIC_N]  
8-Lead Standard Small Outline Package [SOIC_N]  
8-Lead Standard Small Outline Package [SOIC_N]  
8-Lead Standard Small Outline Package [SOIC_N]  
8-Lead Mini Small Outline Package [MSOP]  
8-Lead Mini Small Outline Package [MSOP]  
8-Lead Mini Small Outline Package [MSOP]  
8-Lead Mini Small Outline Package [MSOP]  
8-Lead Mini Small Outline Package [MSOP]  
8-Lead Mini Small Outline Package [MSOP]  
8-Lead Ceramic Dual In-Line Package [CERDIP]  
N-8  
N-8  
R-8  
R-8  
R-8  
R-8  
R-8  
R-8  
RM-8  
RM-8  
RM-8  
RM-8  
RM-8  
RM-8  
Q-8  
ADG419BNZ1  
ADG419BR  
ADG419BR-REEL  
ADG419BR-REELꢀ  
ADG419BRZ1  
ADG419BRZ-REEL1  
ADG419BRZ-REELꢀ1  
ADG419BRM  
ADG419BRM-REEL  
ADG419BRM-REELꢀ  
ADG419BRMZ1  
ADG419BRMZ-REEL1  
SBB  
SBB  
SBB  
SBB#  
SBB#  
SBB#  
ADG419BRMZ-REELꢀ1 −40°C to +125°C  
ADG419TQ −55°C to +125°C  
1 Z = RoHS Compliant Part, # denotes that RoHS compliant part is top or bottom marked.  
Rev. B | Page 13 of 16  
 
 
ADG419  
NOTES  
Rev. B | Page 14 of 16  
ADG419  
NOTES  
Rev. B | Page 15 of 16  
ADG419  
NOTES  
©2009 Analog Devices, Inc. All rights reserved. Trademarks and  
registered trademarks are the property of their respective owners.  
D07850-0-8/09(B)  
Rev. B | Page 16 of 16  

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