ADG428BPZ [ADI]
LC2MOS Latchable ±15 V 8-Channel High Performance Analog Mux;型号: | ADG428BPZ |
厂家: | ADI |
描述: | LC2MOS Latchable ±15 V 8-Channel High Performance Analog Mux 复用器 |
文件: | 总12页 (文件大小:161K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
LC2MOS Latchable 4-/8-Channel
a
High Performance Analog Multiplexers
ADG428/ADG429
FEATURES
FUNCTIONAL BLOCK DIAGRAMS
44 V Supply Maximum Ratings
VSS to VDD Analog Signal Range
Low On Resistance (60 ⍀ typ)
Low Power Consumption (1.6 mW max)
Low Charge Injection (<4 pC typ)
Fast Switching
ADG428
ADG429
S1
S1A
DA
DB
S4A
S1B
Break-Before-Make Switching Action
Plug-In Replacement for DG428/DG429
D
APPLICATIONS
S8
S4B
Automatic Test Equipment
Data Acquisition Systems
Communication Systems
Avionics and Military Systems
Microprocessor Controlled Analog Systems
Medical Instrumentation
DECODERS/DRIVERS
LATCHES
DECODERS/DRIVERS
LATCHES
WR
WR
RS
RS
A2
A1
A0
EN
A1
A0
EN
GENERAL DESCRIPTION
PRODUCT HIGHLIGHTS
The ADG428 and ADG429 are monolithic CMOS analog
multiplexers comprising eight single channels and four differen-
tial channels respectively. On-chip address and control latches
facilitate microprocessor interfacing. The ADG428 switches one
of eight inputs to a common output as determined by the 3-bit
binary address lines A0, A1 and A2. The ADG429 switches one
of four differential inputs to a common differential output as
determined by the 2-bit binary address lines A0 and A1. An EN
input on both devices is used to enable or disable the device.
When disabled, all channels are switched OFF. All the control
inputs, address and enable inputs are TTL compatible over the
full specified operating temperature range. This makes the part
suitable for bus-controlled systems such as data acquisition sys-
tems, process controls, avionics and ATEs because the TTL-
compatible address latches simplify the digital interface design
and reduce the board space required.
1. Extended Signal Range
The ADG428/ADG429 are fabricated on an enhanced
LC2MOS process, giving an increased signal range that ex-
tends to the supply rails.
2. Low Power Dissipation
3. Low RON
4. Single/Dual Supply Operation
5. Single Supply Operation
For applications where the analog signal is unipolar, the
ADG428/ADG429 can be operated from a single rail power
supply. The parts are fully specified with a single +12 V
power supply and will remain functional with single supplies
as low as +5 V.
The ADG428/ADG429 are designed on an enhanced LC2MOS
process that provides low power dissipation yet gives high switching
speed and low on resistance. Each channel conducts equally well
in both directions when ON and has an input signal range that
extends to the supplies. In the OFF condition, signal levels up to
the supplies are blocked. All channels exhibit break-before-make
switching action, preventing momentary shorting when switching
channels. Inherent in the design is low charge injection for mini-
mum transients when switching the digital inputs.
The ADG428/ADG429 are improved replacements for the
DG428/DG429 Analog Multiplexers.
REV. C
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
Fax: 781/326-8703
World Wide Web Site: http://www.analog.com
© Analog Devices, Inc., 1999
ADG428/ADG429–SPECIFICATIONS
DUAL SUPPLY1
(VDD = +15 V, VSS = –15 V, GND = 0 V, WR = 0 V, RS = 2.4 V unless otherwise noted)
B Version T Version
–40؇C to –55؇C to
+25؇C +85؇C +25؇C +125؇C
Parameter
Units
Test Conditions/Comments
ANALOG SWITCH
Analog Signal Range
RON
VSS to VDD
125
VSS to VDD
125
V
60
100
10
60
100
10
Ω typ
Ω max
% max
VD = ±10 V, IS = –1 mA
∆RON
–10 V < VS < 10 V, IS = –1 mA
LEAKAGE CURRENTS
Source OFF Leakage IS (OFF)
±0.03 ±0.3
±0.5 ±50
±0.03 ±0.3
±0.5 ±50
nA typ
VD = ±10 V, VS = ϯ10 V;
nA max Test Circuit 2
VD = ±10 V, VS = ϯ10 V;
Test Circuit 3
Drain OFF Leakage ID (OFF)
ADG428
±0.07 ±0.7
±0.07 ±0.7
nA typ
nA max
nA typ
nA max
±1
±100
±1
±100
ADG429
±0.05 ±0.5
±0.05 ±0.5
±1
±50
±1
±50
Channel ON Leakage ID, IS (ON)
ADG428
ADG429
VS = VD = ±10 V;
nA max Test Circuit 4
nA max
±1
±1
±100
±50
±1
±1
±100
±50
DIGITAL INPUTS
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current
2.4
0.8
2.4
0.8
V min
V max
IINL or IINH
±0.1 ±1
±0.1 ±1
µA max VIN = 0 or VDD
CIN, Digital Input Capacitance
8
8
pF typ
f = 1 MHz
DYNAMIC CHARACTERISTICS2
tTRANSITION
110
250
110
250
ns typ
RL = 1 MΩ, CL = 35 pF;
300
300
ns max VS1 = ±10 V, VS8 = ϯ10 V;
Test Circuit 5
tOPEN
10
10
ns min
RL = 1 kΩ, CL = 35 pF;
VS = +5 V; Test Circuit 6
RL = 1 kΩ, CL = 35 pF;
VS = +5 V; Test Circuit 7
RL = 1 kΩ, CL = 35 pF;
VS = +5 V; Test Circuit 7
tON (EN, WR)
tOFF (EN, RS)
115
150
105
150
115
150
105
150
ns typ
ns max
ns typ
ns max
ns min
ns min
ns min
ns min
pC typ
225
225
300
100
100
10
300
100
100
10
tW, Write Pulsewidth
tS, Address, Enable Setup Time
tH, Address, Enable Hold Time
tRS, Reset Pulsewidth
100
100
VS = +5 V
VS = 0 V, RS = 0 Ω, CL = 10 nF;
Test Circuit 10
Charge Injection
4
4
OFF Isolation
–75
–60
85
–75
–60
85
dB typ
RL = 1 kΩ, CL = 15 pF, f = 100 kHz;
dB min VS = 7 V rms, VEN = 0 V; Test Circuit 11
Channel-to-Channel Crosstalk
dB typ
pF typ
RL = 1 kΩ, CL = 15 pF, f = 100 kHz;
Test Circuit 12
f = 1 MHz
CS (OFF)
CD (OFF)
ADG428
ADG429
CD, CS (ON)
ADG428
ADG429
11
11
f = 1 MHz
40
20
40
20
pF typ
pF typ
f = 1 MHz
54
34
54
34
pF typ
pF typ
POWER REQUIREMENTS
IDD
VIN = 0 V, VEN = 0 V
20
20
µA typ
µA max
µA typ
µA max
100
0.001
5
100
0.001
5
ISS
NOTES
1Temperature ranges are as follows: B Version: –40°C to +85°C; T Version: –55°C to +125°C.
2Guaranteed by design, not subject to production test.
Specifications subject to change without notice.
–2–
REV. C
ADG428/ADG429
SINGLE SUPPLY1
(VDD = +12 V, VSS = 0 V, GND = 0 V, WR = 0 V, RS = 2.4 V unless otherwise noted)
B Version T Version
–40؇C to
+25؇C +85؇C
–55؇C to
Parameter
+25؇C
+125؇C
Units
Test Conditions/Comments
ANALOG SWITCH
Analog Signal Range
RON
0 to VDD
0 to VDD
200
V
90
10
90
10
Ω typ
Ω max
% max
VD = +10 V, IS = –500 µA
200
∆RON
0 V < VS < 10 V, IS = –1 mA
LEAKAGE CURRENTS
Source OFF Leakage IS (OFF)
±0.005
±0.5
±0.005
±0.5
nA typ
VD = 10 V/0 V, VS = 0 V/10 V;
±50
±50
nA max Test Circuit 2
VD = 10 V/0 V, VS = 0 V/10 V;
Test Circuit 3
Drain OFF Leakage ID (OFF)
ADG428
±0.015
±1
±0.008
±1
±0.015
±1
±0.008
±1
nA typ
nA max
nA typ
nA max
±100
±50
±100
±50
ADG429
Channel ON Leakage ID, IS (ON)
ADG428
VS = VD = 10 V/0 V;
Test Circuit 4
±0.02
±1
±0.01
±1
±0.02
±1
±0.01
±1
nA typ
±100
±50
±100
±50
nA max
nA max
nA max
ADG429
DIGITAL INPUTS
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current
2.4
0.8
2.4
0.8
V min
V max
IINL or IINH
±1
±1
µA max VIN = 0 or VDD
CIN, Digital Input Capacitance
8
8
pF typ
f = 1 MHz
DYNAMIC CHARACTERISTICS2
tTRANSITION
250
350
250
350
ns typ
ns max
RL = 1 MΩ, CL = 35 pF;
VS1 = 10 V/0 V, VS8 = 0 V/10 V;
Test Circuit 5
RL = 1 kΩ, CL = 35 pF;
VS = +5 V; Test Circuit 6
RL = 1 kΩ, CL = 35 pF;
VS = +5 V; Test Circuit 7
RL = 1 kΩ, CL = 35 pF;
VS = +5 V; Test Circuit 7
450
10
450
10
tOPEN
25
25
ns min
tON (EN, WR)
tOFF (EN, RS)
200
300
80
200
300
80
ns typ
ns max
ns typ
ns max
ns min
ns min
ns min
ns min
pC typ
400
400
300
400
100
100
10
300
400
100
100
10
tW, Write Pulsewidth
tS, Address, Enable Setup Time
tH, Address, Enable Hold Time
tRS, Reset Pulsewidth
100
100
VS = +5 V
VS = 6 V, RS = 0 Ω, CL = 10 nF;
Test Circuit 10
Charge Injection
4
4
OFF Isolation
–75
–60
85
–75
–60
85
dB typ
RL = 1 kΩ, CL = 15 pF, f = 100 kHz;
dB min VS = 7 V rms, VEN = 0 V; Test Circuit 11
Channel-to-Channel Crosstalk
dB typ
pF typ
RL = 1 kΩ, CL = 15 pF, f = 100 kHz;
Test Circuit 12
f = 1 MHz
CS (OFF)
CD (OFF)
ADG428
ADG429
CD, CS (ON)
ADG428
ADG429
11
11
f = 1 MHz
40
20
40
20
pF typ
pF typ
f = 1 MHz
54
34
54
34
pF typ
pF typ
POWER REQUIREMENTS
IDD
VIN = 0 V, VEN = 0 V
20
100
20
100
µA typ
µA max
NOTES
1Temperature ranges are as follows: B Version: –40°C to +85°C; T Version: –55°C to +125°C.
2Guaranteed by design, not subject to production test.
Specifications subject to change without notice.
REV. C
–3–
ADG428/ADG429
ABSOLUTE MAXIMUM RATINGS1
(TA = +25°C unless otherwise noted.)
ADG428 PIN CONFIGURATIONS
DIP/SOIC PLCC
VDD to VSS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+44 V
VDD to GND . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +25 V
VSS to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . +0.3 V to –25 V
Analog, Digital Inputs2 . . . . . . . . . . VSS – 2 V to VDD + 2 V or
30 mA, Whichever Occurs First
Continuous Current, S or D . . . . . . . . . . . . . . . . . . . . . 30 mA
Peak Current, S or D . . . . . . . . . . . . . . . . . . . . . . . . . . 100 mA
(Pulsed at 1 ms, 10% Duty Cycle Max)
1
2
3
4
5
6
7
8
9
18
17
16
15
14
13
12
11
10
RS
WR
A0
3
2
1
20 19
A1
PIN 1
IDENTIFIER
EN
A2
4
5
6
7
8
18
17
16
15
14
EN
A2
V
GND
SS
V
GND
SS
ADG428
TOP VIEW
(Not to Scale)
ADG428
TOP VIEW
(Not to Scale)
S1
V
DD
S1
S2
S3
S4
D
V
DD
S2
S3
S5
S6
S5
S6
S7
S8
Operating Temperature Range
Industrial (B Version) . . . . . . . . . . . . . . . . . –40°C to +85°C
Extended (T Version) . . . . . . . . . . . . . . . . –55°C to +125°C
Storage Temperature Range . . . . . . . . . . . . . –65°C to +150°C
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . +150°C
Cerdip Package, Power Dissipation . . . . . . . . . . . . . . . 900 mW
θJA, Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 73°C/W
Lead Temperature, Soldering (10 sec) . . . . . . . . . . . +300°C
Plastic Package, Power Dissipation . . . . . . . . . . . . . . . 470 mW
θJA, Thermal Impedance . . . . . . . . . . . . . . . . . . . . 115°C/W
Lead Temperature, Soldering (10 sec) . . . . . . . . . . . +260°C
SOIC Package, Power Dissipation . . . . . . . . . . . . . . . . 600 mW
θJA, Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 77°C/W
Lead Temperature, Soldering
9
10 11 12 13
NC = NO CONNECT
ADG429 PIN CONFIGURATIONS
PLCC
DIP
1
18
RS
WR
A0
3
2
1
20 19
2
3
4
5
6
7
8
9
17
16
15
14
13
12
11
10
A1
Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . +215°C
PLCC Package, Power Dissipation . . . . . . . . . . . . . . . 800 mW
θJA, Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 90°C/W
Lead Temperature, Soldering
PIN 1
IDENTIFIER
EN
GND
18
4
5
6
7
8
EN
GND
V
V
17
16
15
14
SS
DD
V
V
SS
ADG429
TOP VIEW
(Not to Scale)
DD
ADG429
TOP VIEW
(Not to Scale)
S1A
S1B
S2B
S3B
S1A
S2A
S3A
S4A
DA
S1B
S2B
S3B
S4B
DB
S2A
S3A
Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . +215°C
Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . +220°C
9
10 11 12 13
NOTES
1Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those listed in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability. Only one absolute
maximum rating may be applied at any one time.
NC = NO CONNECT
2Overvoltages at A, EN, WR, RS, S or D will be clamped by internal diodes. Current
should be limited to the maximum ratings given.
ORDERING GUIDE
Model1
Temperature Range
Package Options2
ADG428BN
ADG428BP
ADG428BR
ADG428TQ
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–55°C to +125°C
N-18
P-20A
R-18
Q-18
ADG429BN
ADG429BP
ADG429TQ
–40°C to +85°C
–40°C to +85°C
–55°C to +125°C
N-18
P-20A
Q-18
NOTES
1For availability of MIL-STD-883, Class B processed parts, contact factory.
2N = Plastic DIP; P = Plastic Leaded Chip Carrier (PLCC); Q = Cerdip;
R = Small Outline IC (SOIC).
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the ADG428/ADG429 features proprietary ESD protection circuitry, permanent
damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper
ESD precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
–4–
REV. C
ADG428/ADG429
ADG428 Truth Table
TERMINOLOGY
VDD
VSS
Most positive power supply potential.
A2
A1
A0
EN
WR RS
ON SWITCH
Most negative power supply potential in dual
supplies. In single supply applications, it may
be connected to ground.
Latching
X
X
X
X
X
g
1
0
Maintains Previous
Switch Condition
GND
RON
Ground (0 V) reference.
Reset
X
Ohmic resistance between D and S.
X
X
X
NONE
(Latches Cleared)
∆RON
Difference between the RON of any two
channels.
Transparent Operation
IS (OFF)
Source leakage current when the switch is off.
Drain leakage current when the switch is off.
I
D (OFF)
X
0
0
0
0
1
1
1
1
X
0
0
1
1
0
0
1
1
X
0
1
0
1
0
1
0
1
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
NONE
1
2
3
4
5
6
7
8
ID, IS (ON)
Channel leakage current when the switch is
on.
V
D (VS)
Analog voltage on terminals D, S.
CS (OFF)
Channel input capacitance for “OFF”
condition.
C
D (OFF)
Channel output capacitance for “OFF”
condition.
CD, CS (ON)
CIN
“ON” switch capacitance.
Digital input capacitance.
ADG429 Truth Table
A1
A0
EN
WR
RS
ON SWITCH PAIR
t
ON (EN)
Delay time between the 50% and 90% points
of the digital input and switch “ON”
condition.
Latching
X
X
X
g
1
Maintains Previous
Switch Condition
t
OFF (EN)
Delay time between the 50% and 90% points
of the digital input and switch “OFF”
condition.
Reset
X
tTRANSITlON
Delay time between the 50% and 90% points
of the digital inputs and the switch “ON”
condition when switching from one address
state to another.
X
X
X
0
NONE
(Latches Cleared)
Transparent Operation
X
0
0
1
1
X
0
1
0
1
0
1
1
1
1
0
0
0
0
0
1
1
1
1
1
NONE
tOPEN
“OFF” time measured between 80% points of
both switches when switching from one
address state to another.
1
2
3
4
VINL
VINH
Maximum input voltage for Logic “0.”
Minimum input voltage for Logic “1.”
Input current of the digital input.
I
INL (IINH
)
Crosstalk
A measure of unwanted signal which is
coupled through from one channel to another
as a result of parasitic capacitance.
Off Isolation
A measure of unwanted signal coupling
through an “OFF” channel.
Charge
Injection
A measure of the glitch impulse transferred
from the digital input to the analog output
during switching.
IDD
ISS
Positive supply current.
Negative supply current.
REV. C
–5–
ADG428/ADG429
TIMING DIAGRAMS
3V
0V
3V
50%
50%
RS
50%
50%
WR
0V
tRS
tW
tOFF (RS)
tS
tH
V
O
3V
2V
0.8V
O
SWITCH
OUTPUT
A0, A1, (A2)
EN
0.8V
0V
0V
Figure 1.
Figure 2.
Figure 1 shows the timing sequence for latching the switch
address and enable inputs. The latches are level sensitive; there-
fore, while WR is held low, the latches are transparent and the
switches respond to the address and enable inputs. This input
data is latched on the rising edge of WR.
Figure 2 shows the Reset Pulsewidth, tRS, and the Reset Turnoff
Time, tOFF, (RS).
Note: All digital input signals rise and fall times are measured
from 10% to 90% of 3 V. tr = tf = 20 ns.
Typical Characteristics
140
600
T
= +25؇C
A
T
= +25؇C
A
550
500
130
120
110
100
90
V
V
= +5V
= 0V
DD
SS
450
400
350
300
250
200
V
V
= +5V
= –5V
DD
SS
V
= +10V
DD
SS
V
= 0V
80
V
V
= +15V
= –15V
V
V
= +15V
= 0V
DD
SS
DD
SS
V
V
= +12V
= 0V
DD
SS
V
V
= +12V
= –12V
DD
SS
V
V
= +10V
= –10V
DD
SS
70
150
100
50
60
50
40
–15
0
0
3
6
9
12
15
–10
–5
0
5
10
15
V
(V ) – Volts
S
V
(V ) – Volts
S
D
D
Figure 3. RON as a Function of VD (VS): Dual Supply
Voltage
Figure 5. RON as a Function of VD (VS): Single Supply
Voltage
80
160
V
V
= +15V
= –15V
V
V
= +12V
= 0V
DD
SS
DD
SS
150
140
130
120
110
100
90
75
70
65
60
55
50
45
40
+125؇C
+85؇C
+125؇C
+85؇C
+25؇C
80
+25؇C
70
60
–15
–10
0
5
10
15
–5
0
2
4
6
8
10
15
V
(V ) – Volts
S
V
(V ) – Volts
S
D
D
Figure 4. RON as a Function of VD (VS) for Different
Temperatures
Figure 6. RON as a Function of VD (VS) for Different
Temperatures
–6–
REV. C
ADG428/ADG429
6000
1000
V
V
= +15V
= –15V
DD
SS
V
V
= +15V
= –15V
DD
SS
5500
5000
4500
4000
3500
100
10
1
3000
2500
2000
1500
1000
EN = 2.4V
EN = 0V
EN = 2.4V
EN = 0V
500
0
0.1
10
100
1k
10k
100k
1M
10M
10
100
1k
10k
100k
1M
10M
SWITCHING FREQUENCY – Hz
SWITCHING FREQUENCY – Hz
Figure 7. Positive Supply Current vs. Switching Frequency
Figure 10. Negative Supply Current vs. Switching
Frequency
130
200
V
V
= +12V
= 0V
V
V
= +15V
= –15V
DD
SS
t
DD
SS
TRANSITION
120
110
100
90
180
160
t
TRANSITION
t
(EN)
ON
t
(EN)
ON
140
120
100
80
t
(EN)
OFF
80
70
60
50
t
(EN)
OFF
60
40
1
1
3
5
7
9
11
13
15
3
5
7
9
11
13
V
– Volts
V
– Volts
IN
IN
Figure 8. Switching Time vs. VIN (Bipolar Supply)
Figure 11. Switching Time vs. VIN (Single Supply)
500
300
V
= +5V
IN
V
= +5V
IN
275
250
225
200
175
150
125
100
75
450
400
350
300
250
200
150
100
50
t
(EN)
ON
t
(EN)
ON
t
TRANSITION
t
TRANSITION
t
(EN)
OFF
50
t
(EN)
OFF
25
0
0
؎5
5
6
7
8
9
10
– Volts
11
12
13
14
15
؎7
؎9
؎11
– Volts
؎13
؎15
V
SUPPLY
V
SUPPLY
Figure 12. Switching Time vs. Single Supply
Figure 9. Switching Time vs. Bipolar Supply
REV. C
–7–
ADG428/ADG429
100
95
90
85
80
75
70
65
60
55
50
45
40
110
105
100
95
V
V
= +15V
= –15V
V
V
= +15V
= –15V
DD
SS
DD
SS
90
85
80
75
70
65
60
55
50
1k
100
1k
10k
100k
1M
10M
10k
100k
1M
10M
FREQUENCY – Hz
FREQUENCY – Hz
Figure 13. OFF Isolation vs. Frequency
Figure 15. Crosstalk vs. Frequency
0.04
0.03
0.02
0.01
0
0.2
0.1
0
V
V
T
= +12V
= 0V
V
V
T
= +15V
= –15V
DD
SS
DD
SS
= +25؇C
= +25؇C
A
A
I
(ON)
D
I
(OFF)
I
(ON)
D
D
I
(OFF)
S
I
(OFF)
S
–0.01
–0.02
–0.03
–0.04
I
(OFF)
D
–0.1
–15
–10
–5
0
5
10
15
0
2
4
6
8
10
12
V
(V ) – Volts
S
V
(V ) – Volts
S
D
D
Figure 14. Leakage Currents as a Function of VD (VS)
Figure 16. Leakage Currents as a Function of VD (VS)
–8–
REV. C
ADG428/ADG429
TEST CIRCUITS
I
DS
V1
V
V
SS
DD
V
V
SS
DD
S1
S2
S8
D
S
D
+0.8V
I
(OFF)
A
EN
D
GND
V
S
V
S
V
D
R
= V1/I
ON
DS
Test Circuit 1. On Resistance
Test Circuit 3. ID (OFF)
V
V
V
V
SS
DD
SS
DD
V
V
SS
V
V
SS
DD
DD
S1
S1
S8
D
S2
S8
D
I
(OFF)
V
A
S
I
(ON)
A
D
2.4V
+0.8V
EN
EN
GND
GND
V
V
S
V
S
D
D
Test Circuit 4. ID (ON)
Test Circuit 2. IS (OFF)
V
V
SS
DD
3V
0V
V
V
SS
DD
ENABLE
DRIVE – V
50%
50%
A0
A1
A2
IN
S1
S2–S7
V
V
S1
V
50⍀
IN
ADG428*
tTRANSITION
tTRANSITION
S8
D
S8
2.4V
EN
90%
OUTPUT
RS
OUTPUT
WR
1M⍀
GND
35pF
90%
*SIMILAR CONNECTION FOR ADG429
Test Circuit 5. Switching Time of Multiplexer, tTRANSITION
V
V
SS
DD
V
V
SS
3V
0V
DD
A0
A1
A2
ADDRESS
DRIVE – V
S1
S2–S7
V
S
IN
V
50⍀
IN
ADG428*
S8
D
2.4V
EN
OUTPUT
80%
80%
RS
OUTPUT
WR
1k⍀
GND
35pF
tOPEN
*SIMILAR CONNECTION FOR ADG429
Test Circuit 6. Break-Before-Make Delay, tOPEN
–9–
REV. C
ADG428/ADG429
V
V
SS
DD
V
V
SS
3V
DD
A0
A1
A2
ENABLE DRIVE
50%
50%
S1
S2–S8
V
S
–V
IN
0V
ADG428*
tON (EN)
tOFF (EN)
0.9V
2.4V
RS
OUTPUT
V
O
D
0.9V
O
O
EN
OUTPUT (V
)
O
1k⍀
35pF
V
50⍀
IN
0V
WR
GND
*SIMILAR CONNECTION FOR ADG429
Test Circuit 7. Enable Delay, tON (EN), tOFF (EN)
V
V
SS
DD
3V
WR
V
V
SS
DD
50%
A0
A1
A2
S1
S2–S8
V
S
0V
ADG428*
2.4V
EN
tON (WR)
OUTPUT
V
O
RS
D
WR
OUTPUT
1k⍀
35pF
0.2V
O
GND
V
V
WR
RS
0V
*SIMILAR CONNECTION FOR ADG429
Test Circuit 8. Write Turn-On Time, tON (WR)
V
V
SS
DD
3V
0V
V
V
SS
DD
A0
RS
50%
S1
S2–S8
V
S
A1
A2
ADG428*
tOFF (RS)
2.4V
EN
OUTPUT
D
V
O
RS
0.8V
O
1k⍀
35pF
OUTPUT
GND
WR
V
IN
0V
*SIMILAR CONNECTION FOR ADG429
Test Circuit 9. Reset Turn-Off Time, tOFF (RS)
–10–
REV. C
ADG428/ADG429
V
V
SS
DD
V
V
SS
3V
DD
A0
A1
A2
2.4V
RS
EN
ADG428*
S
D
V
OUT
⌬V
V
OUT
OUT
R
S
V
S
C
L
Q
= C
؋
⌬V OUT
EN
INJ
L
10nF
V
GND
WR
IN
*SIMILAR CONNECTION FOR ADG429
Test Circuit 10. Charge Injection
V
V
SS
V
V
SS
DD
DD
V
V
SS
V
V
SS
DD
DD
A0
A1
A2
EN
2.4V
A0
A1
A2
2.4V
RS
RS
ADG428
ADG428
S1
S2
D
S1
V
V
OUT
D
OUT
1k⍀
1k⍀
1k⍀
S8
V
S
EN
0V
S8
V
S
GND
WR
GND
WR
Test Circuit 12. Crosstalk
Test Circuit 11. OFF Isolation
REV. C
–11–
ADG428/ADG429
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
Cerdip (Q-18)
PLCC (P-20A)
0.180 (4.57)
18
10
0.165 (4.19)
0.048 (1.21)
0.310 (7.87)
0.056 (1.42)
0.042 (1.07)
0.042 (1.07)
0.220 (5.59)
0.025 (0.63)
1
9
0.015 (0.38)
0.048 (1.21)
0.042 (1.07)
0.320 (8.13)
0.290 (7.37)
PIN 1
0.840 (21.34) MAX
3
19
18
0.021 (0.53)
0.013 (0.33)
0.060 (1.52)
0.015 (0.38)
4
8
PIN 1
0.050
(1.27)
BSC
IDENTIFIER
0.330 (8.38)
0.290 (7.37)
0.200 (5.08)
MAX
TOP VIEW
(PINS DOWN)
0.032 (0.81)
0.026 (0.66)
0.150
(3.81)
MIN
0.015 (0.381)
0.008 (0.204)
14
13
0.200 (5.08)
0.125 (3.18)
9
0.020
(0.50)
R
0.040 (1.01)
0.025 (0.64)
0.022 (0.58)
0.014 (0.36)
SEATING
PLANE
0.356 (9.04)
0.350 (8.89)
0.100
(2.54)
BSC
0.070 (1.78)
0.030 (0.76)
SQ
0.110 (2.79)
0.085 (2.16)
0.395 (10.02)
0.385 (9.78)
SQ
Plastic DIP (N-18)
SOIC (R-18)
0.910 (23.12)
0.890 (22.61)
0.4625 (11.75)
0.4469 (11.35)
18
10
9
0.260 (6.61)
0.240 (6.10)
18
10
1
0.306 (7.78)
0.294 (7.47)
PIN 1
0.180
(4.48)
MAX
0.140 (3.56)
0.120 (3.05)
1
9
0.175 (4.45)
0.120 (3.05)
0.120 (0.305)
0.008 (0.203)
PIN 1
0.1043 (2.65)
0.0926 (2.35)
0.0291 (0.74)
SEATING
PLANE
0.065 (1.66)
0.020 (0.508) 0.105 (2.67)
x 45°
0.0098 (0.25)
0.095 (2.42) 0.045 (1.15)
0.015 (0.381)
0.0500 (1.27)
0.0157 (0.40)
8°
0°
0.0500
(1.27)
BSC
0.0192 (0.49)
0.0118 (0.30)
0.0040 (0.10)
SEATING
PLANE
0.0125 (0.32)
0.0091 (0.23)
0.0138 (0.35)
–12–
REV. C
相关型号:
SI9130DB
5- and 3.3-V Step-Down Synchronous ConvertersWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9135LG-T1
SMBus Multi-Output Power-Supply ControllerWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9135LG-T1-E3
SMBus Multi-Output Power-Supply ControllerWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9135_11
SMBus Multi-Output Power-Supply ControllerWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9136_11
Multi-Output Power-Supply ControllerWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9130CG-T1-E3
Pin-Programmable Dual Controller - Portable PCsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9130LG-T1-E3
Pin-Programmable Dual Controller - Portable PCsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9130_11
Pin-Programmable Dual Controller - Portable PCsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9137
Multi-Output, Sequence Selectable Power-Supply Controller for Mobile ApplicationsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9137DB
Multi-Output, Sequence Selectable Power-Supply Controller for Mobile ApplicationsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9137LG
Multi-Output, Sequence Selectable Power-Supply Controller for Mobile ApplicationsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9122E
500-kHz Half-Bridge DC/DC Controller with Integrated Secondary Synchronous Rectification DriversWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
©2020 ICPDF网 联系我们和版权申明