ADG509FBRW-REEL [ADI]
IC 4-CHANNEL, DIFFERENTIAL MULTIPLEXER, PDSO16, MS-013AA, SOIC-16, Multiplexer or Switch;
| 型号： | ADG509FBRW-REEL |
| 厂家： | 
ADI |
| 描述： | IC 4-CHANNEL, DIFFERENTIAL MULTIPLEXER, PDSO16, MS-013AA, SOIC-16, Multiplexer or Switch 复用器 |
| 文件： | 总16页 (文件大小：387K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
CMOS 4-/8-Channel
Analog Multiplexers
ADG508A/ADG509A
FEATURES
FUNCTIONAL BLOCK DIAGRAMS
44 V supply maximum rating
VSS to VDD analog signal range
ADG508A
D
S1
Single-/dual-supply specifications
Wide supply range: 10.8 V to 16.5 V
Extended plastic temperature range: −40°C to +85°C
Low power dissipation: 28 mW maximum
Low leakage: 20 pA typical
S8
Available in 16-lead DIP/SOIC and 20-lead PLCC/LCC
packages
DECODER
Superior alternative to
DG508A, HI-508
A0 A1 A2 EN
DG509A, HI-509
Figure 1. ADG508A
ADG509A
DA
DB
S1A
S4A
S1B
S4B
DECODER
A0 A1 EN
Figure 2. ADG509A
GENERAL DESCRIPTION
PRODUCT HIGHLIGHTS
1. Single-/Dual-Supply Specifications with a Wide Tolerance.
The devices are specified in the 10.8 V to 16.5 V range for
both single and dual supplies.
2. Extended Signal Range. The enhanced LC2MOS processing
results in a high breakdown and an increased analog signal
The ADG508A and ADG509A are CMOS monolithic analog
multiplexers with eight channels and dual four channels, respec-
tively. The ADG508A switches one of eight inputs to a common
output, depending on the state of three binary addresses and an
enable input. The ADG509A switches one of four differential
inputs to a common differential output, depending on the state
of two binary addresses and an enable input. Both devices have
TTL and 5 V CMOS logic-compatible digital inputs.
range of VSS to VDD
.
3. Break-Before-Make Switching. Switches are guaranteed
break-before-make so that input signals are protected
against momentary shorting.
The ADG508A and ADG509A are designed on an enhanced
LC2MOS process that gives an increased signal capability of VSS
to VDD and enables operation over a wide range of supply voltages.
The devices can comfortably operate anywhere in the 10.8 V to
16.5 V single- or dual-supply range. These multiplexers also
4. Low Leakage. Leakage currents in the range of 20 pA make
these multiplexers suitable for high precision circuits.
feature high switching speeds and low RON
.
Rev. D
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights ofthird parties that may result fromits use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registeredtrademarks arethe property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
www.analog.com
©2009 Analog Devices, Inc. All rights reserved.
ADG508A/ADG509A
TABLE OF CONTENTS
Features .............................................................................................. 1
Absolute Maximum Ratings ............................................................7
ESD Caution...................................................................................7
Pin Configurations and Function Descriptions............................8
Typical Performance Characteristics ........................................... 10
Test Circuits..................................................................................... 11
Single-Supply Octal DAC Application ........................................ 13
Outline Dimensions....................................................................... 14
Ordering Guide .......................................................................... 16
Functional Block Diagrams............................................................. 1
General Description......................................................................... 1
Product Highlights ........................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Dual Supply ................................................................................... 3
Single Supply ................................................................................. 5
REVISION HISTORY
7/09—Rev. C to Rev. D
Changes to Table 4............................................................................ 8
3/07—Rev. B to Rev. C
Updated Format..................................................................Universal
Changes to Table 3............................................................................ 6
Inserted Table 4................................................................................. 7
Inserted Table 6................................................................................. 8
Changes to Figure 24...................................................................... 12
Updated Outline Dimensions....................................................... 13
Changes to Ordering Guide .......................................................... 15
Rev. D | Page 2 of 16
ADG508A/ADG509A
SPECIFICATIONS
DUAL SUPPLY
VDD = 10.8 V to 16.5 V, VSS = −10.8 V to −16.5 V, unless otherwise noted.
Table 1.
ADG508A/
ADG509A
K Version
ADG508A/
ADG509A
B Version
ADG508A/
ADG509A
T Version
−40°C to
+25°C +85°
−40°C to
+25°C +85°C
−55°C to
+25°C +125°C
Parameter
Unit
Comments
ANALOG SWITCH
Analog Signal Range
VSS
VDD
280
VSS
VDD
VSS
VDD
280
VSS
VDD
VSS
VDD
280
VSS
VDD
V min
V max
Ω typ
RON
−10 V ≤ VS ≤ +10 V, IDS = 1 mA;
see Figure 14
450
300
600
400
450
300
600
400
450
600
400
Ω max
Ω max
VDD = 15 V ( 10%),
VSS = −15 V ( 10%)
VDD = 15 V ( 5%),
VSS = −15 V ( 5%)
300
Ω max
RON Drift
RON Match
0.6
5
0.6
5
0.6
5
%/°C typ VS = 0, IDS = 1 mA
% typ
−10 V ≤ VS ≤ +10 V, IDS = 1 mA
IS (Off), Off Input Leakage
0.02
0.02
0.02
nA typ
V1 = 10 V, V2 = m 10 V;
see Figure 15
1
0.04
50
1
0.04
50
1
0.04
50
nA max
nA typ
ID (Off), Off Output Leakage
V1 = 10 V, V2 = m 10 V;
see Figure 16
ADG508A
ADG509A
ID (On), On Channel Leakage 0.04
ADG508A
ADG509A
IDIFF, Differential Off Output
Leakage (ADG509A Only)
1
1
100
50
1
1
0.04
1
1
100
50
1
1
0.04
1
1
100
50
nA max
nA max
nA typ
nA max
nA max
nA max
V1 = V2 = 10 V; see Figure 17
1
1
100
50
25
100
50
25
100
50
25
V1 = 10 V, V2 = m 10 V;
see Figure 18
DIGITAL CONTROL
VINH, Input High Voltage
VINL, Input Low Voltage
IINL or IINH
2.4
0.8
1
2.4
0.8
1
2.4
0.8
1
V min
V max
μA max
pF max
VIN = 0 to VDD
CIN Digital Input Capacitance
DYNAMIC CHARACTERISTICS
8
8
8
1
tTRANSITION
200
200
200
ns typ
V1 = 10 V, V2 = m 10 V;
see Figure 19
300
50
25
200
300
200
300
68
400
10
300
50
25
200
300
200
300
68
400
10
300
50
25
200
300
200
300
68
400
10
ns max
ns typ
ns min
ns typ
ns max
ns typ
ns max
dB typ
1
tOPEN
See Figure 20
See Figure 21
See Figure 21
tON (EN)1
400
400
400
400
400
400
tOFF (EN)1
OffF Isolation
VEN = 0.8 V, RL = 1 kΩ, CL = 15 pF,
VS = 7 V rms, f = 100 kHz
50
50
50
dB min
Rev. D | Page 3 of 16
ADG508A/ADG509A
ADG508A/
ADG509A
K Version
ADG508A/
ADG509A
B Version
ADG508A/
ADG509A
T Version
−40°C to
+25°C +85°
−40°C to
+25°C +85°C
−55°C to
+25°C +125°C
Parameter
CS (Off)
Unit
Comments
5
5
5
pF typ
VEN = 0.8 V
CD (Off)
ADG508A
ADG509A
QINJ, Charge Injection
POWER SUPPLY
IDD
22
11
4
22
11
4
22
11
4
pF typ
pF typ
pC typ
VEN = 0.8 V
RS = 0 Ω, VS = 0; see Figure 22
VIN = VINL or VINH
0.6
1.5
20
0.6
1.5
20
0.6
1.5
20
mA typ
mA max
μA typ
ISS
VIN = VINL or VINH
0.2
10
0.2
10
0.2
10
mA max
mW typ
mW max
Power Dissipation
28
28
28
1 Sample tested at 25°C to ensure compliance.
Rev. D | Page 4 of 16
ADG508A/ADG509A
SINGLE SUPPLY
VDD = 10.8 V to 16.5 V, VSS = GND = 0 V, unless otherwise noted.
Table 2.
ADG508A/
ADG509A
K Version
ADG508A/
ADG509A
B Version
ADG508A/
ADG509A
T Version
−40°C to
+25°C +85°C
−40°C to
+25°C +85°C
−55°C to
+25°C +125°C
Parameter
Unit
Comments
ANALOG SWITCH
Analog Signal Range
GND
VDD
500
GND
VDD
GND
VDD
500
GND
VDD
GND
VDD
500
GND
VDD
V min
V max
Ω typ
RON
GND ≤ VS ≤ 10 V, IDS = 0.5 mA;
see Figure 14
700
0.6
5
1000
700
0.6
5
1000
700
0.6
5
1000
Ω max
RON Drift
RON Match
%/°C typ VS = 0, IDS = 0.5 mA
% typ
GND ≤VS ≤ 10 V, IDS = 0.5 mA
IS (Off), Off Input Leakage
0.02
0.02
0.02
nA typ
V1 = 10 V/GND, V2 = GND/10 V;
see Figure 15
1
0.04
50
1
0.04
50
1
0.04
50
nA max
nA typ
ID (Off), Off Output Leakage
V1 = 10 V/GND, V2 = GND/10 V;
see Figure 16
ADG508A
ADG509A
ID (On), On Channel Leakage
1
1
0.04
100
50
1
1
0.04
100
50
1
1
0.04
100
50
nA max
nA max
nA typ
V1 = V2 = 10 V/GND;
see Figure 17
ADG508A
ADG509A
IDIFF, Differential Off Output
Leakage (ADG509A Only)
1
1
100
50
25
1
1
100
50
25
1
1
100
50
25
nA max
nA max
nA max
V1 = 10 V/GND, V2 = GND/10 V;
see Figure 18
DIGITAL CONTROL
VINH, Input High Voltage
VINL, Input Low Voltage
IINL or IINH
2.4
0.8
1
2.4
0.8
1
2.4
0.8
1
V min
V max
μA max
pF max
VIN = 0 to VDD
CIN Digital Input Capacitance
DYNAMIC CHARACTERISTICS
8
8
8
1
tTRANSITION
300
300
300
ns typ
V1 = 10 V/GND, V2 = GND/10 V;
see Figure 19
450
50
25
250
450
250
450
68
600
10
450
50
25
250
450
250
450
68
600
10
450
50
25
250
450
250
450
68
600
10
ns max
ns typ
ns min
ns typ
ns max
ns typ
ns max
dB typ
1
tOPEN
See Figure 20
See Figure 21
See Figure 21
tON (EN)1
600
600
600
600
600
600
tOFF (EN)1
Off Isolation
VEN = 0.8 V, RL = 1kΩ, CL = 15 pF,
VS = 3.5 V rms, f = 100 kHz
50
5
50
5
50
5
dB min
pF typ
CS (Off)
VEN = 0.8 V
CD (Off)
ADG508A
ADG509A
QINJ, Charge Injection
22
11
4
22
11
4
22
11
4
pF typ
pF typ
pC typ
VEN = 0.8 V
RS = 0 Ω, VS = 0 V; see Figure 22
Rev. D | Page 5 of 16
ADG508A/ADG509A
ADG508A/
ADG509A
K Version
ADG508A/
ADG509A
B Version
ADG508A/
ADG509A
T Version
−40°C to
+25°C +85°C
−40°C to
+25°C +85°C
−55°C to
+25°C +125°C
Parameter
POWER SUPPLY
IDD
Unit
Comments
0.6
1.5
10
0.6
1.5
10
0.6
1.5
10
mA typ
VIN = VINL or VINH
mA max
mW typ
mW max
Power Dissipation
25
25
25
1 Sample tested at 25°C to ensure compliance.
Rev. D | Page 6 of 16
ADG508A/ADG509A
ABSOLUTE MAXIMUM RATINGS
TA = 25°C, unless otherwise noted.
Table 3.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Parameter
Ratings
VDD to VSS
44 V
VDD to GND
VSS to GND
32 V
–32 V
Analog Inputs1
Voltage at S, D
VSS − 2 V to VDD + 2 V or 20 mA,
whichever occurs first
Continuous Current, S or D
Pulsed Current S or D
1 ms Duration, 10% Duty Cycle
Digital Inputs1
20 mA
ESD CAUTION
40 mA
Voltage at A, EN
VSS − 4 V to VDD + 4 V or 20 mA,
whichever occurs first
Power Dissipation (Any Package)
Up to 75°C
Derates Above 75°C by
Operating Temperature
Commercial (K Version)
Industrial (B Version)
470 mW
6 mW/°C
−40°C to +85°C
−40°C to +85°C
−55°C to +125°C
−65°C to +150°C
Extended (T Version)
Storage Temperature Range
1Overvoltage at A, EN, S, or D is clamped by diodes. Current should be limited
to the maximum rating shown in Table 3.
Rev. D | Page 7 of 16
ADG508A/ADG509A
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
3
2
1
20 19
3
2
1
20 19
A0
EN
1
2
3
4
5
6
7
8
16 A1
PIN 1
4
5
6
7
8
18
17
16
V
GND
4
5
6
7
8
18
17
16
15
14
V
GND
SS
SS
IDENTIFIER
15 A2
S1
NC
S2
S3
V
S1
NC
S2
S3
V
DD
DD
V
14 GND
SS
ADG508A
ADG508A
ADG508A
TOP VIEW
(Not to Scale)
NC
S5
S6
NC
TOP VIEW
TOP VIEW
S1
13
V
DD
(Not to Scale)
(Not to Scale)
15 S5
14
S2
S3
S4
D
12 S5
11 S6
10 S7
S6
9
11 12 13
10
9
10 11 12 13
NC = NO CONNECT
NC = NO CONNECT
9
S8
Figure 3. ADG508A DIP, SOIC
Figure 4. ADG508A LCC
Figure 5. ADG508A PLCC
Table 4. ADG508A Pin Function Description
Pin Number
DIP/SOIC
PLCC/LCC
Mnemonic
Description
Logic Control Input.
1
2
2
3
A0
EN
Active High Digital Input. When low, the device is disabled and all switches are off.
When high, Ax logic inputs determine on switches.
3
4
VSS
Most Negative Power Supply Potential in Dual Supplies. In single-supply applications,
it can be connected to ground.
4
5
6
7
8
9
10
11
12
13
14
15
16
N/A
N/A
N/A
N/A
5
7
8
9
S1
S2
S3
S4
D
S8
S7
S6
Source Terminal 1. Can be an input or an output.
Source Terminal 2. Can be an input or an output.
Source Terminal 3. Can be an input or an output.
Source Terminal 4. Can be an input or an output.
Drain Terminal. Can be an input or an output.
Source Terminal 8. Can be an input or an output.
Source Terminal 7. Can be an input or an output.
Source Terminal 6. Can be an input or an output.
Source Terminal 5. Can be an input or an output.
Most Positive Power Supply Potential.
Ground (0 V) Reference.
Logic Control Input.
Logic Control Input.
No Connect.
No Connect.
No Connect.
No Connect.
10
12
13
14
15
17
18
19
20
1
S5
VDD
GND
A2
A1
NC
NC
NC
NC
6
11
16
Table 5. ADG508A Truth Table
A2
X1
0
0
0
0
1
1
1
A1
X1
0
0
1
1
0
0
1
A0
X1
0
1
0
1
0
1
0
EN
0
1
1
1
1
1
1
1
On Switch
None
1
2
3
4
5
6
7
8
1
1
1
1
1 X = don’t care.
Rev. D | Page 8 of 16
ADG508A/ADG509A
3
2
1
20 19
PIN 1
4
5
6
7
8
18
17
16
A0
EN
1
2
3
4
5
6
7
8
V
V
DD
16 A1
SS
IDENTIFIER
15 GND
S1A
NC
S1B
NC
ADG509A
TOP VIEW
(Not to Scale)
V
14
V
DD
SS
ADG509A
TOP VIEW
S1A
13 S1B
12 S2B
11 S3B
10 S4B
S2A
S3A
15 S2B
14
(Not to Scale)
S2A
S3A
S4A
DA
S3B
9
11 12 13
10
NC = NO CONNECT
9
DB
Figure 6. ADG509A DIP, SOIC
Figure 7. ADG509A PLCC
Table 6. ADG509A Pin Function Description
Pin Number
DIP/SOIC PLCC/LCC
Mnemonic Description
1
2
2
3
A0
EN
Logic Control Input.
Active High Digital Input. When low, the device is disabled and all switches are off.
When high, Ax logic inputs determine on switches.
3
4
VSS
Most Negative Power Supply Potential in Dual Supplies. In single-supply applications,
it can be connected to ground.
4
5
6
7
8
9
10
11
12
13
14
15
16
N/A
N/A
N/A
N/A
5
7
8
9
S1A
S2A
S3A
S4A
DA
Source Terminal 1A. Can be an input or an output.
Source Terminal 2A. Can be an input or an output.
Source Terminal 3A. Can be an input or an output.
Source Terminal 4A. Can be an input or an output.
Drain Terminal A. Can be an input or an output.
Drain Terminal B. Can be an input or an output.
Source Terminal 4B. Can be an input or an output.
Source Terminal 3B. Can be an input or an output.
Source Terminal 2B. Can be an input or an output.
Source Terminal 1B. Can be an input or an output.
Most Positive Power Supply Potential.
Ground (0 V) Reference.
10
12
13
14
15
17
18
19
20
1
DB
S4B
S3B
S2B
S1B
VDD
GND
A1
NC
NC
NC
NC
Logic Control Input.
No Connect.
No Connect.
No Connect.
6
11
16
No Connect.
Table 7. ADG509A Truth Table
A1
X1
0
0
1
A0
X1
0
1
0
EN
0
1
1
1
On Switch Pair
None
1
2
3
4
1
1
1
1 X = don’t care.
Rev. D | Page 9 of 16
ADG508A/ADG509A
TYPICAL PERFORMANCE CHARACTERISTICS
The multiplexers are guaranteed functional with reduced single or dual supplies down to 4.5 V.
700
600
500
400
300
200
700
600
500
400
300
200
V
V
= +5V
= –5V
DD
SS
V
V
= 10.8V
= 0V
DD
SS
V
V
= +10.8V
= –10.8V
DD
SS
V
V
= 15V
= 0V
DD
SS
V
V
= +15V
= –15V
DD
SS
100
0
100
0
–20
–15
–10
–5
0
5
10
15
20
–20
–15
–10
–5
0
5
10
15
20
V
[V ] (V)
V [V ] (V)
D S
D
S
Figure 8. RON as a Function of VD (VS): Dual-Supply Voltage, TA = 25°C
Figure 11. RON as a Function of VD (VS) Single-Supply Voltage, TA = 25°C
1.9
100
V
V
= +16.5V
= –16.5V
DD
SS
10
1
1.8
1.7
I
I
(ON)
(OFF)
D
D
I
(OFF)
S
1.6
1.5
0.1
35
45
75
TEMPERATURE (°C)
125
25
55
65
85
95 105 115
5
6
7
8
9
10
11
12
13
14
15
SUPPLY VOLTAGE (V)
Figure 9. Leakage Current as a Function of Temperature
(Note: Leakage Currents Reduce as the Supply Voltages Reduce)
Figure 12. Trigger Levels vs. Power Supply Voltage, Dual or Single Supply,
TA = 25°C
800
1.0
0.8
0.6
0.4
0.2
0
700
600
500
SINGLE
SUPPLY
400
300
200
100
DUAL
SUPPLY
5
6
7
8
9
10
11
12
13
14
15
5
6
7
8
9
10 11 12 13 14 15 16 17
SUPPLY VOLTAGE (V)
SUPPLY VOLTAGE (V)
Figure 13. IDD vs. Supply Voltage: Dual or Single Supply, TA = 25°C
Figure 10. tTRANSITION vs. Supply Voltage: Dual and Single Supplies, TA = 25°C
(Note: For VDD and lVSSl < 10 V; V1 = VDD/VSS, V2 = VSS/VDD. (see Figure 19))
Rev. D | Page 10 of 16
ADG508A/ADG509A
TEST CIRCUITS
Note: All digital input signal rise and fall times measured from 10% to 90% of 3 V. tR = tF = 20 ns.
I
DS
V
V
V
V
DD
DD
SS
V
V
V
DD
DD
SS
SS
V1
SS
V
I
(OFF)
V1
S
D
D
I
(OFF)
A
D
S
D
0.8V
A
EN
0.8V
GND
EN
V1
V
S
GND
V2
V2
R
= V1/I
ON
DS
Figure 16. ID (Off)
Figure 14. RON
Figure 15. IS (Off)
V
V
V
V
DD
DD
SS
SS
0.8V
EN
V
V
V
DD
DD
SS
SS
DA
A
A
V
ADG509A
D
DB
A
2.4V
EN
GND
V2
V1
V1
V2
I (ON)
D
GND
Figure 17. ID (On)
Figure 18. IDIFF = IDB (Off)
V
V
V
DD
DD
SS
SS
V
ADDRESS
3V
0V
DRIVE (V
)
IN
50%
A2
A1
A0
S1
V1
V
IN
50Ω
S2–S7
90%
S8
V2
ADG508A1
OUTPUT
OUTPUT
90%
D
2.4V
EN
1MΩ
GND
35pF
tTRANSITION
tTRANSITION
1
SIMILAR CONNECTION FOR ADG509A.
Figure 19. Switching Time of Multiplexer, tTRANSITION
Rev. D | Page 11 of 16
ADG508A/ADG509A
V
V
V
V
DD
SS
SS
DD
3V
0V
ADDRESS
DRIVE (V
A2
A1
A0
)
IN
S1
5V
V
IN
50Ω
S2–S7
S8
50%
ADG508A1
OUTPUT
OUTPUT
D
2.4V
EN
tOPEN
1kΩ
GND
35pF
1
SIMILAR CONNECTION FOR ADG509A.
Figure 20. Break-Before-Make Delay, tOPEN
V
V
DD
SS
SS
V
V
DD
3V
0V
A2
A1
A0
ENABLE
DRIVE (V
S1
S2–S8
5V
)
IN
50%
90%
OUTPUT
10%
ADG508A1
OUTPUT
D
EN
tON
(EN)
tOFF
(EN)
V
35pF
IN
50Ω
1kΩ
GND
1
SIMILAR CONNECTION FOR ADG509A.
Figure 21. Enable Delay, tON (EN), tOFF (EN)
V
V
V
DD
DD
SS
SS
V
A0
A1
A2
3V
V
IN
0V
ADG508A1
ΔV
V
O
O
R
S
S1
D
Q
= CL × ΔV
O
INJ
V
EN
O
CL
1nF
V
S
GND
V
IN
50Ω
1
SIMILAR CONNECTION FOR ADG509A.
Figure 22. Charge Injection
Rev. D | Page 12 of 16
ADG508A/ADG509A
SINGLE-SUPPLY OCTAL DAC APPLICATION
The following circuit shows the ADG508A connected as a demulti-
plexer to provide eight separate, digitally programmable voltages
(0 V to 10 V) from the AD7245A. The AD7245A is a complete
12-bit, voltage output DAC with output amplifier and Zener
voltage reference on a monolithic CMOS chip.
The entire system operates from a single 15 V power supply.
The ADG508A is ideally suited for the application because it
has both low charge injection and IS (OFF) leakage current.
15V
15V
15V
EN
V
DD
V
DD
DB11
DB0
R
FB
V
OUT1
S1
V
D
OUT
1/4 TLC274
0.01µF
AD7245A
ADG508A
CS
R
OFS
WR
V
GND
SS
15V
LDAC
CLR
V
DGND
AGND
SS
V
OUT8
S8
REF OUT
1/4 TLC274
0.01µF
A0 A1 A2
10Ω
+
0.1µF
10µF
Figure 23. ADG508A in a Single-Supply Octal DAC Circuit
Rev. D | Page 13 of 16
ADG508A/ADG509A
OUTLINE DIMENSIONS
0.800 (20.32)
0.790 (20.07)
0.780 (19.81)
16
1
9
8
0.280 (7.11)
0.250 (6.35)
0.240 (6.10)
0.325 (8.26)
0.310 (7.87)
0.300 (7.62)
0.100 (2.54)
BSC
0.060 (1.52)
MAX
0.195 (4.95)
0.130 (3.30)
0.115 (2.92)
0.210 (5.33)
MAX
0.015
(0.38)
MIN
0.150 (3.81)
0.130 (3.30)
0.115 (2.92)
0.015 (0.38)
GAUGE
0.014 (0.36)
0.010 (0.25)
0.008 (0.20)
PLANE
SEATING
PLANE
0.022 (0.56)
0.018 (0.46)
0.014 (0.36)
0.430 (10.92)
MAX
0.005 (0.13)
MIN
0.070 (1.78)
0.060 (1.52)
0.045 (1.14)
COMPLIANT TO JEDEC STANDARDS MS-001-AB
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
CORNER LEADS MAY BE CONFIGURED AS WHOLE OR HALF LEADS.
Figure 24. 16-Lead Plastic Dual In-Line Package [PDIP]
Narrow Body (N-16)
Dimensions shown in inches and (millimeters)
0.098 (2.49) MAX
9
0.005 (0.13) MIN
16
0.310 (7.87)
0.220 (5.59)
1
8
PIN 1
0.100 (2.54) BSC
0.320 (8.13)
0.290 (7.37)
0.840 (21.34) MAX
0.060 (1.52)
0.015 (0.38)
0.200 (5.08)
MAX
0.150
(3.81)
MIN
0.200 (5.08)
0.125 (3.18)
0.015 (0.38)
0.008 (0.20)
SEATING
PLANE
15°
0°
0.070 (1.78)
0.030 (0.76)
0.023 (0.58)
0.014 (0.36)
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
Figure 25. 16-Lead Ceramic Dual In-Line Package [CERDIP]
(Q-16)
Dimensions shown in inches and (millimeters)
Rev. D | Page 14 of 16
ADG508A/ADG509A
10.00 (0.3937)
9.80 (0.3858)
9
8
16
1
6.20 (0.2441)
5.80 (0.2283)
4.00 (0.1575)
3.80 (0.1496)
1.27 (0.0500)
BSC
0.50 (0.0197)
0.25 (0.0098)
45°
1.75 (0.0689)
1.35 (0.0531)
0.25 (0.0098)
0.10 (0.0039)
8°
0°
COPLANARITY
0.10
SEATING
PLANE
1.27 (0.0500)
0.40 (0.0157)
0.51 (0.0201)
0.31 (0.0122)
0.25 (0.0098)
0.17 (0.0067)
COMPLIANT TO JEDEC STANDARDS MS-012-AC
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
Figure 26. 16-Lead Standard Small Outline Package [SOIC_N]
Narrow Body (R-16)
Dimensions shown in millimeters and (inches)
0.180 (4.57)
0.048 (1.22 )
0.165 (4.19)
0.042 (1.07)
0.056 (1.42)
0.042 (1.07)
0.20 (0.51)
MIN
0.020 (0.50)
R
3
4
19
0.021 (0.53)
0.013 (0.33)
0.048 (1.22)
0.042 (1.07)
18
14
PIN 1
0.050
(1.27)
BSC
IDENTIFIER
BOTTOM
VIEW
(PINS UP)
0.330 (8.38)
0.290 (7.37)
TOP VIEW
(PINS DOWN)
0.032 (0.81)
0.026 (0.66)
8
9
13
0.020
(0.51)
R
0.045 (1.14)
0.025 (0.64)
R
0.356 (9.04)
0.350 (8.89)
SQ
0.120 (3.04)
0.090 (2.29)
0.395 (10.03)
0.385 (9.78)
SQ
COMPLIANT TO JEDEC STANDARDS MO-047-AA
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
Figure 27. 20-Lead Plastic Leaded Chip Carrier [PLCC]
(P-20)
Dimensions shown in inches and (millimeters)
0.200 (5.08)
0.075 (1.91)
REF
REF
0.100 (2.54)
0.064 (1.63)
0.100 (2.54) REF
0.095 (2.41)
0.015 (0.38)
MIN
0.075 (1.90)
3
19
18
20
4
8
0.028 (0.71)
0.022 (0.56)
1
0.358 (9.09)
0.342 (8.69)
SQ
0.358
(9.09)
MAX
SQ
0.011 (0.28)
0.007 (0.18)
R TYP
BOTTOM
VIEW
0.050 (1.27)
BSC
14
0.075 (1.91)
13
9
REF
45° TYP
0.088 (2.24)
0.054 (1.37)
0.055 (1.40)
0.045 (1.14)
0.150 (3.81)
BSC
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
Figure 28. 20-Terminal Ceramic Leadless Chip Carrier [LCC]
(E-20-1)
Dimensions shown in inches and (millimeters)
Rev. D | Page 15 of 16
ADG508A/ADG509A
ORDERING GUIDE
Model
ADG508AKN
ADG508AKNZ1
Temperature Range
Package Description
Package Option
N-16
N-16
R-16
R-16
R-16
R-16
R-16
R-16
P-20
P-20
P-20
P-20
Q-16
Q-16
E-20-1
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−55°C to +125°C
−55°C to +125°C
16-Lead Plastic Dual In-Line Package [PDIP]
16-Lead Plastic Dual In-Line Package [PDIP]
16-Lead Standard Small Outline Package [SOIC_N]
16-Lead Standard Small Outline Package [SOIC_N]
16-Lead Standard Small Outline Package [SOIC_N]
16-Lead Standard Small Outline Package [SOIC_N]
16-Lead Standard Small Outline Package [SOIC_N]
16-Lead Standard Small Outline Package [SOIC_N]
20-Lead Plastic Leaded Chip Carrier [PLCC]
20-Lead Plastic Leaded Chip Carrier [PLCC]
20-Lead Plastic Leaded Chip Carrier [PLCC]
20-Lead Plastic Leaded Chip Carrier [PLCC]
16-Lead Ceramic Dual In-Line Package [CERDIP]
16-Lead Ceramic Dual In-Line Package [CERDIP]
20-Terminal Ceramic Leadless Chip Carrier [LCC]
DIE
ADG508AKR
ADG508AKR-REEL
ADG508AKR-REEL7
ADG508AKRZ1
ADG508AKRZ-REEL1
ADG508AKRZ-REEL71
ADG508AKP
ADG508AKP-REEL
ADG508AKPZ1
ADG508AKPZ-REEL1
ADG508ABQ
ADG508ATQ
ADG508ATE
ADG508ABCHIPS
ADG508ATCHIPS
ADG509AKN
DIE
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−55°C to +125°C
−55°C to +125°C
16-Lead Plastic Dual In-Line Package [PDIP]
16-Lead Plastic Dual In-Line Package [PDIP]
16-Lead Standard Small Outline Package [SOIC_N]
16-Lead Standard Small Outline Package [SOIC_N]
16-Lead Standard Small Outline Package [SOIC_N]
16-Lead Standard Small Outline Package [SOIC_N]
16-Lead Standard Small Outline Package [SOIC_N]
20-Lead Plastic Leaded Chip Carrier [PLCC]
20-Lead Plastic Leaded Chip Carrier [PLCC]
20-Lead Plastic Leaded Chip Carrier [PLCC]
20-Lead Plastic Leaded Chip Carrier [PLCC]
16-Lead Ceramic Dual In-Line Package [CERDIP]
16-Lead Ceramic Dual In-Line Package [CERDIP]
16-Lead Ceramic Dual In-Line Package [CERDIP]
DIE
N-16
N-16
R-16
R-16
R-16
R-16
R-16
P-20
P-20
P-20
P-20
Q-16
Q-16
Q-16
ADG509AKNZ1
ADG509AKR
ADG509AKR-REEL
ADG509AKR-REEL7
ADG509AKRZ-REEL1
ADG509AKRZ-REEL71
ADG509AKP
ADG509AKP-REEL
ADG509AKPZ1
ADG509AKPZ-REEL1
ADG509ABQ
ADG509ATQ
ADG509ATQ/883B
ADG509ABCHIPS
ADG509ATCHIPS
DIE
1 Z = RoHS Compliant Part.
©2009 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D00051-0-7/09(D)
Rev. D | Page 16 of 16
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