ADG749BKSZ-REEL7 [ADI]
CMOS 1.8 V to 5.5 V, 2.5 ohm 2:1 Mux/SPDT Switch in SC70 Package; CMOS 1.8 V至5.5 V ， 2.5欧姆2 ： 1多路复用器，SC70封装/ SPDT开关
| 型号： | ADG749BKSZ-REEL7 |
| 厂家： | 
ADI |
| 描述： | CMOS 1.8 V to 5.5 V, 2.5 ohm 2:1 Mux/SPDT Switch in SC70 Package |
| 文件： | 总12页 (文件大小：299K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
CMOS 1.8 V to 5.5 V, 2.5 Ω
2:1 Mux/SPDT Switch in SC70 Package
Data Sheet
ADG749
FEATURES
FUNCTIONAL BLOCK DIAGRAM
1.8 V to 5.5 V single supply
5 Ω (maximum) on resistance
0.75 Ω (typical) on resistance flatness
Automotive temperature range: −40°C to +125°C
–3 dB bandwidth > 200 MHz
Rail-to-rail operation
ADG749
S2
D
S1
IN
6-lead SC70 package
Fast switching times
SWITCH SHOWN FOR
A LOGIC 1 INPUT
tON = 12 ns
Figure 1.
tOFF = 6 ns
Typical power consumption (< 0.01 μW)
TTL/CMOS compatible
APPLICATIONS
Battery-powered systems
Communication systems
Sample-and-hold systems
Audio signal routing
Video switching
Mechanical reed relay replacement
GENERAL DESCRIPTION
The ADG749 is a monolithic CMOS SPDT switch. This switch
is designed on a submicron process that provides low power
dissipation yet gives high switching speed, low on resistance,
and low leakage currents.
PRODUCT HIGHLIGHTS
1. 1.8 V to 5.5 V Single-Supply Operation. The ADG749
offers high performance, including low on resistance and
fast switching times, and is fully specified and guaranteed
with 3 V and 5 V supply rails.
The ADG749 can operate from a single-supply range of 1.8 V to
5.5 V, making it ideal for use in battery-powered instruments
and with the new generation of DACs and ADCs from Analog
Devices, Inc.
2. Very Low RON (5 Ω Maximum at 5 V and 10 Ω Maximum
at 3 V). At 1.8 V operation, RON is typically 40 Ω over the
temperature range.
Each switch of the ADG749 conducts equally well in both
directions when on. The ADG749 exhibits break-before-make
switching action.
3. Automotive Temperature Range: −40°C to +125°C.
4. On Resistance Flatness (RFLAT(ON)) (0.75 Ω typical).
5. −3 dB Bandwidth > 200 MHz.
Because of the advanced submicron process, −3 dB bandwidths
of greater than 200 MHz can be achieved.
6. Low Power Dissipation. CMOS construction ensures low
power dissipation.
The ADG749 is available in a 6-lead SC70 package.
7. Fast tON/tOFF
.
8. Tiny, 6-lead SC70 Package.
Rev. C
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registeredtrademarks arethe property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113 ©2001–2011 Analog Devices, Inc. All rights reserved.
ADG749
Data Sheet
TABLE OF CONTENTS
Features .............................................................................................. 1
Terminology.......................................................................................7
Typical Performance Characteristics ..............................................8
Test Circuits..................................................................................... 10
Applications Information.............................................................. 11
ADG749 Supply Voltages.......................................................... 11
On Response vs. Frequency ...................................................... 11
Off Isolation ................................................................................ 11
Outline Dimensions....................................................................... 12
Ordering Guide .......................................................................... 12
Applications....................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description......................................................................... 1
Product Highlights ........................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Absolute Maximum Ratings............................................................ 5
ESD Caution.................................................................................. 5
Pin Configuration and Function Descriptions............................. 6
REVISION HISTORY
12/11—Rev. B to Rev. C
Deleted Endnote 1 from Leakage Currents Parameter, Table 1 . 3
Deleted Endnote 1 from Leakage Currents Parameter, Table 2 . 4
10/09—Rev. A to Rev. B
Updated Format..................................................................Universal
Added Pb-Free Information to Table 3.......................................... 5
Added Table 4.................................................................................... 6
Updated Outline Dimensions ....................................................... 12
Changes to Ordering Guide .......................................................... 12
7/02—Rev. 0 to Rev. A.
Changes to Features.......................................................................... 1
Additions to Product Highlights .................................................... 1
Changes to Specifications................................................................ 2
Edits to Absolute Maximum Ratings ............................................. 4
Changes to Terminology.................................................................. 4
Edits to Ordering Guide .................................................................. 4
Added new TPCs 4 and 5 ................................................................ 5
Added TPC 10................................................................................... 6
Test Circuits 6, 7, and 8 replaced.................................................... 7
Updated KS-6 Package Drawing..................................................... 9
1/01—Revision 0: Initial Version
Rev. C | Page 2 of 12
Data Sheet
ADG749
SPECIFICATIONS
VDD = 5 V 10% and GND = 0 V; TA= −40°C to +125°C unless otherwise stated.
Table 1.
Parameter
25°C
−40°C to +85°C −40°C to +125°C Unit
Test Conditions/Comments
ANALOG SWITCH
Analog Signal Range
On Resistance (RON)
0 V to VDD
7
V
2.5
5
Ω typ
Ω max
VS = 0 V to VDD, IS = −10 mA;
see Figure 13
6
On Resistance Match Between
Channels (ΔRON)
0.1
0.8
Ω typ
Ω max
Ω typ
Ω max
VS = 0 V to VDD, IS = −10 mA
VS = 0 V to VDD, IS = −10 mA
0.8
1.5
On Resistance Flatness (RFLAT(ON)
)
0.75
1.2
LEAKAGE CURRENTS
VDD = 5.5 V
Source Off Leakage IS (Off)
0.01
0.25
0.01
0.25
nA typ
nA max
nA typ
nA max
VS = 4.5 V/1 V, VD = 1 V/4.5 V;
see Figure 14
VS = VD = 1 V or VS = VD = 4.5 V;
see Figure 15
0.35
0.35
1
5
Channel On Leakage ID, IS (On)
DIGITAL INPUTS
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current
2.4
0.8
V min
V max
IINL or IINH
0.005
μA typ
VIN = VINL or VINH
0.1
μA max
DYNAMIC CHARACTERISTICS1
tON
7
3
8
ns typ
ns max
ns typ
ns max
ns typ
ns min
dB typ
dB typ
dB typ
dB typ
RL = 300 Ω, CL = 35 pF
VS = 3 V; see Figure 16
RL = 300 Ω, CL = 35 pF
VS = 3 V; see Figure 16
RL = 300 Ω, CL = 35 pF,
VS1 = VS2 = 3 V; see Figure 17
RL = 50 Ω, CL = 5 pF, f = 10 MHz
RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 18
RL = 50 Ω, CL = 5 pF, f = 10 MHz
12
6
tOFF
Break-Before-Make Time Delay, tD
Off Isolation
1
−67
−87
−62
−82
200
7
Channel-to-Channel Crosstalk
RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 19
Bandwidth −3 dB
CS (Off)
MHz typ RL = 50 Ω, CL = 5 pF; see Figure 20
pF typ
CD, CS (On)
27
pF typ
POWER REQUIREMENTS
VDD = 5.5 V
Digital inputs = 0 V or 5.5 V
μA typ
IDD
0.001
1.0
μA max
1 Guaranteed by design, not subject to production test.
Rev. C | Page 3 of 12
ADG749
Data Sheet
VDD = 3 V 10% and GND = 0 V; TA= −40°C to +125°C unless otherwise stated
Table 2.
Parameter
25°C
−40°C to +85°C −40°C to +125°C Unit
Test Conditions/Comments
ANALOG SWITCH
Analog Signal Range
On Resistance (RON)
0 V to VDD
12
V
6
7
10
Ω typ
Ω max
VS = 0 V to VDD, IS = –10 mA;
see Figure 13
On Resistance Match Between
Channels (ΔRON)
0.1
0.8
2.5
Ω typ
Ω max
Ω typ
VS = 0 V to VDD, IS = –10 mA
0.8
On Resistance Flatness (RFLAT(ON)
)
VS = 0 V to VDD, IS = –10 mA
VDD = 3.3 V
LEAKAGE CURRENTS
Source Off Leakage IS (Off)
0.01
0.25
0.01
0.25
nA typ
nA max
nA typ
nA max
VS = 3 V/1 V, VD = 1 V/3 V;
see Figure 14
VS = VD = 1 V or VS = VD = 3 V;
see Figure 15
0.35
0.35
1
5
Channel On Leakage ID, IS (On)
DIGITAL INPUTS
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current
2.0
0.8
V min
V max
IINL or IINH
0.005
μA typ
VIN = VINL or VINH
0.1
μA max
DYNAMIC CHARACTERISTICS1
tON
10
4
ns typ
ns max
ns typ
ns max
ns typ
RL = 300 Ω, CL = 35 pF
VS = 2 V; see Figure 16
RL = 300 Ω, CL = 35 pF
VS = 2 V; see Figure 16
RL = 300 Ω, CL = 35 pF
15
8
tOFF
Break-Before-Make Time Delay,
tD
8
1
ns min
dB typ
dB typ
VS1 = VS2 = 2 V; see Figure 17
RL = 50 Ω, CL = 5 pF, f = 10 MHz
RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 18
Off Isolation
–67
–87
Channel-to-Channel Crosstalk
–62
–82
200
7
dB typ
dB typ
RL = 50 Ω, CL = 5 pF, f = 10 MHz
RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 19
Bandwidth −3 dB
CS (Off)
MHz typ RL = 50 Ω, CL = 5 pF; see Figure 20
pF typ
CD, CS (On)
27
pF typ
POWER REQUIREMENTS
VDD = 3.3 V
Digital inputs = 0 V or 3.3 V
μA typ
IDD
0.001
1.0
μA max
1 Guaranteed by design, not subject to production test.
Rev. C | Page 4 of 12
Data Sheet
ADG749
ABSOLUTE MAXIMUM RATINGS
TA = 25°C unless otherwise noted.
Table 3.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Parameter
Ratings
VDD to GND
Analog, Digital Input1
−0.3 V to +7 V
−0.3 V to VDD + 0.3 V or 30 mA,
whichever occurs first
Peak Current, S or D
100 mA (pulsed at 1 ms, 10%
duty cycle max)
Continuous Current, S or D
Operating Temperature Range
Industrial (B Version)
Storage Temperature Range
Junction Temperature
30 mA
Only one absolute maximum rating can be applied at any
one time.
−40°C to +125°C
−65°C to +150°C
150°C
ESD CAUTION
SC70 Package, Power
Dissipation
315 mW
θJA Thermal Impedance
θJC Thermal Impedance
Lead Temperature, Soldering
Vapor Phase (60 sec)
332°C/W
120°C/W
215°C
220°C
Infrared (15 sec)
Pb-free Reflow Soldering
Peak Temperature
260(+0/–5)°C
Time at Peak Temperature
10 sec to 40 sec
1 Overvoltage at IN, S or D will be clamped by internal diodes. Current should
be limited to the maximum ratings given.
Rev. C | Page 5 of 12
ADG749
Data Sheet
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
1
2
3
6
5
4
IN
S2
ADG749
TOP VIEW
(Not to Scale)
V
D
DD
GND
S1
Figure 2. Pin Configuration
Table 4. Pin Function Descriptions
Pin Number
Mnemonic
Description
1
2
3
4
5
6
IN
Digital control input pin.
Most positive power supply pin.
Ground (0 V) reference pin.
Source terminal of the multiplexer. Can be used as input or output.
Drain terminal of the multiplexer. Can be used as input or output.
Source terminal of the multiplexer. Can be used as input or output.
VDD
GND
S1
D
S2
Table 5. Truth Table
ADG749 IN
Switch S1
Switch S2
OFF
ON
0
1
ON
OFF
Rev. C | Page 6 of 12
Data Sheet
ADG749
TERMINOLOGY
tON
RON
Delay between applying the digital control input and the output
switching on.
Ohmic resistance between D and S.
ΔRON
tOFF
On resistance match between any two channels, such as: RON
max − RON min.
Delay between applying the digital control input and the output
switching off.
RFLAT(ON)
tD
Flatness is defined as the difference between the maximum and
minimum value of on resistance as measured over the specified
analog signal range.
Off time or on time measured between the 90% points of both
switches, when switching from one address state to another.
Crosstalk
IS (Off)
A measure of unwanted signal that is coupled through from one
channel to another as a result of parasitic capacitance.
Source leakage current with the switch off.
ID, IS (On)
Off Isolation
Channel leakage current with the switch on.
A measure of unwanted signal coupling through an off switch.
VD (VS)
Bandwidth
Analog voltage on Terminals D and S.
The frequency at which the output is attenuated by −3 dBs.
CS (Off)
Off switch source capacitance.
On Response
The frequency response of the on switch.
CD, CS (On)
On switch capacitance.
Insertion Loss
Loss due to on resistance of the switch.
Rev. C | Page 7 of 12
ADG749
Data Sheet
TYPICAL PERFORMANCE CHARACTERISTICS
6.0
0.15
0.10
0.05
0
T
= 25°C
A
V
= 2.7V
V
V
V
= 5V
= 4.5V/1V
= 1V, 4.5V
DD
DD
5.5
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
D
S
V
= 4.5V
DD
V
= 3.0V
DD
I
, I (ON)
S
D
V
= 5.0V
DD
I
(OFF)
50
S
–0.05
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
0
10
20
30
40
60
70
80
90
V
OR V , DRAIN OR SOURCE VOLTAGE (V)
TEMPERATURE (°C)
D
S
Figure 3. On Resistance vs. VD (VS) Single Supplies
Figure 6. Leakage Currents vs. Temperature
6.0
5.5
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
0.15
0.10
0.05
0
V
= 3V
DD
V
V
V
= 3V
= 3V/1V
= 1V, 3V
DD
D
S
+85°C
+25°C
–40°C
I
, I (ON)
S
D
I
(OFF)
70
S
–0.05
0
0.5
1.0
1.5
2.0
2.5
3.0
0
10
20
30
40
50
60
80
90
V
D
OR V , DRAIN OR SOURCE VOLTAGE (V)
TEMPERATURE (°C)
S
Figure 4. On Resistance vs. VD (VS) for Different Temperature, VDD = 3 V
Figure 7. Leakage Currents vs. Temperature
6.0
10m
1m
V
= 5V
V
= 5V
DD
DD
5.5
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
100µ
10µ
1µ
+85°C
+25°C
–40°C
100n
10n
1n
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
1
10
100
1k
10k
100k
1M
10M
100M
V
OR V , DRAIN OR SOURCE VOLTAGE (V)
S
FREQUENCY (Hz)
D
Figure 8. Supply Current vs. Input Switching Frequency
Figure 5. On Resistance vs. VD (VS) for Different Temperatures, VDD = 5 V
Rev. C | Page 8 of 12
Data Sheet
ADG749
–30
0
–2
–4
–6
V
DD
= 5V, 3V
V
= 5V
DD
–40
–50
–60
–70
–80
–90
–100
–110
–120
–130
10k
100k
1M
10M
100M
10k
100k
1M
10M
100M
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 9. Off Isolation vs. Frequency
Figure 11. On Response vs. Frequency
–30
–40
12
10
8
V
= 5V, 3V
DD
–50
V
= 5V
DD
–60
6
–70
V
= 3V
DD
–80
4
–90
2
–100
–110
–120
–130
0
–2
–4
10k
100k
1M
10M
100M
0
1
2
3
4
5
FREQUENCY (Hz)
V (V)
S
Figure 10. Crosstalk vs. Frequency
Figure 12. Charge Injection vs. Source Voltage
Rev. C | Page 9 of 12
ADG749
Data Sheet
TEST CIRCUITS
I
(OFF)
A
I
(OFF)
A
I
D
(ON)
A
I
S
D
DS
S
D
S
D
V
V
V
V
D
S
D
S
V1
S
D
V
S
R
= V1/I
DS
ON
Figure 14. Off Leakage
Figure 15. On Leakage
Figure 13. On Resistance
V
V
DD
0.1µF
DD
V
IN
50%
50%
V
OUT
S
D
90%
90%
V
OUT
R
C
L
L
V
S
300Ω
35pF
IN
tON
tOFF
GND
Figure 16. Switching Times
V
V
DD
DD
0.1µF
V
S1
IN
50%
50%
V
V
S1
S2
0V
0V
V
OUT
D2
50%
50%
S2
IN
V
OUT
R
C
L2
35pF
L2
300Ω
tD
tD
V
IN
GND
Figure 17. Break-Before-Make Time Delay, tD
V
V
V
V
DD
DD
DD
0.1µF
0.1µF
0.1µF
NETWORK
ANALYZER
NETWORK
ANALYZER
NETWORK
ANALYZER
V
V
50Ω
DD
DD
50Ω
DD
R
50Ω
S1
S2
S
D
L
V
S
D
OUT
50Ω
V
S
V
S
IN
IN
D
R
50Ω
50Ω
V
OUT
V
V
GND
IN
OUT
V
GND
IN
R
L
V
R
L
50Ω
S
IN
50Ω
GND
CHANNEL-TO-CHANNEL
OUT
V
V
OUT
V
WITH SWITCH
WITHOUT SWITCH
OFF ISOLATION = 20 log
V
OUT
INSERTION LOSS = 20 log
S
CROSSTALK = 20 log
V
V
OUT
S
Figure 18. Off Isolation
Figure 20. Bandwidth
Figure 19. Channel-to-Channel Crosstalk
Rev. C | Page 10 of 12
Data Sheet
ADG749
APPLICATIONS INFORMATION
The ADG749 belongs to Analog Devices’ new family of CMOS
switches. This series of general-purpose switches has improved
switching times, offering lower on resistance, higher band-
widths, low power consumption, and low leakage currents.
zero in the numerator of the transfer function A(s). Because the
switch on resistance is small, this zero usually occurs at high
frequencies. The bandwidth is a function of the switch output
capacitance combined with CDS and the load capacitance. The
frequency pole corresponding to these capacitances appears in
the denominator of A(s).
ADG749 SUPPLY VOLTAGES
Functionality of the ADG749 extends from 1.8 V to 5.5 V single
supply, which makes it ideal for battery-powered instruments,
where power efficiency and performance are important design
parameters.
The dominant effect of the output capacitance, CD, causes the
pole breakpoint frequency to occur first. Therefore, in order
to maximize bandwidth, a switch must have a low input and
output capacitance and low on resistance. The on response vs.
frequency plot for the ADG749 is shown in Figure 11.
It is important to note that the supply voltage affects the input
signal range, the on resistance, and the switching times of the
part. By taking a look at the typical performance characteristics
and the specifications, the effects of the power supplies can be
clearly seen.
OFF ISOLATION
Off isolation is a measure of the input signal coupled through
an off switch to the switch output. The capacitance, CDS, couples
the input signal to the output load when the switch is off, as
shown in Figure 22.
For VDD = 1.8 V operation, RON is typically 40 Ω over the
temperature range.
C
DS
ON RESPONSE VS. FREQUENCY
S
D
Figure 21 illustrates the parasitic components that affect the
ac performance of CMOS switches (the switch is shown
surrounded by a box). Additional external capacitances will
further degrade some performance. These capacitances affect
feedthrough, crosstalk, and system bandwidth.
V
OUT
C
C
R
D
LOAD
LOAD
V
IN
Figure 22. Off Isolation is Affected by External Load Resistance
and Capacitance
C
DS
The larger the value of CDS, the larger the values of feed-
through that will be produced. The typical performance
characteristic graph of Figure 9 illustrates the drop in off
isolation as a function of frequency. From dc to roughly
200 kHz, the switch shows better than −95 dB isolation. Up to
frequencies of 10 MHz, the off isolation remains better than
−67 dB. As the frequency increases, more and more of the input
signal is coupled through to the output. Off isolation can be
maximized by choosing a switch with the smallest CDS possible.
The values of load resistance and capacitance also affect off
isolation, since they contribute to the coefficients of the poles
and zeros in the transfer function of the switch when open.
S
D
V
OUT
R
ON
C
C
R
D
LOAD
LOAD
V
IN
Figure 21. Switch Represented by Equivalent Parasitic Components
The transfer function that describes the equivalent diagram of
the switch (Figure 21) is of the form A(s) shown below.
s
(
(
RON CDS
RT RON CDS
)
+ 1
+ 1
A(s) = R
T
s
)
where:
s
(
RLOAD CDS
)
RT = RLOAD/(RLOAD + RON)
CT = CLOAD + CD + CDS
A(s) =
s
(
RLOAD
)
(
CLOAD + CD + CDS +1
)
The signal transfer characteristic is dependent on the switch
channel capacitance, CDS. This capacitance creates a frequency
Rev. C | Page 11 of 12
ADG749
Data Sheet
OUTLINE DIMENSIONS
2.20
2.00
1.80
2.40
2.10
1.80
6
1
5
2
4
3
1.35
1.25
1.15
0.65 BSC
1.30 BSC
1.00
0.90
0.70
0.40
0.10
1.10
0.80
0.46
0.36
0.26
0.22
0.08
SEATING
PLANE
0.10 MAX
0.30
0.15
COPLANARITY
0.10
COMPLIANT TO JEDEC STANDARDS MO-203-AB
Figure 23. 6-Lead Thin Shrink Small Outline Transistor Package [SC70]
(KS-6)
Dimensions shown in millimeters
ORDERING GUIDE
Model1
Temperature range Package Description
Package Option Branding2
ADG749BKSZ-R2
ADG749BKSZ-REEL
ADG749BKSZ-REEL7 −40°C to +125°C
−40°C to +125°C
−40°C to +125°C
6-Lead Thin Shrink Small Outline Transistor Package [SC70] KS-6
6-Lead Thin Shrink Small Outline Transistor Package [SC70] KS-6
6-Lead Thin Shrink Small Outline Transistor Package [SC70] KS-6
S1M
S1M
S1M
1 Z= RoHS Compliant Part.
2 Branding on this package is limited to three characters due to space constraints.
©2001–2011 Analog Devices, Inc. All rights reserved. Trademarks and
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D02075-0-12/11(C)
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