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ADM1065ACP-REEL [ADI]

Super Sequencer-TM and Monitor; 超序-TM和显示器
ADM1065ACP-REEL
型号： ADM1065ACP-REEL
厂家： ADI    ADI
描述：

Super Sequencer-TM and Monitor
超序-TM和显示器

显示器
文件： 总28页 (文件大小：2478K)
中文：  中文翻译
下载：  下载PDF数据表文档文件
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REFIN  
REFOUT REFGND SDA SCL A1  
A0  
SMBus  
VREF  
INTERFACE  
ADM1065  
EEPROM  
CONFIGURABLE  
OUTPUT  
DRIVERS  
VX1  
VX2  
VX3  
VX4  
VX5  
PDO1  
PDO2  
PDO3  
PDO4  
PDO5  
PDO6  
DUAL-  
FUNCTION  
INPUTS  
(HV CAPABLE  
OF DRIVING  
GATES OF  
(LOGIC INPUTS  
OR  
SFDs)  
N-CHANNEL FET)  
SEQUENCING  
ENGINE  
VP1  
VP2  
VP3  
VP4  
VH  
PDO7  
PDO8  
PDO9  
CONFIGURABLE  
OUTPUT  
DRIVERS  
PROGRAMMABLE  
RESET  
GENERATORS  
(LV CAPABLE  
OF DRIVING  
LOGIC SIGNALS)  
(SFDs)  
PDO10  
AGND  
PDOGND  
VDD  
ARBITRATOR  
VDDCAP  
GND  
REFIN  
REFOUT REFGND SDA SCL A1  
A0  
SMBus  
VREF  
INTERFACE  
ADM1065  
OSC  
DEVICE  
CONTROLLER  
EEPROM  
GPI SIGNAL  
CONDITIONING  
CONFIGURABLE  
O/P DRIVER  
(HV)  
PDO1  
SFD  
VX1  
PDO2  
PDO3  
PDO4  
PDO5  
VX2  
VX3  
VX4  
GPI SIGNAL  
CONDITIONING  
CONFIGURABLE  
O/P DRIVER  
(HV)  
PDO6  
SEQUENCING  
ENGINE  
VX5  
VP1  
SFD  
SFD  
CONFIGURABLE  
O/P DRIVER  
(LV)  
SELECTABLE  
ATTENUATOR  
PDO7  
VP2  
VP3  
VP4  
PDO8  
PDO9  
CONFIGURABLE  
O/P DRIVER  
(LV)  
SELECTABLE  
ATTENUATOR  
VH  
SFD  
PDO10  
AGND  
PDOGND  
REG 5.25V  
CHARGE PUMP  
VDD  
ARBITRATOR  
VDDCAP  
GND  
VCCP  
48 47 46 45 44 43 42 41 40 39 38 37  
40 39 38 37 36 35 34 33 32 31  
NC  
VX1  
VX2  
VX3  
VX4  
VX5  
VP1  
VP2  
VP3  
VP4  
1
2
36 NC  
VX1  
VX2  
VX3  
VX4  
VX5  
VP1  
VP2  
VP3  
VP4  
1
2
3
4
5
6
7
8
9
30 PDO1  
29 PDO2  
28 PDO3  
27 PDO4  
26 PDO5  
25 PDO6  
24 PDO7  
23 PDO8  
22 PDO9  
21 PDO10  
PIN 1  
INDICATOR  
PIN 1  
35 PDO1  
34 PDO2  
33 PDO3  
32 PDO4  
31 PDO5  
INDICATOR  
3
4
5
ADM1065  
ADM1065  
6
TOP VIEW  
TOP VIEW  
(Not to Scale)  
7
30  
PDO6  
(Not to Scale)  
8
29 PDO7  
28 PDO8  
9
10  
27  
PDO9  
VH 10  
VH 11  
NC 12  
26 PDO10  
25 NC  
11 12 13 14 15 16 17 18 19 20  
13 14 15 16 17 18 19 20 21 22 23 24  
NC = NO CONNECT  
NC = NO CONNECT  
6
5
4
3
2
1
0
180  
160  
140  
120  
100  
80  
60  
40  
20  
0
0
0
0
1
2
3
4
5
6
16  
6
0
0
0
1
2
3
4
5
6
16  
6
V
(V)  
(V)  
(V)  
V
(V)  
(V)  
(V)  
VP1  
VP1  
5.0  
4.5  
4.0  
3.5  
3.0  
2.5  
2.0  
1.5  
1.0  
0.5  
0
6
5
4
3
2
1
0
2
4
6
8
10  
12  
14  
2
4
6
8
10  
12  
14  
V
V
VH  
VH  
350  
300  
250  
200  
150  
100  
50  
5.0  
4.5  
4.0  
3.5  
3.0  
2.5  
2.0  
1.5  
1.0  
0.5  
0
0
1
2
3
4
5
1
2
3
4
5
V
VH  
V
VP1  
4.5  
4.0  
3.5  
3.0  
2.5  
2.0  
1.5  
1.0  
0.5  
0
14  
12  
10  
8
VP1 = 5V  
VP1 = 3V  
6
4
2
0
0
10  
20  
30  
40  
50  
60  
0
2.5  
5.0  
7.5  
10.0  
12.5  
15.0  
I
( A)  
LOAD  
I
CURRENT ( A)  
LOAD  
2.058  
2.053  
2.048  
2.043  
2.038  
5.0  
4.5  
4.0  
3.5  
3.0  
2.5  
2.0  
1.5  
1.0  
0.5  
0
VP1 = 3.0V  
VP1 = 5V  
VP1 = 3V  
VP1 = 4.75V  
–40  
–20  
0
20  
40  
60  
80  
100  
0
1
2
3
4
5
6
TEMPERATURE ( C)  
I
(mA)  
LOAD  
VDDCAP  
VP1  
VP2  
VP3  
VP4  
VH  
IN  
OUT  
OUT  
OUT  
OUT  
OUT  
4.75V  
LDO  
EN  
IN  
4.75V  
LDO  
EN  
IN  
4.75V  
LDO  
EN  
IN  
4.75V  
LDO  
EN  
IN  
INTERNAL  
DEVICE  
SUPPLY  
4.75V  
LDO  
EN  
SUPPLY  
COMPARATOR  
RANGE  
SELECT  
ULTRA  
LOW  
OV  
COMPARATOR  
+
VPn  
–
GLITCH  
FILTER  
FAULT  
OUTPUT  
VREF  
+
LOW  
MID  
–
UV  
FAULT TYPE  
SELECT  
COMPARATOR  
INPUT PULSE SHORTER  
THAN GLITCH FILTER TIMEOUT  
INPUT PULSE LONGER  
THAN GLITCH FILTER TIMEOUT  
PROGRAMMED  
TIMEOUT  
PROGRAMMED  
TIMEOUT  
INPUT  
INPUT  
T
T
GF  
T
0
T
GF  
0
OUTPUT  
OUTPUT  
T
T
GF  
T
0
T
GF  
0
VXn  
+
(DIGITAL INPUT)  
TO  
GLITCH  
FILTER  
SEQUENCING  
ENGINE  
DETECTOR  
–
VREF = 1.4V  
VFET (PDO1-6 ONLY)  
V
DD  
VP4  
VP1  
SEL  
CFG4 CFG5 CFG6  
SE DATA  
SMBus DATA  
CLK DATA  
PDO  
MONITOR  
FAULT  
STATE  
TIMEOUT  
SEQUENCE  
SEQUENCE  
STATES  
IDLE1  
VX1 = 0  
IDLE2  
VP1 = 1  
MONITOR FAULT  
STATES  
TIMEOUT  
STATES  
EN3V3  
10ms  
VP1 = 0  
VP2 = 1  
EN2V5  
DIS3V3  
20ms  
(VP1 + VP2) = 0  
VX1 = 1  
VP3 = 1  
PWRGD  
DIS2V5  
VP2 = 0  
(VP1 + VP2 + VP3) = 0  
VX1 = 1  
VX1 = 1  
FSEL1  
(VP1 +  
VP2) = 0  
VP3 = 0  
FSEL2  
VP1 = 0  
VP2 = 0  
MONITORING FAULT  
DETECTOR  
1-BIT FAULT  
DETECTOR  
FAULT  
SUPPLY FAULT  
DETECTION  
VP1  
MASK  
SENSE  
1-BIT FAULT  
DETECTOR  
FAULT  
LOGIC INPUT CHANGE  
OR FAULT DETECTION  
VX5  
SUPPLY FAULT  
DETECTION  
VP1  
VX5  
MASK  
SENSE  
SEQUENCE  
DETECTOR  
1-BIT FAULT  
DETECTOR  
LOGIC INPUT CHANGE  
OR FAULT DETECTION  
TIMER  
FAULT  
WARNINGS  
WARNINGS  
INVERT  
MASK  
FORCE FLOW  
(UNCONDITIONAL JUMP)  
SELECT  
12V IN  
5V IN  
3V IN  
12V OUT  
5V OUT  
3V OUT  
IN  
DC-DC1  
EN  
OUT  
3.3V OUT  
2.5V OUT  
1.8V OUT  
VH  
ADM1065  
5V OUT  
VP1  
VP2  
VP3  
VP4  
VX1  
VX2  
VX3  
PDO1  
PDO2  
3V OUT  
3.3V OUT  
2.5V OUT  
1.8V OUT  
1.2V OUT  
0.9V OUT  
IN  
DC-DC2  
PDO3  
PDO4  
PDO5  
EN  
OUT  
POWER_GOOD  
SIGNAL_VALID  
SYSTEM RESET  
POWER_ON  
PDO6  
PDO7  
VX4  
VX5  
RESET_L  
IN  
DC-DC3  
PDO8  
PDO9  
EN  
OUT  
3.3V OUT  
PDO10  
REFIN VCCP VDDCAP GND  
IN  
LDO  
10 F 10 F  
10 F  
EN  
OUT  
0.9V OUT  
1.2V OUT  
3.3V OUT  
IN  
OUT  
EN  
DC-DC4  
SMBus  
DEVICE  
POWER-UP  
(V > 2.5V)  
CC  
CONTROLLER  
E
E
P
R
O
M
L
R
A
M
L
U
P
D
D
A
T
D
A
LATCH A  
LATCH B  
FUNCTION  
(OV THRESHOLD  
ON VP1)  
D
EEPROM  
1
9
1
9
SCL  
SDA  
0
1
1
0
1
A1  
A0 R/W  
D7 D6 D5 D4  
D3 D2 D1 D0  
START BY  
MASTER  
ACK. BY  
SLAVE  
ACK. BY  
SLAVE  
FRAME 1  
SLAVE ADDRESS  
FRAME 2  
COMMAND CODE  
1
9
1
9
SCL  
(CONTINUED)  
SDA  
(CONTINUED)  
D7 D6 D5 D4 D3 D2 D1  
D7 D6 D5 D4 D3 D2 D1 D0  
D0  
STOP  
BY  
MASTER  
ACK. BY  
SLAVE  
ACK. BY  
SLAVE  
FRAME 3  
DATA BYTE  
FRAME N  
DATA BYTE  
1
9
1
9
SCL  
SDA  
0
1
1
0
1
A1  
A0 R/W  
D7 D6 D5 D4  
D3 D2 D1 D0  
ACK. BY  
SLAVE  
ACK. BY  
MASTER  
START BY  
MASTER  
FRAME 1  
SLAVE ADDRESS  
FRAME 2  
DATA BYTE  
1
9
1
9
SCL  
(CONTINUED)  
SDA  
(CONTINUED)  
D7 D6 D5 D4 D3 D2 D1  
D0  
D7 D6 D5 D4 D3 D2 D1 D0  
STOP  
BY  
MASTER  
ACK. BY  
MASTER  
NO ACK.  
FRAME 3  
DATA BYTE  
FRAME N  
DATA BYTE  
tR  
tF  
tHD;STA  
tLOW  
SCL  
SDA  
tHIGH  
tHD;STA  
tSU;STA  
tSU;STO  
tHD;DAT  
tSU;DAT  
tBUF  
P
S
S
P
1
2
3
4
5
6
REGISTER  
ADDRESS  
(0x00 TO 0xDF)  
SLAVE  
ADDRESS  
S
W
A
A
P
1
2
3
4
5
6
7
8
RAM  
SLAVE  
ADDRESS  
S
W
A
ADDRESS  
A
DATA  
A
P
(0x00 TO 0xDF)  
1
2
3
4
5
6
COMMAND  
BYTE  
(0xFE)  
SLAVE  
ADDRESS  
S
W
A
A
P
1
2
3
4
5
6
7
8
EEPROM  
EEPROM  
SLAVE  
ADDRESS  
ADDRESS  
HIGH BYTE  
ADDRESS  
S
W
A
A
A
P
LOW BYTE  
(0x00 TO 0xFF)  
(0xF8 TO 0xFB)  
1
2
3
4
5
6
7
8
EEPROM  
ADDRESS  
HIGH BYTE  
(0xF8 TO 0xFB)  
EEPROM  
ADDRESS  
LOW BYTE  
(0x00 TO 0xFF)  
SLAVE  
ADDRESS  
S
W
A
A
A
P
1
2
3
4
5
6
SLAVE  
ADDRESS  
S
R
A
DATA  
A
P
1
2
3
4
5
6
7
8
9
10  
P
SLAVE  
ADDRESS  
COMMAND 0xFC  
(BLOCK WRITE)  
BYTE  
COUNT  
DATA  
1
DATA  
2
DATA  
A
N
S
W
A
A
A
A
A
1
2
3
4
5
6
7
8
9
10 11 12  
DATA  
SLAVE  
ADDRESS  
COMMAND 0xFD  
(BLOCK READ)  
SLAVE  
ADDRESS  
BYTE  
COUNT  
S
W
A
A
S
R A  
A
A
1
13 14  
DATA  
32  
A
P
1
2
3
4
5
6
7
8
9
10 11 12  
DATA  
SLAVE  
ADDRESS  
COMMAND 0xFD  
(BLOCK READ)  
SLAVE  
ADDRESS  
BYTE  
COUNT  
S
W
A
A
S
R A  
A
A
1
13 14 15  
DATA  
32  
A
PEC A P  
6.00  
BSC SQ  
0.60 MAX  
0.60 MAX  
PIN 1  
INDICATOR  
31  
40  
1
30  
PIN 1  
INDICATOR  
0.50  
BSC  
4.25  
4.10 SQ  
3.95  
TOP  
VIEW  
5.75  
BCS SQ  
EXPOSED  
PAD  
(BOTTOM VIEW)  
0.50  
0.40  
0.30  
21  
10  
11  
20  
0.25 MIN  
4.50  
REF  
12° MAX  
0.80 MAX  
0.65 TYP  
0.05 MAX  
0.02 NOM  
1.00  
0.85  
0.80  
0.30  
0.23  
0.18  
COPLANARITY  
0.08  
0.20 REF  
SEATING  
PLANE  
COMPLIANT TO JEDEC STANDARDS MO-220-VJJD-2  
1.20  
9.00  
0.75  
0.60  
MAX  
BSC SQ  
0.45  
37  
36  
48  
1
SEATING  
PLANE  
PIN 1  
7.00  
BSC SQ  
TOP VIEW  
(PINS DOWN)  
VIEW A  
0° MIN  
1.05  
1.00  
0.95  
0.20  
0.09  
12  
25  
24  
13  
7°  
3.5°  
0°  
0.08 MAX  
COPLANARITY  
0.50  
BSC  
0.27  
0.22  
0.17  
0.15  
0.05  
SEATING  
PLANE  
VIEW A  
ROTATED 90° CCW  
COMPLIANT TO JEDEC STANDARDS MS-026ABC  

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