ADM1085 [ADI]

Simple Sequencers in 6-Lead SC70; 简单排序在6引脚SC70
ADM1085
型号: ADM1085
厂家: ADI    ADI
描述:

Simple Sequencers in 6-Lead SC70
简单排序在6引脚SC70

文件: 总16页 (文件大小:360K)
中文:  中文翻译
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Simple Sequencersin 6-Lead SC70  
ADM1085/ADM1086/ADM1087/ADM1088  
FUNCTIONAL BLOCK DIAGRAMS  
FEATURES  
V
CC  
Provide programmable time delays between enable  
signals  
Can be cascaded with power modules for multiple  
supply sequencing  
Power supply monitoring from 0.6 V  
Output stages:  
ADM1085/ADM1086  
V
CAPACITOR  
ADJUSTABLE  
DELAY  
IN  
ENOUT  
0.6V  
High voltage (up to 22 V) open-drain output  
(ADM1085/ADM1087)  
Push-pull output (ADM1086/ADM1088)  
Capacitor-adjustable time delays  
High voltage (up to 22 V) Enable and VIN inputs  
Low power consumption (15 µA)  
Specified over –40°C to +125°C temperature range  
6-lead SC70 package  
GND  
CEXT  
ENIN  
V
CC  
ADM1087/ADM1088  
V
CAPACITOR  
ADJUSTABLE  
DELAY  
IN  
ENOUT  
0.6V  
APPLICATIONS  
Desktop/notebook computers, servers  
Low power portable equipment  
Routers  
GND  
CEXT  
ENIN  
Figure 1.  
Base stations  
Line cards  
Graphics cards  
GENERAL DESCRIPTION  
property ensures compatibility with enable input logic levels of  
different regulators and converters.  
The ADM1085/ADM1086/ADM1087/ADM1088 are simple  
sequencing circuits that provide a time delay between the  
enabling of voltage regulators and/or dc-dc converters at power-  
up in multiple supply systems. When the output voltage of the  
first power module reaches a preset threshold, a time delay is  
initiated before an enable signal allows subsequent regulators to  
power up. Any number of these devices can be cascaded with  
regulators to allow sequencing of multiple power supplies.  
All four models have a dedicated enable input pin that allows  
the output signal to the regulator to be controlled externally.  
This is an active-high input (ENIN) for the ADM1085 and  
ENIN  
ADM1086, and an active-low input (  
and ADM1088.  
) for the ADM1087  
The simple sequencers are specified over the extended −40°C to  
+125°C temperature range. With low current consumption of 15  
µA (typ) and 6-lead SC70 packaging, the parts are suitable for  
low-power portable applications.  
Threshold levels can be set with a pair of external resistors in a  
voltage divider configuration. By choosing appropriate resistor  
values, the threshold can be adjusted to monitor voltages as low  
as 0.6 V.  
Table 1. Selection Table  
The ADM1086 and ADM1088 have push-pull output stages,  
Output Stage  
ENOUT  
with active-high (ENOUT) and active-low (  
) logic  
ENOUT  
Part No.  
Enable Input  
ENIN  
ENIN  
ENOUT  
outputs, respectively. The ADM1085 has an active-high  
(ENOUT) logic output; the ADM1087 has an active-low  
) output. Both the ADM1085 and ADM1087 have  
open-drain output stages that can be pulled up to voltage levels  
as high as 22 V through an external resistor. This level-shifting  
ADM1085  
ADM1086  
ADM1087  
ADM1088  
Open-Drain  
Push-Pull  
ENOUT  
(
ENIN  
Open-Drain  
Push-Pull  
ENIN  
Rev. 0  
Information furnished by Analog Devices is believed to be accurate and reliable.  
However, no responsibility is assumed by Analog Devices for its use, nor for any  
infringements of patents or other rights of third parties that may result from its use.  
Specifications subject to change without notice. No license is granted by implication  
or otherwise under any patent or patent rights of Analog Devices. Trademarks and  
registered trademarks are the property of their respective owners.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781.329.4700  
Fax: 781.326.8703  
www.analog.com  
© 2004 Analog Devices, Inc. All rights reserved.  
ADM1085/ADM1086/ADM1087/ADM1088  
TABLE OF CONTENTS  
Specifications..................................................................................... 3  
Application Information................................................................ 11  
Sequencing Circuits................................................................... 11  
Dual LOFO Sequencing ............................................................ 13  
Simultaneous Enabling.............................................................. 13  
Power Good Signal Delays........................................................ 13  
Quad-Supply Power Good Indicator....................................... 14  
Sequencing with FET Switches................................................. 14  
Outline Dimensions....................................................................... 15  
Ordering Guide .......................................................................... 15  
Absolute Maximum Ratings............................................................ 4  
ESD Caution.................................................................................. 4  
Pin Configuration and Function Descriptions............................. 5  
Typical Performance Characteristics ............................................. 6  
Circuit Information.......................................................................... 9  
Timing Characteristics and Truth Tables.................................. 9  
Capacitor-Adjustable Delay Circuit........................................... 9  
Open-Drain and Push-Pull Outputs ....................................... 10  
REVISION HISTORY  
7/04—Revision 0: Initial Version  
Rev. 0 | Page 2 of 16  
ADM1085/ADM1086/ADM1087/ADM1088  
SPECIFICATIONS  
VCC = full operating range, TA = −40°C to +125°C, unless otherwise noted.  
Table 2.  
Parameter  
Min  
Typ  
Max  
Unit  
Test Conditions/Comments  
SUPPLY  
VCC Operating Voltage Range  
VIN Operating Voltage Range  
Supply Current  
VIN Rising Threshold, VTH_RISING  
VIN Falling Threshold, VTH_FALLING  
VIN Hysteresis  
2.25  
0
3.6  
22  
15  
0.64  
0.625  
V
V
µA  
V
V
10  
0.6  
0.585  
15  
0.56  
0.545  
VCC = 3.3 V  
VCC = 3.3 V  
mV  
VIN to ENOUT/ENOUT Delay  
VIN Rising  
35  
2
20  
µs  
ms  
µs  
CEXT floating, C = 20 pF  
CEXT = 470 pF  
VIN = VTH_FALLING to (VTH_FALLING  
100 mV)  
VIN Falling  
VIN Leakage Current  
CEXT Charge Current  
Threshold Temperature Coefficient  
ENIN/ENIN TO ENOUT/ENOUT Propagation  
Delay  
170  
250  
30  
µA  
nA  
ppm/°C  
µs  
VIN = 22 V  
125  
375  
0.5  
V
IN > VTH_RISING  
ENIN/ENIN Voltage Low  
0.3 VCC − 0.2  
0.4  
V
ENIN/ENIN Voltage High  
0.3 VCC + 0.2  
V
ENIN/ENIN Leakage Current  
ENOUT/ENOUT Voltage Low  
170  
µA  
V
ENIN  
ENIN/ = 22 V  
VIN < VTH_FALLING (ENOUT),  
ENOUT  
VIN > VTH_RISING  
SINK = 1.2 mA  
VIN > VTH_RISING (ENOUT),  
(
),  
I
ENOUT  
ENOUT/ Voltage High  
(ADM1086/ADM1088)  
0.8 VCC  
V
ENOUT  
VIN < VTH_FALLING  
(
),  
I
SOURCE = 500 µA  
ENOUT  
ENOUT/ Open-Drain Output Leakage  
Current (ADM1085/ADM1087)  
0.4  
µA  
ENOUT  
ENOUT/  
= 22 V  
Rev. 0 | Page 3 of 16  
 
ADM1085/ADM1086/ADM1087/ADM1088  
ABSOLUTE MAXIMUM RATINGS  
TA = 25°C, unless otherwise noted.  
Table 3.  
Stresses above those listed under Absolute Maximum Ratings  
may cause permanent damage to the device. This is a stress  
rating only and functional operation of the device at these or  
any other conditions above those indicated in the operational  
section of this specification is not implied. Exposure to absolute  
maximum rating conditions for extended periods may affect  
device reliability.  
Parameter  
Rating  
0.3 V to +6 V  
0.3 V to +25 V  
0.3 V to +6 V  
0.3 V to +25 V  
0.3 V to +25 V  
0.3 V to +6 V  
40°C to +125°C  
65°C to +150°C  
146°C/W  
VCC  
VIN  
CEXT  
ENIN, ENIN  
ENOUT, ENOUT (ADM1085, ADM1087)  
ENOUT, ENOUT (ADM1086, ADM1088)  
Operating Temperature Range  
Storage Temperature Range  
θJA Thermal Impedance, SC70  
Lead Temperature  
Soldering (10 s)  
Vapor Phase (60 s)  
Infrared (15 s)  
300°C  
215°C  
220°C  
ESD CAUTION  
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on  
the human body and test equipment and can discharge without detection. Although this product features  
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy  
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance  
degradation or loss of functionality.  
Rev. 0 | Page 4 of 16  
 
ADM1085/ADM1086/ADM1087/ADM1088  
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS  
ADM1085/  
ADM1086/  
ADM1087/  
ADM1088  
ENIN/ENIN  
1
2
3
6
5
4
V
CC  
GND  
CEXT  
V
ENOUT/ENOUT  
TOP VIEW  
IN  
(Not to Scale)  
Figure 2. Pin Configuration  
Table 4. Pin Function Descriptions  
Pin No. Mnemonic Description  
1
ENIN, ENIN  
Enable Input. Controls the status of the enable output. Active high for ADM1085/ADM1086. Active low for  
ADM1087/ADM1088.  
2
3
GND  
VIN  
Ground.  
Input for the Monitored Voltage Signal. Can be biased via a voltage divider resistor network to customize the  
effective input threshold. Can precisely monitor an analog power supply output signal and detect when it has  
powered up. The voltage applied at this pin is compared with a 0.6 V on-chip reference. With this reference,  
digital signals with various logic-level thresholds can also be detected.  
4
ENOUT, ENOUT Enable Output. Asserted when the voltage at VIN is above VTH_RISING and the time delay has elapsed, provided  
that the enable input is asserted. Active high for the ADM1085/ADM1086. Active low for the  
ADM1087/ADM1088.  
5
6
CEXT  
External Capacitor Pin. The capacitance on this pin determines the time delay on the enable output. The delay  
is seen only when the voltage at VIN rises past VTH_RISING, and not when it falls below VTH_FALLING  
Power Supply.  
.
VCC  
Rev. 0 | Page 5 of 16  
 
ADM1085/ADM1086/ADM1087/ADM1088  
TYPICAL PERFORMANCE CHARACTERISTICS  
700  
680  
660  
640  
200  
180  
160  
140  
120  
100  
80  
T
= +125°C  
A
V
RISING  
TRIP  
T
= +25°C  
A
620  
600  
580  
560  
540  
520  
500  
T
= –40°C  
A
60  
V
FALLING  
TRIP  
40  
20  
0
–40 –25 –10  
5
20  
35  
50  
65  
80  
95 110 125  
0
2
4
6
8
10  
12  
(V)  
14  
16  
18  
20  
22  
TEMPERATURE (°C)  
V
IN  
Figure 3. VIN Threshold vs. Temperature  
Figure 6. VIN Leakage Current vs. VIN Voltage  
12.0  
11.5  
11.0  
10.5  
10.0  
9.5  
200  
190  
180  
170  
160  
150  
140  
130  
120  
110  
100  
T
= +125°C  
A
A
T
= +25°C  
A
T
= +25°C  
T
= +125°C  
T
= –40°C  
A
A
T
= –40°C  
A
9.0  
8.5  
8.0  
2.10  
2.40  
2.70  
3.00  
3.30  
3.60  
2.10  
2.40  
2.70  
3.00  
3.30  
3.60  
V
(V)  
CC  
V
(V)  
CC  
Figure 4. Supply Current vs. Supply Voltage  
Figure 7. VIN Leakage Current vs. VCC Voltage  
20  
18  
16  
14  
12  
10  
8
10000  
T
= +125°C  
A
1000  
100  
10  
T
= +25°C  
A
T
= –40°C  
A
6
4
1
2
0
0.1  
0.01  
0
2
4
6
8
10  
12  
(V)  
14  
16  
18  
20  
22  
0.1  
1
10 20  
100  
V
IN  
OUTPUT SINK CURRENT (mA)  
Figure 5. Supply Current vs. VIN Voltage  
Figure 8. Output Voltage vs. Output Sink Current  
Rev. 0 | Page 6 of 16  
 
ADM1085/ADM1086/ADM1087/ADM1088  
200  
180  
120  
T
= +125°C  
A
160  
140  
120  
100  
80  
100  
80  
60  
40  
20  
0
T
= +25°C  
A
T
= –40°C  
A
60  
40  
20  
0
2.10  
2.40  
2.70  
3.00  
3.30  
3.60  
0
2
4
6
8
10  
12  
14  
16  
18  
20  
22  
SUPPLY VOLTAGE (V)  
ENIN/ENIN (V)  
ENIN  
ENIN  
Voltage  
Figure 9. Output Low Voltage vs. Supply Voltage  
Figure 12. ENIN/  
Leakage Current vs. ENIN/  
200  
180  
160  
140  
120  
100  
80  
100  
90  
80  
70  
60  
50  
40  
30  
20  
10  
0
T
= +125°C  
A
T
= +25°C  
= –40°C  
A
T
A
1mV/µs  
10mV/µs  
60  
40  
20  
0
2.10  
2.40  
2.70  
3.00  
3.30  
3.60  
–40 –25 –10  
5
20  
35  
50  
65  
C)  
80  
95 110 125  
V
(V)  
TEMPERATURE (  
°
CC  
Figure 10. VCC Falling Propagation Delay vs. Temperature  
ENIN  
Figure 13. ENIN/  
Leakage Current vs. VCC Voltage  
10000  
1000  
100  
10  
500  
450  
400  
350  
300  
250  
200  
150  
100  
50  
1
0.1  
0
2.10  
0.562 2.390 5.02 22.9 53.2  
241  
520 2350 4480 26200  
2.40  
2.70  
3.00  
3.30  
3.60  
TIMEOUT DELAY (ms)  
SUPPLY VOLTAGE (V)  
Figure 11. Output Fall Time vs. Supply Voltage  
Figure 14. CEXT Capacitance vs. Timeout Delay  
Rev. 0 | Page 7 of 16  
ADM1085/ADM1086/ADM1087/ADM1088  
100  
90  
80  
70  
60  
50  
40  
30  
20  
10  
0
300  
280  
260  
240  
220  
200  
180  
160  
140  
120  
100  
–40 –25 –10  
5
20  
35  
50  
65  
80  
95 110 125  
1
10  
100  
1000  
TEMPERATURE (°C)  
COMPARATOR OVERDRIVE (mV)  
Figure 15. CEXT Charge Current vs. Temperature  
Figure 17. Maximum VIN Transient Duration vs. Comparator Overdrive  
100  
90  
80  
70  
60  
50  
40  
30  
20  
10  
0
–40 –25 –10  
5
20  
35  
50  
65  
80  
95 110 125  
TEMPERATURE (°C)  
ENOUT  
Figure 16. VIN to ENOUT/  
Propagation Delay  
(CEXT Floating) vs. Temperature  
Rev. 0 | Page 8 of 16  
ADM1085/ADM1086/ADM1087/ADM1088  
CIRCUIT INFORMATION  
When VIN reaches the upper threshold voltage (VTH_RISING), an  
internal circuit generates a delay (tEN) before the enable output  
is asserted. If VIN drops below the lower threshold voltage  
(VTH_FALLING), the enable output is deasserted immediately.  
TIMING CHARACTERISTICS AND TRUTH TABLES  
The enable outputs of the ADM1085/ADM1086/ADM1087/  
ADM1088 are related to the VIN and enable inputs by a simple  
AND function. The enable output is asserted only if the enable  
input is asserted and the voltage at VIN is above VTH_RISING, with  
the time delay elapsed. Table 5 and Table 6 show the enable  
output logic states for different VIN/enable input combinations  
when the capacitor delay has elapsed. The timing diagrams in  
Figure 18 and Figure 19 give a graphical representation of how  
the ADM1085/ADM1086/ADM1087/ADM1088 enable outputs  
respond to VIN and enable input signals.  
Similarly, if the enable input is disabled while VIN is above the  
threshold, the enable output deasserts immediately. Unlike VIN, a  
ENIN  
low-to-high transition on ENIN (or high-to-low on  
ENOUT  
) does  
not yield a time delay on ENOUT (  
).  
CAPACITOR-ADJUSTABLE DELAY CIRCUIT  
Figure 20 shows the internal circuitry used to generate the time  
delay on the enable output. A 250 nA current source charges a  
small internal parasitic capacitance, CINT. When the capacitor  
voltage reaches 1.2 V, the enable output is asserted. The time  
taken for the capacitor to reach 1.2 V, in addition to the propa-  
gation delay of the comparator, constitutes the enable timeout,  
which is typically 35 µs.  
Table 5. ADM1085/ADM1086 Truth Table  
VIN  
ENIN  
ENOUT  
<VTH_FALLING  
<VTH_FALLING  
>VTH_RISING  
>VTH_RISING  
0
1
0
1
0
0
0
1
To minimize the delay between VIN falling below VTH_FALLING and  
the enable output de-asserting, an NMOS transistor is con-  
nected in parallel with CINT. The output of the voltage detector  
is connected to the gate of this transistor so that, when VIN falls  
below VTH_FALLING, the transistor switches on and CINT discharges  
quickly.  
Table 6. ADM1087/ADM1088 Truth Table  
ENIN  
ENOUT  
VIN  
<VTH_FALLING  
<VTH_FALLING  
>VTH_RISING  
>VTH_RISING  
1
0
1
0
1
1
1
0
V
CC  
250nA  
SIGNAL FROM  
VOLTAGE  
DETECTOR  
TO AND GATE  
AND OUTPUT  
STAGE  
V
V
V
TH_FALLING  
C
IN  
TH_RISING  
1.2V  
INT  
CEXT  
C
ENIN  
Figure 20. Capacitor-Adjustable Delay Circuit  
tEN  
Figure 18. ADM1085/ADM1086 Timing Diagram  
ENOUT  
Connecting an external capacitor to the CEXT pin delays the  
rise time—and therefore the enable timeout—further. The  
relationship between the value of the external capacitor and the  
resulting timeout is characterized by the following equation:  
V
V
V
TH_FALLING  
IN  
TH_RISING  
t
EN = (C × 4.8 ×106) + 35 µs  
ENIN  
tEN  
ENOUT  
Figure 19. ADM1087/ADM1088 Timing Diagram  
Rev. 0 | Page 9 of 16  
 
 
 
 
 
 
ADM1085/ADM1086/ADM1087/ADM1088  
The ADM1086 and ADM1088 have push-pull (CMOS) output  
stages that require no external components to drive other logic  
circuits. An internal PMOS pull-up transistor provides the  
logic-high voltage level.  
OPEN-DRAIN AND PUSH-PULL OUTPUTS  
The ADM1085 and ADM1087 have open-drain output stages  
that require an external pull-up resistor to provide a logic-high  
voltage level. The geometry of the NMOS transistor enables the  
output to be pulled up to voltage levels as high as 22 V.  
V
(22V)  
CC  
ADM1086/ADM1088  
ADM1085/ADM1087  
V
CC  
LOGIC  
LOGIC  
Figure 21. Open-Drain Output Stage  
Figure 22. Push-Pull Output Stage  
Rev. 0 | Page 10 of 16  
 
ADM1085/ADM1086/ADM1087/ADM1088  
APPLICATION INFORMATION  
In Figure 23, three ADM1085s are used to sequence four  
supplies on power-up. Separate capacitors on the CEXT pins  
determine the time delays between enabling of the 3.3 V, 2.5 V,  
1.8 V, and 1.2 V supplies. Because the dc/dc converters and  
ADM1085s are connected in cascade, and the output of any  
converter is dependent on that of the previous one, an external  
controller can disable all four supplies simultaneously by  
disabling the first dc/dc converter in the chain.  
SEQUENCING CIRCUITS  
The ADM1085/ADM1086/ADM1087/ADM1088 are  
compatible with voltage regulators and dc-to-dc converters that  
have active-high or active-low enable or shutdown inputs, with  
a choice of open-drain or push-pull output stages. Figure 23 to  
Figure 25 illustrate how each of the ADM1085/ADM1086/  
ADM1087/ADM1088 simple sequencers can be used in  
multiple-supply systems, depending on which regulators are  
used and which output stage is preferred.  
For power-down sequencing, an external controller dictates  
when the supplies are switched off by accessing the ENIN  
inputs individually.  
12V  
3.3V  
3.3V  
3.3V  
IN  
IN  
IN  
IN  
EN  
OUT  
EN  
OUT  
EN  
OUT  
EN  
OUT  
DC/DC  
DC/DC  
DC/DC  
DC/DC  
3.3V  
2.5V  
1.8V  
1.2V  
3.3V  
3.3V  
3.3V  
V
V
V
CC  
CC  
CC  
ENABLE  
CONTROL  
V
V
V
ENOUT  
ENOUT  
ENOUT  
IN  
IN  
IN  
ADM1085  
ADM1085  
ADM1085  
ENIN  
CEXT  
ENIN  
CEXT  
ENIN  
CEXT  
12V  
3.3V  
2.5V  
1.8V  
1.2V  
tEN1  
tEN2  
tEN3  
EXTERNAL  
DISABLE  
Figure 23. Typical ADM1085 Application Circuit  
Rev. 0 | Page 11 of 16  
 
 
ADM1085/ADM1086/ADM1087/ADM1088  
12V  
IN  
IN  
IN  
IN  
EN  
OUT  
EN  
OUT  
EN  
OUT  
EN  
OUT  
DC/DC  
DC/DC  
DC/DC  
DC/DC  
3.3V  
2.5V  
1.8V  
1.2V  
3.3V  
3.3V  
3.3V  
V
V
V
CC  
CC  
CC  
V
V
V
ENOUT  
ENOUT  
ENOUT  
IN  
IN  
IN  
ADM1086  
ADM1086  
ADM1086  
ENIN  
CEXT  
ENIN  
CEXT  
ENIN  
CEXT  
ENABLE  
CONTROL  
12V  
3.3V  
2.5V  
1.8V  
1.2V  
tEN1  
tEN2  
tEN3  
EXTERNAL  
DISABLE  
Figure 24. Typical ADM1086 Application Circuit  
12V  
12V  
IN  
ADP3334  
IN  
IN  
IN  
SD  
OUT  
SD  
OUT  
SD  
OUT  
SD  
OUT  
3.3V  
ADP3334  
2.5V  
ADP3334  
3.3V  
ADP3334  
2.5V  
3.3V  
3.3V  
V
V
CC  
CC  
V
V
ENOUT  
ENOUT  
IN  
IN  
ADM1087  
ADM1088  
ENIN  
CEXT  
ENIN  
CEXT  
Figure 25. Typical ADM1087 Application Circuit Using  
ADP3334 Voltage Regulators  
Figure 26. Typical ADM1088 Application Circuit Using  
ADP3334 Voltage Regulators  
Rev. 0 | Page 12 of 16  
ADM1085/ADM1086/ADM1087/ADM1088  
DUAL LOFO SEQUENCING  
SIMULTANEOUS ENABLING  
A power sequencing solution for a portable device, such as a  
PDA, is shown in Figure 27. This solution requires that the  
microprocessor’s power supply turn on before the LCD display  
turns on, and that the LCD display power-down before the  
microprocessor powers down. In other words, the last power  
supply to turn on is the first one to turn off (LOFO).  
The enable output can drive multiple enable or shutdown  
regulator inputs simultaneously.  
12V  
3.3V  
IN  
IN  
SD  
OUT  
SD  
OUT  
ADP3333  
ADP3333  
3.3V  
2.5V  
3.3V  
SD  
An RC network connects the battery and the  
ADP3333 voltage regulator. This causes power-up and power-  
SD  
input of the  
V
CC  
ENOUT  
V
IN  
12V  
down transients to appear at the  
input when the battery is  
ADM1085  
IN  
connected and disconnected. The 3.3 V microprocessor supply  
turns on quickly on power-up and turns off slowly on power-  
down. This is due to two factors: Capacitor C1 charges up to 9 V  
on power-up and charges down from 9 V on power-down, and  
ENIN  
CEXT  
SD  
OUT  
ADP3333  
1.8V  
ENABLE  
CONTROL  
Figure 28. Enabling a Pair of Regulators from a Single ADM1085  
SD  
the  
0.4 V.  
pin has logic-high and logic-low input levels of 2 V and  
POWER GOOD SIGNAL DELAYS  
Sometimes sequencing is performed by asserting Power Good  
signals when the voltage regulators are already on, rather than  
sequencing the power supplies directly. In these scenarios, a  
simple sequencer IC can provide variable delays so that  
enabling separate circuit blocks can be staggered in time.  
For the display power sequencing, the ADM1085 is equipped  
with capacitor C2, which creates the delay between the micro-  
processor and display power turning on. When the system is  
powered down, the ADM1085 turns off the display power  
immediately, while the 3.3 V regulator waits for C1 to discharge  
to 0.4 V before switching off.  
For example, in a notebook PC application, a dedicated  
microcomputer asserts a Power Good signal for North Bridge™  
and South Bridge™ ICs. The ADM1086 delays the south bridges  
signal, so that it is enabled after the north bridge.  
9V  
SYSTEM  
POWER SWITCH  
SD  
2.5V  
MICROPROCESSOR  
POWER  
ADP3333  
C1  
3.3V  
9V  
5V  
5V  
9V  
POWER_GOOD  
EN  
MICROCOMPUTER  
V
NORTH  
BRIDGE  
IC  
IN  
SD  
5V  
DISPLAY  
POWER  
ADP3333  
ENOUT  
ADM1086  
ENIN  
CEXT  
3.3V  
5V  
C2  
V
ENOUT  
EN  
IN  
SOUTH  
BRIDGE  
IC  
9V  
SYSTEM  
POWER  
ADM1086  
ENIN  
CEXT  
0V  
9V  
V
C1  
0V  
Figure 29. Power Good Delay  
2.5V  
MICROPROCESSOR  
POWER  
0V  
5V  
DISPLAY  
POWER  
0V  
Figure 27. Dual LOFO Power-Supply Sequencing  
Rev. 0 | Page 13 of 16  
 
 
ADM1085/ADM1086/ADM1087/ADM1088  
QUAD-SUPPLY POWER GOOD INDICATOR  
SEQUENCING WITH FET SWITCHES  
The enable output of the simple sequencers is equivalent to an  
AND function of VIN and ENIN. ENOUT is high only when the  
voltage at VIN is above the threshold and the enable input  
(ENIN) is high as well. Although ENIN is a digital input, it can  
tolerate voltages as high as 22 V and can detect if a supply is  
present. Therefore, a simple sequencer can monitor two supplies  
and assert what can be interpreted as a Power Good signal  
when both supplies are present. The outputs of two ADM1085s  
can be wire-ANDed together to make a quad-supply Power  
Good indicator.  
The open-drain outputs of the ADM1085 and ADM1087 can  
drive external FET transistors, which can switch on power-  
supply rails. All that is needed is a pull-up resistor to a voltage  
source that is high enough to turn on the FET.  
12V  
3.3V  
V
ENOUT  
IN  
ADM1085  
3.3V  
3.3V  
ENIN  
CEXT  
9V  
5V  
POWER_GOOD  
V
ENOUT  
IN  
2.5V  
ADM1085  
Figure 31. Sequencing with a FET Switch  
ENIN  
3.3V  
2.5V  
1.8V  
V
ENOUT  
IN  
ADM1085  
ENIN  
Figure 30. Quad-Supply Power Good Indicator  
Rev. 0 | Page 14 of 16  
 
ADM1085/ADM1086/ADM1087/ADM1088  
OUTLINE DIMENSIONS  
2.00 BSC  
6
1
5
2
4
3
2.10 BSC  
1.25 BSC  
PIN 1  
1.30 BSC  
0.65 BSC  
1.00  
0.90  
0.70  
1.10 MAX  
0.22  
0.08  
0.46  
0.36  
0.26  
8°  
4°  
0°  
0.30  
0.15  
0.10 MAX  
SEATING  
PLANE  
0.10 COPLANARITY  
COMPLIANT TO JEDEC STANDARDS MO-203AB  
Figure 32. 6-Lead Plastic Surface-Mount Package [SC70]  
(KS-6)  
Dimensions shown in millimeters  
ORDERING GUIDE  
Model  
Package Option  
Temperature Range  
Quantity  
Package Description  
Branding  
ADM1085AKS-REEL7  
3k  
6-Lead Thin Shrink Small Outline  
Transistor Package (SC70)  
KS-6  
M0V  
40°C to +125°C  
ADM1086AKS-REEL7  
ADM1087AKS-REEL7  
ADM1088AKS-REEL7  
3k  
3k  
3k  
6-Lead Thin Shrink Small Outline  
Transistor Package (SC70)  
6-Lead Thin Shrink Small Outline  
Transistor Package (SC70)  
6-Lead Thin Shrink Small Outline  
Transistor Package (SC70)  
KS-6  
KS-6  
KS-6  
M0W  
M0X  
M0Y  
40°C to +125°C  
40°C to +125°C  
40°C to +125°C  
Rev. 0 | Page 15 of 16  
 
ADM1085/ADM1086/ADM1087/ADM1088  
NOTES  
©
2004 Analog Devices, Inc. All rights reserved. Trademarks and  
registered trademarks are the property of their respective owners.  
D04591–0–7/04(0)  
Rev. 0 | Page 16 of 16  

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