ADM1485ARM-REEL7 [ADI]

5 V, High Speed (30 Mbps), Low Power, Half Duplex EIA RS-485 Transceiver;


型号：	ADM1485ARM-REEL7
厂家：	ADI
描述：	5 V, High Speed (30 Mbps), Low Power, Half Duplex EIA RS-485 Transceiver 驱动信息通信管理光电二极管接口集成电路驱动器
文件：	总11页 (文件大小：297K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

5 V Low Power

EIA RS-485 Transceiver

ADM1485

FEATURES

Meets EIA RS-485 Standard

30 Mbps Data Rate

FUNCTIONAL BLOCK DIAGRAM

8-Lead

Single 5 V Supply

–7 V to +12 V Bus Common-Mode Range

High Speed, Low Power BiCMOS

Thermal Shutdown Protection

Short-Circuit Protection

ADM1485

Driver Propagation Delay: 10 ns

Receiver Propagation Delay: 15 ns

High-Z Outputs with Power Off

Superior Upgrade for LTC1485

APPLICATIONS

Low Power RS-485 Systems

DTE-DCE Interface

GND

Packet Switching

Local Area Networks

Data Concentration

Data Multiplexers

Integrated Services Digital Network (ISDN)

GENERAL DESCRIPTION

This minimizes the loading effect when the transceiver is not being

used. The high impedance driver output is maintained over the

entire common-mode voltage range from –7 V to +12 V.

The ADM1485 is a differential line transceiver suitable for high

speed bidirectional data communication on multipoint bus trans-

mission lines. It is designed for balanced data transmission and

complies with both RS-485 and RS-422 EIA Standards. The part

contains a differential line driver and a differential line receiver.

Both the driver and the receiver may be enabled independently.

When disabled, the outputs are three-stated.

The receiver contains a fail-safe feature that results in a logic

high output state if the inputs are unconnected (floating).

The ADM1485 is fabricated on BiCMOS, an advanced mixed

technology process combining low power CMOS with fast

switching bipolar technology. All inputs and outputs contain

protection against ESD; all driver outputs feature high source

and sink current capability. An epitaxial layer is used to guard

against latch-up.

The ADM1485 operates from a single 5 V power supply. Excessive

power dissipation caused by bus contention or by output shorting

is prevented by a thermal shutdown circuit. This feature forces

the driver output into a high impedance state if, during fault condi-

tions, a significant temperature increase is detected in the internal

driver circuitry.

The ADM1485 features extremely fast switching speeds. Minimal

driver propagation delays permit transmission at typical data rates

of 30 Mbps while low skew minimizes EMI interference.ꢀ

The part is fully specified over the commercial and industrial

temperature range and is available in PDIP, SOIC, and small

MSOP packages.

Up to 32 transceivers may be connected simultaneously on a bus,

but only one driver should be enabled at any time. It is important,

therefore, that the remaining disabled drivers do not load the bus.

To ensure this, the ADM1485 driver features high output

impedance when disabled and also when powered down.

REV.

Information furnished by Analog Devices is believed to be accurate and

reliable. However, no responsibility is assumed by Analog Devices for its

use, norforanyinfringementsofpatentsorotherrightsofthirdpartiesthat

may result from its use. No license is granted by implication or otherwise

under any patent or patent rights of Analog Devices. Trademarks and

registered trademarks are the property of their respective owners.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Tel: 781/329-4700

www.analog.com

781/461-3113

2012

Fax:

ADM1485–SPECIFICATIONS

(V_CC= 5 V ؎ 5%. All specifications T_MINto T_MAX, unless otherwise noted.)

Parameter

Min Typ Max

Unit Test Conditions/Comments

DRIVER

Differential Output Voltage, V_OD

5.0

0.2

250

0.8

R = ∞, Test Circuit 1

V_CC= 5 V, R = 50 Ω (RS-422), Test Circuit 1

R = 27 Ω (RS-485), Test Circuit 1

V_TST= –7 V to +12 V, Test Circuit 2

R = 27 Ω or 50 Ω, Test Circuit 1

R = 27 Ω or 50 Ω

2.0

1.5

V_OD3

Δ|V_OD| for Complementary Output States

Common-Mode Output Voltage V_OC

Δ|V_OD| for Complementary Output States

Output Short-Circuit Current (V_OUT= High)

Output Short-Circuit Current (V_OUT= Low)

CMOS Input Logic Threshold Low, V_INL

CMOS Input Logic Threshold High, V_INH

Logic Input Current (DE, DI)

mA –7 V ≤ V_O≤ +12 V

μA

2.0

1.0

RECEIVER

Differential Input Threshold Voltage, V_TH

Input Voltage Hysteresis, ΔV_TH

Input Resistance

–0.2

+0.2

–7 V ≤ V_CM≤ +12 V

mV V_CM= 0 V

kΩ

μA

–7 V ≤ V_CM≤ +12 V

Input Current (A, B)

–0.8

0.8

_IN= +12 V

_IN= –7 V

CMOS Input Logic Threshold Low, V_INL

CMOS Input Logic Threshold High, V_INH

Logic Enable Input Current (RE)

CMOS Output Voltage Low, V_OL

CMOS Output Voltage High, V_OH

Short-Circuit Output Current

2.0

0.4

I_OUT= +4.0 mA

I_OUT= –4.0 mA

4.0

V_OUT= GND or V_CC

Three-State Output Leakage Current

1.0

μA

0.4 V ≤ V_OUT≤ 2.4 V

POWER SUPPLY CURRENT

I_CC(Outputs Enabled)

I_CC(Outputs Disabled)

1.0

0.6

2.2

mA Digital Inputs = GND or V_CC

Specifications subject to change without notice.

(V = 5 V ؎ 5%. All specifications T_MINto T_MAX, unless otherwise noted.)

TIMING SPECIFICATIONS

Parameter

Min Typ Max

Unit Test Conditions/Comments

DRIVER

Propagation Delay Input to Output t_PLH, t_PHL

Driver O/P to O/P t_SKEW

Driver Rise/Fall Time t_R, t_F

Driver Enable to Output Valid

Driver Disable Timing

R_LDIFF= 54 Ω, C_L1= C_L2= 100 pF, Test Circuit 3

R_L= 110 Ω, C_L= 50 pF, Test Circuit 4

Matched Enable Switching

|t_AZH–t_BZL|, |t_BZH–t_AZL

R_L= 110 Ω, C_L= 50 pF, Test Circuit 4*

Matched Disable Switching

R_L= 110 Ω, C_L= 50 pF, Test Circuit 4*

|t_AHZ–t_BLZ|, |t_BHZ–t_ALZ

RECEIVER

Propagation Delay Input to Output t_PLH, t_PHL

C_L= 15 pF, Test Circuit 5

C_L= 15 pF, R_L= 1 kΩ, Test Circuit 6

Skew |t_PLH–t_PHL

Receiver Enable t_EN1

Receiver Disable t_EN2

Tx Pulse Width Distortion

Rx Pulse Width Distortion

*Guaranteed by characterization.

Specifications subject to change without notice.

–2–

REV.

ADM1485

ABSOLUTE MAXIMUM RATINGS*

(T_A= 25°C, unless otherwise noted.)

PIN FUNCTION DESCRIPTIONS

Pin Mnemonic Function

V_CC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +7 V

Inputs

No.

Driver Input (DI) . . . . . . . . . . . . . . . .–0.3 V to V_CC+ 0.3 V

Control Inputs (DE, RE) . . . . . . . . . .–0.3 V to V_CC+ 0.3 V

Receiver Inputs (A, B) . . . . . . . . . . . . . . . . . . –9 V to +14 V

Outputs

Driver Outputs (A, B) . . . . . . . . . . . . . . . . . . –9 V to +14 V

Receiver Output . . . . . . . . . . . . . . . . .–0.5 V to V_CC+ 0.5 V

Power Dissipation 8-Lead MSOP . . . . . . . . . . . . . . . 900 mW

θ_JA, Thermal Impedance . . . . . . . . . . . . . . . . . . . 206°C/W

Power Dissipation 8-Lead PDIP . . . . . . . . . . . . . . . . 500 mW

θ_JA, Thermal Impedance . . . . . . . . . . . . . . . . . . . 130°C/W

Power Dissipation 8-Lead SOIC . . . . . . . . . . . . . . . . 450 mW

θ_JA, Thermal Impedance . . . . . . . . . . . . . . . . . . . 170°C/W

Operating Temperature Range

Commercial (J Version) . . . . . . . . . . . . . . . . . . 0°C to 70°C

Industrial (A Version) . . . . . . . . . . . . . . . . –40°C to +85°C

Storage Temperature Range . . . . . . . . . . . –65°C to +150°C

Lead Temperature (Soldering, 10 sec) . . . . . . . . . . . . . 300°C

Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . . . 215°C

Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 220°C

Receiver Output. When enabled if A > B

by 200 mV, then RO = High. If A < B by

200 mV, then RO = Low.

Receiver Output Enable. A low level

enables the receiver output, RO. A high

level places it in a high impedance state.

Driver Output Enable. A high level enables

the driver differential outputs, A and B. A low

level places it in a high impedance state.

Driver Input. When the driver is enabled,

a logic low on DI forces A low and B high

while a logic high on DI forces A high and

B low.

Ground Connection, 0 V.

Noninverting Receiver Input A/Driver

Output A.

Inverting Receiver Input B/Driver Output B

Power Supply, 5 V 5%.

GND

V_CC

*Stresses above those listed under Absolute Maximum Ratings may cause perma-

nent damage to the device. This is a stress rating only; functional operation of the

device at these or any other conditions above those listed in the operational

sections of this specification is not implied. Exposure to absolute maximum ratings

for extended periods of time may affect device reliability.

PIN CONFIGURATION

ADM1485

Table I. Transmitting

TOP VIEW

(Not to Scale)

GND

Inputs

Outputs

Table II. Receiving

Inputs

A-B

Outputs

≥ +0.2 V

≤ –0.2 V

Inputs Open

CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily

accumulate on the human body and test equipment and can discharge without detection. Although the

ADM1485 features proprietary ESD protection circuitry, permanent damage may occur on devices

subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended

to avoid performance degradation or loss of functionality.

–3–

REV.

ADM1485

Test Circuits

0V OR 3V

DE IN

OUT

Test Circuit 4. Driver Enable/Disable

Test Circuit 1. Driver Voltage Measurement

375⍀

OUT

OD3

60⍀

375⍀

TST

Test Circuit 5. Receiver Propagation Delay

Test Circuit 2. Driver Voltage Measurement

+1.5V

–1.5V

LDIFF

OUT

RE IN

Test Circuit 3. Driver Propagation Delay

Test Circuit 6. Receiver Enable/Disable

Switching Characteristics

1.5V

t_PLH

1.5V

t_PHL

A, B

1/2VO

t_PLH

t_PHL

t_SKEW= ͦt_PLH– t_PHLͦ

90% POINT

1.5V

t_SKEW= ͦt_PLH– t_PHLͦ

10% POINT

–V

t_R

t_F

Figure 3. Receiver Propagation Delay

Figure 1. Driver Propagation Delay, Rise/Fall Timing

1.5V

t_LZ

1.5V

t_ZL

1.5V

t_ZL

1.5V

t_LZ

2.3V

A, B

1.5V

+ 0.5V

– 0.5V

O/P LOW

O/P HIGH

t_ZH

t_HZ

t_ZH

t_HZ

– 0.5V

Figure 2. Driver Enable/Disable Timing

Figure 4. Receiver Enable/Disable Timing

REV.

–4–

Typical Performance Characteristics–ADM1485

0.40

I = 8mA

0.35

0.30

0.25

0.20

0.15

–50

–25

100

125

0.25

0.50

0.75

1.00

1.25

1.50

1.75

2.00

TEMPERATURE – ؇C

OUTPUT VOLTAGE – V

TPC 1. Output Current vs. Receiver Output Low Voltage

TPC 4. Receiver Output Low Voltage vs. Temperature

–2

–4

–6

–8

–10

–12

–14

–16

–18

3.50

3.75

4.00

4.25

4.50

4.75

5.00

0.5

1.0

1.5

2.0

2.5

3.0

3.5

4.0

4.5

OUTPUT VOLTAGE – V

TPC 2. Output Current vs. Receiver Output High Voltage

TPC 5. Output Current vs. Driver Differential

Output Voltage

4.55

2.15

I = 8mA

4.50

2.10

2.05

2.00

1.95

1.90

4.45

4.40

4.35

4.30

4.25

4.20

4.15

–50

–25

100

125

–50

–25

100

125

TEMPERATURE – ؇C

TPC 3. Receiver Output High Voltage vs. Temperature

TPC 6. Driver Differential Output

Voltage vs. Temperature, R_L= 26.8 Ω

–5–

REV.

ADM1485

100

0.7

0.6

0.5

0.4

0.3

0.2

0.1

| t

– t

PLH

PHL

0.5

1.0

1.5

2.0

2.5

3.0

3.5

4.0

4.5

–50

–25

100

125

OUTPUT VOLTAGE – V

TEMPERATURE – ؇C

TPC 7. Output Current vs. Driver Output Low Voltage

TPC 10. Rx Skew vs. Temperature

–10

–20

–30

–40

–50

–60

| t

PHLA

– t |

PHLB

–70

–80

–90

–100

–110

–120

| t

PLHA

– t |

PLHB

–50

–25

100

125

0.5

1.0

1.5

2.0

2.5

3.0

3.5

4.0

4.5

5.0

OUTPUT VOLTAGE – V

TEMPERATURE – ؇C

TPC 11. Tx Skew vs. Temperature

TPC 8. Output Current vs. Driver Output High Voltage

1.4

1.1

1.2

1.0

0.8

0.6

0.4

0.2

1.0

DRIVER ENABLED

0.9

0.8

| t

– t

PLH

PHL

0.7

DRIVER DISABLED

0.6

0.5

–50

–25

100

125

150

–25

100

125

TEMPERATURE – ؇C

TPC 12. Tx Pulse Width Distortion

TPC 9. Supply Current vs. Temperature

–6–

REV.

ADM1485

1, 2

TPC 13. Unloaded Driver Differential Outputs

TPC 16. Driver/Receiver Propagation Delays High to Low

1, 2

TPC 14. Loaded Driver Differential Outputs

TPC 17. Driver Output at 30 Mbps

1, 2

TPC 15. Driver/Receiver Propagation Delays Low to High

–7–

REV.

ADM1485

APPLICATION INFORMATION

Differential Data Transmission

As with any transmission line, it is important that reflections are

minimized. This can be achieved by terminating the extreme ends

of the line using resistors equal to the characteristic impedance

of the line. Stub lengths of the main line should also be kept as

short as possible. A properly terminated transmission line appears

purely resistive to the driver.

Differential data transmission is used to reliably transmit data at

high rates over long distances and through noisy environments.

Differential transmission nullifies the effects of ground shifts and

noise signals that appear as common-mode voltages on the line.

There are two main standards approved by the Electronics

Industries Association (EIA) that specify the electrical charac-

teristics of transceivers used in differential data transmission.

The RS-422 standard specifies data rates up to 10 MBaud and

line lengths up to 4000 ft. A single driver can drive a transmission

line with up to 10 receivers.

In order to cater to true multipoint communications, the RS-485

standard was defined. This standard meets or exceeds all the

requirements of the RS-422 but also allows for up to 32 drivers

and 32 receivers to be connected to a single bus. An extended com-

mon-mode range of –7 V to +12 V is defined. The most

significant difference between the RS-422 and the RS-485 is the

fact that the drivers may be disabled, thereby allowing more than

one (32 in fact) to be connected to a single line. Only one driver

should be enabled at a time, but the RS-485 standard contains

additional specifications to guarantee device safety in the event of

line contention.

Figure 5. Typical RS-485 Network

Thermal Shutdown

The ADM1485 contains thermal shutdown circuitry that protects

the part from excessive power dissipation during fault conditions.

Shorting the driver outputs to a low impedance source can result

in high driver currents. The thermal sensing circuitry detects the

increase in die temperature and disables the driver outputs. The

thermal sensing circuitry is designed to disable the driver outputs

when a die temperature of 150°C is reached. As the device cools,

the drivers are re-enabled at 140°C.

Table III. Comparison of RS-422 and RS-485 Interface Standards

Specification

RS-422

RS-485

Transmission Type

Differential

4000 ft.

2 V

100 Ω

4 kΩ min

200 mV

Differential

4000 ft.

1.5 V

54 Ω

12 kΩ min

200 mV

Maximum Cable Length

Minimum Driver Output Voltage

Driver Load Impedance

Receiver Input Resistance

Receiver Input Sensitivity

Receiver Input Voltage Range

Propagation Delay

The ADM1485 features very low propagation delay, ensuring

maximum baud rate operation. The driver is well balanced,

ensuring distortion free transmission.

–7 V to +7 V –7 V to +12 V

No. of Drivers/Receivers per Line 1/10

32/32

Another important specification is a measure of the skew between

the complementary outputs. Excessive skew impairs the noise

immunity of the system and increases the amount of electro-

magnetic interference (EMI).

Cable and Data Rate

The transmission line of choice for RS-485 communications is a

twisted pair. Twisted pair cable tends to cancel common-mode

noise and also causes cancellation of the magnetic fields generated

by the current flowing through each wire, thereby reducing the

effective inductance of the pair.

Receiver Open-Circuit Fail-Safe

The receiver input includes a fail-safe feature that guarantees a

logic high on the receiver when the inputs are open circuit or

floating.

The ADM1485 is designed for bidirectional data communications

on multipoint transmission lines. A typical application showing

a multipoint transmission network is illustrated in Figure 5.

An RS-485 transmission line can have as many as 32 transceivers

on the bus. Only one driver can transmit at a particular time,

but multiple receivers may be enabled simultaneously.

REV.

–8–

ADM1485

OUTLINE DIMENSIONS

5.00 (0.1968)

4.80 (0.1890)

6.20 (0.2441)

5.80 (0.2284)

4.00 (0.1574)

3.80 (0.1497)

0.50 (0.0196)

0.25 (0.0099)

1.27 (0.0500)

BSC

45°

1.75 (0.0688)

1.35 (0.0532)

0.25 (0.0098)

0.10 (0.0040)

8°

0°

0.51 (0.0201)

0.31 (0.0122)

COPLANARITY

0.10

1.27 (0.0500)

0.40 (0.0157)

0.25 (0.0098)

0.17 (0.0067)

SEATING

PLANE

COMPLIANT TO JEDEC STANDARDS MS-012-AA

CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS

(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR

REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.

Figure 6. 8-Lead Standard Small Outline Package [SOIC_N]

Narrow Body

(R-8)

Dimensions shown in millimeters and (inches)

3.20

3.00

2.80

5.15

4.90

4.65

3.20

3.00

2.80

PIN 1

IDENTIFIER

0.65 BSC

0.95

0.85

0.75

15° MAX

1.10 MAX

0.80

0.55

0.40

0.15

0.05

0.23

0.09

6°

0°

0.40

0.25

COPLANARITY

0.10

COMPLIANT TO JEDEC STANDARDS MO-187-AA

Figure 7. 8-Lead Mini Small Outline Package [MSOP]

(RM-8)

Dimensions shown in millimeters

REV. F

–9–

ADM1485

0.400 (10.16)

0.365 (9.27)

0.355 (9.02)

0.280 (7.11)

0.250 (6.35)

0.240 (6.10)

0.325 (8.26)

0.310 (7.87)

0.300 (7.62)

0.100 (2.54)

BSC

0.060 (1.52)

MAX

0.195 (4.95)

0.130 (3.30)

0.115 (2.92)

0.210 (5.33)

MAX

0.015

(0.38)

MIN

0.150 (3.81)

0.130 (3.30)

0.115 (2.92)

0.015 (0.38)

GAUGE

0.014 (0.36)

0.010 (0.25)

0.008 (0.20)

PLANE

SEATING

PLANE

0.022 (0.56)

0.018 (0.46)

0.014 (0.36)

0.430 (10.92)

MAX

0.005 (0.13)

MIN

0.070 (1.78)

0.060 (1.52)

0.045 (1.14)

COMPLIANT TO JEDEC STANDARDS MS-001

CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS

(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR

REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.

CORNER LEADS MAY BE CONFIGURED AS WHOLE OR HALF LEADS.

Figure 8. 8-Lead Plastic Dual In-Line Package [PDIP]

Narrow Body

(N-8)

Dimensions shown in inches and (millimeters)

ORDERING GUIDE

Model¹

ADM1485JNZ

Temperature Range

0°C to 70°C

−40°C to +85°C

Package Description

8-Lead PDIP

8-Lead SOIC_N

8-Lead PDIP

8-Lead MSOP

8-Lead SOIC_N

Package Option

Brand

N-8

R-8

ADM1485JRZ

ADM1485JR-REEL

ADM1485JRZ-REEL

ADM1485ANZ

ADM1485ARMZ

ADM1485ARMZ-REEL

ADM1485ARMZ-REEL7

ADM1485ARZ

ADM1485ARZ-REEL

ADM1485ARZ-REEL7

ADM1485JCHIPS

R-8

N-8

RM-8

R-8

Die

M42

¹Z = RoHS Compliant Part.

–10–

REV. F

ADM1485

REVISION HISTORY

8/12—Rev. E to Rev. F

Changed Data Rates of Up to 5 Mbps to Typical Data Rates

of 30 Mbps..........................................................................................1

Updated Outline Dimensions .........................................................9

Changes to Ordering Guide ..........................................................10

9/03—Data Sheet changed from REV. D to REV. E.

Change to SPECIFICATIONS.........................................................2

Changes to ORDERING GUIDE ...................................................3

Updated OUTLINE DIMENSIONS ..............................................9

7/03—Data Sheet changed from REV. C to REV. D.

Changes to SPECIFICATIONS ......................................................2

Changes to ABSOLUTE MAXIMUM RATINGS.........................3

Updated ORDERING GUIDE.........................................................3

1/03—Data Sheet changed from REV. B to REV. C.

Change to SPECIFICATIONS.........................................................2

Change to ORDERING GUIDE......................................................3

12/02—Data Sheet changed from REV. A to REV. B.

Deleted Q-8 Package.......................................................... Universal

Edits to FEATURES ..........................................................................1

Edits to GENERAL DESCRIPTION ..............................................1

Edits, additions to SPECIFICATIONS...........................................2

Edits, additions to ABSOLUTE MAXIMUM RATINGS.............3

Additions to ORDERING GUIDE..................................................3

TPCs updated and reformatted.......................................................5

Addition of 8-Lead MSOP Package ................................................9

Update to OUTLINE DIMENSIONS.............................................9

registered trademarks are the property of their respective owners.

D00063-0-8/12(F)

REV. F

–11–

ADM1485ARM-REEL7 [ADI]

相关型号：

SI9130DB

SI9135LG-T1

SI9135LG-T1-E3

SI9135_11

SI9136_11

SI9130CG-T1-E3

SI9130LG-T1-E3

SI9130_11

SI9137

SI9137DB

SI9137LG

SI9122E