ADM1487JR [ADI]

Ultra-Low Power RS-485/RS-422 Transceiver with Low EMI and +/-10kV ESD Protection; 超低功耗RS - 485 / RS - 422收发器,具有低EMI和+/- 10kV ESD保护
ADM1487JR
型号: ADM1487JR
厂家: ADI    ADI
描述:

Ultra-Low Power RS-485/RS-422 Transceiver with Low EMI and +/-10kV ESD Protection
超低功耗RS - 485 / RS - 422收发器,具有低EMI和+/- 10kV ESD保护

线路驱动器或接收器 驱动程序和接口 接口集成电路 光电二极管 信息通信管理
文件: 总8页 (文件大小:378K)
中文:  中文翻译
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PRELIMINARY TECHNICAL DATA  
Ultra-LowPowerRS-485/RS-422Transceiver  
a
with Low EMI and +/-10kV ESD Protection  
ADM1487  
Preliminary Technical Data  
FEATURES  
GENERAL DESCRIPTION  
Low Power - 120µA Max ICC with Driver Disabled  
The ADM1487 is an ultra-low power RS-485/RS-422  
transceiver consisting of one driver and one receiver per  
package. Quiescent operating current is typically 80µA  
and 1µA in shutdown mode. The driver and receiver both  
have three-state outputs. This allows multiple drivers to be  
connected to an RS-485/RS-422 bus, or several receiver  
outputs to be connected to a serial data bus. The driver  
will maintain a high-impedance output state even with  
power off, while the receiver features fail-safe operation  
that guarantees a logic high output if the inputs are left  
open-circuit.  
High Input Impedance — Up to 256 Transceivers on Bus  
Low-Current (1µA) Shutdown Mode  
Slew Rate Control for Error-Free Data  
Transmission and Low EMI  
±10ꢀk ESD Protection (Human Bodꢁ Model) on  
RS-485 I/O pins  
Thermal Protection of Driver  
Glitch-Free Driver Power-Up Allows Hot Connection  
Driver Maintains High Output Impedance with Power  
Off  
The device has slew-rate limited drivers to minimize elec-  
tromagnetic interference (EMI) and reduce reflections  
caused by incorrectly terminated cables.  
Wide Common-Mode Range Allows ±±k Ground Differ-  
ences Between Devices  
Pin-Compatible with Industrꢁ Standard ±51±6  
APPLICATIONS  
Batterꢁ-Powered RS-485/RS-422 Sꢁstems  
Level Translation  
FUNCTIONAL BLOCK DIAGRAM  
RO  
RE  
DE  
DI  
V
1
2
3
4
8
7
6
5
CC  
R
B
A
D
GND  
ADM1487  
REV. PrC 08/02  
Information furnished by Analog Devices is believed to be accurate and  
reliable. However, no responsibility is assumed by Analog Devices for its  
use, nor for any infringements of patents or other rights of third parties  
which may result from its use. No license is granted by implication or  
otherwise under any patent or patent rights of Analog Devices.  
One Technologꢁ Waꢁ, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: ±81/329-4±00  
Fax: ±81/326-8±03  
www.analog.com  
Analog Devices, Inc., 2002  
–1–  
PRELIMINARY TECHNICAL DATA  
ADM1487  
ADM1487SPECIFICATIONS  
DC ELECTRICAL CHARACTERISTICS (VCC = +5V 5ꢀ% ꢁA = 0°C ꢁO +70°C% UNLESS OꢁHERWISE NOꢁED)  
Parameter  
Min  
Typ  
Max  
Units TestConditions/Comments  
Differential Driver Output Voltage,VOD1  
5
V
Unloaded, IO = 0  
Differential Driver Output Voltage, VOD2 2.0  
1.5  
V
V
Figure 1, R = 50(RS-422)  
Figure 1, R = 27(RS-485)  
5
Change in Magnitude of Driver  
Differential Output Voltage for  
Complementary Output States, VOD  
0.2  
V
Figure 1, R = 27or R = 50ꢀ  
Driver Common-Mode Output  
Voltage, VOC  
3
V
V
Figure 1, R = 27or R = 50ꢀ  
R = 27or R = 50ꢀ  
Change in Magnitude of Driver  
0.2  
Common-Mode Output Voltage for  
Complementary Output States, |VOC  
|
Input High Voltage (DE, DI, RE), VIH  
Input Low Voltage (DE, DI, RE), VIL  
Input Current (DE, DI, RE), IIN1  
Input Current (A, B), IIN2  
2
V
V
0.8  
2
µA  
0.30  
-0.15  
mA  
mA  
DE = 0, VCC= 0V or 5.25V, VIN = 12V  
DE = 0, VCC = 0V or 5.25V, VIN = –7V  
Differential Input Threshold Voltage  
for Receiver, VTH  
-0.2  
3.5  
0.2  
V
–7V VCM 12V  
Receiver Input Hysteresis, VTH  
Receiver Output High Voltage, VOH  
Receiver Output Low Voltage, VOL  
45  
96  
mV  
V
VCM = 0V  
IO =-4mA, VID = 200mV  
IO = 4mA, VID = –200mV  
VCC = Max, 0.4V Vo 2.4V  
0.4  
1
V
Three-State (High Impedance) Output  
Current at Receive, IOZR  
µA  
Receiver Input Resistance, RIN  
Supply Current, ICC  
70  
kꢀ  
–7V VCM 12V  
120  
80  
200  
120  
µA  
µA  
No Load, Output Enabled  
No Load, Output Disabled  
Supply Current in Shutdown Mode, ISHDN  
Driver Short-Circuit Ourrent, IOSD1  
Driver Short-Circuit Ourrent, IOSD2  
Receiver Short-Circuit Current, IOSR  
1
10  
µA  
mA  
mA  
mA  
DE = 0V, RE = VCC  
35  
35  
7
250  
VOUT = HIGH, –7V VO 12V  
VOUT = LOW, –7V Vo 12V  
0V VO VOC  
250  
85  
Rev. PrC  
–2–  
PRELIMINARY TECHNICAL DATA  
ADM1487  
ADM1487SPECIFICATIONS(continued)  
ELECTRICAL CHARACTERISTICS (VCC = +5V 5ꢀ% ꢁA = ꢂ-0°C ꢁO +ꢃ5°C% UNLESS OꢁHERWISE NOꢁED)  
Parameter  
Min  
Typ  
Max  
Units Test Conditions/Comments  
Differential Driver Output Voltage, VOD1  
Differential Driver Output Voltage, VOD2  
5
V
Unloaded, IO = 0  
2.0  
1.5  
V
V
Figure 1, R = 50(RS-422)  
Figure 1, R = 27(RS-485)  
5
3
Driver Common-Mode  
Output Voltage, VOC  
V
Figure 1, R = 27or R = 50ꢀ  
Differential Input Threshold  
Voltage for Receiver, VTH  
–0.2  
0.2  
V
–7V VCM 12V  
Receiver Input Hysteresis, VTH  
45  
mV VCM = 0V  
Supply Current, ICC  
120  
80  
200  
120  
µA  
µA  
No Load, Output Enabled  
No Load, Output Disabled  
Supply Current in Shutdown Mode, ISHDN  
Driver Input to Output High, tDPLH  
1
10  
µA  
ns  
DE = 0V, RE = VCC  
150  
150  
1200  
Figures 2, 3, RDIFF= 54,  
CL1 = CL2 = 100pF  
Driver Input to Output Low, tDPHL  
Driver Output to Output, tSKEW  
Driver Rise or Fall Time, tDR, tDF  
Receiver Input to Output High, tRPLH  
Receiver Input to Output Low, tRHL  
Differential Receiver Skew, tSKD  
1200  
600  
ns  
ns  
Figures 2, 3, RDIFF= 54,  
CL1 = CL2 = 100pF  
100  
Figures 2, 3, RDIFF= 54,  
CL1 = CL2 = 100pF  
150  
30  
2000  
250  
ns  
Figures 2, 3, RDIFF= 54,  
CL1 = CL2 = 100pF  
140  
140  
13  
ns  
Figures 2, 4, RDIFF= 54,  
CL1 = CL2 = 100pF  
30  
250  
ns  
Figures 2, 4, RDIFF= 54,  
CL1 = CL2 = 100pF  
ns  
Figures 2, 4, RDIFF= 54,  
|tRPLH-tRPHL  
|
CL1 = CL2 = 100pF  
Maximum Data Rate, fMAX  
250  
kbps  
SWITCHING CHARACTERISTICS (VCC = +5V 5ꢀ% ꢁA = ꢂ-0°C ꢁO +ꢃ5°C% UNLESS OꢁHERWISE NOꢁED)  
Parameter  
Min  
Typ  
Max  
Units TestConditions/Comments  
Driver Input to Output High, tDPLH  
150  
1200  
ns  
ns  
ns  
ns  
Figures 2, 3, RDIFF= 54,  
CL1 = CL2 = 100pF  
Driver Input to Output, tDPHL  
Driver Output to Output, tSKEW  
Driver Rise or Fall Time, tDR, tDF  
150  
1200  
600  
Figures 2, 3, RDIFF= 54,  
CL1 = CL2 = 100pF  
250  
Figures 2, 3, RDIFF= 54,  
CL1 = CL2 = 100pF  
150  
1200  
Figures 2, 3, RDIFF= 54,  
CL1 = CL2 = 100pF  
Driver Enable to Output High, tDZH  
Driver Enable to Output Low, tDZL  
Driver Disable Time from Low, tDLZ  
100  
100  
150  
1500  
1500  
1500  
ns  
ns  
ns  
Figures 5, 6, CL = 100pF, S2 Closed  
Figures 5, 6, CL = 100pF, S1 Closed  
Figures 5, 6, CL = l5pF, S1 Closed  
Rev. PrC  
–3–  
PRELIMINARY TECHNICAL DATA  
ADM1487  
ADM1487SPECIFICATIONS(continued)  
SWITCHING CHARACTERISTICS (VCC = +5V 5ꢀ% ꢁA = ꢂ-0°C ꢁO +ꢃ5°C% UNLESS OꢁHERWISE NOꢁED)  
Parameter  
Min  
150  
30  
Typ  
Max  
1500  
250  
Units Test Conditions/Comments  
Driver Disable Time from High, tDHZ  
Receiver Input to Output, tRPLH  
ns  
ns  
Figures 5, 6, CL= l5pF, S2 Closed  
140  
140  
13  
Figures.2, 4, RDIFF= 54,  
CL1 = CL2 = 100pF  
Receiver Input to Output Low, tRPHL  
DifferentialReceiverSkew, tSKD  
30  
250  
ns  
ns  
Figures.2, 4, RDIFF= 54,  
CL1 = CL2 = 100pF  
Figures.2, 4, RDIFF= 54,  
|tPLH-tPHL  
|
CL1 = CL2 = 100pF  
Receiver Enable to Output Low, tRZL  
Receiver Enable to Output High, tRZH  
Receiver Disable from Low, tRLZ  
Receiver Disable from High, tRHZ  
Maximum Data Rate, fMAX  
20  
20  
20  
20  
50  
50  
50  
50  
ns  
ns  
Figures 7, 8, CRL = l5pF, S1 Closed  
Figures 7, 8, CRL = l5pF, S2 Closed  
Figures 7, 8, CRL = l5pF, S1 Closed  
Figures 7, 8, CRL = l5pF, S2 Closed  
ns  
ns  
250  
50  
kbps  
ns  
Time to Shutdown, tSHDN  
200  
600  
DE = 0, RE = low to high transition  
Driver Enable from Shutdown to  
Output High, tDZH(SHDN)  
2000  
ns  
Figures 5, 6, CL = 100pF, S2 Closed  
Driver Enable from Shutdown to  
Output Low, tDZL(SHDN)  
2000  
2000  
2000  
ns  
ns  
ns  
Figures 5, 6, CL = 100pF, S1 Closed  
Figures 7, 8, CL = l5pF, S2 Closed  
Figures 7, 8, CL = l5pF, S1 Closed  
Receiver Enable from Shutdown to  
Output High, tRZH(SHDN)  
Receiver Enable from Shutdown to  
Output Low, tRZL(SHDN)  
NOTES  
1Absolute maximum ratings are those beyond which the safety of the device cannot be guaranfeed.  
2All currents into device pins are positive; all currents out ot device pins are negative. All voltages are referenced to device ground unless otherwise specified.  
3All typicals are given for Vcc = 5V and Tp = 25°C.  
4The ADM1487 is not tested and is not quality-assurance sampled at -40°C and at 85°C. These specifications are guaranteed by design, correlation, andlor inference from  
0°C, 25°C and/or 70°C tests.  
PIN CONFIGURATION  
ABSOLUTE MAXIMUM RATINGS  
Supply Voltage (Vcc) . . . . . . . . . . . . . . . . . . . . . . . . . . 12V  
Control Input Voltage . . . . . . . . . . . –0.5V to Vcc + 0.5V  
Driver Input Voltage . . . . . . . . . . . –0.5V to Vcc + 0.5V  
Driver Output Voltage . . . . . . . . . . . . . . . . . . . . . . . . 14V  
Receiver InputVoltage . . . . . . . . . . . . . . . . . . . . . . . . 14V  
Receiver Output Voltage . . . . . . . . . –0.5V to Vcc + 0.5V  
Operating Temperature Range . . . . . . 0°C TA 70°C  
Lead Temperature (Soldering, 10 sec) . . . . . . . . . 300°C  
RO  
RE  
DE  
DI  
V
CC  
1
2
3
4
8
7
6
5
B
ADM1487  
TOP VIEW  
(Not to Scale)  
A
GND  
ORDERING INFORMATION  
Model Temperature Range Package Option  
ADM1487JN 0°C to +70°C  
ADM1487JR 0°C to +70°C  
*StressesabovethoselistedunderAbsoluteMaximumRatingsmaycausepermanent  
damage to the device. This is a stress rating only; functional operation of the device  
attheseoranyotherconditionsabovethoseindicatedintheoperationalsectionofthis  
specification is not implied. Exposure to absolute maximum rating conditions for  
extendedperiodsmayaffectdevicereliability.  
8 Pin Plastic DIP  
8 Pin SO  
THERMAL CHARACTERISTICS  
8-Pin Plastic DIP Package  
θJA = tbd K/Watt, θJC = tbd K/Watt  
8-Pin Plastic SO Package  
ADM1487AN –40°C to +85°C  
ADM1487AR –40°C to +85°C  
8 Pin Plastic DIP  
8 Pin SO  
θJA = tbd K/Watt, θJC = tbd K/Watt  
Rev. PrC  
–4–  
PRELIMINARY TECHNICAL DATA  
ADM1487  
ADM1487 TEST CIRCUITS AND TIMING  
A
V
CC  
R
V
OD  
TEST  
POINT  
R
S1  
S2  
A
500V  
V
OC  
OUTPUT  
UNDER  
TEST  
C
RL  
15pF  
Figure 1. Driver DC Load Test Circuit  
3V  
Figure 5. Test Load for Driver Enable/Disable Time Test  
DE  
D
A
B
f = 1MHz, t # 10ns, t # 10ns  
r
f
C
L1  
A
3V  
0V  
5V  
VOL  
DI  
DE  
A, B  
A, B  
V
1.5V  
R
R
RO  
OD2  
DIFF  
B
C
L2  
tDLZ  
tDZL(SHDN), tDZL  
15pF  
VOL+ 0.5V  
2.3V  
OUTPUT NORMALLY LOW  
V
OH  
OUTPUT NORMALLY HIGH  
, tDZH  
Figure 2. Driver/Receiver Timing Test Circuit  
VOH- 0.5V  
2.3  
V
VOL  
tDHZ  
tDZH(SHDN)  
f = 1MHz, t # 10ns, t # 10ns  
r
f
3V  
Figure 6. Driver Enable and Disable Times  
DI  
1.5V  
0V  
tDPLH  
tD  
PHL  
V
CC  
B
A
V0  
V0/2  
1kV  
TEST  
VDIFF = VA - VB  
POINT  
V0  
0V  
-V0  
90%  
tDF  
90%  
tDR  
VDIFF  
10%  
10%  
S1  
RO  
tSKEW = |tDPLH-tDPHL|  
C
RL  
15pF  
S2  
Figure 3. Driver Propagation Delays  
f = 1MHz, t # 10ns, t # 10ns  
r
f
1kV  
A
B
VOD2  
-VOD2  
tRPHL  
tRPLH  
VOH  
VOL  
Figure 7. Test Load for Receiver Enable/Disable Time Test  
1.5V  
RO  
3V  
0V  
5V  
f = 1MHz, t # 10ns, t # 10ns  
r f  
RE  
RO  
RO  
1.5  
V
Figure 4. Receiver Propagation Delays  
tRLZ  
t
RZL(SHDN), tRZL  
1.5  
V
OUTPUT NORMALLY LOW  
0.5V  
0.5V  
5V  
OUTPUT NORMALLY HIGH  
1.5  
V
0V  
tRHZ  
tRZH(SHDN), tRZH  
Figure 8. Receiver Enable and Disable Delay Times  
Rev. PrC  
–5–  
PRELIMINARY TECHNICAL DATA  
ADM1487  
ADM1487TYPICALPERFORMANCECHARACTERISTICS  
TPC1. No-load Supply Current vs. Tem-  
perature  
TPC2. Output Current vs. Receiver Out-  
put High Voltage  
TPC3. Output Current vs. Receiver Out-  
put Low Voltage  
TPC5. Receiver Output Low  
Voltage vs. Temperature  
TPC4. Receiver Output High  
Voltage vs. Temperature  
TPC6. Shutdown Current vs.  
Temperature  
PIN FUNCTION DESCRIPTION  
Pin Mnemonic  
Description  
1
2
3
4
RO  
RE  
D E  
DI  
Receiver Output. When RE is low and A - B (more positive than) 200mV, RO will be high.  
When RE is low and A - B (more negative than) –200mV, RO will be low.  
Receiver Output Enable. Take RE low to enable RO; RO is high impedance when RE is high.  
Take RE high and DE low to enter low-power shutdown mode.  
Driver Output Enable. Take DE high to enable driver outputs. These outputs are high  
impedance when DE is low. Take RE high and DE low to enter low-power shutdown mode.  
Driver Input. With DE high, a low on DI forces non-inverting output low and inverting output  
high. Similarly, a high on DI forces non-inverting output high and inverting output low.  
5
6
7
8
GND  
A
Ground  
Non-Inverting Receiver Input and Non-Inverting Driver Output  
Inverting Receiver Input and Inverting Driver Output  
Positive Supply 4.75V =VCC =5.25V  
B
VCC  
Rev. PrC  
–6–  
PRELIMINARY TECHNICAL DATA  
ADM1487  
DEVICE TRUTH TABLES  
RECEIVING  
TRANSMITTING  
INPUTS  
OUTPUTS  
INPUTS  
OUTPUT  
R E  
X
D E  
1
DI  
1
Z
0
1
Y
R E  
0
D E  
X
A-B  
0.2V  
-0.2V  
Open/shorted  
X
R O  
1
0
1
X
1
0
0
X
0
0
0
X
X
High-Z  
High-Z  
0
X
1
1
0
Shutdown*  
1
0
Shutdown*  
X = Don’t care  
CIRCUIT DESCRIPTION  
*In shutdown mode, driver and receiver outputs high impedance  
SHUTDOWN MODE  
If RE is taken high while DE is taken low, the device will  
enter a low-power shutdown mode, in which the supply  
current is typically 1µA.  
The ADM1487 is a differential input, differential output  
transceiver designed RS-485/RS-422 serial data communi-  
cations over twisted-pair cables. It is a half-duplex device  
intended for alternate transmission and reception of data  
over a single twisted-pair cable, and the driver outputs and  
receiver inputs are internally linked and brought out to a  
single pair of pins.  
If the driver outputs are active immediately before shut-  
down (DE high), the supply current will not drop to 1µ  
until the driver outputs have settled to their three-state  
mode, which can take up to 2.6µs worst-case. If DE is al-  
ready low and shutdown is entered by taking RE high, the  
supply current will drop to 1µA very quickly.  
When RE is taken low and/or DE is takem high, the de-  
vice will wake up within 3.5µs.  
Its principal features include ultra-low power operation, a  
controlled slew-rate driver that minimizes electromagnetic  
interference (EMI) and signals reflections due to incor-  
rectly terminated lines, and high input impedance that al-  
lows up to 256 receivers to be connected to a bus.  
If shutdown mode is not used, the fact that DE is active-  
high and RE is active-low offers a convenient way of  
switching the device between transmit and receive, by ty-  
ing DE and RE together. This is useful, for example, in  
applications using half duplex operation and where several  
receiver outputs are connected to a serial bus.  
THREE-STATE BUS CONNECTION  
The ADM1487 has a Driver Enable pin (DE) that enables  
the driver outputs when taken high or puts the driver out-  
puts into a high-impedance state when taken low. This al-  
lows several driver outputs to be connected to an RS-422/  
RS-485 bus.  
The device is guaranteed not to enter shutdown mode if  
DE and RE are driven in this way. If DE is low and RE is  
high for less than 50ns the device will not enter shutdown.  
If DE is low and RE is high for greater than 600ns, the  
device is guaranteed to enter shutdown.  
Similarly, the device has a (active-low) Receiver Enable  
pin (RE). Taking this low enables the receiver, while tak-  
ing it high puts the receiver outputs into a high-impedance  
state. This allows several receiver outputs to be connected  
to a serial data bus.  
RECEIVER INPUTS  
The ADM1487 receiver has an input common-mode  
range covering the entire RS-485 range of –7V to 12V.  
Internal 96kinput resistors from each line terminal to  
ground provide a 1/8 unit load to the RS485 bus.  
The input impedance of the device is 96k, which is 8  
times higher than the standard RS-485 load of 12k. A  
standard driver can driver 32 standard loads, so up to 256  
ADM1487 receivers, or a combination of ADM1487 and  
other devices up to 32 unit loads, may be connected to an  
RS-422/RS485 bus driven by a single driver.  
Differential signals greater than 200mV within the speci-  
fied input common-mode range are converted to a TTL-  
compatible logic signal at the receiver output. A small  
amount of input hysteresis is included to minimize the ef-  
fects of noise on the line signals. If the line is terminated  
or the receiver inputs are shorted together, the receiver  
output will retain the last valid line signal due to the  
45mV of hysteresis incorporated in the receiver circuit. If  
the receiver inputs are left floating (unterminated), an in-  
ternal pull-up of 10µA at the A input will force the re-  
ceiver output to a guranteed high output state.  
LOW POWER OPERATION  
The ADM1487 draws very little supply current (typically  
80µA) when the driver outputs are disabled or unloaded.  
This will increase by up to 72µA if the driver outputs are  
enabled (but unloaded) and applying the maximum output  
swing of 5V across the receiver input resistors.  
However, in practical applications with the device driving  
and RS-485/RS422 cable or bus, the current drain is  
dominated by the current sourced into the line termination  
resistors and any other devices on the bus. With a half-ter-  
mination (120load) between the driver outputs, the load  
current can be in excess of 13mA as the drivers force a  
minimum of 1.5V across the line, and can be greater than  
25mA with a fully terminated 60line attached.  
DRIVER OUTPUT STAGE  
The RS-485 specification requires that a transceiver with-  
stand common-mode voltages of up to 12V above or –7V  
below system ground at the RS-485 line connections.  
In addition, the transceiver must be protected against both  
ESD and latch-up. This precludes the use of conventional  
Rev. PrC  
–7–  
PRELIMINARY TECHNICAL DATA  
ADM1487  
CMOS outout stages, which include parasitic diodes from  
their driver outputs to each supply rail and can latch up  
when these diodes conduct.  
CURRENT LIMIT AND THERMAL SHUTDOWN  
The ADM1487 incorporates two protection mechanisms to  
guard the drivers against short-circuits, bus contention or  
other fault conditions. The first is a current-limited output  
stage that protects the driver against short-circuits over the  
entire common-mode voltage range by limiting the output  
current to about 70mA. Under extreme fault condtions  
where the current limit is not effective, a thermal shutdown  
circuit puts the driver outputs into a high-impedance state if  
the die temperature exceeds 150°C, and does not turn them  
back on until the temperature has fallen to 130°C.  
V
CC  
SCHOTTKY  
REVERSE-BIASED  
WHEN OUTPUT  
> V +V  
CC  
D
PARASITIC  
DIODE D  
P
SCHOTTKY  
REVERSE-BIASED  
WHEN OUTPUT  
< GND - V  
D
PARASITIC  
DIODE D  
P
ENHANCED ESD PROTECTION  
All Analog Devices parts incorporate protection against  
electrostatic discharge (ESD) to protect the devices dur-  
ing handling, assembly and normal operation. In addition,  
the ADM1487 has enhanced ESD protection up to 10kV  
on the A and B I/O pins to protect against severe opera-  
tional conditions such as line transients, connection and  
disconnection.  
Figure 9. ADM1487 Driver Output Stage  
The ADM1487 output includes Schottky diodes in series  
with the positive supply to the drain of the P-channel output  
device and in series with the drain of the N-channel output  
device. These diodes prevent the P-channel's parasitic diode  
from conducting when the output voltage exceeds VCC and  
prevent the N-channel's parasitic diode from conducting  
when the output voltage falls below ground.  
APPLICATION INFORMATION  
Figure 10 shows a typical application of the ADM1487.  
This is a half-duplex RS-485/RS-422 network. Up to 254  
additional ADM1487s can be connected along the cable  
(termination resistors are only required at each end).  
SLEW RATE CONTROL  
The driver output stage of the ADM1487 has a controlled  
slew rate to minmize signal reflections on incorrectly termi-  
nated lines and to reduce electromagnetic interference (EMI).  
+5V  
(V  
CC  
100n  
RECEIVER  
OUTPUT  
)
5
6
7
8
4
3
2
1
DI  
1
2
3
4
8
7
6
5
D
CABLE TERMINATED  
AT ENDS  
(RO)  
R
RECEIVER  
B
R
DE  
ENABLE  
R
T
T
(RE)  
DRIVER  
RE  
ENABLE  
A
R
+5V (V  
100n  
)
CC  
(DE)  
RO  
D
DATA  
B
A A  
B
IN (DI)  
ADDITIONAL  
ADM1487s  
ADM1487  
ADM1487  
Figure 10. Typical Half-Duplex RS-485/RS-422 Network  
OUTLINE DIMENSIONS  
Dimensionsshownininchesand(mm).  
8-Pin Plastic Dual-In-Line Package (N-8)  
8-Pin SO Package (R-8)  
0.430 (10.92)  
0.348 (8.84)  
0.1968 (5.00)  
0.1890 (4.80)  
8
5
0.280 (7.11)  
0.240 (6.10)  
85  
0.1574 (4.00)  
0.2440 (6.20)  
0.2284 (5.80)  
14  
0.325 (8.25)  
0.300 (7.62)  
0.1497 (3.80)  
1
4
0.060 (1.52)  
0.015 (0.38)  
PIN 1  
0.195 (4.95)  
0.115 (2.93)  
0.210 (5.33)  
MAX  
0.102 (2.59)  
0.094 (2.39)  
PIN 1  
0.0196 (0.50)  
0.0099 (0.25)  
0.130  
(3.30)  
MIN  
x 45  
0.160 (4.06)  
0.115 (2.93)  
0.015 (0.381)  
0.008 (0.204)  
0.0098 (0.25)  
0.0040 (0.10)  
SEATING  
PLANE  
0.100  
(2.54)  
BSC  
0.022 (0.558)  
0.014 (0.356)  
0.070 (1.77)  
0.045 (1.15)  
8
0
0.0500 0.0192 (0.49)  
0.0500 (1.27)  
0.0160 (0.41)  
SEATING  
PLANE  
0.0098 (0.25)  
0.0075 (0.19)  
(1.27)  
0.0138 (0.35)  
BSC  
Rev. PrC  
–8–  

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