ADM202JRWZ [ADI]
High-Speed, 5 V, 0.1 F CMOS RS-232 Driver/Receivers; 高速， 5 V ， 0.1 ？F的CMOS RS - 232驱动器/接收器
| 型号： | ADM202JRWZ |
| 厂家： | 
ADI |
| 描述： | High-Speed, 5 V, 0.1 F CMOS RS-232 Driver/Receivers |
| 文件： | 总6页 (文件大小：127K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
High-Speed, 5 V, 0.1 F
CMOS RS-232 Driver/Receivers
a
ADM202/ADM203
FEATURES
FUNCTIONAL BLOCK DIAGRAMS
120 kB Transmission Rate
5V INPUT
ADM202: Small (0.1 F) Charge Pump Capacitors
ADM203: No External Capacitors Required
Single 5 V Power Supply
Meets EIA-232-E and V.28 Specifications
Two Drivers and Two Receivers
On-Board DC-DC Converters
؎9 V Output Swing with 5 V Supply
Low Power BiCMOS: 2.0 mA ICC
؎30 V Receiver Input Levels
0.1F
V
C1+
C1–
CC
+5V TO +10V
VOLTAGE
DOUBLER
6.3V
0.1F
6.3V
0.1F
6.3V
V+
V–
C2+
C2–
+10V TO –10V
VOLTAGE
INVERTER
0.1F
16V
0.1F
16V
T1
IN
T1
T1
T2
R1
R2
OUT
TTL/CMOS
INPUTS*
RS-232
APPLICATIONS
Computers
Peripherals
Modems
Printers
Instruments
OUTPUTS
T2
IN
T2
OUT
R1
R1
IN
OUT
TTL/CMOS
OUTPUTS
RS-232
INPUTS**
R2
R2
IN
OUT
GND
ADM202
*INTERNAL 400k⍀ PULL-UP RESISTOR ON EACH TTL/CMOS INPUT.
**INTERNAL 5k⍀ PULL-DOWN RESISTOR ON EACH RS-232 INPUT.
GENERAL DESCRIPTION
5V INPUT
The ADM202/ADM203 is a two-channel RS-232 line driver/
receiver pair designed to operate from a single 5 V power sup-
ply. A highly efficient on-chip charge pump design permits
RS-232 levels to be developed using charge pump capacitors as
small as 0.1 µF. The capacitors are internal to the package on
the ADM203 so no external capacitors are required. These
converters generate 10 V RS-232 output levels.
V
CC
T1
T2
T1
T2
T1
T2
IN
OUT
TTL/CMOS
INPUTS*
RS-232
OUTPUTS
IN
OUT
The ADM202/ADM203 meets or exceeds the EIA-232-E and
V.28 specifications. Fast driver slew rates permit operation up to
120 kB while high-drive currents allow for extended cable lengths.
R1
R1
R2
R1
R2
OUT
OUT
IN
TTL/CMOS
OUTPUTS
RS-232
INPUTS**
R2
IN
An epitaxial BiCMOS construction minimizes power consump-
tion to 10 mW and also guards against latch-up. Overvoltage
protection is provided allowing the receiver inputs to withstand
continuous voltages in excess of 30 V. In addition, all pins
contain ESD protection to levels greater than 2 kV.
C1+
C1–
V–
DO NOT MAKE
CONNECTIONS
TO THESE PINS
C2+
C2+
C2–
C2–
INTERNAL
–10V POWER
SUPPLY
V–
ADM203
The ADM202 is available in 16-lead DIP and both narrow and
wide SOIC packages. The ADM203 is available in a 20-lead
DIP package.
INTERNAL
+10V POWER
SUPPLY
V+
GND
GND
*INTERNAL 400k⍀ PULL-UP RESISTOR ON EACH TTL/CMOS INPUT.
**INTERNAL 5k⍀ PULL-DOWN RESISTOR ON EACH RS-232 INPUT.
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
Fax: 781/326-8703
World Wide Web Site: http://www.analog.com
© Analog Devices, Inc., 2001
(VCC = 5 V ؎ 10%, (ADM202 C1–C4 = 0.1 F). All Specifications
MIN to TMAX, unless otherwise noted)
T
ADM202/ADM203–SPECIFICATIONS
Parameter
Min
Typ
Max
Unit
Conditions/Comments
Output Voltage Swing
5
9
V
VCC = 5 V 5%, T1OUT, T2OUT Loaded with
3 kΩ to GND
Output Voltage Swing
5
9
V
VCC = 5 V 10%, TA = 25°C, T1OUT, T2OUT
Loaded with 3 kΩ to GND
VCC Power Supply Current
2.5
6.0
0.8
mA
No Load, T1IN, T2IN = VCC or T1IN,
T2IN = GND
TIN
TIN
Input Logic Threshold Low, VINL
Input Logic Threshold High, VINH
Logic Pull-Up Current
RS-232 Input Voltage Range
RS-232 Input Threshold Low
RS-232 Input Threshold High
RS-232 Input Hysteresis
V
V
µA
V
V
V
V
kΩ
V
V
µs
V/µs
2.4
12
25
+30
TIN = 0 V
–30
0.8
1.2
1.6
0.4
5
2.4
1.0
7
0.2
3
RS-232 Input Resistance
TA = 0°C to 85°C
IOUT = 1.6 mA
IOUT = –1.0 mA
RS-232 to TTL
TTL/CMOS Output Voltage Low, VOL
TTL/CMOS Output Voltage High, VOH
Propagation Delay
0.4
3.5
0.3
8
5
Transition Region Slew Rate
RL = 3 kΩ, CL= 1000 pF
Measured from +3 V to –3 V or –3 V to +3 V
RL = 3 kΩ, CL = 1 nF
Baud Rate
Output Resistance
RS-232 Output Short Circuit Current
120
300
kB
Ω
mA
VCC = V+ = V– = 0 V, VOUT = 2 V
10
60
Specifications subject to change without notice.
R-16W SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105°C/W
N-20 DIP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 125°C/W
Operating Temperature Range
Commercial (J Version) . . . . . . . . . . . . . . . . . . 0°C to 70°C
Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C
Lead Temperature Soldering
Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . . . 215°C
Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 220°C
ESD Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . >2000 V
ABSOLUTE MAXIMUM RATINGS*
(TA = 25°C unless otherwise noted)
VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 V
V+ . . . . . . . . . . . . . . . . . . . . . . . . . . . . (VCC – 0.3 V) to +14 V
V– . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +0.3 V to –14 V
Input Voltages
TIN . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to (VCC + 0.3 V)
RIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 V
Output Voltages
*This is a stress rating only and functional operation of the device at these or any
other conditions above those indicated in the operation sections of this specifica-
tion is not implied. Exposure to absolute maximum rating conditions for extended
periods of time may affect reliability.
TOUT . . . . . . . . . . . . . . . . . . . (V+, +0.3 V) to (V–, – 0.3 V)
ROUT . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to (VCC + 0.3 V)
Short Circuit Duration
TOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Continuous
Power Dissipation
ORDERING GUIDE
N-16 DIP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 470 mW
R-16N SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 600 mW
R-16W SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 500 mW
N-20 DIP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 890 mW
Thermal Impedance
N-16 DIP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 135°C/W
R-16N SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105°C/W
Model
Temperature Range
Package Option
ADM202JN
ADM202JRN
ADM202JRW
ADM203JN
0°C to 70°C
0°C to 70°C
0°C to 70°C
0°C to 70°C
N-16
R-16N
R-16W
N-20
–2–
REV. A
ADM202/ADM203
PIN CONFIGURATIONS
DIP/SOIC
DIP
V
1
2
3
4
5
6
7
8
16
15
14
C1+
V+
T2
T1
R2
R2
T2
1
2
20
19
18
17
16
15
14
13
12
11
CC
IN
OUT
GND
T1
IN
IN
C1–
C2+
C2–
V–
R1
OUT
3
OUT
OUT
R1
R1
T1
ADM202 13
TOP VIEW
R1
4
IN
V–
IN
12
T1
5
OUT
C2–
C2+
V+
OUT
(Not to Scale)
ADM203
TOP VIEW
(Not to Scale)
11
10
9
6
IN
IN
GND
T2
OUT
T2
V
7
CC
R2
IN
R2
OUT
8
C1+
GND
C2–
C1–
V–
9
10
C2+
PIN FUNCTION DESCRIPTION
Mnemonic
Function
Power Supply Input 5 V 10%.
Internally Generated Positive Supply (+10 V nominal).
Internally Generated Negative Supply (–10 V nominal).
Ground Pin. Must be connected to 0 V.
VCC
V+
V–
GND
C1+
ADM202 External Capacitor, (+ terminal) is connected to this pin.
ADM203: The capacitor is connected internally and no external capacitor is required.
ADM202 External Capacitor, (– terminal) is connected to this pin.
ADM203: The capacitor is connected internally and no external capacitor is required.
ADM202 External Capacitor, (+ terminal) is connected to this pin.
ADM203: The capacitor is connected internally and no external capacitor is required.
ADM202 External Capacitor, (– terminal) is connected to this pin.
ADM203: The capacitor is connected internally and no external capacitor is required.
C1–
C2+
C2–
TIN
Transmitter (Driver) Inputs. These inputs accept TTL/CMOS levels. An internal 400 kΩ pull-up resistor to VCC is
connected on each input.
TOUT
RIN
Transmitter (Driver) Outputs. These are RS-232 levels (typically 10 V).
Receiver Inputs. These inputs accept RS-232 signal levels. An internal 5 kΩ pull-down resistor to GND is
connected on each of these inputs.
ROUT
Receiver Outputs. These are TTL/CMOS levels.
5V INPUT
5V INPUT
V
CC
0.1F
V
C1+
CC
+5V TO +10V
VOLTAGE
DOUBLER
6.3V
0.1F
6.3V
0.1F
6.3V
T1
T2
T1
T2
T1
T2
IN
OUT
TTL/CMOS
INPUTS*
RS-232
OUTPUTS
C1–
V+
IN
OUT
C2+
+10V TO –10V
VOLTAGE
INVERTER
0.1F
16V
V–
R1
R1
R2
0.1F
16V
R1
R2
OUT
OUT
IN
C2–
TTL/CMOS
OUTPUTS
RS-232
INPUTS**
R2
IN
T1
IN
T1
T1
T2
R1
R2
OUT
TTL/CMOS
INPUTS*
RS-232
OUTPUTS
C1+
C1–
V–
DO NOT MAKE
CONNECTIONS
TO THESE PINS
T2
IN
T2
OUT
C2+
C2+
C2–
C2–
R1
R1
IN
OUT
INTERNAL
–10V POWER
SUPPLY
TTL/CMOS
OUTPUTS
RS-232
INPUTS**
R2
R2
IN
OUT
V–
ADM203
INTERNAL
+10V POWER
SUPPLY
GND
ADM202
V+
GND
GND
*INTERNAL 400k⍀ PULL-UP RESISTOR ON EACH TTL/CMOS INPUT.
**INTERNAL 5k⍀ PULL-DOWN RESISTOR ON EACH RS-232 INPUT.
*INTERNAL 400k⍀ PULL-UP RESISTOR ON EACH TTL/CMOS INPUT.
**INTERNAL 5k⍀ PULL-DOWN RESISTOR ON EACH RS-232 INPUT.
Figure 1. Typical Operating Circuits
–3–
REV. A
–Typical Performance Characteristics
ADM202/ADM203
15
15
Tx O/P HI
10
5
10
V+
Tx O/P HI LOADED
5
0
0
–5
–10
–15
–5
Tx O/P LO LOADED
V–
–10
Tx O/P LO
5.0
–15
4.0
0
5
10
15
20
25
30
4.5
5.5
LOAD CURRENT – mA
V
–V
CC
TPC 1. Charge Pump V+, V– vs. Current
TPC 4. Transmitter Output Voltage vs. VCC
30
25
20
15
10
5
15
V
= 5V
CC
R
= 3k⍀
L
10
f = 10kHz
Tx O/P HI
5
0
LOW-TO-HIGH SLEW RATE
–5
Tx O/P LO
HIGH-TO-LOW SLEW RATE
–10
0
–15
0
500
1k
1.5k
2k
2.5k
3k
0
2
4
6
8
10
12
14
LOAD CURRENT – mA
CAPACITIVE LOAD – pF
TPC 2. Transmitter Slew Rate vs. Load Capacitance
TPC 5. Transmitter Output Voltage vs. Current
T
1
T
1
2
2
T
T
CH1 10.0V CH2 5.00V M 1.00s CH2
LOADED SLEW RATE – 1nF
–6.4V
CH1 10.0V CH2 5.00V M 1.00s CH2
–6.4V
UNLOADED SLEW RATE
TPC 3. Transmitter Fully Loaded Slew Rate
TPC 6. Transmitter Unloaded Slew Rate
–4–
REV. A
ADM202/ADM203
S1
S2
S3
GENERAL INFORMATION
V+
GND
The ADM202/ADM203 is an RS-232 drivers/receivers designed
to solve interface problems by meeting the EIA-232E specifica-
tions while using a single digital 5 V supply. The EIA standard
requires transmitters that will deliver 5 V minimum on the
transmission channel and receivers that can accept signal levels
down to 3 V. The parts achieve this by integrating step up
voltage converters and level shifting transmitters and receivers
onto the same chip. CMOS technology is used to keep the power
dissipation to an absolute minimum.
FROM
VOLTAGE
DOUBLER
C2
C4
S4
GND
V– = –(V+)
INTERNAL
OSCILLATOR
Figure 3. Charge Pump Voltage Inverter
Transmitter (Driver) Section
The drivers convert TTL/CMOS input levels into EIA-232-E
output levels. With VCC = +5 V and driving a typical EIA-232-E
load, the output voltage swing is 9 V. Even under worst-case
conditions the drivers are guaranteed to meet the 5 V EIA-232-E
minimum requirement.
The ADM203 uses internal capacitors and, therefore, no exter-
nal capacitors are required.
The ADM202 contains an internal voltage doubler and a voltage
inverter which generates 10 V from the 5 V input. External
0.1 µF capacitors are required for the internal voltage converter.
The input threshold levels are both TTL and CMOS compat-
ible with the switching threshold set at VCC/4. With a nominal
VCC = 5 V the switching threshold is 1.25 V typical. Unused
inputs may be left unconnected, as an internal 400 kΩ pull-up
resistor pulls them high forcing the outputs into a low state.
The ADM202/ADM203 is a modification, enhancement and
improvement to the AD230–AD241 family and derivatives
thereof. It is essentially plug-in compatible and does not have
materially different applications.
As required by the EIA-232-E standard the slew rate is limited
to less than 30 V/µs without the need for an external slew limiting
capacitor and the output impedance in the power-off state is
greater than 300 Ω.
CIRCUIT DESCRIPTION
The internal circuitry consists of three main sections. These are:
(a) A Charge Pump Voltage Converter
(b) RS-232 to TTL/CMOS Receivers
(c) TTL/CMOS to RS-232 Transmitters
Receiver Section
The receivers are inverting level shifters that accept EIA-232-E
input levels ( 5 V to 15 V) and translate them into 5 V TTL/
CMOS levels. The inputs have internal 5 kΩ pull-down resistors
to ground and are also protected against overvoltages of up to
30 V. The guaranteed switching thresholds are 0.8 V minimum
and 2.4 V maximum which are well within the 3 V EIA-232
requirement. The low level threshold is deliberately positive
as it ensures that an unconnected input will be interpreted as
a low level.
Charge Pump DC-DC Voltage Converter
The charge pump voltage converter consists of an oscillator and
a switching matrix. The converter generates a 10 V supply
from the input 5 V level. This is done in two stages using a
switched capacitor technique as illustrated below. First, the 5 V
input supply is doubled to 10 V using capacitor C1 as the charge
storage element. The 10 V level is then inverted to generate
–10 V using C2 as the storage element.
The receivers have Schmitt trigger input with a hysteresis level
of 0.5 V. This ensures error free reception both for noisy inputs
and for inputs with slow transition times.
Capacitors C3 and C4 are used to reduce the output ripple.
Their values are not critical and can be reduced if higher levels
of ripple are acceptable. The charge pump capacitors C1 and
C2 may also be reduced at the expense of higher output imped-
ance on the V+ and V– supplies. On the ADM203, all capacitors
C1 to C4 are molded into the package.
The V+ and V– supplies may also be used to power external
circuitry if the current requirements are small.
S1
S3
V
CC
V+ = 2V
CC
C1
C3
S2
S4
GND
V
CC
INTERNAL
OSCILLATOR
Figure 2. Charge Pump Voltage Doubler
REV. A
–5–
ADM202/ADM203
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
16-Lead Plastic DIP
(N-16)
0.840 (21.34)
0.745 (18.92)
16
9
8
0.280 (7.11)
0.240 (6.10)
1
0.325 (8.25)
0.300 (7.62)
PIN 1
0.060 (1.52)
0.015 (0.38)
0.195 (4.95)
0.115 (2.93)
0.210 (5.33)
MAX
0.200 (5.05)
0.125 (3.18)
0.150
(3.81)
MIN
0.015 (0.381)
0.008 (0.204)
SEATING
PLANE
0.100
(2.54)
BSC
0.022 (0.558)
0.014 (0.356)
0.070 (1.77)
0.045 (1.15)
16-Lead Narrow SOIC
(R-16N)
0.3937 (10.00)
0.3859 (9.80)
9
8
16
1
0.1574 (4.00)
0.1497 (3.80)
0.2440 (6.20)
0.2284 (5.80)
PIN 1
0.0688 (1.75)
0.0532 (1.35)
0.050 (1.27)
BSC
0.0196 (0.50)
0.0099 (0.25)
؋
45؇ 8؇
0؇
0.0098 (0.25)
0.0040 (0.10)
0.0192 (0.49)
0.0138 (0.35)
SEATING
PLANE
0.0500 (1.27)
0.0160 (0.41)
0.0099 (0.25)
0.0075 (0.19)
16-Lead Wide SOIC
20-Lead Plastic DIP
(R-16W)
(N-20)
0.413 (10.50)
0.348 (10.10)
1.060 (26.90)
0.925 (23.50)
20
11
0.280 (7.11)
16
1
9
8
0.240 (6.10)
10
1
0.2992 (7.60)
0.2914 (7.40)
0.325 (8.25)
0.300 (7.62)
PIN 1
0.210 (5.33)
MAX
0.200 (5.05)
0.125 (3.18)
0.060 (1.52)
0.015 (0.38)
0.419 (10.65)
0.404 (10.26)
0.195 (4.95)
0.115 (2.93)
0.150
(3.81)
MIN
PIN 1
0.107 (2.72)
0.089 (2.26)
0.015 (0.381)
0.008 (0.204)
0.0291 (0.74)
0.0098 (0.25)
0.050 (1.27)
BSC
SEATING
PLANE
0.100
(2.54)
BSC
0.022 (0.558)
0.014 (0.356)
0.070 (1.77)
0.045 (1.15)
؋
45؇ 8؇
0؇
0.018 (0.46)
0.014 (0.36)
0.010 (0.25)
0.004 (0.10)
SEATING
PLANE
0.045 (1.15)
0.020 (0.50)
0.015 (0.38)
0.007 (1.18)
–6–
REV. A
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