ADM241LAR-REEL [ADI]
IC QUAD LINE TRANSCEIVER, PDSO28, MS-013AE, SOIC-28, Line Driver or Receiver;型号: | ADM241LAR-REEL |
厂家: | ADI |
描述: | IC QUAD LINE TRANSCEIVER, PDSO28, MS-013AE, SOIC-28, Line Driver or Receiver 驱动 光电二极管 接口集成电路 驱动器 |
文件: | 总16页 (文件大小:319K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
5 V Powered
CMOS RS-232 Drivers/Receivers
a
ADM223/ADM230L–ADM241L
ADM232L TYPICAL OPERATING CIRCUIT
FEATURES
Single 5 V Power Supply
5V INPUT
Meets All EIA-232-E and V.28 Specifications
120 kB/s Data Rate
On-Board DC-DC Converters
؎9 V Output Swing with 5 V Supply
Small 1 F Capacitors
Low Power Shutdown ≤1 A
Receivers Active in Shutdown (ADM223)
؎30 V Receiver Input Levels
Latch-Up FREE
Plug-In Upgrade for MAX223/230-241
Plug-In Upgrade for AD230–AD241
V
C1+
C1–
CC
+5V TO +10V
VOLTAGE
DOUBLER
1F
6.3V
1F
6.3V
1F
6.3V
V+
V–
C2+
C2–
+10V TO –10V
VOLTAGE
INVERTER
1F
16V
1F
16V
T1
T1
T1
T2
R1
R2
IN
OUT
TTL/CMOS
INPUTS*
RS-232
OUTPUTS
T2
T2
IN
OUT
R1
R1
OUT
IN
IN
TTL/CMOS
OUTPUTS
RS-232
INPUTS**
APPLICATIONS
Computers
Peripherals
Modems
R2
R2
OUT
GND
ADM232L
Printers
Instruments
* INTERNAL 400k⍀ PULL-UP RESISTOR ON EACH TTL/CMOS INPUT.
** INTERNAL 5k⍀ PULL-DOWN RESISTOR ON EACH RS-232 INPUT.
GENERAL DESCRIPTION
All members of the ADM230L family, except the ADM231L
and the ADM239L, include two internal charge pump voltage
converters that allow operation from a single 5 V supply. These
converters convert the 5 V input power to the 10 V required
for RS-232 output levels. The ADM231L and ADM239L are
designed to operate from 5 V and 12 V supplies. An internal
+12 V to –12 V charge pump voltage converter generates the
–12 V supply.
The ADM2xx family of line drivers/receivers is intended for all
EIA-232-E and V.28 communications interfaces, especially in
applications where 12 V is not available. The ADM223,
ADM230L, ADM235L, ADM236L and ADM241L feature a
low power shutdown mode that reduces power dissipation to
less than 5 µW, making them ideally suited for battery powered
equipment. Two receivers remain enabled during shutdown on
the ADM223. The ADM233L and ADM235L do not require
any external components and are particularly useful in applica-
tions where printed circuit board space is critical.
The ADM2xxL is an enhanced upgrade for the AD2xx family
featuring lower power consumption, faster slew rate and opera-
tion with smaller (1 µF) capacitors.
Table I. Selection Table
No. of
RS-232
Drivers
No. of
Low Power
Shutdown
(SD)
TTL
Part
Number
Power
Supply Voltage
RS-232
External
Three-State No. of
Receivers Capacitors
EN
Pins
ADM223
5 V
4
5
2
2
2
4
5
4
5
4
3
4
5
0
2
2
2
0
5
3
3
4
5
5
4
Yes (SD)
Yes
No
Yes (EN)
No
No
No
No
No
Yes
Yes
No
28
20
14
16
20
16
24
24
24
24
24
28
ADM230L 5 V
4
ADM231L 5 V and 7.5 V to 13.2 V
ADM232L 5 V
ADM233L 5 V
ADM234L 5 V
ADM235L 5 V
ADM236L 5 V
ADM237L 5 V
ADM238L 5 V
2
4
No
None
4
None
4
4
4
2
4
No
No
Yes
Yes
No
No
No
Yes
No
Yes
Yes
ADM239L 5 V and 7.5 V to 13.2 V
ADM241L 5 V
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
Fax: 781/326-8703
World Wide Web Site: http://www.analog.com
© Analog Devices, Inc., 2001
ADM223/ADM230L–ADM241L–SPECIFICATIONS VCC = 5 V ؎ 10% (ADM223, ADM31L,
ADM32L, ADM34L, ADM36L, ADM38L, ADM39L, ADM41L); VCC = 5 V ؎ 5% (ADM230L, ADM233L, ADM235L, ADM237L); V+ = 7.5 V to 13.2 V
(ADM231L and ADM239L); C1–C4 = 1.0 F Ceramic. All Specifications TMIN to TMAX unless otherwise noted.)
Parameter
Min Typ Max Unit Test Conditions/Comments
Output Voltage Swing
5
9
2.5
3.5
1.5
1
Volts All Transmitter Outputs Loaded with 3 kΩ to Ground
VCC Power Supply Current
6.0
13
4
10
0.8
mA
mA
mA
µA
V
No Load, All TINS = VCC (Except ADM223)
No Load, All TINS = GND
V+ Power Supply Current
Shutdown Supply Current
No Load, V+ = 12 V ADM231L and ADM239L Only
Input Logic Threshold Low, VINL
Input Logic Threshold High, VINH
Logic Pull-Up Current
TIN, EN, SD, EN, SD
TIN, EN, SD, EN, SD
TIN = 0 V
2.4
V
12
25
+30
µA
RS-232 Input Voltage Range1
RS-232 Input Threshold Low
RS-232 Input Threshold High
RS-232 Input Hysteresis
–30
0.8
V
1.2
1.6
0.25
5
V
2.4
V
V
kΩ
V
RS-232 Input Resistance
3
7
0.4
TA = 0°C to 85°C
TTL/CMOS Output Voltage Low, VOL
TTL/CMOS Output Voltage High, VOH
TTL/CMOS Output Leakage Current
3.5
V
IOUT = –1.0 mA
EN = VCC, 0 V ≤ ROUT ≤ VCC
ADM223, ADM235L, ADM236L, ADM239L, ADM241L
(Figure 25. CL = 150 pF)
0.05
250
10 µA
Output Enable Time (TEN
)
ns
Output Disable Time (TDIS
Propagation Delay
)
50
ns
ADM223, ADM235L, ADM236L, ADM239L, ADM241L
(Figure 25. RL = 1 kΩ)
0.3
8
µs
RS-232 to TTL
Transition Region Slew Rate
V/µs RL = 3 kΩ, CL = 2500 pF
Measured from +3 V to –3 V or –3 V to +3 V
VCC = V+ = V– = 0 V, VOUT = 2 V
Output Resistance
RS-232 Output Short Circuit Current
300
Ω
mA
10
NOTES
1Guaranteed by design.
Specifications subject to change without notice.
ABSOLUTE MAXIMUM RATINGS*
(TA = 25°C unless otherwise noted)
Thermal Impedance, θJA
N-14 DIP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 140°C/W
N-16 DIP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 135°C/W
N-20 DIP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 125°C/W
N-24 DIP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120°C/W
N-24A DIP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110°C/W
R-16 SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105°C/W
R-20 SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105°C/W
R-24 SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85°C/W
R-28 SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80°C/W
RS-28 SSOP . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100°C/W
Q-14 Cerdip . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105°C/W
Q-16 Cerdip . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100°C/W
Q-20 Cerdip . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100°C/W
Q-24 Cerdip . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55°C/W
D-24 Ceramic . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50°C/W
Operating Temperature Range
VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +6 V
V+ . . . . . . . . . . . . . . . . . . . . . . . . . . . . (VCC – 0.3 V) to +14 V
V– . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +0.3 V to –14 V
Input Voltages
TIN . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to (VCC + 0.3 V)
RIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 V
Output Voltages
TOUT . . . . . . . . . . . . . . . . . . (V+, + 0.3 V) to (V–, – 0.3 V)
ROUT . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to (VCC + 0.3 V)
Short Circuit Duration
TOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Continuous
Power Dissipation
N-14 DIP (Derate 10 mW/°C above 70°C) . . . . . . 800 mW
N-16 DIP (Derate 10.5 mW/°C above 70°C) . . . . . 840 mW
N-20 DIP (Derate 11 mW/°C above 70°C) . . . . . . 890 mW
N-24 DIP (Derate 13.5 mW/°C above 70°C) . . . . 1000 mW
N-24A DIP (Derate 13.5 mW/°C above 70°C) . . . 500 mW
R-16 SOIC (Derate 9 mW/°C above 70°C) . . . . . . 760 mW
R-20 SOIC (Derate 9.5 mW/°C above 70°C) . . . . 800 mW
R-24 SOIC (Derate 12 mW/°C above 70°C) . . . . . 850 mW
R-28 SOIC (Derate 12.5 mW/°C above 70°C) . . . 900 mW
RS-28 SSOP (Derate 10 mW/°C above 70°C) . . . . 900 mW
Q-14 Cerdip (Derate 10 mW/°C above 70°C) . . . . 720 mW
Q-16 Cerdip (Derate 10 mW/°C above 70°C) . . . . 800 mW
Q-20 Cerdip (Derate 11.2 mW/°C above 70°C) . . . . 890 mW
Q-24 Cerdip (Derate 12.5 mW/°C above 70°C) . . . 1000 mW
D-24 Ceramic (Derate 20 mW/°C above 70°C) . . 1000 mW
Commercial (J Version) . . . . . . . . . . . . . . . . . . . . 0 to 70°C
Industrial (A Version) . . . . . . . . . . . . . . . –40°C to +85°C
Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C
Lead Temperature, Soldering . . . . . . . . . . . . . . . . . . . 300°C
Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . . 215°C
Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 220°C
*This is a stress rating only; functional operation of the device at these or any other
conditions above those indicated in the operational sections of this specification is
not implied. Exposure to absolute maximum rating conditions for extended
periods of time may affect reliability.
–2–
REV. A
ADM223/ADM230L–ADM241L
ORDERING GUIDE
Temperature
Range
Package
Option*
Temperature
Range
Package
Option*
Temperature
Range
Package
Option*
Model
Model
Model
ADM223
ADM223AR
ADM223ARS –40°C to +85°C
ADM230L
ADM230LJN
ADM230LJR
ADM230LAN –40°C to +85°C
ADM230LAR
ADM230LAQ –40°C to +85°C
ADM231L
ADM231LJN
ADM231LJR
ADM231LAN –40°C to +85°C N-14
ADM231LAR –40°C to +85°C R-16
ADM231LAQ –40°C to +85°C Q-14
–40°C to +85°C
R-28
RS-28
0°C to 70°C
0°C to 70°C
N-20
R-20
N-20
R-20
Q-20
0°C to 70°C
0°C to 70°C
N-14
R-16
–40°C to +85°C
ADM232L
ADM233L
ADM234L
ADM232LJN 0°C to 70°C
N-16
R-16
N-16
R-16
Q-16
ADM233LJN
ADM233LAN –40°C to +85°C
0°C to 70°C
N-20
N-20
ADM234LJN
ADM234LJR
ADM234LAN –40°C to +85°C N-16
ADM234LAR –40°C to +85°C R-16
ADM234LAQ –40°C to +85°C Q-16
0°C to 70°C
0°C to 70°C
N-16
R-16
ADM232LJR
0°C to 70°C
ADM232LAN –40°C to +85°C
ADM232LAR –40°C to +85°C
ADM232LAQ –40°C to +85°C
ADM235L
ADM236L
ADM236LJN
ADM236LJR
ADM236LAN –40°C to +85°C
ADM236LAR
ADM237L
ADM237LJN
ADM237LJR
ADM237LAN –40°C to +85°C N-24
ADM237LAR –40°C to +85°C R-24
ADM237LAQ –40°C to +85°C Q-24
ADM235LJN 0°C to 70°C
ADM235LAN –40°C to +85°C
ADM235LAQ –40°C to +85°C
N-24A
N-24A
D-24
0°C to 70°C
0°C to 70°C
N-24
R-24
N-24
R-24
Q-24
0°C to 70°C
0°C to 70°C
N-24
R-24
–40°C to +85°C
ADM236LAQ –40°C to +85°C
ADM238L
ADM238LJN 0°C to 70°C
ADM238LJR
ADM238LAN –40°C to +85°C
ADM238LAR –40°C to +85°C
ADM238LAQ –40°C to +85°C
ADM239L
ADM239LJN
ADM239LJR
ADM239LAN –40°C to +85°C
ADM239LAR
ADM239LAQ –40°C to +85°C
ADM241L
N-24
R-24
N-24
R-24
Q-24
0°C to 70°C
0°C to 70°C
N-24
R-24
N-24
R-24
Q-24
ADM241LJR
ADM241LAR –40°C to +85°C R-28
ADM241LJRS 0°C to 70°C RS-28
ADM241LARS –40°C to +85°C RS-28
0°C to 70°C
R-28
0°C to 70°C
–40°C to +85°C
*D = Ceramic DIP; N = Plastic DIP; Q = Cerdip; R = Small Outline IC (SOIC); RS = Small Shrink Outline Package (SSOP).
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the ADM223/ADM230L–ADM241L features proprietary ESD protection circuitry, permanent
damage may occur on devices subjected to high-energy electrostatic discharges. Therefore, proper
ESD precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
REV. A
–3–
ADM223/ADM230L–ADM241L
5V INPUT
V
C1+
CC
+5V TO +10V
VOLTAGE
DOUBLER
1F
6.3V
1F
6.3V
1F
6.3V
C1–
V+
C2+
+10V TO –10V
VOLTAGE
INVERTER
1F
16V
T4
T5
T3
T1
1
2
20
19
18
17
16
15
14
13
12
11
OUT
OUT
V–
1F
16V
C2–
OUT
IN
NC
SD
T5
T2
3
OUT
T1
IN
T1
T1
T2
OUT
T2
T1
4
IN
IN
T2
IN
T2
T3
T4
T5
OUT
OUT
OUT
OUT
ADM230L
5
OUT
TOP VIEW
TTL/CMOS
INPUTS*
GND
T4
RS-232
OUTPUTS
(Not to Scale)
6
IN
IN
T3
IN
T3
T4
T5
V
T3
7
CC
T4
IN
C1+
V+
V–
8
C2–
C2+
9
T5
IN
SD
C1–
NC
10
GND
ADM230L
NC = NO CONNECT
* INTERNAL 400k⍀ PULL-UP RESISTOR ON EACH TTL/CMOS INPUT.
Figure 1. ADM230L DIP/SOIC Pin Configuration
Figure 2. ADM230L Typical Operating Circuit
DIP
C1+
C1–
V–
V+
V
14
13
12
11
10
9
1
2
3
CC
GND
T1
ADM231L
TOP VIEW
(Not to Scale)
5V INPUT
T2
OUT
4
5
6
7
OUT
1F
R2
R1
R1
T1
IN
IN
R2
OUT
IN
OUT
V
CC
7.5V TO 13.2V
V+
T2
IN
8
C1+
1F
16V
+12V TO –12V
VOLTAGE
INVERTER
V–
1F
C1–
16V
SOIC
T1
IN
T1
T1
T2
R1
R2
OUT
TTL/CMOS
INPUTS*
RS-232
OUTPUTS
C1+
C1–
V–
V+
V
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
T2
IN
T2
R1
R2
CC
OUT
GND
T1
R1
OUT
IN
ADM231L
TOP VIEW
(Not to Scale)
TTL/CMOS
OUTPUTS
RS-232
INPUTS**
T2
OUT
OUT
R2
R2
R1
R1
T1
OUT
IN
IN
IN
R2
OUT
OUT
GND
ADM231L
T2
IN
IN
NC
NC
* INTERNAL 400k⍀ PULL-UP RESISTOR ON EACH TTL/CMOS INPUT.
** INTERNAL 5k⍀ PULL-DOWN RESISTOR ON EACH RS-232 INPUT.
NC = NO CONNECT
Figure 3. ADM231L DIP and SOIC Pin Configurations
Figure 4. ADM231L Typical Operating Circuit (DIP Pinout)
REV. A
–4–
ADM223/ADM230L–ADM241L
5V INPUT
V
C1+
CC
+5V TO +10V
VOLTAGE
DOUBLER
1F
6.3V
1F
6.3V
1F
6.3V
C1–
V+
C2+
+10V TO –10V
VOLTAGE
INVERTER
1F
16V
V–
1F
C2–
16V
C1+
V+
V
CC
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
GND
T1
T1
T1
T1
T2
R1
R2
IN
OUT
TTL/CMOS
INPUTS*
RS-232
OUTPUTS
C1–
C2+
C2–
V–
OUT
T2
T2
OUT
IN
ADM232L
TOP VIEW
(Not to Scale)
R1
R1
T1
IN
R1
R1
R2
OUT
OUT
IN
IN
TTL/CMOS
OUTPUTS
RS-232
INPUTS**
IN
R2
OUT
T2
OUT
T2
IN
GND
ADM232L
R2
IN
R2
OUT
* INTERNAL 400k⍀ PULL-UP RESISTOR ON EACH TTL/CMOS INPUT.
** INTERNAL 5k⍀ PULL-DOWN RESISTOR ON EACH RS-232 INPUT.
Figure 5. ADM232L DIP/SOIC Pin Configuration
Figure 6. ADM232L Typical Operating Circuit
5V INPUT
V
CC
T1
T2
T1
T2
T1
T2
IN
OUT
TTL/CMOS
INPUTS*
RS-232
OUTPUTS
IN
OUT
T2
T1
R2
R2
T2
V–
20
19
18
17
IN
1
2
3
4
OUT
IN
IN
R1
R1
R2
R1
R2
OUT
OUT
IN
TTL/CMOS
OUTPUTS
RS-232
INPUTS**
R1
OUT
OUT
R2
IN
R1
IN
ADM233L
T1
C2–
C2+
V+
C1+
C1–
V–
16
15
14
13
C2+
C2+
OUT
5
6
DO NOT MAKE
CONNECTIONS TO
THESE PINS
TOP VIEW
GND
(Not to Scale)
ADM233L
V
CC
7
8
C2–
C2–
INTERNAL
–10V POWER
SUPPLY
C1+
GND
C2–
C1–
V–
V–
12
11
9
INTERNAL
+10V POWER
SUPPLY
V+
GND
GND
C2+
10
* INTERNAL 400k⍀ PULL-UP RESISTOR ON EACH TTL/CMOS INPUT.
** INTERNAL 5k⍀ PULL-DOWN RESISTOR ON EACH RS-232 INPUT.
Figure 8. ADM233L Typical Operating Circuit
Figure 7. ADM233L DIP Pin Configuration
REV. A
–5–
ADM223/ADM230L–ADM241L
5V INPUT
1F
6.3V
V
C1+
CC
+5V TO +10V
VOLTAGE
DOUBLER
1F
6.3V
1F
6.3V
C1–
V+
C2+
+10V TO –10V
VOLTAGE
INVERTER
1F
16V
V–
T1
T2
T3
T4
T4
T3
V–
1F
16V
1
2
3
4
5
16
15
14
13
12
11
10
9
OUT
OUT
OUT
IN
C2–
OUT
T1
IN
T1
T1
T2
OUT
T2
T1
IN
ADM234L
TOP VIEW
(Not to Scale)
IN
IN
T2
IN
T2
OUT
GND
TTL/CMOS
INPUTS*
RS-232
OUTPUTS
T3
IN
T3
T4
T3
T4
V
C2–
C2+
C1–
OUT
CC
6
7
8
C1+
V+
T4
IN
OUT
GND
ADM234L
* INTERNAL 400k⍀ PULL-UP RESISTOR ON EACH TTL/CMOS INPUT.
Figure 9. ADM234L DIP/SOIC Pin Configuration
Figure 10. ADM234L Typical Operating Circuit
5V INPUT
1F
V
CC
T1
T2
T3
T4
T5
T1
T2
T1
T2
IN
IN
IN
IN
IN
OUT
OUT
T4
T3
T1
T2
R3
R3
1
2
3
4
5
6
7
24
23
22
OUT
OUT
OUT
OUT
IN
TTL/CMOS
INPUTS*
RS-232
OUTPUTS
T3
T3
T4
T5
OUT
OUT
T5
T4
T5
IN
OUT
SD
21
20
19
OUT
R2
IN
EN
R1
R1
R1
R2
T2
ADM235L
TOP VIEW
(Not to Scale)
T5
OUT
OUT
OUT
OUT
IN
IN
OUT
OUT
R4
R4
T4
IN
IN
18
17
16
15
14
13
IN
R2
R3
R4
R5
R2
R2
T1
8
9
OUT
TTL/CMOS
OUTPUTS
RS-232
INPUTS**
R3
R4
R5
R3
IN
IN
IN
R1
OUT
IN
IN
R1
T3
IN
10
R4
R5
R5
GND 11
OUT
R5
OUT
V
12
CC
IN
SD
EN
GND
ADM235L
* INTERNAL 400k⍀ PULL-UP RESISTOR ON EACH TTL/CMOS INPUT.
** INTERNAL 5k⍀ PULL-DOWN RESISTOR ON EACH RS-232 INPUT.
Figure 11. ADM235L DIP Pin Configuration
Figure 12. ADM235L Typical Operating Circuit
REV. A
–6–
ADM223/ADM230L–ADM241L
5V INPUT
V
C1+
CC
+5V TO +10V
VOLTAGE
DOUBLER
1F
6.3V
1F
6.3V
1F
6.3V
C1–
V+
C2+
+10V TO –10V
VOLTAGE
INVERTER
1F
16V
V–
1F
C2–
T3
T1
T2
16V
T4
R2
R2
24
23
22
OUT
OUT
OUT
1
2
3
OUT
T1
IN
T1
IN
T1
T2
OUT
OUT
T2
IN
T2
T3
T4
OUT
OUT
OUT
R1
21 SD
IN
OUT
4
5
TTL/CMOS
INPUTS*
RS-232
OUTPUTS
R1
T3
IN
20
19
18
17
16
15
14
13
EN
T3
T4
R1
R2
T2
T1
ADM236L
TOP VIEW
(Not to Scale)
T4
T3
IN
IN
6
IN
IN
T4
IN
7
R1
R1
R2
R3
SD
R3
R3
V–
GND
8
OUT
OUT
IN
IN
IN
V
9
CC
IN
TTL/CMOS
OUTPUTS
RS-232
INPUTS**
R2
OUT
C1+
10
R3
R3
C2–
OUT
V+ 11
C1–
C2+
12
EN
GND
ADM236L
* INTERNAL 400k⍀ PULL-UP RESISTOR ON EACH TTL/CMOS INPUT.
** INTERNAL 5k⍀ PULL-DOWN RESISTOR ON EACH RS-232 INPUT.
Figure 13. ADM236L DIP/SOIC Pin Configuration
Figure 14. ADM236L Typical Operating Circuit
5V INPUT
V
C1+
CC
+5V TO +10V
VOLTAGE
DOUBLER
1F
6.3V
1F
6.3V
1F
6.3V
C1–
V+
C2+
+10V TO –10V
VOLTAGE
INVERTER
1F
16V
V–
1F
C2–
16V
T3
T1
T2
T4
R2
24
23
22
21
20
19
18
17
16
15
14
13
OUT
OUT
OUT
1
2
3
4
5
6
OUT
T1
IN
T1
T1
T2
OUT
IN
T2
IN
T2
OUT
OUT
R2
T5
OUT
R1
IN
TTL/CMOS
INPUTS*
IN
RS-232
OUTPUTS
T3
IN
T3
T3
T4
R1
T5
T4
OUT
OUT
T4
IN
T4
T5
T2
IN
ADM237L
IN
OUT
TOP VIEW
T3
T1
IN
7
8
IN
(Not to Scale)
T5
IN
20
T5
R1
OUT
GND
R3
R3
V–
OUT
R1
R1
R2
R3
OUT
OUT
OUT
IN
IN
IN
V
CC
9
IN
C1+
V+
RS-232
INPUTS**
TTL/CMOS
OUTPUTS
10
11
12
R2
R3
R2
C2–
R3
C2+
C1–
GND
ADM237L
* INTERNAL 400k⍀ PULL-UP RESISTOR ON EACH TTL/CMOS INPUT.
** INTERNAL 5k⍀ PULL-DOWN RESISTOR ON EACH RS-232 INPUT.
Figure 15. ADM237L DIP/SOIC Pin Configuration
Figure 16. ADM237L Typical Operating Circuit
REV. A
–7–
ADM223/ADM230L–ADM241L
5V INPUT
V
C1+
CC
+5V TO +10V
VOLTAGE
DOUBLER
1F
6.3V
1F
6.3V
1F
6.3V
C1–
V+
C2+
+10V TO –10V
VOLTAGE
INVERTER
1F
16V
V–
1F
C2–
16V
T1
IN
T1
T1
T2
T2
T1
T3
R3
R3
T4
OUT
1
2
24
23
22
21
20
19
18
17
16
15
14
13
OUT
OUT
OUT
IN
T2
IN
T2
T3
T4
OUT
OUT
OUT
R2
IN
3
OUT
RS-232
OUTPUTS
TTL/CMOS
INPUTS*
T3
IN
R2
T3
T4
4
OUT
IN
T1
IN
T4
T3
5
OUT
T4
IN
R1
ADM238L
6
OUT
IN
TOP VIEW
R1
IN
T2
R1
R1
R1
R2
7
IN
OUT
OUT
OUT
OUT
IN
IN
(Not to Scale)
GND
R4
R4
V–
8
OUT
R2
R3
R4
R2
V
CC
9
IN
RS-232
INPUTS**
TTL/CMOS
OUTPUTS
C1+
V+
10
11
12
R3
R4
R3
IN
C2–
R4
IN
C1–
C2+
GND
ADM238L
* INTERNAL 400k⍀ PULL-UP RESISTOR ON EACH TTL/CMOS INPUT.
** INTERNAL 5k⍀ PULL-DOWN RESISTOR ON EACH RS-232 INPUT.
Figure 18. ADM238L Typical Operating Circuit
Figure 17. ADM238L DIP/SOIC Pin Configuration
5V INPUT
1F
V
CC
+12V TO –12V
VOLTAGE
INVERTER
C1+
1F
16V
7.5V TO 13.2V
INPUT
V+
C1–
V–
1F
16V
R1
T1
T2
24
1
2
3
4
5
6
OUT
IN
T1
IN
T1
T1
T2
OUT
R1
23
IN
IN
RS-232
OUTPUTS
TTL/CMOS
INPUTS*
T2
IN
T2
T3
OUT
OUT
R2
GND
22
OUT
IN
V
21 R2
CC
T3
IN
T3
R1
R2
V+
C+
20
T2
OUT
OUT
R1
R1
R2
R3
R4
R5
OUT
OUT
OUT
OUT
IN
IN
IN
IN
IN
ADM239L
TOP VIEW
(Not to Scale)
19 T1
R3
R2
R3
R4
R5
C–
V–
7
8
9
18
IN
17 R3
16 T3
TTL/CMOS
OUTPUTS
OUT
RS-232
INPUTS**
R3
R4
R5
IN
IN
R5
OUT 10
R4
OUT 11
NC
15
14
13
EN
R5
OUT
R4
T3
12
IN
OUT
NC
EN
GND
ADM239L
* INTERNAL 400k⍀ PULL-UP RESISTOR ON EACH TTL/CMOS INPUT.
** INTERNAL 5k⍀ PULL-DOWN RESISTOR ON EACH RS-232 INPUT.
Figure 19. ADM239L DIP/SOIC Pin Configuration
Figure 20. ADM239L Typical Operating Circuit
REV. A
–8–
ADM223/ADM230L–ADM241L
5V INPUT
+5V TO +10V
VOLTAGE
DOUBLER
V
C1+
C1–
C2+
C2–
CC
1F
16V
1F
6.3V
1F
6.3V
V+
+10V TO –10V
VOLTAGE
INVERTER
1F
16V
V–
1F
16V
T3
T1
T2
T4
R3
R3
1
2
3
4
5
6
7
8
9
28
27
26
25
24
23
22
21
20
19
OUT
OUT
OUT
T1
IN
T1
T1
T2
T3
IN
OUT
OUT
OUT
T2
IN
T2
OUT
OUT
TTL/CMOS
INPUTS*
R2
RS-232
OUTPUTS
SD
IN
T3
IN
T3
R2
EN
OUT
T2
IN
R4
IN
T4
IN
T4
R1
T4
OUT
T1
IN
R4
T4
T3
R5
ADM241L
TOP VIEW
(Not to Scale)
OUT
IN
R1
R1
R2
R3
R4
R5
OUT
OUT
OUT
OUT
IN
IN
IN
IN
IN
R1
OUT
R1
IN
R2
R3
R4
R5
R2
IN
GND 10
OUT
IN
TTL/CMOS
OUTPUTS
RS-232
INPUTS**
R3
R4
R5
V
11
12
13
14
18 R5
CC
C1+
V+
17 V–
16
15
C2–
C2+
OUT
C1–
ADM241L
GND
SD
EN
* INTERNAL 400k⍀ PULL-UP RESISTOR ON EACH TTL/CMOS INPUT.
** INTERNAL 5k⍀ PULL-DOWN RESISTOR ON EACH RS-232 INPUT.
Figure 22. ADM241L Typical Operating Circuit
Figure 21. ADM241L SOIC/SSOP Pin Configuration
5V INPUT
+5V TO +10V
VOLTAGE
DOUBLER
V
C1+
C1–
C2+
C2–
CC
1F
16V
1F
6.3V
1F
6.3V
V+
+10V TO –10V
VOLTAGE
INVERTER
1F
16V
V–
1F
16V
T3
T1
1
2
28 T4
OUT
OUT
OUT
IN
T1
IN
T1
T1
T2
T3
OUT
R3
R3
27
26
T2
IN
T2
T2
3
OUT
OUT
OUT
OUT
TTL/CMOS
INPUTS*
RS-232
OUTPUTS
4
25 SD
R2
IN
T3
IN
T3
R2
5
24 EN
OUT
T4
IN
T4
R1
T4
T2
IN
6
23
22
21
20
R4
R4
T4
T3
OUT
IN
T1
IN
7
ADM223
TOP VIEW
(Not to Scale)
OUT
IN
R1
R1
R2
R3
R4
R5
OUT
OUT
OUT
OUT
IN
IN
IN
IN
IN
8
R1
OUT
R2
R3
R4
R5
R2
R1
IN
9
IN
TTL/CMOS
OUTPUTS
RS-232
INPUTS**
10
11
12
13
14
GND
19 R5
OUT
IN
R3
R4
R5
18
17
V
R5
CC
C1+
V+
V–
16 C2–
15
OUT
C1–
C2+
ADM223
GND
SD
EN
* INTERNAL 400k⍀ PULL-UP RESISTOR ON EACH TTL/CMOS INPUT.
** INTERNAL 5k⍀ PULL-DOWN RESISTOR ON EACH RS-232 INPUT.
NOTE: RECEIVERS R4 AND R5 REMAIN ACTIVE IN SHUTDOWN.
Figure 24. ADM223 Typical Operating Circuit
Figure 23. ADM223 SOIC/SSOP Pin Configuration
REV. A
–9–
ADM223/ADM230L–ADM241L
PIN FUNCTION DESCRIPTION
Mnemonic
Function
VCC
V+
Power Supply Input 5 V 10% (5 V 5% ADM233L, ADM235L).
Internally generated positive supply (+10 V nominal) on all parts except ADM231L and ADM239L.
ADM231L, ADM239L requires external 7.5 V to 13.2 V supply.
V–
Internally generated negative supply (–10 V nominal).
GND
C+
Ground pin. Must be connected to 0 V.
(ADM231L and ADM239L only). External capacitor (+ terminal) is connected to this pin.
(ADM231L and ADM239L only). External capacitor (– terminal) is connected to this pin.
C–
C1+
(ADM230L, ADM232L, ADM234L, ADM236L, ADM237L, ADM238L, ADM241L) External capacitor (+ terminal)
is connected to this pin.
(ADM233L) The capacitor is connected internally and no external connection to this pin is required.
C1–
C2+
C2–
TIN
(ADM230L, ADM232L, ADM234L, ADM236L, ADM237L, ADM238L, ADM241L) External capacitor (– terminal)
is connected to this pin.
(ADM233L) The capacitor is connected internally and no external connection to this pin is required.
(ADM230L, ADM232L, ADM234L, ADM236L, ADM237L, ADM238L, ADM241L) External capacitor (+ terminal)
is connected to this pin.
(ADM233L) Internal capacitor connections, Pins 11 and 15 must be connected together.
(ADM230L, ADM232L, ADM234L, ADM236L, ADM237L, ADM238L, ADM241L) External capacitor (– terminal)
is connected to this pin.
(ADM233L) Internal capacitor connections, Pins 10 and 16 must be connected together.
Transmitter (Driver) Inputs. These inputs accept TTL/CMOS levels. An internal 400 kΩ pull-up resistor to VCC is
connected on each input.
TOUT
RIN
Transmitter (Driver) Outputs. These are RS-232 levels (typically 10 V).
Receiver Inputs. These inputs accept RS-232 signal levels. An internal 5 kΩ pull-down resistor to GND is connected on
each input.
ROUT
Receiver Outputs. These are TTL/CMOS levels.
EN/EN
Enable Input. Active low on ADM235L, ADM236L, ADM239L, ADM241L. Active high ADM223. This input is used
to enable/disable the receiver outputs. With EN = low (EN = high ADM223), the receiver outputs are enabled. With
EN = high (EN = low ADM223), the outputs are placed in a high impedance state. This facility is useful for
connecting to microprocessor systems.
SD/SD
Shutdown Input. Active high on ADM235L, ADM236L, ADM241L. Active low on ADM223. With SD = high on the
ADM235L, ADM236L, ADM241L, the charge pump is disabled, the receiver outputs are placed in a high impedance
state and the driver outputs are turned off. With SD low on the ADM223, the charge pump is disabled, the driver
outputs are turned off and all receivers except R4 and R5 are placed in a high impedance state. In shutdown, the power
consumption reduces to 5 µW.
NC
No Connect. No connections are required to this pin.
Table I. ADM235L, ADM236L, ADM241L Truth Table
Table II. ADM223 Truth Table
Transmitters Receivers
Transmitters
T1–T5
Receivers
R1–R5
SD EN
Status
SD EN Status
T1–T4
R1–R3 R4, R5
0
0
1
0
1
0
Normal Operation
Normal Operation
Shutdown
Enabled
Enabled
Disabled
Enabled
Disabled
Disabled
0
0
1
1
0
1
0
1
Shutdown
Shutdown
Normal Operation Enabled
Normal Operation Enabled
Disabled
Disabled
Disabled Disabled
Disabled Enabled
Disabled Disabled
Enabled Enabled
REV. A
–10–
ADM223/ADM230L–ADM241L
9
7
15
10
V+
Tx O/P HI LOADED
5
3
5
0
1
–1
–3
–5
–7
–9
–5
V–
–10
–15
Tx O/P LO LOADED
0
5
10
LOAD CURRENT – mA
15
20
4.0
4.5
5.0
– V
5.5
6.0
V
CC
Figure 25. Charge Pump V+, V– vs. Current
Figure 27. Transmitter Output Voltage vs. VCC
50
45
40
35
30
15
10
Tx O/P HI
5
25
0
NEGATIVE
SLEW
20
15
10
5
–5
POSITIVE
SLEW
Tx O/P LO
–10
0
–15
0
500
1000
1500
2000
2500
3000
0
2
4
6
8
10
LOAD CAPACITANCE – pF
LOAD CURRENT – mA
Figure 26. Transmitter Slew Rate vs. Load Capacitance
Figure 28. Transmitter Output Voltage vs. Current
350
300
V+ IMP
250
200
150
100
V– IMP
50
0
4.5
4.7
4.9
5.1
5.3
5.5
V
– V
CC
Figure 29. Charge Pump Impedance vs. VCC
REV. A
–11–
ADM223/ADM230L–ADM241L
Tx INPUT
1
T
SD
V+
T
1
2
T
T
T
Tx OUTPUT
V–
3.1V
CH1 5.00V
CH3 5.00V
CH2 5.00V M50.0s
CH1
5.00V CH2 5.00V M1.00s CH1
CH1
800mV
B
W
V+, V– EXITING SD
Figure 30. Charge Pump, V+, V– Exiting Shutdown
Figure 31. Transmitter Output Loaded Slew Rate
T
Tx INPUT
1
2
T
Tx OUTPUT
800mV
5.00V CH2 5.00V M1.00s CH1
CH1
Figure 32. Transmitter Output Unloaded Slew Rate
GENERAL INFORMATION
CIRCUIT DESCRIPTION
The ADM223/ADM230L–ADM241L family of RS-232 drivers/
receivers are designed to solve interface problems by meeting
the EIA-232-E specifications while using a single digital 5 V
supply. The EIA-232-E standard requires transmitters which
will deliver 5 V minimum on the transmission channel and
receivers which can accept signal levels down to 3 V. The
ADM223/ADM230L–ADM241L meet these requirements by
integrating step up voltage converters and level shifting trans-
mitters and receivers onto the same chip. CMOS technology is
used to keep the power dissipation to an absolute minimum. A
comprehensive range of transmitter/receiver combinations is
available to cover most communications needs.
The internal circuitry in the ADM230L–ADM241L consists of
three main sections. These are:
(a) A charge pump voltage converter
(b) RS-232 to TTL/CMOS receivers
(c) TTL/CMOS to RS-232 transmitters
Charge Pump DC-DC Voltage Converter
The charge pump voltage converter consists of an oscillator and
a switching matrix. The converter generates a 10 V supply
from the input 5 V level. This is done in two stages using a
switched capacitor technique as illustrated in Figures 33 and 34.
First, the 5 V input supply is doubled to 10 V using capacitor
C1 as the charge storage element. The 10 V level is then inverted
to generate –10 V using C2 as the storage element.
The ADM223, ADM230L, ADM235L, ADM236L and
ADM241L are particularly useful in battery powered systems as
they feature a low power shutdown mode which reduces power
dissipation to less than 5 µW.
S1
S3
V
V+ = 2V
CC
CC
C1
C3
The ADM233L and ADM235L are designed for applications
where space saving is important as the charge pump capaci-
tors are molded into the package.
S2
S4
GND
V
CC
The ADM231L and ADM239L include only a negative charge
pump converter and are intended for applications where a posi-
tive 12 V is available.
INTERNAL
OSCILLATOR
Figure 33. Charge-Pump Voltage Doubler
To facilitate sharing a common line or for connection to a micro-
processor data bus the ADM235L, ADM236L, ADM239L and
ADM241L feature an enable (EN, EN) function. When disabled,
the receiver outputs are placed in a high impedance state.
REV. A
–12–
ADM223/ADM230L–ADM241L
S1
S2
S3
S4
and all receivers except R4 and R5 on the ADM223 are put into
a high-impedance disabled state. Receivers R4 and R5 on the
ADM223 remain enabled during shutdown. This feature allows
monitoring external activity such as ring indicator monitoring
while the device is in a low power shutdown mode.
V+
GND
FROM
VOLTAGE
DOUBLER
+
+
C2
C4
GND
V– = –(V+)
INTERNAL
OSCILLATOR
The shutdown control input is active high on all parts except the
ADM223 where it is active low. Refer to Tables I and II.
Enable Input
Figure 34. Charge-Pump Voltage Inverter
The ADM235, ADM239, ADM241L and ADM223 feature
an enable input used to enable or disable the receiver outputs.
The enable input is active low on the ADM235L, ADM239L,
ADM241L and active high on the ADM223. Refer to Tables I
and II. When disabled, all receiver outputs are placed in a high
impedance state. This function allows the outputs to be con-
nected directly to a microprocessor data bus. It can also be used
to allow receivers from different devices to share a common data
line. The timing diagram for the enable function is shown in
Figure 35.
Capacitors C3 and C4 are used to reduce the output ripple.
Their values are not critical and can be reduced if higher
levels of ripple are acceptable. The charge pump capacitors
C1 and C2 may also be reduced at the expense of higher
output impedance on the V+ and V– supplies.
The V+ and V– supplies may also be used to power external
circuitry if the current requirements are small.
Transmitter (Driver) Section
The drivers convert TTL/CMOS input levels into EIA-232-E
output levels. With VCC = +5 V and driving a typical EIA-232-E
load, the output voltage swing is 9 V. Even under worst-case
conditions the drivers are guaranteed to meet the 5 V EIA-232-E
minimum requirement.
3V
EN*
0V
T
T
DIS
EN
The input threshold levels are both TTL and CMOS compat-
ible with the switching threshold set at VCC/4. With a nominal
3.5V
0.8V
V
– 0.1V
OH
R
OUT
V
CC = 5 V the switching threshold is 1.25 V typical. Unused
V
+ 0.1V
OL
inputs may be left unconnected, as an internal 400 kΩ pull-up
resistor pulls them high forcing the outputs into a low state.
*POLARITY OF EN IS REVERSED FOR ADM223.
As required by the EIA-232-E standard, the slew rate is limited
to less than 30 V/µs without the need for an external slew limit-
ing capacitor and the output impedance in the power-off state is
greater than 300 Ω.
Figure 35. Enable Timing
APPLICATION HINTS
Driving Long Cables
Receiver Section
In accordance with the EIA-232-E standard, long cables are per-
missible provided that the total load capacitance does not exceed
2500 pF. For longer cables which do exceed this, then it is possible
to trade off baud rate vs. cable length. Large load capacitances
cause a reduction in slew rate, and hence the maximum transmis-
sion baud rate is decreased. The ADM230L-ADM241L are
designed so that the slew rate reduction with increasing load
capacitance is minimized.
The receivers are inverting level shifters which accept EIA-232-E
input levels ( 5 V to 15 V) and translate them into 5 V TTL/
CMOS levels. The inputs have internal 5 kΩ pull-down resistors
to ground and are also protected against overvoltages of up to
30 V. The guaranteed switching thresholds are 0.8 V minimum
and 2.4 V maximum which are well within the 3 V EIA-232-E
requirement. The low level threshold is deliberately positive
as it ensures that an unconnected input will be interpreted as a
low level.
For the receivers, it is important that a high level of noise immu-
nity be inbuilt so that slow rise and fall times do not cause
multiple output transitions as the signal passes slowly through
the transition region. The ADM230L-ADM241L have 0.5 V of
hysteresis to guard against this. This ensures that, even in noisy
environments, error-free reception can be achieved.
The receivers have Schmitt trigger inputs with a hysteresis level
of 0.5 V. This ensures error-free reception for both noisy inputs
and for inputs with slow transition times.
Shutdown (SD)
The ADM223, ADM230L, ADM235L, ADM236L and
ADM241L feature a control input that may be used to disable
the part and reduce the power consumption to less than 5 µW.
This is very useful in battery operated systems. During shutdown
the charge pump is turned off, the transmitters are disabled
High Baud Rate Operation
The ADM230L-ADM241L feature high slew rates permitting
data transmission at rates well in excess of the EIA-232-E speci-
fication. The drivers maintain 5 V signal levels at data rates up
to 100-kB/s under worst-case loading conditions.
REV. A
–13–
ADM223/ADM230L–ADM241L
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
14-Lead Plastic DIP (N-14)
14-Lead Cerdip (Q-14)
14
8
14
8
0.280 (7.11)
0.240 (6.10)
0.271 (6.89)
0.240 (6.09)
7
PIN 1
1
PIN 1
7
1
0.300 (7.62)
REF
0.795 (20.19)
0.725 (18.42)
0.780 (19.81)
0.325 (8.25)
0.300 (7.62)
0.163 (4.14)
0.133 (3.378)
0.060 (1.52)
0.015 (0.38)
0.195 (4.95)
0.115 (2.93)
0.210
(5.33)
0.125
(3.17)
MIN
0.21 (5.33)
0.15 (3.81)
0.150
(3.81)
0.015 (0.381)
0.008 (0.204)
0.200 (5.05)
0.125 (3.18)
0.012 (0.305)
0.008 (0.203)
SEATING
PLANE
15؇
0؇
0.02 (0.5)
0.016 (0.406) 0.099 (2.28) 0.05 (1.27)
0.11 (2.79) 0.06 (1.52)
SEATING
PLANE
0.022 (0.558) 0.100 0.070 (1.77)
(2.54)
0.014 (0.356)
0.045 (1.15)
BSC
16-Lead Cerdip (Q-16)
16-Lead Plastic DIP (N-16)
9
16
16
9
0.271 (6.89)
0.240 (6.09)
8
0.280 (7.11)
0.240 (6.10)
8
PIN 1
PIN 1
1
1
0.300 (7.62)
REF
0.780 (19.81)
0.325 (8.25)
0.300 (7.62)
0.840 (21.33)
0.745 (18.93)
0.163 (4.14)
0.133 (3.378)
0.060 (1.52)
0.015 (0.38)
0.195 (4.95)
0.115 (2.93)
0.210
(5.33)
0.125
0.21 (5.33)
0.15 (3.81)
(3.17)
MIN
0.150
(3.81)
0.200 (5.05)
0.125 (3.18)
0.015 (0.381)
0.008 (0.204)
15؇
0؇
0.012 (0.305)
0.008 (0.203)
SEATING
PLANE
0.02 (0.5)
0.11 (2.79)
0.06 (1.52)
0.05 (1.27)
SEATING
PLANE
0.070 (1.77)
0.045 (1.15)
0.022 (0.558)
0.014 (0.356)
0.100
(2.54)
BSC
0.016 (0.406) 0.099 (2.28)
16-Lead SOIC (R-16)
9
16
0.299 (7.60)
0.291 (7.40)
0.419 (10.65)
0.404 (10.26)
PIN 1
8
1
0.107 (2.72)
0.413 (10.50)
0.348 (10.10)
0.089 (2.26)
0.364 (9.246)
0.344 (8.738)
0.045 (1.15)
0.020 (0.50)
0.010 (0.25)
0.004 (0.10)
0.015 (0.38)
0.007 (1.18)
0.050
(1.27)
BSC
0.018 (0.46)
0.014 (0.36)
REV. A
–14–
ADM223/ADM230L–ADM241L
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
20-Lead Plastic DIP (N-20)
20-Lead Cerdip (Q-20)
1.060 (26.90)
0.925 (23.50)
0.97 (24.64)
0.935 (23.75)
20
11
20
11
0.28 (7.11)
0.24 (6.1)
10
0.280 (7.11)
0.240 (6.10)
10
PIN 1
PIN 1
1
1
0.18 (4.57)
0.125 (3.18)
0.32 (8.128)
0.29 (7.366)
0.325 (8.25)
0.300 (7.62)
0.060 (1.52)
0.015 (0.38)
0.195 (4.95)
0.115 (2.93)
0.20 (5.0)
0.14 (3.56)
0.210
(5.33)
0.150
(3.81)
0.200 (5.05)
0.125 (3.18)
0.15 (3.8)
0.125 (3.18)
0.015 (0.381)
0.008 (0.204)
0.011 (0.28)
0.009 (0.23)
0.070 (1.78)
0.045 (1.15)
0.022 (0.558)
0.014 (0.356)
0.100 (2.54)
BSC
15؇
0؇
SEATING
PLANE
0.02 (0.5)
0.016 (0.41)
0.07 (1.78) SEATING
0.05 (1.27)
0.11 (2.79)
0.09 (2.28)
PLANE
LEAD NO. 1 IDENTIFIED BY DOT OR NOTCH
24-Lead Ceramic DIP (D-24)
20-Lead SOIC (R-20)
1.290 (32.77)
0.005 (0.13)
0.5118 (13.00)
0.4961 (12.60)
0.098 (2.49)
24
13
20
11
0.610 (15.49)
0.500 (12.70)
0.2992 (7.60)
0.2914 (7.40)
PIN 1
1
12
0.620 (15.75)
0.590 (14.99)
0.4193 (10.65)
0.3937 (10.00)
0.075 (1.91)
0.015 (0.38)
PIN 1
1
10
0.225
(5.72)
0.150
0.015 (0.38)
0.008 (0.20)
0.200 (5.08)
0.120 (3.05)
(3.81)
0.1043 (2.65)
0.0926 (2.35)
0.0291 (0.74)
0.0098 (0.25)
؋
45؇ SEATING
PLANE
0.023 (0.58)
0.014 (0.36)
0.110 (2.79)
0.090 (2.29)
0.070 (1.78)
0.030 (0.76)
0.0500 (1.27)
0.0157 (0.40)
8؇
0؇
0.0118 (0.30)
0.0040 (0.10)
0.0500
(1.27)
BSC
0.0192 (0.49)
0.0138 (0.35)
0.0125 (0.32)
0.0091 (0.23)
24-Lead Plastic DIP (N-24A)
24-Lead Plastic DIP (N-24)
24
13
13
24
0.55 (13.97)
0.53 (13.47)
PIN 1
0.260 ؎ 0.001
(6.61 ؎ 0.03)
PIN 1
12
1
12
1
0.32 (8.128)
0.30 (7.62)
1.228 (31.19)
1.226 (31.14)
1.25 (31.75)
1.24 (31.5)
0.16 (4.07)
0.14 (3.56)
0.606 (15.4)
0.594 (15.09)
0.130 (3.30)
0.128 (3.25)
0.2
(5.08)
MAX
0.175 (4.45)
0.12 (3.05)
SEATING
PLANE
15؇
0؇
0.011 (0.28)
0.009 (0.23)
0.012 (0.305)
0.008 (0.203)
0.02 (0.5)
0.016 (0.41)
NOTES
0.11 (2.79)
0.09 (2.28)
0.07 (1.78)
0.05 (1.27)
0.02 (0.508) 0.105 (2.67)
0.015 (0.381) 0.095 (2.42)
0.065 (1.66)
0.045 (1.15)
15؇
0
SEATING
PLANE
1. LEAD NO. 1 IDENTIFIED BY DOT OR NOTCH
2. PLASTIC LEADS WILL BE EITHER SOLDER DIPPED OR TIN PLATED
IN ACCORDANCE WITH MIL-M-38510 REQUIREMENTS.
REV. A
–15–
ADM223/ADM230L–ADM241L
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
24-Lead Cerdip (Q-24)
28-Lead SOIC (R-28)
0.708 (18.02)
0.696 (17.67)
13
12
24
0.295
(7.493)
MAX
PIN 1
0.320 (8.128)
0.290 (7.366)
1
28
15
14
0.299 (7.6)
0.291 (7.39)
1.290 (32.77) MAX
0.180
0.225
(4.572)
MAX
(5.715)
MAX
PIN 1
1
0.414 (10.52)
0.398 (10.10)
0.125
(3.175)
MIN
SEATING
PLANE
0.012 (0.305)
0.008 (0.203)
TYP
0.070 (1.778)
0.020 (0.508)
15؇
0؇
0.021 (0.533)
0.015 (0.381)
TYP
0.110 (2.794)
0.090 (2.286)
TYP
0.096 (2.44)
0.089 (2.26)
0.065 (1.651)
0.055 (1.397)
TYP
0.03 (0.76)
0.02 (0.51)
1. LEAD NO. 1 IDENTIFIED BY DOT OR NOTCH.
2. CERDIP LEADS WILL BE EITHER TIN PLATED OR SOLDER DIPPED
IN ACCORDANCE WITH MIL-M-38510 REQUIREMENTS.
6؇
0؇
0.01 (0.254)
0.006 (0.15)
0.05 (1.27)
BSC
0.019 (0.49)
0.014 (0.35)
0.042 (1.067)
0.018 (0.457)
0.013 (0.32)
0.009 (0.23)
1. LEAD NO. IDENTIFIED BY A DOT.
2. SOIC LEADS WILL BE EITHER TIN PLATED OR SOLDER DIPPED
IN ACCORDANCE WITH MIL-M-38510 REQUIREMENTS.
24-Lead SOIC (R-24)
28-Lead SSOP (RS-28)
0.608 (15.45)
0.596 (15.13)
0.407 (10.34)
0.397 (10.08)
24
13
28
15
0.299 (7.6)
0.291 (7.39)
0.212 (5.38)
0.205 (5.207)
0.414 (10.52)
0.398 (10.10)
0.311 (7.9)
0.301 (7.64)
PIN 1
12
PIN 1
1
1
14
0.096 (2.44)
0.03 (0.76)
0.07 (1.78)
0.066 (1.67)
0.089 (2.26)
0.02 (0.51)
0.042 (1.067)
0.018 (0.447)
6؇
0؇
0.037 (0.94)
0.022 (0.559)
8؇
0؇
0.01 (0.254)
0.006 (0.15)
0.05 (1.27)
BSC
0.019 (0.49)
0.014 (0.35)
0.013 (0.32)
0.009 (0.23)
0.008 (0.203)
0.002 (0.050)
0.0256 (0.65)
BSC
0.009 (0.229)
0.005 (0.127)
1. LEAD NO. 1 IDENTIFIED BY A DOT.
2. SOIC LEADS WILL BE EITHER TIN PLATED OR SOLDER DIPPED
IN ACCORDANCE WITH MIL-M-38510 REQUIREMENTS
1. LEAD NO. 1 IDENTIFIED BY A DOT.
2. LEADS WILL BE EITHER TIN PLATED OR SOLDER DIPPED
IN ACCORDANCE WITH MIL-M-38510 REQUIREMENTS
ADM223/ADM230L–ADM241L–Revision History
Location
Page
Changed data sheet from REV. 0 to REV. A.
Removed ESD information from FEATURES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
SPECIFICATIONS changes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Removed ESD information from ABSOLUTE MAXIMUM RATINGS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
REV. A
–16–
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