ADM2490E_VA [ADI]
High Speed, ESD-Protected, Full-Duplex, iCoupler Isolated RS-485 Transceiver; 高速， ESD保护，全双工， iCoupler隔离RS- 485收发器
| 型号： | ADM2490E_VA |
| 厂家： | 
ADI |
| 描述： | High Speed, ESD-Protected, Full-Duplex, iCoupler Isolated RS-485 Transceiver |
| 文件： | 总16页 (文件大小：513K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
High Speed, ESD-Protected, Full-Duplex,
iCoupler Isolated RS-485 Transceiver
ADM2490E
FEATURES
FUNCTIONAL BLOCK DIAGRAM
V
V
DD2
DD1
Isolated, full-duplex RS-485/RS-422 transceiver
8 kV ESD protection on RS-485 input/output pins
16 Mbps data rate
ADM2490E
Complies with ANSI TIA/EIA-485-A-1998 and
ISO 8482: 1987(E)
Y
Z
TxD
RxD
Suitable for 5 V or 3 V operation (VDD1
)
High common-mode transient immunity: >25 kV/μs
Receiver has open-circuit, fail-safe design
32 nodes on the bus
A
B
Thermal shutdown protection
Safety and regulatory approvals
UL recognition: 5000 V rms isolation voltage
for 1 minute per UL 1577
VDE certificate of conformity
GND
GND
2
1
Figure 1.
DIN EN 60747-5-2 (VDE 0884-10 Part 2): 2003-01
DIN EN 60950 (VDE 0805): 2001-12; EN 60950: 2000
V
IORM = 848 V peak
Operating temperature range: −40°C to +105°C
Wide body, 16-lead SOIC package
APPLICATIONS
Isolated RS-485/RS-422 interfaces
Industrial field networks
INTERBUS
Multipoint data transmission systems
GENERAL DESCRIPTION
The ADM2490E is an isolated data transceiver with ±± ꢀk EꢁD
protection that is suitable for high speed, full-duplex communi-
cation on multipoint transmission lines. It is designed for balanced
transmission lines and complies with ANꢁI TIA/EIA-4±5-A-199±
and IꢁO ±4±2: 19±7(E). The device employs Analog Devices, Inc.,
iCoupler® technology to combine a 2-channel isolator, a three-
state differential line driver, and a differential input receiver into
a single pacꢀage.
using the human body model (HBM). The logic side of the device
can be powered with either a 5 k or a 3 k supply, whereas the
bus side requires an isolated 5 k supply.
The device has current-limiting and thermal shutdown features
to protect against output short circuits and situations where bus
contention could cause excessive power dissipation.
The ADM2490E is available in a wide body, 16-lead ꢁOIC pacꢀage
and operates over the −40°C to +105°C temperature range.
The differential transmitter outputs and receiver inputs feature
electrostatic discharge circuitry that provides protection to ±± ꢀk
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registeredtrademarks arethe property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113 ©2006–2008 Analog Devices, Inc. All rights reserved.
ADM2490E
TABLE OF CONTENTS
Features .............................................................................................. 1
ꢁwitching Characteristics .................................................................9
Typical Performance Characteristics ........................................... 10
Circuit Description......................................................................... 12
Electrical Isolation...................................................................... 12
Truth Tables................................................................................. 12
Thermal ꢁhutdown .................................................................... 13
Fail-ꢁafe Receiver Inputs ........................................................... 13
Magnetic Field Immunity.......................................................... 13
Applications Information.............................................................. 14
Isolated Power ꢁupply Circuit .................................................. 14
PCB Layout ................................................................................. 14
Typical Applications................................................................... 15
Outline Dimensions....................................................................... 16
Ordering Guide .......................................................................... 16
Applications....................................................................................... 1
Functional Blocꢀ Diagram .............................................................. 1
General Description......................................................................... 1
Revision History ............................................................................... 2
ꢁpecifications..................................................................................... 3
Timing ꢁpecifications .................................................................. 4
Pacꢀage Characteristics ............................................................... 4
Regulatory Information............................................................... 5
Insulation and ꢁafety-Related ꢁpecifications............................ 5
kDE 0±±4-10 Insulation Characteristics................................... 5
Absolute Maximum Ratings............................................................ 6
EꢁD Caution.................................................................................. 6
Pin Configuration and Function Descriptions............................. 7
Test Circuits....................................................................................... ±
REVISION HISTORY
8/08—Rev. 0 to Rev. A
Changes to Regulatory Approval ꢁtatus Throughout.................. 1
Changed kDE 0±±4 to kDE 0±±4-10 Throughout...................... 1
Changes to Table 5............................................................................ 5
Changes to Table ±............................................................................ 6
Changes to Figure 9.......................................................................... 9
Changes to iCoupler Technology ꢁection ................................... 12
Changes to Magnetic Field Immunity ꢁection ........................... 13
Changes to Isolated Power ꢁupply Circuit ꢁection .................... 14
Changes to Figure 25...................................................................... 14
Added Typical Applications ꢁection ............................................ 15
Updated Outline Dimensions....................................................... 16
Changes to Ordering Guide .......................................................... 16
10/06—Revision 0: Initial Version
Rev. A | Page 2 of 16
ADM2490E
SPECIFICATIONS
All voltages are relative to their respective ground; 2.7 ≤ kDD1 ≤ 5.5 k, 4.5 k ≤ kDD2 ≤ 5.5 k. All minimum/maximum specifications apply
over the entire recommended operation range, unless otherwise noted. All typical specifications are at TA = 25°C, kDD1 = kDD2 = 5.0 k,
unless otherwise noted.
Table 1.
Parameter
Symbol Min
Typ
Max
Unit
Test Conditions
SUPPLY CURRENT
Power Supply Current, Logic Side
TxD/RxD Data Rate < 2 Mbps
TxD/RxD Data Rate = 16 Mbps
Power Supply Current, Bus Side
TxD/RxD Data Rate < 2 Mbps
TxD/RxD Data Rate = 16 Mbps
DRIVER
IDD1
IDD1
3.0
6
mA
mA
2.7 V ≤ VDD1 ≤ 5.5 V, unloaded
100 Ω load between Y and Z
IDD2
IDD2
4.0
60
mA
mA
2.7 V ≤ VDD1 ≤ 5.5 V, unloaded
100 Ω load between Y and Z
Differential Outputs
Differential Output Voltage, Loaded
|VOD2
|
|
2.0
1.5
1.5
5.0
5.0
5.0
V
V
V
RL = 50 Ω (RS-422), see Figure 3
RL = 27 Ω (RS-485), see Figure 3
−7 V ≤ VTEST1 ≤ +12 V, see Figure 4
|VOD4
∆|VOD| for Complementary Output States ∆|VOD|
Common-Mode Output Voltage VOC
∆|VOC| for Complementary Output States ∆|VOC|
0.2
3.0
0.2
200
V
V
V
mA
RL = 54 Ω or 100 Ω, see Figure 3
RL = 54 Ω or 100 Ω, see Figure 3
RL = 54 Ω or 100 Ω, see Figure 3
Short-Circuit Output Current
Logic Inputs
IOS
Input Threshold Low
Input Threshold High
TxD Input Current
VIL
VIH
ITxD
0.25 × VDD1
−10
V
V
μA
0.7 × VDD1
+10
+0.01
70
RECEIVER
Differential Inputs
Differential Input Threshold Voltage
Input Voltage Hysteresis
Input Current (A, B)
VTH
VHYS
II
−0.2
+0.2
1.0
V
mV
mA
mA
kΩ
VOC = 0 V
VOC = 12 V
VOC = −7 V
−0.8
12
Line Input Resistance
Logic Outputs
RIN
Output Voltage Low
Output Voltage High
Short-Circuit Current
VOLRxD
VOHRxD
0.2
VDD1 − 0.2
0.4
V
V
mA
IORxD = 1.5 mA, VA − VB = −0.2 V
IORxD = −1.5 mA, VA − VB = 0.2 V
VDD1 − 0.3
25
100
COMMON-MODE TRANSIENT IMMUNITY1
kV/μs VCM = 1 kV, transient
magnitude = 800 V
1 CM is the maximum common-mode voltage slew rate that can be sustained while maintaining specification-compliant operation. VCM is the common-mode potential
difference between the logic and bus sides. The transient magnitude is the range over which the common-mode is slewed. The common-mode voltage slew rates
apply to both rising and falling common-mode voltage edges.
Rev. A | Page 3 of 16
ADM2490E
TIMING SPECIFICATIONS
TA = −40°C to +±5°C.
Table 2.
Parameter
Symbol
Min
Typ
Max
Unit
Test Conditions
DRIVER
Maximum Data Rate
Propagation Delay
16
Mbps
ns
tPLH, tPHL
tPWD, tPWD
tR, tF
45
60
7
RL = 54 Ω, CL1 = C L2 = 100 pF,
see Figure 6 and Figure 8
RL = 54 Ω, CL1 = CL2 = 100 pF,
see Figure 6 and Figure 8
RL = 54 Ω, CL1 = CL2 = 100 pF,
see Figure 6 and Figure 8
Pulse Width Distortion,
PWD = |tPYLH − tPYHL|, PWD = |tPZLH − tPZHL
Single-Ended Output Rise/Fall Times
ns
ns
|
20
RECEIVER
Propagation Delay
Pulse Width Distortion, PWD = |tPLH − tPHL
tPLH, tPHL
tPWD
60
10
ns
ns
CL = 15 pF, see Figure 7 and Figure 9
CL = 15 pF, see Figure 7 and Figure 9
|
TA = −40°C to +105°C.
Table 3.
Parameter
Symbol
Min
10
Typ
Max
Unit
Test Conditions
DRIVER
Maximum Data Rate
Propagation Delay
Mbps
ns
tPYLH, tPYHL
PZLH, tPZHL
tPWD, tPWD
,
45
60
9
RL = 54 Ω, CL1 = CL2 = 100 pF,
see Figure 6 and Figure 8
RL = 54 Ω, CL1 = CL2 = 100 pF,
see Figure 6 and Figure 8
RL = 54 Ω, CL1 = CL2 = 100 pF,
see Figure 6 and Figure 8
t
Pulse Width Distortion,
PWD = |tPYLH − tPYHL|, PWD = |tPZLH − tPZHL
Single-Ended Output Rise/Fall Time
ns
ns
|
tR, tF
27
RECEIVER
Propagation Delay
tPLH, tPHL
tPWD
60
10
ns
ns
CL = 15 pF, see Figure 7 and
Figure 9
CL = 15 pF, see Figure 7 and
Figure 9
Pulse Width Distortion, PWD = |tPLH − tPHL
|
PACKAGE CHARACTERISTICS
Table 4.
Parameter
Symbol
Min
Typ
1012
3
Max
Unit
Ω
pF
Test Conditions
Resistance (Input to Output)1
Capacitance (Input to Output)1
Input Capacitance2
RI-O
CI-O
CI
f = 1 MHz
4
pF
Input IC Junction-to-Case Thermal Resistance
θJCI
33
°C/W
Thermocouple located at center
of package underside
Output IC Junction-to-Case Thermal Resistance
θJCO
28
°C/W
1 Device considered a 2-terminal device: Pin 1, Pin 2, Pin 3, Pin 4, Pin 5, Pin 6, Pin 7, and Pin 8 are shorted together and Pin 9, Pin 10, Pin 11, Pin 12, Pin 13, Pin 14, Pin 15,
and Pin 16 are shorted together.
2 Input capacitance is from any input data pin to ground.
Rev. A | Page 4 of 16
ADM2490E
REGULATORY INFORMATION
Table 5. ADM2490E Approvals
Organization Approval Type
Notes
UL
Recognized under the Component Recognition
Program of Underwriters Laboratories, Inc.
In accordance with UL 1577, each ADM2490E is proof tested by
applying an insulation test voltage ≥ 6000 V rms for 1 second
(current leakage detection limit = 10 μA).
VDE
Certified according to DIN EN 60747-5-2
(VDE 0884-10 Part 2): 2003-01,
DIN EN 60950 (VDE 0805): 2001-12; EN 60950: 2000
In accordance with DIN EN 60747-5-2, each ADM2490E is proof
tested by applying an insulation test voltage ≥ 1590 V peak for
1 second (partial discharge detection limit = 5 pC).
INSULATION AND SAFETY-RELATED SPECIFICATIONS
Table 6.
Parameter
Symbol
Value
5000
7.45
Unit
Conditions
Rated Dielectric Insulation Voltage
Minimum External Air Gap (Clearance)
V rms
mm min
1 minute duration
Measured from input terminals to output
terminals, shortest distance through air
Measured from input terminals to output
terminals, shortest distance along body
Insulation distance through insulation
DIN IEC 112/VDE 0303 Part 1
L(I01)
L(I02)
Minimum External Tracking (Creepage)
Minimum Internal Gap (Internal Clearance)
Tracking Resistance (Comparative Tracking Index) CTI
Isolation Group
8.1
mm min
0.017
>175
IIIa
mm min
V
Material Group (DIN VDE 0110, 1/89)
VDE 0884-10 INSULATION CHARACTERISTICS
This isolator is suitable for basic electrical isolation only within the safety limit data. Maintenance of the safety data must be ensured by
means of protective circuits.
An asterisꢀ (*) on a pacꢀage denotes kDE 0±±4-10 approval for ±4± k peaꢀ worꢀing voltage.
Table 7.
Description
Symbol
Characteristic
Unit
Installation Classification per DIN VDE 0110 for Rated Mains Voltage
≤300 V rms
≤450 V rms
≤600 V rms
Climatic Classification
Pollution Degree (DIN VDE 0110, see Table 1)
Maximum Working Insulation Voltage
Input-to-Output Test Voltage, Method b1
VIORM × 1.875 = VPR, 100% Production Tested, tm = 1 sec, Partial Discharge < 5 pC
Input-to-Output Test Voltage, Method a
After Environmental Tests, Subgroup 1
VIORM × 1.6 = VPR, tm = 60 sec, Partial Discharge < 5 pC
After Input and/or Safety Test, Subgroup 2/3
VIORM × 1.2 = VPR, tm = 60 sec, Partial Discharge < 5 pC
Highest Allowable Overvoltage (Transient Overvoltage, tTR = 10 sec)
Safety-Limiting Values (Maximum Value Allowed in the Event of a Failure; see Figure 16)
Case Temperature
I to IV
I to II
I to II
40/105/21
2
VIORM
VPR
848
1590
V peak
V peak
1357
V peak
VPR
VTR
1018
6000
V peak
V peak
TS
150
265
335
>109
°C
Input Current
Output Current
Insulation Resistance at TS, VIO = 500 V
IS, INPUT
IS, OUTPUT
RS
mA
mA
Ω
Rev. A | Page 5 of 16
ADM2490E
ABSOLUTE MAXIMUM RATINGS
TA = 25°C, unless otherwise noted. Each voltage is relative to its
respective ground.
ꢁtresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Table 8.
Parameter
Rating
Storage Temperature Range
Ambient Operating Temperature Range
VDD1
−55°C to +150°C
−40°C to +105°C
−0.5 V to +7 V
−0.5 V to +6 V
−0.5 V to VDD1 + 0.5 V
−9 V to +14 V
−0.5 V to VDD1 + 0.5 V
35 mA
Absolute maximum ratings apply individually only, not in
combination.
VDD2
Logic Input Voltages
Bus Terminal Voltages
Logic Output Voltages
Average Output Current, per Pin
ESD CAUTION
ESD (Human Body Model)
on A, B, Y, and Z Pins
8 kV
θJA Thermal Impedance
60°C/W
Rev. A | Page 6 of 16
ADM2490E
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
V
1
2
3
4
5
6
7
8
16
V
DD1
DD2
2
GND
15 GND
1
RxD
NC
14
13
A
B
ADM2490E
TOP VIEW
(Not to Scale)
GND
12 NC
1
TxD
NC
11
10
9
Z
Y
GND
GND
1
2
NC = NO CONNECT
Figure 2. Pin Configuration
Table 9. Pin Function Descriptions
Pin No.
Mnemonic
Description
1
VDD1
Power Supply (Logic Side). Decoupling capacitor to GND1 required; capacitor value should be between
0.01 μF and 0.1 μF.
2, 5, 8
3
4, 7, 12
6
9, 15
10
11
GND1
RxD
NC
TxD
GND2
Y
Z
B
A
Ground (Logic Side).
Receiver Output.
No Connect. These pins must be left floating.
Transmit Data.
Ground (Bus Side).
Driver Noninverting Output.
Driver Inverting Output.
Receiver Inverting Input.
Receiver Noninverting Input.
13
14
16
VDD2
Power Supply (Bus Side). Decoupling capacitor to GND2 required; capacitor value should be between
0.01 μF and 0.1 μF.
Rev. A | Page 7 of 16
ADM2490E
TEST CIRCUITS
R
R
L
C
C
Y
Z
L1
V
OD
R
LDIFF
L
V
OC
L2
Figure 3. Driver Voltage Measurement
Figure 6. Driver Propagation Delay
375Ω
A
V
V
TEST
OD3
60Ω
V
OUT
B
C
L
375Ω
Figure 7. Receiver Propagation Delay
Figure 4. Driver Voltage Measurement
V
DD2
V
V
DD2
DD1
220Ω
100Ω
220Ω
Y
Z
TxD
RxD
A
B
GND
GND
2
1
GND
2
Figure 5. Supply-Current Measurement Test Circuit (See Figure 10 and Figure 11)
Rev. A | Page 8 of 16
ADM2490E
SWITCHING CHARACTERISTICS
3V
1.5V
1.5V
0V
Z
tPLH
tPHL
1/2VO
VO
Y
tPWD = |tPLH
– tPHL|
V
OH
90% POINT
90% POINT
A, B
10% POINT
10% POINT
V
OL
tR
tF
Figure 8. Driver Propagation Delay, Rise/Fall Timing
A, B
0V
0V
tPLH
tPHL
VOH
RxD
1.5V
1.5V
VOL
Figure 9. Receiver Propagation Delay
Rev. A | Page 9 of 16
ADM2490E
TYPICAL PERFORMANCE CHARACTERISTICS
60
50
40
30
20
10
0
3.00
2.95
2.90
tPLH
tPHL
NO LOAD
100Ω LOAD
220Ω-100Ω-220Ω LOAD
2.85
2.80
2.75
2.70
–40
–20
0
20
40
60
80
100
–40
–20
0
20
40
60
80
100
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 13. Receiver Propagation Delay vs. Temperature
Figure 10. IDD1 Supply Current vs. Temperature (See Figure 5)
70
60
TxD
220Ω-100Ω-220Ω LOAD
50
1
40
100Ω LOAD
Y AND Z OUTPUTS
RxD
30
20
2
4
NO LOAD
10
0
–40
–20
0
20
40
60
80
100
CH1 2V
CH3 2V
CH2 2V
CH4 2V
M20ns
44.2%
A CH2
2.84V
T
TEMPERATURE (°C)
Figure 11. IDD2 Supply Current vs. Temperature (See Figure 5)
Figure 14. Driver/Receiver Propagation Delay, Low to High
(RLDIFF = 54 Ω, CL1 = CL2 = 100 pF)
60
tPZHL
tPYLH
tPZLH
tPYHL
50
40
30
20
10
0
TxD
1
Y AND Z OUTPUTS
2
4
RxD
–40
–20
0
20
40
60
80
100
CH1 2V
CH3 2V
CH2 2V
CH4 2V
M20ns
44.2%
A CH2
2.84V
T
TEMPERATURE (°C)
Figure 12. Driver Propagation Delay vs. Temperature
Figure 15. Driver/Receiver Propagation Delay, High to Low
(RLDIFF = 54 Ω, CL1 = CL2 = 100 pF)
Rev. A | Page 10 of 16
ADM2490E
4.77
4.76
4.75
4.74
4.73
4.72
4.71
4.70
4.69
4.68
4.67
4.66
350
300
250
200
150
100
50
SIDE 2
SIDE 1
0
–40
–20
0
20
40
60
80
100
0
50
100
CASE TEMPERATURE (°C)
150
200
TEMPERATURE (°C)
Figure 16. Thermal Derating Curve, Dependence of Safety-Limiting Values
with Case Temperature per VDE 0884-10
Figure 19. Receiver Output High Voltage vs. Temperature,
IRxD = −4 mA
0
–2
0.35
0.30
0.25
0.20
0.15
0.10
0.05
0
–4
–6
–8
–10
–12
–14
4.0
4.2
4.4
4.6
4.8
5.0
–40
–20
0
20
40
60
80
100
VOLTAGE (V)
TEMPERATURE (°C)
Figure 17. Output Current vs. Receiver Output High Voltage
Figure 20. Receiver Output Low Voltage vs. Temperature,
IRxD = –4 mA
16
14
12
10
8
6
4
2
0
0
0.2
0.4
0.6
0.8
1.0
1.2
VOLTAGE (V)
Figure 18. Output Current vs. Receiver Output Low Voltage
Rev. A | Page 11 of 16
ADM2490E
CIRCUIT DESCRIPTION
ELECTRICAL ISOLATION
TRUTH TABLES
The truth tables in this section use the abbreviations shown in
Table 10.
In the ADM2490E, electrical isolation is implemented on the
logic side of the interface. Therefore, the part has two main
sections: a digital isolation section and a transceiver section
(see Figure 21). The driver input signal, which is applied to the
TxD pin and referenced to logic ground (GND1), is coupled
across an isolation barrier to appear at the transceiver section
referenced to isolated ground (GND2). ꢁimilarly, the receiver
input, which is referenced to isolated ground in the transceiver
section, is coupled across the isolation barrier to appear at the
RxD pin referenced to logic ground.
Table 10. Truth Table Abbreviations
Abbreviation Description
H
I
L
X
High level
Indeterminate
Low level
Irrelevant
iCoupler Technology
Table 11. Transmitting
Supply Status
Input
TxD
H
Outputs
The digital signals transmit across the isolation barrier using
iCoupler technology. This technique uses chip scale transformer
windings to couple the digital signals magnetically from one
side of the barrier to the other. Digital inputs are encoded into
waveforms that are capable of exciting the primary transformer
winding. At the secondary winding, the induced waveforms are
decoded into the binary value that was originally transmitted.
VDD1
On
On
VDD2
On
On
Y
H
L
Z
L
H
L
Table 12. Receiving
Supply Status
Inputs
A − B (V)
>0.2
<−0.2
−0.2 < A − B < +0.2
Output
Positive and negative logic transitions at the input cause narrow
pulses (~1 ns) to be sent to the decoder via the transformer. The
decoder is bistable and is, therefore, either set or reset by the
pulses, indicating input logic transitions. In the absence of logic
transitions at the input for more than ~1 μs, a periodic set of
refresh pulses indicative of the correct input state are sent to
ensure dc correctness at the output. If the decoder receives no
internal pulses for more than about 5 μs, the input side is
assumed to be unpowered or nonfunctional, in which case the
output is forced to a default state (see Table 12).
VDD1
On
On
On
On
On
Off
Off
VDD2
On
On
On
On
Off
On
Off
RxD
H
L
I
Inputs open
H
H
H
L
X
X
X
V
V
DD1
DD2
ISOLATION
BARRIER
Y
Z
D
TxD
RxD
ENCODE
DECODE
A
B
ENCODE
DECODE
R
TRANSCEIVER
DIGITAL ISOLATION
GND
GND
2
1
Figure 21. ADM2490E Digital Isolation and Transceiver Sections
Rev. A | Page 12 of 16
ADM2490E
100
10
THERMAL SHUTDOWN
The ADM2490E contains thermal-shutdown circuitry that protects
the part from excessive power dissipation during fault conditions.
ꢁhorting the driver outputs to a low impedance source can result in
high driver currents. The thermal sensing circuitry detects the
increase in die temperature under this condition and disables
the driver outputs. This circuitry is designed to disable the driver
outputs when a die temperature of 150°C is reached. As the device
cools, the drivers are re-enabled at a temperature of 140°C.
1
0.1
0.01
FAIL-SAFE RECEIVER INPUTS
The receiver inputs include a fail-safe feature that guarantees a
logic high on the RxD pin when the A and B inputs are floating
or open-circuited.
0.001
1k
10k
100k
1M
10M
100M
MAGNETIC FIELD FREQUENCY (Hz)
Figure 22. Maximum Allowable External Magnetic Flux Density
MAGNETIC FIELD IMMUNITY
For example, at a magnetic field frequency of 1 MHz, the
maximum allowable magnetic field of 0.2 ꢀgauss induces a
voltage of 0.25 k at the receiving coil. This is about 50% of the
sensing threshold and does not cause a faulty output transition.
ꢁimilarly, if such an event occurs during a transmitted pulse and
is the worst-case polarity, it reduces the received pulse from
>1.0 k to 0.75 k, still well above the 0.5 k sensing threshold
of the decoder.
The limitation on the magnetic field immunity of the iCoupler
is set by the condition in which an induced voltage in the receiv-
ing coil of the transformer is large enough to either falsely set or
reset the decoder. The following analysis defines the conditions
under which this may occur. The 3 k operating condition of
the ADM2490E is examined because it represents the most
susceptible mode of operation.
The pulses at the transformer output have an amplitude greater
than 1 k. The decoder has a sensing threshold of about 0.5 k,
thus establishing a 0.5 k margin in which induced voltages can
be tolerated.
Figure 23 shows the magnetic flux density values in terms of
more familiar quantities, such as maximum allowable current
flow at given distances away from the ADM2490E transformers.
1000
The voltage induced across the receiving coil is given by
DISTANCE = 1m
100
−dβ
dt
⎛
⎜
⎞
⎟
V =
πr2 ; n =1, 2,K, N
∑
n
⎝
⎠
DISTANCE = 5mm
10
where:
β is the magnetic flux density (gauss).
DISTANCE = 100mm
1
N is the number of turns in the receiving coil.
rn is the radius of the nth turn in the receiving coil (cm).
Given the geometry of the receiving coil and an imposed
requirement that the induced voltage is, at most, 50% of the
0.5 k margin at the decoder, a maximum allowable magnetic
field can be determined using Figure 22.
0.1
0.01
1k
10k
100k
1M
10M
100M
MAGNETIC FIELD FREQUENCY (Hz)
Figure 23. Maximum Allowable Current for
Various Current-to-ADM2490E Spacings
With combinations of strong magnetic field and high frequency,
any loops formed by PCB traces can induce error voltages large
enough to trigger the thresholds of succeeding circuitry. Care
should be taꢀen in the layout of such traces to avoid this
possibility.
Rev. A | Page 13 of 16
ADM2490E
APPLICATIONS INFORMATION
lead length between both ends of the capacitor and the input
power-supply pin should not exceed 20 mm. Bypassing between
Pin 1 and Pin ± and between Pin 9 and Pin 16 should also be
considered unless the ground pair on each pacꢀage side is
connected close to the pacꢀage.
ISOLATED POWER SUPPLY CIRCUIT
The ADM2490E requires isolated power capable of 5 k at up
to approximately 65 mA (this current is dependent on the data
rate and termination resistors used) to be supplied between the
kDD2 and the GND2 pins. A transformer driver circuit with a
V
V
GND
DD1
GND
DD2
center-tapped transformer and LDO can be used to generate the
isolated 5 k supply, as shown in Figure 25. The center-tapped
transformer provides electrical isolation of the 5 k power supply.
The primary winding of the transformer is excited with a pair of
square waveforms that are 1±0° out of phase with each other. A
pair of ꢁchottꢀy diodes and a smoothing capacitor are used to
create a rectified signal from the secondary winding. The ADP3330
linear voltage regulator provides a regulated power supply to the
bus-side circuitry (kDD2) of the ADM2490E.
1
2
RxD
NC
GND
1
TxD
NC
A
B
NC
Z
Y
ADM2490E
GND
GND
1
2
NC = NO CONNECT
Figure 24. Recommended Printed Circuit Board Layout
In applications involving high common-mode transients, care
should be taꢀen to ensure that board coupling across the isola-
tion barrier is minimized. Furthermore, the board layout should
be designed such that any coupling that does occur equally affects
all pins on a given component side. Failure to ensure this could
cause voltage differentials between pins exceeding the absolute
maximum ratings of the device, thereby leading to latch-up or
permanent damage.
PCB LAYOUT
The ADM2490E isolated Rꢁ-4±5 transceiver requires no external
interface circuitry for the logic interfaces. Power supply bypass-
ing is required at the input and output supply pins (see Figure 24).
Bypass capacitors are conveniently connected between Pin 1
and Pin 2 for kDD1 and between Pin 15 and Pin 16 for kDD2. The
capacitor value should be between 0.01 μF and 0.1 μF. The total
ISOLATION
BARRIER
V
CC
SD103C
5V
IN
OUT
ADP3330
V
22µF
10µF
CC
TRANSFORMER
DRIVER
SD GND ERR
78253
SD103C
V
CC
V
V
DD2
DD1
ADM2490E
GND
GND
2
1
Figure 25. Isolated Power-Supply Circuit
Rev. A | Page 14 of 16
ADM2490E
TYPICAL APPLICATIONS
The ADM2490E transceiver is designed for point-to-point transmission lines. Figure 26 shows a full-duplex point-to-point application.
To minimize reflections, terminate the line at the receiver end with a termination resistor. The value of the termination resistor should be
equal to the characteristic impedance of the cable.
A
B
Z
Y
Z
R
RxO
TxD
TxD
RxD
D
R
T
B
A
R
T
D
R
Y
ADM2490E
ADM2490E
NOTES
1. R IS EQUAL TO THE CHARACTERISTIC IMPEDANCE OF THE CABLE.
T
Figure 26. Full-Duplex Point-to-Point Application
Rev. A | Page 15 of 16
ADM2490E
OUTLINE DIMENSIONS
10.50 (0.4134)
10.10 (0.3976)
16
1
9
8
7.60 (0.2992)
7.40 (0.2913)
10.65 (0.4193)
10.00 (0.3937)
0.75 (0.0295)
0.25 (0.
0098)
1.27 (0.0500)
BSC
45°
2.65 (0.1043)
2.35 (0.0925)
0.30 (0.0118)
0.10 (0.0039)
8°
0°
COPLANARITY
0.10
SEATING
PLANE
0.51 (0.0201)
0.31 (0.0122)
1.27 (0.0500)
0.40 (0.0157)
0.33 (0.0130)
0.20 (0.0079)
COMPLIANT TO JEDEC STANDARDS MS-013-AA
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
Figure 27. 16-Lead Standard Small Outline Package [SOIC_W]
Wide Body
(RW-16)
Dimensions shown in millimeters and (inches)
ORDERING GUIDE
Model
ADM2490EBRWZ1
ADM2490EBRWZ-REEL71
Temperature Range
−40°C to +105°C
−40°C to +105°C
Package Description
Package Option
RW-16
RW-16
16-Lead Standard Small Outline Package [SOIC_W]
16-Lead Standard Small Outline Package [SOIC_W]
1 Z = RoHS Compliant Part.
©2006–2008 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D05889-0-8/08(A)
Rev. A | Page 16 of 16
相关型号：
ADM2491EBRWZ-REEL7
High Speed, ESD-Protected, Half-/Full-Duplex Coupler Isolated RS-485 Transceiver
ADI
©2020 ICPDF网 联系我们和版权申明