ADM3260ARSZ-RL7 [ADI]
Hot Swappable, Dual I2C Isolators with Integrated DC-to-DC Converter;
| 型号： | ADM3260ARSZ-RL7 |
| 厂家： | 
ADI |
| 描述： | Hot Swappable, Dual I2C Isolators with Integrated DC-to-DC Converter |
| 文件： | 总19页 (文件大小：456K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Hot Swappable, Dual I2C Isolators with
Integrated DC-to-DC Converter
ADM3260
Data Sheet
FEATURES
FUNCTIONAL BLOCK DIAGRAM
isoPower integrated, isolated dc-to-dc converter
Regulated 3.15 V to 5.25 V output
Up to 150 mW output power
High common-mode transient immunity: >25 kV/µs
iCoupler integrated I2C digital isolator
Bidirectional I2C communication
3.0 V to 5.5 V supply/logic levels
Open-drain interfaces
ADM3260
GNDP
SCL2
DECODE
ENCODE
DECODE
ENCODE
ENCODE
DECODE
ENCODE
DECODE
GNDISO
SCL1
SDA2
VDDP
SDA1
VDDISO
GNDISO
SIGNAL ISOLATION
GNDP
NC
Suitable for hot swap applications
30 mA current sink capability
1000 kHz maximum frequency
NC
20-lead SSOP package with 5.3 mm creepage
High temperature operation: 105°C
Safety and regulatory approvals
POWER ISOLATION
GNDP
GNDISO
VSEL
VISO
PCS
PDIS
VIN
UL recognition
RECT REG
OSC
2500 V rms for 1 minute per UL 1577
CSA Component Acceptance Notice 5A
VDE Certificate of Conformity (pending)
DIN V VDE V 0884-10 (VDE V 0884-10):2006-12
GNDISO
GNDP
Figure 1.
V
IORM = 560 V peak
Table 1. Power Levels for Isolated Converter
Input Voltage (V) Output Voltage (V)
Output Power (mW)
APPLICATIONS
Isolated I2C, SMBus, and PMBus interfaces
Multilevel I2C interfaces
5.0
5.0
3.3
5.0
3.3
3.3
150
100
66
Central office switching
Telecommunication and data communication equipment
−48 V distributed power systems
−48 V power supply modules
Networking
Based on the Analog Devices, Inc., isoPower technology, the
on-chip isolated dc-to-dc converter provides a regulated, isolated
voltage of 3.15 V to 5.25 V with up to 150 mW of output power
(see Figure 1).
GENERAL DESCRIPTION
Based on the iCoupler® and isoPower® chip scale transformer
technology, the ADM32601 is a hot swappable digital and power
isolator with two nonlatching, bidirectional communication
channels, supporting a complete isolated I2C interface, and an
integrated isolated dc-to-dc converter, supporting up to
150 mW of isolated power conversion.
With the ADM3260, the iCoupler and isoPower channels, along
with the I2C transceivers, can be integrated with semiconductor
circuitry, which enables a complete isolated I2C interface and
allows the power converter to be implemented in a small form
factor. The ADM3260 is available in 20-lead SSOP package and
has an operating temperature range of −40°C to+105°C.
iCoupler is a chip scale transformer technology with functional,
performance, size, and power consumption advantages as
compared to optocouplers. The bidirectional I2C channels
eliminate the need for splitting I2C signals into separate transmit
and receive signals for use with standalone optocouplers.
isoPower uses high frequency switching elements to transfer power
through its transformer. Special care must be taken during printed
circuit board (PCB) layout to meet emissions standards. See the
AN-0971 Application Note for board layout recommendations.
1 Protected by U.S. Patents 5,952,849; 6,873,065; and 7,075,329. Other patents are pending.
Rev. E
Document Feedback
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rights of third parties that may result from its use. Specifications subject to change without notice.
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Devices. Trademarks and registeredtrademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2013–2020 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com
ADM3260
Data Sheet
TABLE OF CONTENTS
Features.............................................................................................. 1
Recommended Operating Conditions.......................................9
Absolute Maximum Ratings......................................................... 10
ESD Caution ............................................................................... 10
VISO Voltage Truth Table........................................................ 10
Pin Configuration and Function Descriptions .......................... 11
Typical Performance Characteristics .......................................... 12
Test Condition................................................................................ 14
Applications Information ............................................................. 15
Functional Description.............................................................. 15
Digital Isolator Startup.............................................................. 16
Typical Application Diagram................................................... 16
PCB Layout ................................................................................. 16
Thermal Analysis ....................................................................... 17
EMI Considerations................................................................... 17
Insulation Lifetime..................................................................... 17
Applications Example.................................................................... 18
Outline Dimensions....................................................................... 19
Ordering Guide .......................................................................... 19
Applications ...................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description......................................................................... 1
Revision History ............................................................................... 2
Specifications .................................................................................... 3
Electrical Characteristics—5 V Primary Input Supply/5 V
Secondary Isolated Supply .......................................................... 3
Electrical Characteristics—5 V Primary Input Supply/3.3 V
Secondary Isolated Supply .......................................................... 3
Electrical Characteristics—3.3 V Primary Input Supply/3.3 V
Secondary Isolated Supply .......................................................... 4
DC-to-DC Converter Characteristics ....................................... 4
Digital Isolator DC Specifications.............................................. 5
Digital Isolator AC Specifications.............................................. 5
Package Characteristics ............................................................... 6
Regulatory Approvals .................................................................. 7
Insulation and Safety Related Specifications............................ 7
DIN V VDE V 0884-10 (VDE V 0884-10) Insulation
Characteristics .............................................................................. 8
REVISION HISTORY
6/2020—Rev. D to Rev. E
4/2015—Rev. A to Rev. B
Change to PCB Layout Section..................................................... 16
Changes to Features Section............................................................1
Changes to Table 9 and Table 10 ....................................................7
Changes to Functional Description Section............................... 15
11/2017—Rev. C to Rev. D
Change to Table 1............................................................................. 1
6/2014—Rev. 0 to Rev. A
3/2016—Rev. B to Rev. C
Changes to Pin 8, Table 16............................................................ 11
Changed VDDP (V) to VIN (V), Table 15 ................................. 10
12/2013—Revision 0: Initial Version
Rev. E | Page 2 of 19
Data Sheet
ADM3260
SPECIFICATIONS
ELECTRICAL CHARACTERISTICS—5 V PRIMARY INPUT SUPPLY/5 V SECONDARY ISOLATED SUPPLY
All typical specifications are at TA = 25°C, VIN = VISO = 5 V, VSEL resistor network RBOTTOM = 10 kΩ, RTOP = 30.9 kΩ. Minimum/maximum
specifications apply over the entire recommended operation range which is 4.5 V ≤ VIN, VISO ≤ 5.5 V, and −40°C ≤ TA ≤ +105°C, unless
otherwise noted. Switching specifications are tested with CL = 15 pF and CMOS signal levels, unless otherwise noted.
Table 2.
Parameter
Symbol
Min Typ Max Unit
Test Conditions/Comments
DC-TO-DC CONVERTER SUPPLY
Setpoint
VISO
5
V
IISO = 15 mA, RBOTTOM = 10 kΩ, RTOP = 30.9 kΩ
Thermal Coefficient
Line Regulation
Load Regulation
Output Ripple
VISO (TC)
VISO (LINE)
VISO (LOAD)
VISO (RIP)
−44
20
1.3
75
µV/°C
mV/V
%
IISO = 15 mA, VIN = 4.5 V to 5.5 V
IISO = 3 mA to 27 mA
20 MHz bandwidth, COUTPUT_BYPASS = 0.1 µF||10 µF,
3
mV p-p
I
ISO = 27 mA
Output Noise
VISO (NOISE)
fOSC
fPWM
200
125
600
mV p-p
MHz
kHz
mA
%
mA
COUTPUT_BYPASS = 0.1 µF||10 µF, IISO = 27 mA
Switching Frequency
Pulse-Width Modulation Frequency
Output Current
Efficiency at IISO (MAX)
IVIN, No VISO Load
IISO (MAX)
30
VISO > 4.5 V
IISO = 27 mA
29
6.8
104
IVIN (Q)
IVIN (MAX)
12
IVIN, Full VISO Load
mA
Thermal Shutdown
Shutdown Temperature
Thermal Hysteresis
TSHUTDOWN
THYST
154
10
°C
°C
ELECTRICAL CHARACTERISTICS—5 V PRIMARY INPUT SUPPLY/3.3 V SECONDARY ISOLATED SUPPLY
All typical specifications are at TA = 25°C, VIN = 5 V, VISO = 3.3 V, VSEL resistor network RBOTTOM = 10 kΩ, RTOP = 16.9 kΩ. Minimum/
maximum specifications apply over the entire recommended operation range, which is 4.5 V ≤ VIN ≤ 5.5 V, 3 V ≤ VISO ≤ 3.6 V, and −40°C ≤
TA ≤ +105°C, unless otherwise noted. Switching specifications are tested with CL = 15 pF and CMOS signal levels, unless otherwise noted.
Table 3.
Parameter
Symbol
Min Typ Max Unit
Test Conditions/Comments
DC-TO-DC CONVERTER SUPPLY
Setpoint
Thermal Coefficient
Line Regulation
Load Regulation
Output Ripple
VISO
3.3
−26
20
1.3
50
V
IISO = 15 mA, RBOTTOM = 10 kΩ, RTOP = 16.9 kΩ
VISO (TC)
VISO (LINE)
VISO (LOAD)
VISO (RIP)
µV/°C
mV/V
%
IISO = 15 mA, VIN = 4.5 V to 5.5 V
IISO = 3 mA to 27 mA
3
mV p-p 20 MHz bandwidth, COUTPUT_BYPASS = 0.1 µF||10 µF,
ISO = 27 mA
I
Output Noise
Switching Frequency
Pulse-Width Modulation Frequency fPWM
VISO (NOISE)
fOSC
130
125
600
mV p-p COUTPUT_BYPASS = 0.1 µF||10 µF, IISO = 27 mA
MHz
kHz
Output Current
Efficiency at IISO (MAX)
IVIN, No VISO Load
IISO (MAX)
30
mA
%
mA
mA
3 V < VISO< 3.6 V
IISO = 27 mA
24
3.2
85
IVIN (Q)
IVIN (MAX)
8
IVIN, Full VISO Load
Thermal Shutdown
Shutdown Temperature
Thermal Hysteresis
TSHUTDOWN
THYST
154
10
°C
°C
Rev. E | Page 3 of 19
ADM3260
Data Sheet
ELECTRICAL CHARACTERISTICS—3.3 V PRIMARY INPUT SUPPLY/3.3 V SECONDARY ISOLATED SUPPLY
All typical specifications are at TA = 25°C, VIN = VISO = 3.3 V, VSEL resistor network RBOTTOM = 10 kΩ, RTOP = 16.9 kΩ. Minimum/maximum
specifications apply over the entire recommended operation range which is 3.0 V ≤ VIN, VISO ≤ 3.6 V, and −40°C ≤ TA ≤ +105°C, unless
otherwise noted. Switching specifications are tested with CL = 15 pF and CMOS signal levels, unless otherwise noted.
Table 4.
Parameter
Symbol
Min Typ Max Unit
Test Conditions/Comments
DC-TO-DC CONVERTER SUPPLY
Setpoint
Thermal Coefficient
Line Regulation
Load Regulation
Output Ripple
VISO
3.3
−26
20
1.3
50
V
IISO = 10 mA, RBOTTOM = 10 kΩ, RTOP = 16.9 kΩ
IISO = 20 mA
IISO = 10 mA, VIN = 3.0 V to 3.6 V
IISO = 2 mA to 18 mA
VISO (TC)
VISO (LINE)
VISO (LOAD)
VISO (RIP)
µV/°C
mV/V
%
3
mV p-p
20 MHz bandwidth, COUTPUT_BYPASS = 0.1 µF||10 µF,
I
ISO = 18 mA
Output Noise
Switching Frequency
Pulse-Width Modulation Frequency fPWM
Output Current
Efficiency at IISO (MAX)
IVIN, No VISO Load
IVIN, Full VISO Load
VISO (NOISE)
fOSC
130
125
600
mV p-p
MHz
kHz
mA
%
mA
COUTPUT_BYPASS = 0.1 µF||10 µF, IISO = 18 mA
IISO (MAX)
20
3.6 V > VISO > 3 V
IISO = 18 mA
27
3.3
77
IVIN (Q)
IVIN (MAX)
10.5
mA
Thermal Shutdown
Shutdown Temperature
Thermal Hysteresis
TSHUTDOWN
THYST
154
10
°C
°C
DC-TO-DC CONVERTER CHARACTERISTICS
All typical specifications are at TA = 25°C. Minimum/maximum specifications apply over the entire recommended operation range
unless otherwise noted. Switching specifications are tested with CL = 15 pF and CMOS signal levels, unless otherwise noted.
Table 5.
Parameter
Symbol
Min
Typ
Max
Unit
Test Conditions/Comments
UNDERVOLTAGE LOCKOUT
Positive Going Threshold
Negative Going Threshold
PDIS PIN
VIN, VISO supply
VUV+
VUV−
2.7
2.4
V
V
Input Threshold
Logic High
Logic Low
VIH
VIL
IPDIS
0.7 VIN
−10
V
V
µA
0.3 VIN
+10
Input Current
+0.01
0 V ≤ VPDIS ≤ VIN
Rev. E | Page 4 of 19
Data Sheet
ADM3260
DIGITAL ISOLATOR DC SPECIFICATIONS
All minimum/maximum specifications apply over the entire recommended operating range, unless otherwise noted. All typical specifications
are at TA = 25°C, VDDISO = 3.3 V or 5 V, and VDDP = 3.3 V or 5 V, unless otherwise noted. All voltages are relative to their respective
ground.
Table 6.
Parameter
Symbol
Min
Typ Max
Unit Test Conditions/Comments
I2C SIGNAL ISOLATION BLOCK
Input Supply Current
Side 1 (5 V)
IDDISO1
IDDP1
IDDISO2
IDDP2
2.8
2.7
1.9
1.7
5.0
5.0
3.0
3.0
mA
mA
mA
mA
µA
VDDISO = 5 V
VDDP = 5 V
VDDISO = 3.3 V
VDDP = 3.3 V
Side 2 (5 V)
Side 1 (3.3 V)
Side 2 (3.3 V)
LEAKAGE CURRENTS
ISDA1, ISDA2, ISCL1, ISCL2
0.01 10
V
V
SDA1 = VDDISO, VSDA2 = VDDP,
SCL1 = VDDISO, VSCL2 = VDDP
SIDE 1 LOGIC LEVELS
Logic Input Threshold1
Logic Low Output Voltages
VSDA1T, VSCL1T
VSDA1OL, VSCL1OL
500
600
600
50
700
900
850
mV
mV
mV
mV
ISDA1 = ISCL1 = 3.0 mA
ISDA1 = ISCL1 = 0.5 mA
Input/Output Logic Low Level Difference2
SIDE 2 LOGIC LEVELS
Input Voltage
ΔVSDA1, ΔVSCL1
Logic Low
Logic High
Output Voltage
Logic Low
VSDA2IL, VSCL2IL
VSDA2IH, VSCL2IH
0.3 VDDP
400
V
V
0.7 VDDP
VSDA2OL, VSCL2OL
mV
ISDA2 = ISCL2 = 30 mA
1 VIL < 0.5 V, VIH > 0.7 V.
2 ΔVSDA1 = VSDA1OL – VSDA1T, ΔVSCL1 = VSCL1OL – VSCL1T. This is the minimum difference between the output logic low level and the input logic threshold within a given
component. This ensures that there is no possibility of the device latching up the bus to which it is connected.
DIGITAL ISOLATOR AC SPECIFICATIONS
All minimum/maximum specifications apply over the entire recommended operating range, unless otherwise noted. All typical specifications
are at TA = 25°C, VDDISO = 3.3 V or 5 V, and VDDP = 3.3 V or 5 V, unless otherwise noted. Refer to Figure 17. All voltages are relative
to their respective ground.
Table 7.
Parameter
Symbol
Min
Typ Max Unit
Test Conditions/Comments
MAXIMUM FREQUENCY
OUTPUT FALL TIME
5 V Operation
1000
kHz
4.5 V ≤ VDDISO, VDDP ≤ 5.5 V, CL1 = 40 pF,
R1 = 1.6 kΩ, CL2 = 400 pF, R2 = 180 Ω
Side 1 Output (0.9 VDDISO to 0.9 V)
Side 2 Output (0.9 VDDP to 0.1 VDDP) tf2
3 V Operation
tf1
13
32
26
52
120
120
ns
ns
3.0 V ≤ VDDISO, VDDP ≤ 3.6 V, CL1 = 40 pF,
R1 = 1.0 kΩ, CL2 = 400 pF, R2 = 120 Ω
Side 1 Output (0.9 VDDISO to 0.9 V)
Side 2 Output (0.9 VDDP to 0.1 VDDP) tf2
PROPAGATION DELAY
tf1
13
32
32
61
120
120
ns
ns
5 V Operation
4.5 ≤ VDDISO, VDDP ≤ 5.5 V, CL1 = CL2 = 0 pF,
R1 = 1.6 kΩ, R2 = 180 Ω
Side 1 to Side 2
Rising Edge1
Falling Edge2
tPLH12
tPHL12
95
130
ns
ns
162 275
Rev. E | Page 5 of 19
ADM3260
Data Sheet
Parameter
Symbol
Min
Typ Max Unit
Test Conditions/Comments
Side 2 to Side 1
Rising Edge3
Falling Edge4
tPLH21
tPHL21
31
85
70
155
ns
ns
3 V Operation
3.0 V ≤ VDDISO, VDDP ≤ 3.6 V, CL1 = CL2 = 0 pF,
R1 = 1.0 kΩ, R2 = 120 Ω
Side 1 to Side 2
Rising Edge1
Falling Edge2
tPLH12
tPHL12
82
125
ns
ns
196 340
Side 2 to Side 1
Rising Edge3
Falling Edge4
tPLH21
tPHL21
32
75
ns
ns
110 210
PULSE WIDTH DISTORTION
5 V Operation
4.5 V ≤ VDDISO, VDDP ≤ 5.5 V, CL1 = CL2 = 0 pF,
R1 = 1.6 kΩ, R2 = 180 Ω
Side 1 to Side 2, |tPLH12 − tPHL12
Side 2 to Side 1, |tPLH21 − tPHL21
3 V Operation
|
|
PWD12
PWD21
67
54
145
85
ns
ns
3.0 V ≤ VDDISO, VDDP ≤ 3.6 V, CL1 = CL2 = 0 pF,
R1 = 1.0 kΩ, R2 = 120 Ω
Side 1 to Side 2, |tPLH12 − tPHL12
Side 2 to Side 1, |tPLH21 − tPHL21
COMMON-MODE TRANSIENT IMMUNITY5
|
|
PWD12
PWD21
114 215
ns
ns
77
35
135
|CMH|, |CML| 25
kV/µs
1 tPLH12 propagation delay is measured from the Side 1 input logic threshold to an output value of 0.7 VDDP.
2 tPHL12 propagation delay is measured from the Side 1 input logic threshold to an output value of 0.4 V.
3 tPLH21 propagation delay is measured from the Side 2 input logic threshold to an output value of 0.7 VDDISO.
4 tPHL21 propagation delay is measured from the Side 2 input logic threshold to an output value of 0.9 V.
5 |CMH| is the maximum common-mode voltage slew rate that can be sustained while maintaining VO > 0.8 VDDP. |CML| is the maximum common-mode voltage slew
rate that can be sustained while maintaining VO < 0.8 V. The common-mode voltage slew rates apply to both rising and falling common-mode voltage edges. The
transient magnitude is the range over which the common mode is slewed.
PACKAGE CHARACTERISTICS
Table 8. Thermal and Isolation Characteristics
Parameter
Symbol Min Typ Max Unit Test Conditions/Comments
Resistance (Input to Output)1
Capacitance (Input to Output)1
Input Capacitance2
RI-O
CI-O
CI
1012
2.2
4.0
50
Ω
pF
pF
f = 1 MHz
IC Junction-to-Ambient Thermal
Resistance
θJA
°C/W Thermocouple located at center of package
underside,
test conducted on 4-layer board with thin traces3
1 The device is considered a 2-terminal device: Pin 1 through Pin 10 are shorted together; and Pin 11 through Pin 20 are shorted together.
2 Input capacitance is from any input data pin to ground.
3 See the Thermal Analysis section for thermal model definitions.
Rev. E | Page 6 of 19
Data Sheet
ADM3260
REGULATORY APPROVALS
Table 9.
UL1
CSA
VDE (Pending)2
Recognized Under 1577 Component Approved under CSA Component Acceptance
Certified according to DIN V VDE V 0884-10
(VDE V 0884-10):2006-122
Recognition Program1
Notice 5A
Single Protection, 2500 V RMS
Isolation Voltage
File E214100
Basic insulation per CSA 60950-1-03 and IEC 60950-1,
400 V rms (565 V peak) maximum working voltage
File 205078
Reinforced insulation, 560 V peak
File 2471900-4880-0001
1 In accordance with UL 1577, each ADM3260 is proof tested by applying an insulation test voltage ≥ 3000 V rms for 1 second (current leakage detection limit = 10 µA).
2 In accordance with DIN V VDE V 0884-10, ADM3260 is proof tested by applying an insulation test voltage ≥1590 V peak for 1 second (partial discharge detection limit =
5 pC). The * marking branded on the component designates DIN V VDE V 0884-10 approval.
INSULATION AND SAFETY RELATED SPECIFICATIONS
Table 10. Critical Safety Related Dimensions and Material Properties
Parameter
Symbol Value
Unit Test Conditions/Comments
Rated Dielectric Insulation Voltage
Minimum External Air Gap (Clearance)
2500
V rms 1-minute duration
L(I01)
L(I02)
L(PCB)
5.1
5.1
5.5
mm
mm
mm
Measured from input terminals to output terminals,
shortest distance through air
Minimum External Tracking (Creepage)
Measured from input terminals to output terminals,
shortest distance path along body
Minimum Clearance in the Plane of the Printed
Circuit Board (PCB Clearance)
Measured from input terminals to output terminals,
shortest distance through air, line of sight, in the PCB
mounting plane (for information only)
Minimum Internal Gap (Internal Clearance)
Tracking Resistance (Comparative Tracking Index)
Isolation Group
0.017 min mm
Distance through insulation
DIN IEC 112/VDE 0303, Part 1
Material group (DIN VDE 0110, 1/89, Table 1)
CTI
>400
II
V
Rev. E | Page 7 of 19
ADM3260
Data Sheet
DIN V VDE V 0884-10 (VDE V 0884-10) INSULATION CHARACTERISTICS
This isolator is suitable for reinforced electrical isolation only within the safety limit data. Maintenance of the safety data is ensured by
the protective circuits. The asterisk (*) marking on packages denotes DIN V VDE V 0884-10 approval.
Table 11. VDE Characteristics
Description
Test Conditions/Comments
Symbol Characteristic Unit
Installation Classification per DIN VDE 0110
For Rated Mains Voltage ≤ 150 V rms
For Rated Mains Voltage ≤ 300 V rms
For Rated Mains Voltage ≤ 400 V rms
Climatic Classification
Pollution Degree per DIN VDE 0110, Table 1
Maximum Working Insulation Voltage
Input-to-Output Test Voltage, Method b1
I to IV
I to III
I to II
40/105/21
2
VIORM
Vpd(m)
560
1050
V peak
V peak
V
IORM × 1.875 = Vpd(m), 100% production test,
t
ini = tm = 1 sec, partial discharge < 5 pC
Input-to-Output Test Voltage, Method a
After Environmental Tests Subgroup 1
V
IORM × 1.5 = Vpd(m), tini = 60 sec, tm = 10 sec,
Vpd(m)
Vpd(m)
VIOTM
840
672
V peak
V peak
partial discharge < 5 pC
VIORM × 1.2 = Vpd(m), tini = 60 sec, tm = 10 sec,
partial discharge < 5 pC
After Input and/or Safety Test Subgroup 2
and Subgroup 3
Highest Allowable Overvoltage
Surge Isolation Voltage
Safety Limiting Values
3535
4000
V peak
V peak
VIOSM(TEST) = 10 kV, 1.2 µs rise time, 50 µs, 50% fall time VIOSM
Maximum value allowed in the event of a
failure (see Figure 2)
Case Temperature
Converter Safety Total Dissipated Power
VDDP + VDDISO Current
TS
IS1
ITMAX
RS
150
2.5
212
>109
°C
W
mA
Ω
Insulation Resistance at TS for Isolated Converter VIO = 500 V
350
300
250
200
150
100
50
3.0
2.5
2.0
1.5
1.0
0.5
0
0
0
50
100
CASE TEMPERATURE (°C)
150
200
0
50
100
150
200
AMBIENT TEMPERATURE (°C)
Figure 3. Digital Isolator Thermal Derating Curve, Dependence of Safety-
Limiting Values on Case Temperature, per DIN V VDE V 0884-10
Figure 2. Isolated Converter Thermal Derating Curve, Dependence of Safety
Limiting Values on Case Temperature, per DIN V VDE V 0884-10
Rev. E | Page 8 of 19
Data Sheet
ADM3260
RECOMMENDED OPERATING CONDITIONS
Table 12.
Parameter
Value
OPERATING TEMPERATURE1
ISOLATED CONVERTER
Supply Voltages2
−40°C to +105°C
VIN at VISO Set to Regulate to 3.3 V
VIN at VISO Set to Regulate to 5 V
DIGITAL ISOLATOR
3.0 V to 5.5 V
4.5 V to 5.5 V
Supply Voltages (VDDISO, VDDP)3
3.0 V to 5.5 V
5.5 V
Input/Output Signal Voltage (VSDA1, VSCL1, VSDA2, VSCL2
)
Capacitive Load
Side 1 (CL1)
40 pF
Side 2 (CL2)
400 pF
STATIC OUTPUT LOADING
Side 1 (ISDA1, ISCL1
Side 2 (ISDA2, ISCL2
)
)
0.5 mA to 3 mA
0.5 mA to 30 mA
1 Operation at 105°C requires reduction of the maximum load current (see Table 13).
2 Each voltage is relative to its respective ground.
3 All voltages are relative to their respective ground.
Rev. E | Page 9 of 19
ADM3260
Data Sheet
ABSOLUTE MAXIMUM RATINGS
TA = 25°C, unless otherwise noted.
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the
operational section of this specification is not implied.
Operation beyond the maximum operating conditions for
extended periods may affect product reliability.
Table 13.
Parameter
Rating
Storage Temperature (TST)
Ambient Operating Temperature (TA) −40°C to +105°C
Supply Voltages (VIN, VISO)1
Supply Voltages (VDDISO, VDDP)1
VISO Supply Current2
−55°C to +150°C
−0.5 V to +7.0 V
−0.5 V to +7.0 V
TA = −40°C to +105°C
Digital Isolator Average Output
Current per Pin3
30 mA
ESD CAUTION
Side 1 (IO1
Side 2 (IO2
)
)
18 mA
100 mA
Input/Output Voltage
3
Side 1 (VSDA1, VSCL1
Side 2 (VSDA2, VSCL2
)
)
−0.5 V to VDDISO + 0.5 V
−0.5 V to VDDP + 0.5 V
−0.5 V to VIN + 0.5 V
3
Input Voltage (PDIS, VSEL)1, 4
Common-Mode Transients5
−100 kV/µs to +100 kV/µs
1 All voltages are relative to their respective ground.
2 VISO provides current for dc and dynamic loads on the VISO input/output
channels. This current must be included when determining the total VISO
supply current.
3 See Figure 3 for maximum rated current values for various temperatures.
4 VCC can be either VIN or VISO depending on the whether the input is on the
primary or secondary side of the device, respectively.
5 Refers to common-mode transients across the insulation barrier. Common-mode
transients exceeding the absolute maximum ratings may cause latch-up or
permanent damage.
Table 14. Maximum Continuous Working Voltage Supporting 50-Year Minimum Lifetime1
Parameter
Maximum
Unit
Applicable Certification
AC Voltage
Bipolar Waveform
Unipolar Waveform
DC Voltage
560
560
V peak
V peak
All certifications, 50-year operation
|DC Peak Voltage|
560
V peak
1 Refers to the continuous voltage magnitude imposed across the isolation barrier. See the Insulation Lifetime section for more information.
VISO VOLTAGE TRUTH TABLE
Table 15. Truth Table (Positive Logic)
VIN (V)
VSEL Input
PDIS Input
Low
High
Low
High
Low
High
Low
VISO Output (V)
Notes
5
5
3.3
3.3
5
5
3.3
3.3
RBOTTOM = 10 kΩ, RTOP = 30.9 kΩ
RBOTTOM = 10 kΩ, RTOP = 30.9 kΩ
RBOTTOM = 10 kΩ, RTOP = 16.9 kΩ
RBOTTOM = 10 kΩ, RTOP = 16.9 kΩ
RBOTTOM = 10 kΩ, RTOP = 16.9 kΩ
RBOTTOM = 10 kΩ, RTOP = 16.9 kΩ
RBOTTOM = 10 kΩ, RTOP = 30.9 kΩ
RBOTTOM = 10 kΩ, RTOP = 30.9 kΩ
5
0
3.3
0
3.3
0
5
0
Configuration not recommended
High
Rev. E | Page 10 of 19
Data Sheet
ADM3260
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
1
2
3
4
5
6
7
8
9
GNDP
SCL2
SDA2
VDDP
GNDP
NC
20 GNDISO
19 SCL1
18
17
16
15
14
13
12
11
SDA1
VDDISO
GNDISO
NC
ADM3260
TOP VIEW
(Not to Scale)
GNDP
PDIS
VIN
GNDISO
VSEL
VISO
GNDP 10
GNDISO
NOTES
1. NC = NO CONNECT. DO NOT CONNECT TO THIS PIN
Figure 4. Pin Configuration
Table 16. Pin Function Descriptions
Pin No.
Mnemonic Description
1, 5, 7 ,10
2
3
4
6, 15
8
GNDP
SCL2
SDA2
VDDP
NC
Ground Reference for Primary Side. Connect all GNDP pins to the primary ground reference.
Clock Input/Output, Primary Side.
Data Input/Output, Primary Side.
Digital Isolator Primary Supply Input, 3.0 V to 5.5 V.
No Connect. Do not connect to this pin.
Power Disable. When PDIS is tied to VIN, the power supply enters low power standby mode. When PDIS is
tied to GNDP, the power converter is active.
PDIS
9
VIN
isoPower Converter Primary Supply Input, 3.0 V to 5.5 V.
11, 14, 16, 20 GNDISO
Ground Reference for Isolated Side. Connect all GNDISO pins to the isolated ground reference.
VISO
12
Secondary Supply Voltage Output for Digital Isolator Isolated Side Power and External Loads. The output
voltage is adjustable from 3.15 V to 5.25 V.
VSEL
13
Output Voltage Set. Provide a thermally matched resistor network between VISO and GNDISO to divide the
required output voltage to match the 1.25 V reference voltage. The VISO voltage can be programmed up to
20% higher or 75% lower than VIN but must be within the allowed output voltage range.
VDDISO
SDA1
17
18
19
Digital Isolator Isolated Side Supply Input, 3.0 V to 5.5 V.
Data Input/Output, Isolated Side.
Clock Input/Output, Isolated Side.
SCL1
Rev. E | Page 11 of 19
ADM3260
Data Sheet
TYPICAL PERFORMANCE CHARACTERISTICS
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
0.50
0.45
0.40
0.35
0.30
0.25
0.20
0.15
0.10
0.05
0
35
I
VIN
POWER DISSIPATION
30
25
20
VIN = 5V/VISO = 5V
VIN = 5V/VISO = 3.3V
VIN = 3.3V/VISO = 3.3V
15
10
5
0
0
0.02
0.04
0.06
0.08
3.0
3.5
4.0
4.5
5.0
5.5
6.0
LOAD CURRENT (A)
VDDP SUPPLY VOLTAGE (V)
Figure 5. Typical Power Supply Efficiency at 5 V/5 V, 5 V/3.3 V, and 3.3 V/3.3 V
Figure 8. Power Dissipation and IVIN Current vs. VDDP Supply Voltage
450
400
350
300
250
200
150
100
90% LOAD
VIN = 5V/VISO = 5V
VIN = 5V/VISO = 3.3V
VIN = 3.3V/VISO = 3.3V
50
0
10% LOAD
(1ms/DIV)
0
10
20
(mA)
30
40
I
ISO
Figure 6. Typical Total Power Dissipation vs. IISO
Figure 9. Typical VISO Transient Load Response, 5 V Output,
10% to 90% Load Step
35
30
25
20
15
10
5
90% LOAD
VIN = 5V/VISO = 5V
VIN = 5V/VISO = 3.3V
VIN = 3.3V/VISO = 3.3V
10% LOAD
0
0
25
50
75
100
I
(mA)
DDP
(1ms/DIV)
Figure 7. Typical Isolated Output Supply Current (IISO) as a Function of
External Load at 5 V/5 V, 5 V/3.3 V, and 3.3 V/3.3 V
Figure 10. Typical VISO Transient Load Response, 3.3 V Input, 3.3 V Output,
10% to 90% Load Step
Rev. E | Page 12 of 19
Data Sheet
ADM3260
5.0
4.5
4.0
3.5
3.0
2.5
2.0
90% LOAD
30mA LOAD
20mA LOAD
10mA LOAD
10% LOAD
(1ms/DIV)
3.0
3.5
4.0
4.5
5.0
5.5
6.0
OUTPUT VOLTAGE (V)
Figure 14. Relationship Between Output Voltage and Required Input Voltage,
Under Load to Maintain >80% Duty Factor in the PWM
Figure 11. Typical VISO Transient Load Response, 5 V Input, 3.3 V Output,
10% to 90% Load Step
4.970
4.965
4.960
4.955
4.950
4.945
4.940
500
450
400
350
300
250
VIN = 5V/VISO = 5V
200
VIN = 5V/VISO = 3.3V
150
100
–40
0
1
2
3
4
–20
0
20
40
60
80
100
120
TIME (µs)
AMBIENT TEMPERATURE (°C)
Figure 12. Typical VISO = 5 V Output Voltage Ripple at 90% Load
Figure 15. Power Dissipation with a 30 mA Load vs. Ambient Temperature
3.280
3.278
3.276
3.274
3.272
3.270
500
450
VIN = 5V/VISO= 5V
VIN = 3.3V/VISO = 3.3V
VIN = 5V/VISO = 3.3V
400
350
300
250
200
150
100
0
1
2
3
4
–40
–20
0
20
40
60
80
100
120
AMBIENT TEMPERATURE (°C)
TIME (µs)
Figure 13. Typical VISO = 3.3 V Output Voltage Ripple at 90% Load
Figure 16. Power Dissipation with a 20 mA Load vs. Ambient Temperature
Rev. E | Page 13 of 19
ADM3260
Data Sheet
TEST CONDITION
VDDISO
VDDP
SDA2
DECODE
ENCODE
DECODE
ENCODE
ENCODE
DECODE
ENCODE
DECODE
R2
C
R2
C
R1
R1
L1
SDA1
SCL1
SCL2
C
C
L2
L2
L1
GNDISO
GNDP
Figure 17. Timing Test Diagram
Rev. E | Page 14 of 19
Data Sheet
ADM3260
APPLICATIONS INFORMATION
The dc-to-dc converter section of the ADM3260 works on
principles that are common to most modern power supplies. It has
a split controller architecture with isolated pulse-width
FUNCTIONAL DESCRIPTION
The digital isolator block on the ADM3260 interfaces on each
side to a bidirectional I2C signal. Internally, the I2C interface is
split into two unidirectional channels communicating in
opposing directions via a dedicated iCoupler isolation channel
for each. One channel (the bottom channel of each channel pair
shown in Figure 17) senses the voltage state of the Side 1 I2C
pin (SCL1 or SDA1) and transmits its state to its respective Side
2 I2C pin (SCL2 or SDA2).
Both the Side 1 (isolated side) and the Side 2 (primary side) I2C
pins interface to an I2C bus operating in the 3.0 V to 5.5 V range.
A logic low on either pin causes the opposite pin to pull low
enough to comply with the logic low threshold requirements of the
other I2C devices on the bus. To avoid I2C bus contention,
input a low threshold at SDA1 or SCL1 to guarantee at least
50 mV less than the output low signal at the same pin. This step
prevents an output logic low at Side 1 from transmitting back to
Side 2 and pulling down the I2C bus.
Because the Side 2 logic levels or thresholds are standard I2C
values, multiple ADM3260 devices connected to a bus by their
Side 2 pins communicate with each other and with other I2C-
compatible devices. I2C compatibility refers to situations in
which the logic levels of a component do not necessarily meet
the requirements of the I2C specification but still allow the
component to communicate with an I2C-compliant device.
I2C compliance refers to situations in which the logic levels of
a component meet the requirements of the I2C specification.
modulation (PWM) feedback. VIN power is supplied to an
oscillating circuit that switches current into a chip-scale air core
transformer. Power transferred to the secondary side is rectified
and regulated to a value between 3.15 V and 5.25 V depending
on the setpoint supplied by an external voltage divider (see
Equation 1). The secondary (VISO) side controller regulates
the output by creating a PWM control signal that is sent to the
primary (VIN) side by a dedicated iCoupler data channel.
The PWM modulates the oscillator circuit to control the power
being sent to the secondary side. Feedback allows for significantly
higher power and efficiency.
RTOP + RBOTTOM
VISO =1.23×
(V)
(1)
RBOTTOM
where:
R
R
TOP is a resistor between VSEL and VISO.
BOTTOM is a resistor between VSEL and GNDISO.
Because the output voltage is adjusted continuously, there are
an infinite number of operating conditions. This data sheet
addresses three discrete operating conditions in the Specifications
section. Many other combinations of input and output voltage are
possible; Figure 14 depicts the supported voltage combinations
at room temperature. Figure 14 was generated by using a fixed
VISO load and decreasing the input voltage until the PWM was
at 80% duty cycle. Each of the curves represents the minimum
input voltage that is required for operation under this criterion.
For example, if the application requires 30 mA of output
current at 5 V, the minimum input voltage at VIN is 4.25 V.
Figure 14 also illustrates that a configuration with VIN = 3.3 V and
VISO = 5 V is not recommended. Even at 10 mA of output
current, the PWM cannot maintain less than 80% duty factor,
leaving no margin to support load or temperature variations.
However, because the Side 1 pin has a modified output level/
input threshold, this side of the ADM3260 communicates only
with devices that conform to the I2C standard. In other words,
Side 2 of the ADM3260 is I2C compliant, whereas Side 1 is only
I2C compatible.
The output logic low levels are independent of the VDDISO
and VDDP voltages. The input logic low threshold at Side 1 is
also independent of VDDISO. However, the input logic low
threshold at Side 2 is at 0.3 VDDP, consistent with I2C
requirements. The Side 1 and Side 2 pins have open-collector
outputs whose high levels are set via pull-up resistors to their
respective supply voltages.
Typically, the dc-to-dc converter section of the ADM3260
dissipates about 17% more power between room temperature
and maximum temperature; therefore, the 20% PWM margin
covers temperature variations.
The isolated converter implements undervoltage lockout (UVLO)
with hysteresis on the input/output pins of the primary and
secondary sides as well as the VIN power input. This feature
ensures that the converter does not go into oscillation due to
noisy input power or slow power-on ramp rates.
Rev. E | Page 15 of 19
ADM3260
Data Sheet
DIGITAL ISOLATOR STARTUP
PCB LAYOUT
Both the VDDISO and VDDP supplies of the digital isolator
block have an undervoltage lockout feature to prevent the
signal channels from operating unless certain criteria are met.
This feature prevents input logic low signals from pulling down
the I2C bus inadvertently during power-up/power-down.
Supply bypassing of the 0.15 W isoPower integrated dc-to-dc
converter with a low ESR capacitor is required as near the chip
pads as possible. The isoPower inputs require several passive
components to bypass the power effectively, as well as to set the
output voltage and to bypass the core voltage regulator (see
Figure 21 through Figure 23).
To enable the signal channels, the following two criteria must be met:
PDIS
•
•
Both supplies must be at least 2.5 V.
At least 40 µs must elapse after both supplies exceed the
internal start-up threshold of 2.0 V.
VIN
GNDP
+
0.1µF
10µF
Until both criteria are met for both supplies, pull the outputs of
the digital isolator block of the ADM3260 high, ensuring a startup
that avoids any disturbances on the bus.
Figure 21. VIN Bias and Bypass Components
Figure 18 and Figure 19 illustrate the supply conditions for fast
and slow input supply slew rates.
VSEL
30kΩ
VISO
GNDISO
+
0.1µF
10kΩ
10µF
MINIMUM RECOMMENDED
OPERATING SUPPLY, 3.0V
Figure 22. VISO Bias and Bypass Components
SUPPLY VALID
MINIMUM VALID SUPPLY, 2.5V
The power supply section of the ADM3260 uses a 125 MHz
oscillator frequency to efficiently pass power through its chip-scale
transformers. Choose bypass capacitors carefully because they
must perform more than one function. Noise suppression requires
a low inductance, high frequency capacitor; ripple suppression
and proper regulation require a large value bulk capacitor.
Connect these capacitors most conveniently between Pin VIN
and Pin GNDP for VIN and between Pin VISO and Pin GNDISO
for VISO. To suppress noise and reduce ripple, a parallel
combination of at least two capacitors is required. The
recommended capacitor values are 0.1 µF and 10 µF for VIN.
The smaller capacitor must have a low ESR; for example, use of
an NP0 or X5R ceramic capacitor is advised. Ceramic capacitors
are also recommended for the 10 µF bulk capacitance. Add an
additional 10 nF capacitor in parallel if further EMI/EMC control
is desired.
INTERNAL START-UP
THRESHOLD, 2.0V
40µs
Figure 18. Digital Isolator Start-Up Condition, Supply Slew Rate > 12.5 V/ms
MINIMUM RECOMMENDED
OPERATING SUPPLY, 3.0V
MINIMUM VALID SUPPLY, 2.5V
SUPPLY VALID
INTERNAL START-UP
THRESHOLD, 2.0V
40µs
Figure 19. Digital Isolator Start-Up Condition, Supply Slew Rate < 12.5 V/ms
TYPICAL APPLICATION DIAGRAM
Do not exceed 2 mm for the total lead length between the ends
of the low ESR capacitor and the input power supply.
Figure 20 shows a typical application circuit including the pull-
up resistors required for both Side 1 and Side 2 buses. Bypass
capacitor with values from 0.01 µF to 0.1 µF are required between
VDDP and GNDP and between VDDISO and GNDISO.
GNDP
SCL2
GNDISO
SCL1
SDA1
SDA2
VDDP
ISOLATION
BARRIER
VDDISO
GNDP
GNDISO
ADM3260
ADM3260
5V
5V_ISO
GNDP
PDIS
VIN
GNDISO
VSEL
VIN
VISO
GNDISO
VSEL
GNDP
PDIS
VISO
ON/OFF
GNDP
GNDISO
BYPASS < 2mm
VDDISO
VDDP
Figure 23. Recommended PCB Layout
GNDISO
GNDP
SDA
SCL
SDA_ISO
SCL_ISO
SDA2
SCL2
SDA1
SCL1
Figure 20. Typical Isolated I2C Interface Using the ADM3260
Rev. E | Page 16 of 19
Data Sheet
ADM3260
In applications involving high common-mode transients, design
the board layout such that any coupling that does occur affects
all pins on a given component side equally. Failure to ensure this
can cause voltage differentials between pins, exceeding the
absolute maximum ratings specified in Table 13, and thereby
leading to latch-up and/or permanent damage.
Accelerated life testing is performed using voltage levels higher
than the rated continuous working voltage. Acceleration factors for
several operating conditions are determined, allowing calculation
of the time to failure at the working voltage of interest. The values
shown in Table 14 summarize the peak voltages for 50 years of
service life in several operating conditions. In many cases, the
working voltage approved by agency testing is higher than the
50-year service life voltage. Operation at working voltages
higher than the service life voltage listed leads to premature
insulation failure.
The insulation lifetime of the ADM3260 depends on the voltage
waveform type imposed across the isolation barrier. The iCoupler
insulation structure degrades at different rates, depending on
whether the waveform is bipolar ac, unipolar ac, or dc. Figure 24,
Figure 25, and Figure 26 illustrate these different isolation voltage
waveforms.
THERMAL ANALYSIS
The ADM3260 consist of four internal die attached to a split lead
frame with four die attach paddles. For the purposes of thermal
analysis, treat the chip as a thermal unit, with the highest junction
temperature reflected in the θJA value from Table 8. The value of
θJA is based on measurements taken with the devices mounted on
a JEDEC standard, 4-layer board with fine width traces and still
air. Under normal operating conditions, the ADM3260 operates
at a full load across the full temperature range without derating
the output current.
Bipolar ac voltage is the most stringent environment. A 50-year
operating lifetime under the bipolar ac condition determines
the Analog Devices recommended maximum working voltage.
Power dissipation in the device varies with ambient
temperature due to the characteristics of the switching and
rectification elements. Figure 15 and Figure 16 show the
relationship between total power dissipation at two load
conditions and ambient temperature. Use this information to
determine the junction temperature at various operating
conditions to ensure that the device does not go into thermal
shutdown unexpectedly.
In the case of unipolar ac or dc voltage, the stress on the insulation
is significantly lower. This allows operation at higher working
voltages while still achieving a 50-year service life. The working
voltages listed in Table 14 can be applied while maintaining the
50-year minimum lifetime, provided that the voltage conforms to
either the unipolar ac or dc voltage cases. Any cross-insulation
voltage waveform that does not conform to Figure 25 or Figure 26
must be treated as a bipolar ac waveform, and its peak voltage must
be limited to the 50-year lifetime voltage value listed in Table 14.
EMI CONSIDERATIONS
The dc-to-dc converter section of the ADM3260 components
must operate at a very high frequency to allow efficient power
transfer through the small transformers. This high frequency
operation creates high frequency currents that propagate in
circuit board ground and power planes, causing edge and
dipole radiation. Grounded enclosures are recommended for
applications that use these devices. If grounded enclosures are
not possible, follow good RF design practices in the layout of the
PCB. See the AN-0971 Application Note for the most current
PCB layout recommendations for the ADM3260.
RATED PEAK VOLTAGE
0V
Figure 24. Bipolar AC Waveform
RATED PEAK VOLTAGE
0V
INSULATION LIFETIME
Figure 25. DC Waveform
All insulation structures eventually break down when subjected to
voltage stress over a sufficiently long period. The rate of insulation
degradation is dependent on the characteristics of the voltage
waveform applied across the insulation. Analog Devices conducts
an extensive set of evaluations to determine the lifetime of the
insulation structure within the ADM3260.
RATED PEAK VOLTAGE
0V
NOTES
1. THE VOLTAGE IS SHOWN AS SINU SOIDAL FOR ILLUSTRATION
PUPOSES ONLY. IT IS MEANT TO REPRESENT ANY VOLTAGE
WAVEFORM VARYING BETWEEN 0V AND SOME LIMITING VALUE.
THE LIMITING VALUE CAN BE POSITIVE OR NEGATIVE,
BUT THE VOLTAGE CANNOT CROSS 0V.
Figure 26. Unipolar AC Waveform
Rev. E | Page 17 of 19
ADM3260
Data Sheet
APPLICATIONS EXAMPLE
RTN
12V
ADM1075
–48V HOT SWAP
CONTROLLER
AND
DIGITAL POWER
MONITOR
ADP1046
ISOLATED
DIGITAL
DC-TO-DC
CONVERTER
–48V
3.3V_ISO
3.3V MANAGEMENT BUS
VISO
VIN
VDDISO
SDA1
VDDP
SDA_ISO
SCL_ISO
SDA
SCL
ADM3260
SDA2
SCL2
GNDP
PROCESSOR
2
POWER + I C
ISOLATOR
SCL1
–48V
GNDISO
Figure 27. The ADM3260 Used in −48 V Power Monitoring and Control
Rev. E | Page 18 of 19
Data Sheet
ADM3260
OUTLINE DIMENSIONS
7.50
7.20
6.90
11
20
5.60
5.30
5.00
8.20
7.80
7.40
1
10
0.25
0.09
1.85
1.75
1.65
2.00 MAX
8°
4°
0°
0.95
0.75
0.55
0.38
0.22
0.05 MIN
SEATING
PLANE
COPLANARITY
0.10
0.65 BSC
COMPLIANT TO JEDEC STANDARDS MO-150-AE
Figure 28. 20-Lead Shrink Small Outline Package [SSOP]
(RS-20)
Dimensions shown in millimeters
ORDERING GUIDE
Model1
Temperature Range
−40°C to +105°C
−40°C to +105°C
Package Description
Package Option
ADM3260ARSZ
ADM3260ARSZ-RL7
EVAL-ADM3260EBZ
20-Lead Shrink Small Outline Package [SSOP]
20-Lead Shrink Small Outline Package [SSOP]
Evaluation Board
RS-20
RS-20
1 Z = RoHS Compliant Part.
I2C refers to a communications protocol originally developed by Philips Semiconductors (now NXP Semiconductors).
©2013–2020 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D11890-6/20(E)
Rev. E | Page 19 of 19
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