ADM489ABRZ [ADI]

Full-Duplex, Low Power, Slew Rate Limited, EIA RS-485 Transceivers; 全双工,低功耗,限摆率, EIA RS- 485收发器
ADM489ABRZ
型号: ADM489ABRZ
厂家: ADI    ADI
描述:

Full-Duplex, Low Power, Slew Rate Limited, EIA RS-485 Transceivers
全双工,低功耗,限摆率, EIA RS- 485收发器

文件: 总16页 (文件大小:232K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
Full-Duplex, Low Power,  
Slew Rate Limited, EIA RS-485 Transceivers  
ADM488A/ADM489A  
FEATURES  
FUNCTIONAL BLOCK DIAGRAMS  
Complies with ANSI TIA/EIA-485-A-1998 and  
ISO 8482: 1987(E)  
250 kbps data rate  
ADM488A  
A
R
RO  
DI  
B
Single 5 V 10% supply  
−7 V to +12 V bus common-mode range  
Connect up to 32 nodes on the bus  
Reduced slew rate for low EM interference  
Short-circuit protection  
Z
Y
D
30 μA supply current  
Figure 1. ADM488A  
APPLICATIONS  
ADM489A  
Low power RS-485 and RS-422 systems  
DTE-DCE interface  
Packet switching  
A
B
R
RO  
RE  
Local area networks  
Data concentration  
Data multiplexers  
DE  
DI  
Z
Y
D
Integrated services digital network (ISDN)  
Figure 2. ADM489A  
GENERAL DESCRIPTION  
Excessive power dissipation that is caused by bus contention or  
output shorting is prevented by a thermal shutdown circuit. This  
feature forces the driver output into a high impedance state if,  
during fault conditions, a significant temperature increase is  
detected in the internal driver circuitry.  
The ADM488A and ADM489A are low power, differential line  
transceivers suitable for communication on multipoint bus  
transmission lines. They are intended for balanced data  
transmission and comply with both RS-485 and RS-422  
standards of the Electronics Industries Association (EIA). Both  
products contain a single differential line driver and a single  
differential line receiver, making them suitable for full-duplex  
data transfer. The ADM489A contains an additional receiver  
and driver enable control.  
The receiver contains a fail-safe feature that results in a logic  
high output state if the inputs are unconnected (floating).  
The ADM488A/ADM489A are fabricated on BiCMOS, an  
advanced mixed technology process combining low power  
CMOS with fast switching bipolar technology.  
The input impedance is 12 kΩ, allowing 32 transceivers to be  
connected on the bus. The ADM488A/ADM489A operate from  
a single 5 V 10% power supply.  
The ADM488A/ADM489A are fully specified over the industrial  
temperature range and are available in SOIC and MSOP packages.  
Rev. 0  
Information furnished by Analog Devices is believed to be accurate and reliable. However, no  
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other  
rights of third parties that may result from its use. Specifications subject to change without notice. No  
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.  
Trademarks and registeredtrademarks are theproperty of their respective owners.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781.329.4700  
Fax: 781.461.3113  
www.analog.com  
©2009 Analog Devices, Inc. All rights reserved.  
 
ADM488A/ADM489A  
TABLE OF CONTENTS  
Typical Performance Characteristics..............................................8  
Test Circuits........................................................................................9  
Switching Characteristics.......................................................... 10  
Theory of Operation .......................................................................11  
Applications Information.............................................................. 13  
Differential Data Transmission ................................................ 13  
Cable and Data Rate................................................................... 13  
Outline Dimensions....................................................................... 14  
Ordering Guide .......................................................................... 15  
Features .............................................................................................. 1  
Applications....................................................................................... 1  
General Description......................................................................... 1  
Functional Block Diagrams............................................................. 1  
Revision History ............................................................................... 2  
Specifications..................................................................................... 3  
Timing Specifications .................................................................. 4  
Absolute Maximum Ratings............................................................ 5  
ESD Caution.................................................................................. 5  
Pin Configurations and Function Descriptions ........................... 6  
REVISION HISTORY  
10/09—Revision 0: Initial Version  
Rev. 0 | Page 2 of 16  
 
ADM488A/ADM489A  
SPECIFICATIONS  
VCC = 5 V 10%ꢀ all specifications TMIN to TMAX, unless otherwise noted.  
Table 1.  
Parameter  
Symbol Min Typ Max Unit Test Conditions/Comments  
DRIVER  
Differential Output Voltage  
VOD  
5.0  
5.0  
5.0  
5.0  
0.2  
3.0  
0.2  
V
V
V
V
V
V
V
R = ∞, see Figure 11  
2.0  
1.5  
1.5  
VCC = 5 V, R = 50 Ω (RS-422), see Figure 11  
R = 27 Ω (RS-485), see Figure 11  
VTST = –7 V to +12 V, see Figure 12, VCC = 5 V 5ꢀ  
R = 27 Ω or 50 Ω, see Figure 11  
R = 27 Ω or 50 Ω, see Figure 11  
R = 27 Ω or 50 Ω  
Δ|VOD| for Complementary Output States  
Common-Mode Output Voltage  
Δ|VOC| for Complementary Output States  
Output Short-Circuit Current  
VOUT  
CMOS Input Logic Threshold Low  
CMOS Input Logic Threshold High  
Logic Input Current (DE, DI)  
RECEIVER  
VOC  
250  
0.8  
mA  
V
V
−7 V ≤ VO ≤ +12 V  
VINL  
VINH  
1.4  
1.4  
2.0  
1.0 μA  
Differential Input Threshold Voltage  
Input Voltage Hysteresis  
Input Resistance  
VTH  
ΔVTH  
−0.2  
12  
+0.2  
V
−7 V ≤ VCM ≤ +12 V  
VCM = 0 V  
−7 V ≤ VCM ≤ +12 V  
VIN = 12 V  
70  
mV  
kΩ  
mA  
Input Current (A, B)  
1
−0.8 mA  
VIN = −7 V  
Logic Enable Input Current (  
CMOS Output Voltage Low  
CMOS Output Voltage High  
)
RE  
1
μA  
V
V
VOL  
VOH  
0.4  
IOUT = +4.0 mA  
IOUT = −4.0 mA  
VOUT = GND or VCC  
4.0  
7
Short-Circuit Output Current  
85  
mA  
Three-State Output Leakage Current  
POWER SUPPLY CURRENT  
1.0 μA  
0.4 V ≤ VOUT ≤ 2.4 V  
Outputs unloaded, receivers enabled  
DE = 0 V (disabled)  
DE = 5 V (enabled)  
ICC  
30  
37  
60  
74  
μA  
μA  
Rev. 0 | Page 3 of 16  
 
ADM488A/ADM489A  
TIMING SPECIFICATIONS  
VCC = 5 V 10%. All specifications TMIN to TMAX, unless otherwise noted.  
Table 2.  
Parameter  
Symbol  
Min Typ Max Unit Test Conditions/Comments  
DRIVER  
Propagation Delay Input to Output  
tPLH, tPHL  
tSKEW  
250  
2000 ns  
RL differential = 54 Ω, CL1 = CL2 =  
100 pF, see Figure 15  
RL differential = 54 Ω, CL1 = CL2 =  
100 pF, see Figure 15  
RL differential = 54 Ω, CL1 = CL2 =  
100 pF, see Figure 15  
Driver Output Skew  
Driver Rise/Fall Time  
100 800  
ns  
tDR, tDF  
250  
2000 ns  
Driver Enable to Output Valid  
Driver Disable Timing  
Maximum Data Rate  
RECEIVER  
tZL, tZH  
tLZ, tHZ  
250  
300  
250  
2000 ns  
3000 ns  
RL = 500 Ω, CL = 100 pF, see Figure 12  
RL = 500 Ω, CL = 15 pF, see Figure 12  
kbps  
Propagation Delay Input to Output  
Skew  
Receiver Enable  
tPLH, tPHL  
|tPLH − tPHL  
tEN1  
250  
2000 ns  
ns  
CL = 15 pF, see Figure 15  
|
100  
10  
10  
50  
50  
ns  
ns  
RL = 1 kΩ, CL = 15 pF, see Figure 14  
RL = 1 kΩ, CL = 15 pF, see Figure 14  
Receiver Disable  
tEN2  
Maximum Data Rate  
250  
kbps  
Rev. 0 | Page 4 of 16  
 
ADM488A/ADM489A  
ABSOLUTE MAXIMUM RATINGS  
TA = 25°C, unless otherwise noted.  
Stresses above those listed under Absolute Maximum Ratings  
may cause permanent damage to the device. This is a stress  
rating onlyꢀ functional operation of the device at these or any  
other conditions above those indicated in the operational  
section of this specification is not implied. Exposure to absolute  
maximum rating conditions for extended periods may affect  
device reliability.  
Table 3.  
Parameter  
Rating  
VCC  
7 V  
Inputs  
Driver Input (DI)  
Control Inputs (DE,  
−0.3 V to VCC + 0.3 V  
−0.3 V to VCC + 0.3 V  
−14 V to +14 V  
)
RE  
ESD CAUTION  
Receiver Inputs (A, B)  
Outputs  
Driver Outputs  
Receiver Output  
Power Dissipation 8-Lead SOIC  
θJA, Thermal Impedance  
−14 V to +12.5 V  
−0.5 V to VCC + 0.5 V  
520 mW  
110°C/W  
Power Dissipation 14-Lead SOIC  
θJA, Thermal Impedance  
800 mW  
120°C/W  
Operating Temperature Range  
Industrial (AVersion)  
Storage Temperature Range  
−40°C to +85°C  
−65°C to +150°C  
Lead Temperature (Soldering, 10 sec) 300°C  
Vapor Phase (60 sec)  
Infrared (15 sec)  
215°C  
220°C  
Rev. 0 | Page 5 of 16  
 
ADM488A/ADM489A  
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS  
V
1
2
3
4
8
7
6
5
A
B
Z
CC  
ADM488A  
TOP VIEW  
(Not to Scale)  
RO  
DI  
GND  
Y
Figure 3. ADM488A Pin Configuration  
Table 4. ADM488A Pin Function Descriptions  
Pin No.  
Mnemonic  
Description  
1
2
3
4
5
6
7
8
VCC  
RO  
DI  
GND  
Y
Z
B
A
Power Supply, 5 V 10ꢀ.  
Receiver Output. When A > B by 200 mV, RO = high. If A < B by 200 mV, RO = low.  
Driver Input. A logic low on DI forces Y low and Z high, whereas a logic high on DI forces Y high and Z low.  
Ground Connection, 0 V.  
Noninverting Driver, Differential Output Y.  
Inverting Driver, Differential Output Z.  
Inverting Receiver, Input B.  
Noninverting Receiver, Input A.  
Rev. 0 | Page 6 of 16  
 
ADM488A/ADM489A  
NC  
RO  
1
2
3
4
5
6
7
14  
V
CC  
1
2
3
4
5
10  
RO  
RE  
V
CC  
13 NC  
9
8
7
6
A
B
Z
ADM489A  
ADM489A  
RE  
12  
11  
10  
9
A
TOP VIEW  
TOP VIEW  
DE  
DE  
(Not to Scale)  
B
(Not to Scale)  
DI  
DI  
Z
GND  
GND  
GND  
Y
Y
8
NC  
NC = NO CONNECT  
Figure 5. ADM489A MSOP Pin Configuration  
Figure 4. ADM489A SOIC_N Pin Configuration  
Table 5. ADM489A Pin Function Descriptions  
Pin No.  
SOIC_N  
1, 8, 13  
2
3
MSOP  
Mnemonic Description  
N/A1  
NC  
RO  
RE  
No Connect. No connections are required to this pin.  
Receiver Output. When enabled, if A > B by 200 mV, RO = high. If A < B by 200 mV, RO = low.  
Receiver Output Enable. A low level enables the receiver output, RO. A high level places the  
ADM489A in a high impedance state.  
1
2
4
5
3
4
DE  
DI  
Driver Output Enable. A high level enables the driver differential outputs (Y and Z). A low level  
places the ADM489A in a high impedance state.  
Driver Input. When the driver is enabled, a logic low on DI forces Y low and Z high, whereas a  
logic high on DI forces Y high and Z low.  
6, 7  
9
10  
11  
12  
14  
5
6
7
8
9
10  
GND  
Y
Z
B
A
Ground Connection, 0 V.  
Noninverting Driver, Differential Output Y.  
Inverting Driver, Differential Output Z.  
Inverting Receiver, Input B.  
Noninverting Receiver, Input A.  
Power Supply, 5 V 10ꢀ.  
VCC  
1 N/A means not applicable.  
Rev. 0 | Page 7 of 16  
 
ADM488A/ADM489A  
TYPICAL PERFORMANCE CHARACTERISTICS  
45  
0
–10  
–20  
–30  
–40  
–50  
–60  
–70  
–80  
–90  
40  
35  
30  
25  
20  
15  
10  
5
0
0
0.2  
0.4  
0.6  
0.8  
1.0  
1.2  
1.4  
1.6  
1.8  
5.0  
3.0  
2.5  
2.7  
2.9  
3.1  
3.3  
3.5  
3.7  
3.9  
4.1  
4.3  
4.5  
OUTPUT VOLTAGE (V)  
OUTPUT VOLTAGE (V)  
Figure 6. Output Current vs. Receiver Output Low Voltage  
Figure 9. Output Current vs. Driver Output High Voltage  
0
0
–2  
–10  
–20  
–30  
–40  
–50  
–60  
–70  
–80  
–4  
–6  
–8  
–10  
–12  
–14  
–16  
–18  
–20  
0
0.5  
1.0  
1.5  
2.0  
2.5  
3.0  
3.5  
4.0  
3.0  
3.2  
3.4  
3.6  
3.8  
4.0  
4.2  
4.4  
4.6  
4.8  
OUTPUT VOLTAGE (V)  
OUTPUT VOLTAGE (V)  
Figure 10. Output Current vs. Driver Differential Output Voltage  
Figure 7. Output Current vs. Receiver Output High Voltage  
90  
80  
70  
60  
50  
40  
30  
20  
10  
0
0
0.5  
1.0  
1.5  
2.0  
2.5  
OUTPUT VOLTAGE (V)  
Figure 8. Output Current vs. Driver Output Low Voltage  
Rev. 0 | Page 8 of 16  
 
ADM488A/ADM489A  
TEST CIRCUITS  
V
CC  
+1.5V  
–1.5V  
R
R
S1  
R
L
S2  
V
OD  
RE  
C
L
V
V
OUT  
OC  
RE IN  
Figure 14. Receiver Enable/Disable Test Circuit  
Figure 11. Driver Voltage Measurement Test Circuit  
3V  
DE  
A
B
C
C
Y
Z
L1  
L2  
375  
RO  
DI  
RL  
D
DIFF  
R
RE  
V
60Ω  
375Ω  
OD3  
V
TST  
Figure 12. Driver Enable/Disable Test Circuit  
Figure 15. Driver/Receiver Propagation Delay Test Circuit  
V
CC  
A
R
L
0V OR 3V  
DE IN  
S1  
S2  
DE  
B
C
L
V
OUT  
Figure 13. Driver Voltage Measurement Test Circuit  
Rev. 0 | Page 9 of 16  
 
 
 
 
ADM488A/ADM489A  
SWITCHING CHARACTERISTICS  
V
CC  
V
/2  
V
/2  
CC  
CC  
V
CC  
0V  
Z
tPLH  
tPHL  
0.5V  
tZL  
0.5V  
CC  
CC  
DE  
0V  
1/2V  
O
tLZ  
2.3V  
2.3V  
V
O
Y
Y, Z  
Y, Z  
V
V
+ 0.5V  
– 0.5V  
OL  
OH  
V
V
OL  
OH  
+V  
tZH  
tHZ  
O
90% POINT  
90% POINT  
V
= V – V  
(Y) (Z)  
DIFF  
V
DIFF  
–V  
10% POINT  
10% POINT  
O
tDR  
tDF  
0V  
Figure 16. Driver Propagation Delay, Rise/Fall Timing  
Figure 18. Driver Enable/Disable Timing  
0.7V  
CC  
CC  
0.5V  
tZL  
0.5V  
CC  
CC  
RE  
0.3V  
A – B  
0V  
0V  
tLZ  
1.5V  
1.5V  
RO  
V
V
+ 0.5V  
OL  
tPLH  
tPHL  
OUTPUT LOW  
OUTPUT HIGH  
V
V
OL  
OH  
V
V
OH  
OL  
tZH  
tHZ  
tSKEW = |tPLH  
tPHL|  
RO  
1.5V  
1.5V  
– 0.5V  
OH  
RO  
0V  
Figure 17. Receiver Propagation Delay  
Figure 19. Receiver Enable/Disable Timing  
Rev. 0 | Page 10 of 16  
 
ADM488A/ADM489A  
THEORY OF OPERATION  
The ADM488A/ADM489A are ruggedized RS-485 transceivers  
that operate from a single 5 V supply. They contain protection  
against radiated and conducted interference and are ideally suited  
for operation in electrically harsh environments or where cables  
can be plugged/unplugged. They are also immune to high RF  
field strengths without special shielding precautions.  
the slew rate is controlled by the ADM488A/ADM489A and  
reflections are minimized.  
The communications network can be extended to include  
multipoint connections, as shown in Figure 22. As many as  
32 transceivers can be connected to the bus.  
Table 6 and Table 7 show the truth tables for transmitting and  
receiving.  
The ADM488A/ADM489A are intended for balanced data  
transmission and comply with both EIA RS-485 and RS-422  
standards. They contain a differential line driver and a differen-  
tial line receiver, and are suitable for full-duplex data transmission.  
Table 6. Transmitting Truth Table  
Inputs  
Outputs  
RE  
DE  
DI  
1
0
X1  
X1  
Z
0
1
Y
1
0
The input impedance on the ADM488A/ADM489A is 12 kΩ,  
allowing up to 32 transceivers on the differential bus. The  
ADM488A/ADM489A operate from a single 5 V 10% power  
supply. A thermal shutdown circuit prevents excessive power  
dissipation caused by bus contention or by output shorting.  
This feature forces the driver output into a high impedance state  
if, during fault conditions, a significant temperature increase is  
detected in the internal driver circuitry.  
X1  
X1  
0
1
1
0
0
High-Z  
Hgh-Z  
High-Z  
High-Z  
1
1 X is don’t care.  
Table 7. Receiving Truth Table  
Inputs  
Output  
The receiver contains a fail-safe feature that results in a logic  
high output state if the inputs are unconnected (floating).  
RE  
DE  
0
0
A to B  
≥ +0.2 V  
0.2 V  
Inputs open circuit  
X1  
RO  
1
0
0
0
The ADM488A/ADM489A can transmit at data rates up to  
250 kbps. Figure 20 shows a typical application for the  
ADM488A/ADM489A, a full-duplex link where data transfers  
at rates of up to 250 kbps. A terminating resistor is shown at  
both ends of the link. This termination is not critical because  
0
1
0
0
1
High-Z  
1 X is don’t care.  
V
V
CC  
CC  
V
CC  
ADM488A  
ADM488A  
A
B
Z
Y
Z
R
RO  
DI  
D
R
T
V
CC  
B
A
R
T
DI  
D
R
RO  
Y
GND  
GND  
NOTES  
1. MAXIMUM NUMBER OF NODES = 32.  
Figure 20. ADM488A/ADM489A Full-Duplex Data Link  
Rev. 0 | Page 11 of 16  
 
 
 
 
ADM488A/ADM489A  
MAXIMUM NUMBER OF NODES = 32  
V
T
CC  
MASTER  
SLAVE  
A
Y
Z
R
RO  
RE  
DE  
DI  
D
DI  
R
B
Z
Y
DE  
RE  
RO  
V
CC  
R
B
A
T
D
R
ADM488A  
ADM488A  
A
B
Z
Y
A
B
Z
Y
SLAVE  
SLAVE  
ADM488A  
ADM488A  
R
R
D
D
RO RE DE DI  
RO RE DE DI  
NOTES  
1. R IS EQUAL TO THE CHARACTERISTIC IMPEDANCE OF THE CABLE.  
T
Figure 21. Typical RS-485 Full-Duplex Application  
Rev. 0 | Page 12 of 16  
ADM488A/ADM489A  
APPLICATIONS INFORMATION  
DIFFERENTIAL DATA TRANSMISSION  
CABLE AND DATA RATE  
Differential data transmission reliably transmits data at high  
rates over long distances and through noisy environments.  
Differential transmission nullifies the effects of ground shifts  
and noise signals, which appear as common-mode voltages on  
the line. Two main standards that specify the electrical charac-  
teristics of transceivers used in differential data transmission  
are approved by the EIA.  
The transmission line of choice for RS-485 communications is a  
twisted pair. Twisted pair cable tends to cancel common-mode  
noise and causes cancellation of the magnetic fields generated  
by the current flowing through each wire, thereby reducing the  
effective inductance of the pair.  
The ADM488A/ADM489A are designed for bidirectional data  
communications on multipoint transmission lines. A typical  
application with a multipoint transmission network is illustrated  
in Figure 22. An RS-485 transmission line can have up to 32  
transceivers on the bus. Only one driver can transmit at a par-  
ticular time, but multiple receivers can be simultaneously enabled.  
The RS-422 standard specifies data rates up to 10 Mbps and line  
lengths up to 4000 ft. A single driver can drive a transmission  
line with up to 10 receivers.  
To cater to true multipoint communications, the RS-485 stan-  
dard was defined to meet or exceed the requirements of RS-422.  
It also allows up to 32 drivers and 32 receivers to be connected  
to a single bus. An extended common-mode range of −7 V to  
+12 V is defined. The most significant difference between the  
RS-422 and RS-485 is that the RS-485 drivers can be disabled,  
thereby allowing up to 32 receivers to be connected to a single  
line. Only one driver should be enabled at a time, but the RS-485  
standard contains additional specifications to guarantee device  
safety in the event of line contention.  
As with any transmission line, it is important to minimize reflec-  
tions. This can be achieved by terminating the extreme ends of the  
line using resistors equal to the characteristic impedance of the  
line. Keep stub lengths of the main line as short as possible. A  
properly terminated transmission line appears purely resistive  
to the driver.  
Table 8. Comparison of RS-422 and RS-485 Interface Standards  
Specification  
RS-422  
RS-485  
Transmission Type  
Maximum Data Rate  
Differential  
10 Mbps  
4000 ft.  
2 V  
Differential  
10 Mbps  
4000 ft.  
1.5 V  
54 Ω  
12 kΩ minimum  
200 mV  
−7 V to +12 V  
32/32  
Maximum Cable Length  
Minimum Driver Output Voltage  
Driver Load Impedance  
Receiver Input Resistance  
Receiver Input Sensitivity  
Receiver Input Voltage Range  
Number of Drivers/Receivers per Line  
RT  
100 Ω  
4 kΩ minimum  
200 mV  
−7 V to +7 V  
1/10  
RT  
D
D
R
R
R
R
D
D
Figure 22. Typical RS-485 Network  
Rev. 0 | Page 13 of 16  
 
 
ADM488A/ADM489A  
OUTLINE DIMENSIONS  
3.10  
3.00  
2.90  
10  
1
6
5
5.15  
4.90  
4.65  
3.10  
3.00  
2.90  
PIN 1  
IDENTIFIER  
0.50 BSC  
0.95  
0.85  
0.75  
15° MAX  
1.10 MAX  
0.70  
0.55  
0.40  
0.15  
0.05  
0.23  
0.13  
6°  
0°  
0.30  
0.15  
COPLANARITY  
0.10  
COMPLIANT TO JEDEC STANDARDS MO-187-BA  
Figure 23. 10-Lead Mini Small Outline Package [MSOP]  
(RM-10)  
Dimensions shown in millimeters  
5.00 (0.1968)  
4.80 (0.1890)  
8
1
5
4
6.20 (0.2441)  
5.80 (0.2284)  
4.00 (0.1574)  
3.80 (0.1497)  
0.50 (0.0196)  
0.25 (0.0099)  
1.27 (0.0500)  
BSC  
45°  
1.75 (0.0688)  
1.35 (0.0532)  
0.25 (0.0098)  
0.10 (0.0040)  
8°  
0°  
0.51 (0.0201)  
0.31 (0.0122)  
COPLANARITY  
0.10  
1.27 (0.0500)  
0.40 (0.0157)  
0.25 (0.0098)  
0.17 (0.0067)  
SEATING  
PLANE  
COMPLIANT TO JEDEC STANDARDS MS-012-AA  
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS  
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR  
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.  
Figure 24. 8-Lead Standard Small Outline Package [SOIC_N]  
Narrow Body  
(R-8)  
Dimensions shown in millimeters and (inches)  
Rev. 0 | Page 14 of 16  
 
ADM488A/ADM489A  
8.75 (0.3445)  
8.55 (0.3366)  
8
7
14  
1
6.20 (0.2441)  
5.80 (0.2283)  
4.00 (0.1575)  
3.80 (0.1496)  
1.27 (0.0500)  
BSC  
0.50 (0.0197)  
0.25 (0.0098)  
45°  
1.75 (0.0689)  
1.35 (0.0531)  
0.25 (0.0098)  
0.10 (0.0039)  
8°  
0°  
COPLANARITY  
0.10  
SEATING  
PLANE  
1.27 (0.0500)  
0.40 (0.0157)  
0.51 (0.0201)  
0.31 (0.0122)  
0.25 (0.0098)  
0.17 (0.0067)  
COMPLIANT TO JEDEC STANDARDS MS-012-AB  
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS  
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR  
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.  
Figure 25. 14-Lead Standard Small Outline Package [SOIC_N]  
Narrow Body  
(R-14)  
Dimensions shown in millimeters and (inches)  
ORDERING GUIDE  
Temperature  
Package  
Model  
Range  
Package Description  
10-Lead Mini Small Outline Package [MSOP]  
10-Lead Mini Small Outline Package [MSOP]  
8-Lead Standard Small Outline Package, Narrow Body  
[SOIC_N]  
8-Lead Standard Small Outline Package, Narrow Body  
[SOIC_N]  
Option  
RM-10  
RM-10  
R-8  
Branding  
F0F  
F0F  
ADM488ABRMZ1  
ADM488ABRMZ-REEL71  
ADM488ABRZ1  
−40°C to +85°C  
−40°C to +85°C  
−40°C to +85°C  
ADM488ABRZ-REEL71  
−40°C to +85°C  
R-8  
ADM489ABRMZ1  
ADM489ABRMZ-REEL71  
ADM489ABRZ1  
−40°C to +85°C  
−40°C to +85°C  
−40°C to +85°C  
10-Lead Mini Small Outline Package [MSOP]  
10-Lead Mini Small Outline Package [MSOP]  
14-Lead Standard Small Outline Package, Narrow Body  
[SOIC_N]  
14-Lead Standard Small Outline Package, Narrow Body  
[SOIC_N]  
RM-10  
RM-10  
R-14  
F0G  
F0G  
ADM489ABRZ-REEL71  
−40°C to +85°C  
R-14  
1 Z = RoHS Compliant Part.  
Rev. 0 | Page 15 of 16  
 
ADM488A/ADM489A  
NOTES  
©2009 Analog Devices, Inc. All rights reserved. Trademarks and  
registered trademarks are the property of their respective owners.  
D08498-0-10/09(0)  
Rev. 0 | Page 16 of 16  

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