ADM6318AX47ARJZ-RL7 [ADI]
IC,POWER SUPPLY SUPERVISOR,TSOP,5PIN,PLASTIC;
| 型号： | ADM6318AX47ARJZ-RL7 |
| 厂家： | 
ADI |
| 描述： | IC,POWER SUPPLY SUPERVISOR,TSOP,5PIN,PLASTIC |
| 文件： | 总16页 (文件大小：302K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Supervisory Circuits with Watchdog
and Manual Reset in 5-Lead SOT-23
ADM6316/ADM6317/ADM6318/ADM6319/ADM6320/ADM6321/ADM6322
FEATURES
FUNCTIONAL BLOCK DIAGRAMS
26 reset threshold options
2.5 V to 5 V in 100 mV increments
4 reset timeout options
1 ms, 20 ms, 140 ms, and 1120 ms (minimum)
4 watchdog timeout options
6.3 ms, 102 ms, 1600 ms, and 25.6 sec (typical)
Manual reset input
ADM6316
V
CC
V
CC
RESET
GENERATOR
RESET
V
REF
DEBOUNCE
MR
WATCHDOG
DETECTOR
Reset output stages
Push-pull active low
Open-drain active low
Push-pull active high
GND
WDI
Low power consumption: 5 μA
Guaranteed reset output valid to VCC = 1 V
Power supply glitch immunity
Specified over industrial temperature range
5-lead SOT-23 package
Figure 1.
ADM6320
V
CC
RESET
GENERATOR
RESET
APPLICATIONS
V
REF
Microprocessor systems
Computers
Controllers
DEBOUNCE
MR
WATCHDOG
DETECTOR
Intelligent instruments
Portable equipment
GND
WDI
Figure 2.
GENERAL DESCRIPTION
The ADM6316/ADM6317/ADM6318/ADM6319/ADM6320/
ADM6321/ADM6322 are supervisory circuits that monitor
power supply voltage levels and code execution integrity in
microprocessor-based systems. As well as providing power-
on reset signals, an on-chip watchdog timer can reset the
microprocessor if it fails to strobe within a preset timeout
period. A reset signal can also be asserted by an external push
button through a manual reset input. The seven parts feature
different combinations of watchdog input, manual reset input,
and output stage configuration, as shown in Table 1.
Each part is available in a choice of 26 reset threshold options
ranging from 2.5 V to 5 V in 100 mV increments. There are also
four reset timeout options of 1 ms, 20 ms, 140 ms, and 1120 ms
(minimum) and four watchdog timeout options of 6.3 ms, 102 ms,
1600 ms, and 25.6 sec (typical).
The ADM6316/ADM6317/ADM6318/ADM6319/ADM6320/
ADM6321/ADM6322 are available in 5-lead SOT-23 packages
and typically consume only 3 μA, making them suitable for use
in low power portable applications.
Table 1. Selection Table
Output Stage
RESET
Part No.
Watchdog
Yes
Yes
Yes
No
Yes
Yes
No
Manual Reset
RESET
ADM6316
ADM6317
ADM6318
ADM6319
ADM6320
ADM6321
ADM6322
Yes
Yes
No
Yes
Yes
No
Yes
Push-pull
No
No
Push-pull
Push-pull
Push-pull
No
Push-pull
Push-pull
Push-pull
Push-pull
Open-drain
Open-drain
Open-drain
Rev. D
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registeredtrademarks arethe property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 www.analog.com
Fax: 781.461.3113 ©2004–2008 Analog Devices, Inc. All rights reserved.
ADM6316/ADM6317/ADM6318/ADM6319/ADM6320/ADM6321/ADM6322
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications....................................................................................... 1
Functional Block Diagrams............................................................. 1
General Description......................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Absolute Maximum Ratings............................................................ 5
ESD Caution.................................................................................. 5
Pin Configurations and Function Descriptions ........................... 6
Typical Performance Characteristics ............................................. 7
Circuit Description........................................................................... 9
Reset Output ................................................................................. 9
RESET
Output ........................................................9
Open-Drain
Manual Reset Input.......................................................................9
Watchdog Input .............................................................................9
Applications Information.............................................................. 10
Watchdog Input Current ........................................................... 10
Negative-Going VCC Transients................................................ 10
Ensuring Reset Valid to VCC = 0 V........................................... 10
Watchdog Software Considerations......................................... 10
Options ............................................................................................ 11
Outline Dimensions....................................................................... 13
Ordering Guide .......................................................................... 13
REVISION HISTORY
8/08—Rev. C to Rev. D
Change to Figure 18 ......................................................................... 9
4/07—Rev. B to Rev. C
Added Figure 2.................................................................................. 1
Changes to Figure 23...................................................................... 13
Changes to Ordering Guide .......................................................... 13
1/07—Rev. A to Rev. B
Changes to Functional Block Diagram.......................................... 1
Changes to Figure 18...................................................................... 10
5/06—Rev. 0 to Rev. A
Updated Format..................................................................Universal
Changes to Functional Block Diagram.......................................... 1
Changes to Table 8.......................................................................... 12
Changes to Figure 22...................................................................... 13
Changes to Ordering Guide .......................................................... 13
10/04—Revision 0: Initial Version
Rev. D | Page 2 of 16
ADM6316/ADM6317/ADM6318/ADM6319/ADM6320/ADM6321/ADM6322
SPECIFICATIONS
VCC = full operating range, TA = TMIN to TMAX, unless otherwise noted.
Table 2.
Parameter
Min
Typ
Max
Unit
Test Conditions/Comments
SUPPLY
VCC Operating Voltage Range
Supply Current
1
5.5
20
12
V
μA
μA
10
5
VCC = 5.5 V
VCC = 3.6 V
RESET THRESHOLD VOLTAGE
VTH − 1.5%
VTH − 2.5%
VTH
VTH
40
VTH + 1.5%
VTH + 2.5%
V
V
TA = 25°C
TA = −40°C to +85°C
RESET THRESHOLD TEMPERATURE
COEFFICIENT
ppm/°C
RESET THRESHOLD HYSTERESIS
RESET TIMEOUT PERIOD
ADM63xxA
ADM63xxB
ADM63xxC
3
mV
1
20
140
1120
1.4
28
200
1600
40
2
40
280
2240
ms
ms
ms
ms
μs
ADM63xxD
VCC TO RESET DELAY
VCC falling at 1 mV/μs
PUSH-PULL OUTPUT (ADM6316, ADM6317,
ADM6318, ADM6319, ADM6321, ADM6322)
RESET
0.3
0.3
0.3
0.4
V
V
Output Voltage
VCC ≥ 1.0 V, ISINK = 50 μA
VCC ≥ 1.2 V, ISINK = 100 μA
VCC ≥ 2.7 V, ISINK = 1.2 mA
VCC ≥ 4.5 V, ISINK = 3.2 mA
VCC ≥ 2.7 V, ISOURCE = 500 μA
VCC ≥ 4.5 V, ISOURCE = 800 μA
V
V
V
V
0.8 × VCC
VCC − 1.5
RESET
5
25
ns
From 10% to 90% VCC, CL = 5 pF,
VCC = 3.3 V
Rise Time
RESET Output Voltage
0.3
0.4
V
V
V
V
V
VCC ≥ 2.7 V, ISINK = 1.2 mA
VCC ≥ 4.5 V, ISINK = 3.2 mA
VCC ≥ 1.8 V, ISOURCE = 150 μA
VCC ≥ 2.7 V, ISOURCE = 500 μA
VCC ≥ 4.5 V, ISOURCE = 800 μA
0.8 × VCC
0.8 × VCC
VCC − 1.5
OPEN-DRAIN OUTPUT (ADM6320, ADM6321,
ADM6322)
RESET
0.3
0.3
0.3
0.4
1
V
VCC ≥ 1.0 V, ISINK = 50 μA
VCC ≥ 1.2 V, ISINK = 100 μA
VCC ≥ 2.7 V, ISINK = 1.2 mA
VCC ≥ 4.5 V, ISINK = 3.2 mA
Output Voltage
V
V
V
μA
Open-Drain Reset Output Leakage Current
WATCHDOG INPUT (ADM6316, ADM6317,
ADM6318, ADM6320, ADM6321)
Watchdog Timeout Period
ADM63xxxW
ADM63xxxX
ADM63xxxY
ADM63xxxZ
WDI Pulse Width
WDI Input Threshold
WDI Input Current
4.3
71
1.12
17.9
50
6.3
102
1.6
9.3
153
2.4
ms
ms
sec
sec
ns
V
μA
μA
25.6
38.4
VIL = 0.3 × VCC, VIH = 0.7 × VCC
0.3 × VCC
0.7 × VCC
160
120
−15
VWDI = VCC, time average
VWDI = 0, time average
−20
Rev. D | Page 3 of 16
ADM6316/ADM6317/ADM6318/ADM6319/ADM6320/ADM6321/ADM6322
Parameter
Min
Typ
Max
Unit
Test Conditions/Comments
MANUAL RESET INPUT (ADM6316, ADM6317,
ADM6319, ADM6320, ADM6322)
MR
0.8
2.0
V
VTH > 4.0 V
VTH < 4.0 V
Input Threshold
0.3 × VCC
1
0.7 × VCC
V
MR
MR
MR
MR
μs
ns
kΩ
ns
Input Pulse Width
Glitch Rejection
Pull-Up Resistance
to Reset Delay
100
52
35
75
230
VCC = 5 V
Rev. D | Page 4 of 16
ADM6316/ADM6317/ADM6318/ADM6319/ADM6320/ADM6321/ADM6322
ABSOLUTE MAXIMUM RATINGS
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
TA = 25°C, unless otherwise noted.
Table 3.
Parameter
Rating
VCC
−0.3 V to +6 V
−0.3 V to +6 V
−0.3 V to (VCC + 0.3 V)
20 mA
RESET (ADM6320, ADM6321, ADM6322)
All Other Pins
Output Current (RESET, RESET)
Operating Temperature Range
Storage Temperature Range
θJA Thermal Impedance, SOT-23
Lead Temperature
−40°C to +85°C
−65°C to +125°C
270°C/W
ESD CAUTION
Soldering (10 sec)
Vapor Phase (60 sec)
Infrared (15 sec)
300°C
215°C
220°C
Rev. D | Page 5 of 16
ADM6316/ADM6317/ADM6318/ADM6319/ADM6320/ADM6321/ADM6322
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
RESET
GND
MR
1
2
3
5
V
RESET
1
2
3
5
4
V
CC
CC
ADM6316/
ADM6320
ADM6318/
ADM6321
GND
TOP VIEW
TOP VIEW
(Not to Scale)
(Not to Scale)
4
WDI
RESET
WDI
Figure 3. ADM6316/ADM6320 Pin Configuration
Figure 5. ADM6318/ADM6321 Pin Configuration
RESET
GND
MR
1
2
3
5
V
RESET
GND
1
2
3
5
V
CC
CC
ADM6319/
ADM6322
ADM6317
TOP VIEW
TOP VIEW
(Not to Scale)
(Not to Scale)
4
WDI
RESET
4
MR
Figure 4. ADM6317 Pin Configuration
Figure 6. ADM6319/ADM6322 Pin Configuration
Table 4. Pin Function Descriptions
Pin No.
Mnemonic
Description
Active-Low Reset Output. Asserted whenever VCC is below the reset
threshold, VTH
1
RESET (ADM6316/ADM6318/ADM6319/
ADM6320/ADM6321/ADM6322)
.
Push-Pull Output Stage for the ADM6316/ADM6318/ADM6319.
Open-Drain Output Stage for the ADM6320/ADM6321/ADM6322.
RESET (ADM6317)
GND (all models)
Active-High Push-Pull Reset Output.
Ground.
2
3
MR (ADM6316/ADM6317/ADM6320)
Manual Reset Input. This is an active-low input that when forced low for at
least 1 μs, generates a reset. It features a 52 kΩ internal pull-up.
RESET (ADM6318/ADM6319/ADM6321/ADM6322) Active-High Push-Pull Reset Output.
4
5
WDI (ADM6316/ADM6317/ADM6318/
ADM6320/ADM6321)
Watchdog Input. Generates a reset if the logic level on the pin remains low
or high for the duration of the watchdog timeout. The timer is cleared if a
logic transition occurs on this pin or if a reset is generated. Leave this pin
floating to disable the watchdog timer.
MR (ADM6319/ADM6322)
VCC (all models)
Manual Reset Input.
Power Supply Voltage Being Monitored.
Rev. D | Page 6 of 16
ADM6316/ADM6317/ADM6318/ADM6319/ADM6320/ADM6321/ADM6322
TYPICAL PERFORMANCE CHARACTERISTICS
10.0
9.5
9.0
8.5
8.0
7.5
7.0
6.5
6.0
5.5
5.0
4.5
4.0
3.5
100
90
80
70
60
50
40
30
20
10
0
V
= 5V
CC
V
= 3V
CC
V
= 1.5V
40
CC
–40
–20
0
20
60
80
–40
–20
0
20
40
60
80
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 7. Supply Current vs. Temperature
(ADM6316/ADM6317/ADM6318/ADM6320/ADM6321)
Figure 10. VCC Falling to Reset Propagation Delay vs. Temperature
80
75
70
65
60
55
50
45
40
35
30
25
20
15
10
5
340
320
300
280
260
240
220
200
180
160
140
120
100
0
–40
–20
0
20
40
60
80
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
(V)
TEMPERATURE (°C)
V
CC
Figure 8. Supply Current vs. Supply Voltage
Figure 11. Manual Reset to Reset Propagation Delay vs. Temperature
(ADM6316/ADM6317/ADM6319/ADM6320/ADM6322)
1.05
1.04
1.03
1.02
1.01
1.00
0.99
0.98
0.97
0.96
0.95
1.20
1.15
1.10
1.05
1.00
0.95
0.90
0.85
0.80
–40
–20
0
20
40
60
80
–40
–20
0
20
40
60
80
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 12. Normalized Reset Timeout Period vs. Temperature
Figure 9. Normalized Reset Threshold vs. Temperature
Rev. D | Page 7 of 16
ADM6316/ADM6317/ADM6318/ADM6319/ADM6320/ADM6321/ADM6322
1.20
1.15
1.10
1.05
1.00
0.95
0.90
190
180
170
160
150
140
130
120
110
100
–40
–20
0
20
40
60
80
–50
0
50
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 13. Normalized Watchdog Timeout Period vs. Temperature
(ADM6316/ADM6317/ADM6318/ADM6320/ADM6321)
Figure 15. Manual Reset Minimum Pulse Width vs. Temperature
(ADM6316/ADM6317/ADM6319/ADM6320/ADM6322)
160
3.8
3.6
RESET OCCURS ABOVE CURVE
140
120
100
3.4
NEGATIVE PULSE
3.2
3.0
2.8
2.6
V
= 4.63V
TH
80
60
40
20
0
POSITIVE PULSE
2.4
2.2
2.0
V
= 2.93V
TH
10
100
OVERDRIVE VOLTAGE (mV)
1000
–40
10
TEMPERATURE (°C)
60
Figure 14. Maximum VCC Transient Duration vs. Reset
Threshold Overdrive
Figure 16. Watchdog Input Minimum Pulse Width vs. Temperature
(ADM6316/ADM6317/ADM6318/ADM6320/ADM6321)
Rev. D | Page 8 of 16
ADM6316/ADM6317/ADM6318/ADM6319/ADM6320/ADM6321/ADM6322
CIRCUIT DESCRIPTION
The ADM6316/ADM6317/ADM6318/ADM6319/ADM6320/
ADM6321/ADM6322 provide microprocessor supply voltage
supervision by controlling the microprocessor’s reset input. Code
execution errors are avoided during power-up, power-down,
and brownout conditions by asserting a reset signal when the
supply voltage is below a preset threshold and by allowing
supply voltage stabilization with a fixed timeout reset pulse
after the supply voltage rises above the threshold. In addition,
problems with microprocessor code execution can be monitored
and corrected with a watchdog timer (ADM6316/ADM6317/
ADM6318/ADM6320/ADM6321). If the user detects a problem
with the system’s operation, a manual reset input is available
(ADM6316/ADM6317/ADM6319/ADM6320/ADM6322) to
reset the microprocessor, for example, by means of an external
push button.
MANUAL RESET INPUT
The ADM6316/ADM6317/ADM6319/ADM6320/ADM6322
MR
feature a manual reset input ( ), which when driven low, asserts
MR
the reset output. When
remains asserted for the duration of the reset active timeout
MR
transitions from low to high, reset
period before deasserting. The
pull-up so that the input is always high when unconnected. An
MR
input has a 52 kΩ, internal
external push-button switch can be connected between
and
ground so that the user can generate a reset. Debounce circuitry
for this purpose is integrated on chip. Noise immunity is provided
MR
on the
input, and fast, negative-going transients of up to
MR
100 ns (typical) are ignored. A 0.1 μF capacitor between
ground provides additional noise immunity.
and
WATCHDOG INPUT
RESET OUTPUT
The ADM6316/ADM6317/ADM6318/ADM6320/ADM6321
feature a watchdog timer that monitors microprocessor activity.
A timer circuit is cleared with every low-to-high or high-to-low
logic transition on the watchdog input pin (WDI), which detects
pulses as short as 50 ns. If the timer counts through the preset
watchdog timeout period (tWD), reset is asserted. The micro-
processor is required to toggle the WDI pin to avoid being reset.
Failure of the microprocessor to toggle WDI within the timeout
period, therefore, indicates a code execution error, and the reset
pulse generated restarts the microprocessor in a known state.
The ADM6316 features an active-low push-pull reset output,
while the ADM6317/ADM6321/ADM6322 have active-high
push-pull reset outputs. The ADM6318/ADM6319 feature dual
active-low and active-high push-pull reset outputs. For active-
low and active-high outputs, the reset signal is guaranteed to be
logic low and logic high, respectively, for VCC down to 1 V.
The reset output is asserted when VCC is below the reset thresh-
MR
old (VTH), when
is driven low, or when WDI is not serviced
within the watchdog timeout period (tWD). Reset remains asserted
for the duration of the reset active timeout period (tRP) after VCC
rises above the reset threshold, after
high, or after the watchdog timer times out. Figure 17 illustrates
the behavior of the reset outputs.
As well as logic transitions on WDI, the watchdog timer is also
cleared by a reset assertion due to an undervoltage condition on
MR
transitions from low to
MR
VCC or due to
being pulled low. When reset is asserted, the
watchdog timer is cleared and does not begin counting again
until reset deassserts. The watchdog timer can be disabled by
leaving WDI floating or by three-stating the WDI driver.
V
CC
V
V
TH
TH
V
CC
1V
0V
V
CC
V
TH
V
CC
V
CC
1V
0V
RESET
RESET
tRP
tRD
V
0V
CC
RESET
WDI
tRP
tWD
tRP
V
CC
0V
tRP
Figure 17. Reset Timing Diagram
1V
0V
V
tRD
CC
0V
Figure 18. Watchdog Timing Diagram
OPEN-DRAIN RESET OUTPUT
The ADM6320/ADM6321/ADM6322 have an active-low, open-
drain reset output. This output structure requires an external
pull-up resistor to connect the reset output to a voltage rail no
higher than 6 V. The resistor should comply with the micro-
processor’s logic low and logic high voltage level requirements
RESET
while supplying input current and leakage paths on the
line. A 10 kΩ resistor is adequate in most situations.
Rev. D | Page 9 of 16
ADM6316/ADM6317/ADM6318/ADM6319/ADM6320/ADM6321/ADM6322
APPLICATIONS INFORMATION
WATCHDOG SOFTWARE CONSIDERATIONS
WATCHDOG INPUT CURRENT
In implementing the microprocessor’s watchdog strobe code,
quickly switching WDI low to high and then high to low (mini-
mizing WDI high time) is desirable for current consumption
reasons. However, a more effective way of using the watchdog
function can be considered.
To minimize watchdog input current (and minimize overall
power consumption), leave WDI low for the majority of the
watchdog timeout period. When driven high, WDI can draw
as much as 160 μA. Pulsing WDI low-to-high-to-low at a low
duty cycle reduces the effect of the large input current. When
WDI is unconnected, a window comparator disconnects the
watchdog timer from the reset output circuitry so that reset is
not asserted when the watchdog timer times out.
A low-to-high-to-low WDI pulse within a given subroutine
prevents the watchdog from timing out. However, if the sub-
routine becomes stuck in an infinite loop, the watchdog cannot
detect this because the subroutine continues to toggle WDI. A
more effective coding scheme for detecting this error involves
using a slightly longer watchdog timeout. In the program that
calls the subroutine, WDI is set high. The subroutine sets WDI
low when it is called. If the program executes without error, WDI
is toggled high and low with every loop of the program. If the
subroutine enters an infinite loop, WDI is kept low, the watchdog
times out, and the microprocessor is reset (see Figure 20).
NEGATIVE-GOING VCC TRANSIENTS
To avoid unnecessary resets caused by fast power supply transients,
the ADM6316/ADM6317/ADM6318/ADM6319/ADM6320/
ADM6321/ADM6322 are equipped with glitch rejection circuitry.
The typical performance characteristic in Figure 14 plots VCC
transient duration vs. the transient magnitude. The curves show
combinations of transient magnitude and duration for which a
reset is not generated for 4.63 V and 2.93 V reset threshold
parts. For example, with the 2.93 V threshold, a transient that
goes 100 mV below the threshold and lasts 8 μs typically does
not cause a reset, but if the transient is any larger in magnitude
or duration, a reset is generated. An optional 0.1 μF bypass
capacitor mounted close to VCC provides additional glitch
rejection.
START
SET WDI
HIGH
RESET
PROGRAM
CODE
ENSURING RESET VALID TO VCC = 0 V
INFINITE LOOP:
Both active-low and active-high reset outputs are guaranteed
to be valid for VCC as low as 1 V. However, by using an external
resistor with push-pull configured reset outputs, valid outputs
for VCC as low as 0 V are possible. For an active-low reset output, a
WATCHDOG
TIMES OUT
SUBROUTINE
SET WDI
LOW
RESET
resistor connected between
and ground pulls the output
RETURN
low when it is unable to sink current. For the active-high case, a
resistor connected between RESET and VCC pulls the output high
when it is unable to source current. A large resistance, such as
100 kΩ, should be used so that it does not overload the reset
output when VCC is above 1 V.
Figure 20. Watchdog Flow Diagram
V
CC
V
CC
V
CC
RESET
RESET
ADM6316
MICROPROCESSOR
I/O
100kΩ
MR
WDI
ADM6317/
ADM6318/
ADM6319/
ADM6321/
ADM6322
ADM6316/
ADM6318/
ADM6319
RESET
RESET
100kΩ
Figure 21. Typical Application Circuit
Figure 19. Ensuring Reset Valid to VCC = 0 V
Rev. D | Page 10 of 16
ADM6316/ADM6317/ADM6318/ADM6319/ADM6320/ADM6321/ADM6322
OPTIONS
Table 5. Reset Voltage Threshold Options
T
Typ
A = +25°C
TA = −40°C to +85°C
Max
Part No.
Min
Max
Min
Unit
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
ADM63xxx50
ADM63xxx49
ADM63xxx48
ADM63xxx47
ADM63xxx46
ADM63xxx45
ADM63xxx44
ADM63xxx43
ADM63xxx42
ADM63xxx41
ADM63xxx40
ADM63xxx39
ADM63xxx38
ADM63xxx37
ADM63xxx36
ADM63xxx35
ADM63xxx34
ADM63xxx33
ADM63xxx32
ADM63xxx31
ADM63xxx30
ADM63xxx29
ADM63xxx28
ADM63xxx27
ADM63xxx26
ADM63xxx25
4.925
4.827
4.728
4.630
4.561
4.433
4.314
4.236
4.137
4.039
3.940
3.842
3.743
3.645
3.546
3.448
3.349
3.251
3.152
3.034
2.955
2.886
2.758
2.660
2.591
2.463
5.000
4.900
4.800
4.700
4.630
4.500
4.390
4.300
4.200
4.100
4.00
3.900
3.800
3.700
3.600
3.500
3.400
3.300
3.200
3.080
3.000
2.930
2.800
2.700
2.630
2.500
5.075
4.974
4.872
4.771
4.699
4.568
4.446
4.365
4.263
4.162
4.060
3.959
3.857
3.756
3.654
3.553
3.451
3.350
3.248
3.126
3.045
2.974
2.842
2.741
2.669
2.538
4.875
4.778
4.680
4.583
4.514
4.388
4.270
4.193
4.095
3.998
3.900
3.803
3.705
3.608
3.510
3.413
3.315
3.218
3.120
3.003
2.925
2.857
2.730
2.633
2.564
2.438
5.125
5.023
4.920
4.818
4.746
4.613
4.490
4.408
4.305
4.203
4.100
3.998
3.895
3.793
3.690
3.588
3.485
3.383
3.280
3.157
3.075
3.000
2.870
2.768
2.696
2.563
Table 6. Reset Timeout Options
Suffix
Min
Typ
1.6
30
Max
2
40
Unit
ms
ms
A
B
1
20
C
D
140
1.12
200
1.60
280
2.24
ms
sec
Table 7. Watchdog Timer Options
Suffix
Min
Typ
6.3
102
1.6
Max
9.3
153
2.24
38.4
Unit
ms
ms
sec
sec
W
X
Y
4.3
71
1.12
17.9
Z
25.6
Rev. D | Page 11 of 16
ADM6316/ADM6317/ADM6318/ADM6319/ADM6320/ADM6321/ADM6322
Table 8. Standard Models
Model
Reset Threshold (V)
Minimum Reset Timeout (ms)
Typical Watchdog Timeout (sec)
ADM6316DZ26ARJ
ADM6316CY29ARJ
ADM6316CY46ARJ
ADM6316BX46ARJ
ADM6316DZ31ARJ
ADM6318CZ28ARJ
ADM6318CY46ARJ
ADM6318BX49ARJ
ADM6319C29ARJ
ADM6319B31ARJ
ADM6319C46ARJ
ADM6320CY29ARJ
ADM6320CZ29ARJ
ADM6320CY46ARJ
ADM6321CY46ARJ
ADM6322C46ARJ
2.63
2.93
4.63
4.63
3.08
2.8
4.63
4.90
2.93
3.08
4.63
2.93
2.93
4.63
4.63
4.63
1120
140
140
20
1120
140
140
20
25.6
1.6
1.6
0.102
25.6
25.6
1.6
0.102
N/A
N/A
N/A
1.6
140
20
140
140
140
140
140
140
25.6
1.6
1.6
N/A
Rev. D | Page 12 of 16
ADM6316/ADM6317/ADM6318/ADM6319/ADM6320/ADM6321/ADM6322
OUTLINE DIMENSIONS
2.90 BSC
5
4
2.80 BSC
1.60 BSC
1
2
3
PIN 1
0.95 BSC
1.90
BSC
1.30
1.15
0.90
1.45 MAX
0.22
0.08
10°
5°
0°
0.15 MAX
0.50
0.30
0.60
0.45
0.30
SEATING
PLANE
COMPLIANT TO JEDEC STANDARDS MO-178-AA
Figure 22. 5-Lead Small Outline Transistor Package [SOT-23]
(RJ-5)
Dimensions shown in millimeters
ADM63 _ _ _ _ARJ_-_
ORDERING QUANTITY
RL7: 3000 PIECE REEL
R7: 3000 PIECE REEL RoHS COMPLIANT
GENERIC NUMBER
(16 TO 22)
RESET TIMEOUT PERIOD
A: 1ms (MIN)
B: 20ms (MIN)
C: 140ms (MIN)
Z: RoHS COMPLIANT
D: 1120ms (MIN)
PACKAGE CODE
RJ: 5-LEAD SOT-23
WATCHDOG TIMEOUT PERIOD
W: 6.3ms (TYP)
X: 102ms (TYP)
Y: 1.6sec (TYP)
Z: 25.6sec (TYP)
TEMPERATURE RANGE
A: –40°C TO +85°C
RESET THRESHOLD NUMBER
(25 TO 50)
Figure 23. Ordering Code Structure (Modified Diagram)
ORDERING GUIDE
Model1, 2
Temperature Range
Ordering Quantity3
3,000
Package Description
Package Option
Branding
N00
M7Q
M9N
N02
M4Q
N03
N0S
ADM6316xxxARJ-RL7
ADM6316xxxARJZ-R74
ADM6317xxxARJZ-R74
ADM6318xxxARJ-RL7
ADM6318xxxARJZ-R74
ADM6319xxARJ-RL7
ADM6319xxARJZ-R74
ADM6320xxxARJ-RL7
ADM6320xxxARJZ-R74
ADM6321xxxARJ-RL7
ADM6321xxxARJZ-R74
ADM6322xxARJ-RL7
ADM6322xxARJZ-RL74
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
5-Lead SOT-23
5-Lead SOT-23
5-Lead SOT-23
5-Lead SOT-23
5-Lead SOT-23
5-Lead SOT-23
5-Lead SOT-23
5-Lead SOT-23
5-Lead SOT-23
5-Lead SOT-23
5-Lead SOT-23
5-Lead SOT-23
5-Lead SOT-23
RJ-5
RJ-5
RJ-5
RJ-5
RJ-5
RJ-5
RJ-5
RJ-5
RJ-5
RJ-5
RJ-5
RJ-5
RJ-5
3,000
3,000
3,000
3,000
3,000
3,000
3,000
3,000
N04
N0T
3,000
3,000
N05
M8L
N06
3,000
3,000
M8J
1 Complete the ordering code by inserting reset threshold, reset timeout, and watchdog timeout (ADM6316/ADM6317/ADM6318/ADM6320/ADM6321) suffixes from
Table 5 to Table 7. No watchdog timeout is available for ADM6319/ADM6322.
2 Contact sales for the availability of nonstandard models. See Table 8 for a list of standard models.
3 A minimum of 12,000 (four reels) must be ordered.
4 Z = RoHS Compliant Part.
Rev. D | Page 13 of 16
ADM6316/ADM6317/ADM6318/ADM6319/ADM6320/ADM6321/ADM6322
NOTES
Rev. D | Page 14 of 16
ADM6316/ADM6317/ADM6318/ADM6319/ADM6320/ADM6321/ADM6322
NOTES
Rev. D | Page 15 of 16
ADM6316/ADM6317/ADM6318/ADM6319/ADM6320/ADM6321/ADM6322
NOTES
©2004–2008 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D04533-0-8/08(D)
Rev. D | Page 16 of 16
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