ADM660AN [ADI]
CMOS Switched-Capacitor Voltage Converters; CMOS开关电容电压转换器
| 型号： | ADM660AN |
| 厂家： | 
ADI |
| 描述： | CMOS Switched-Capacitor Voltage Converters |
| 文件： | 总8页 (文件大小：114K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
CMOS Switched-Capacitor
Voltage Converters
a
ADM660/ADM8660
FEATURES
TYP ICAL CIRCUIT CO NFIGURATIO NS
ADM660: Inverts or Doubles Input Supply Voltage
ADM8660: Inverts Input Supply Voltage
100 m A Output Current
+1.5V TO +7V
INPUT
Shutdow n Function (ADM8660)
2.2 F or 10 F Capacitors
0.3 V Drop at 30 m A Load
+1.5 V to +7 V Supply
Low Pow er CMOS: 600 A Quiescent Current
Selectable Charge Pum p Frequency (25 kHz/ 120 kHz)
Pin Com patible Upgrade for MAX660, MAX665, ICL7660
Available in 16-Lead TSSOP Package
V+
OSC
LV
FC
ADM660
CAP+
GND
CAP–
C1
10µF
INVERTED
NEGATIVE
OUTPUT
OUT
C2
10µF
APPLICATIONS
Voltage Inverter Configuration (ADM660)
Handheld Instrum ents
Portable Com puters
Rem ote Data Acquisition
Op Am p Pow er Supplies
+1.5V TO +7V
INPUT
FC
V+
ADM8660
CAP+
GND
GENERAL D ESCRIP TIO N
T he ADM660/ADM8660 is a charge-pump voltage converter
that can be used to either invert the input supply voltage giving
LV
C1
10µF
INVERTED
NEGATIVE
OUTPUT
OUT
CAP–
SD
C2
10µF
SHUTDOWN
CONTROL
VOUT = –VIN or double it (ADM660 only) giving VOUT = 2 × VIN
.
Input voltages ranging from +1.5 V to +7 V can be inverted into
a negative –1.5 V to –7 V output supply. T his inverting scheme
is ideal for generating a negative rail in single power supply
systems. Only two small external capacitors are needed for the
charge pump. Output currents up to 50 mA with greater than
90% efficiency are achievable, while 100 mA achieves greater
than 80% efficiency.
Voltage Inverter Configuration with Shutdown (ADM8660)
T he ADM660 is a pin compatible upgrade for the MAX660,
MAX665, ICL7660 and LT C1046.
T he ADM660/ADM8660 is available in 8-pin DIP and narrow-
body SOIC. T he ADM660 is also available in a 16-lead T SSOP
package.
A Frequency Control (FC) input pin is used to select either
25 kHz or 120 kHz charge-pump operation. T his is used to
optimize capacitor size and quiescent current. With 25 kHz
selected, a 10 µF external capacitor is suitable, while with
120 kHz the capacitor may be reduced to 2.2 µF. T he oscillator
frequency on the ADM660 can also be controlled with an exter-
nal capacitor connected to the OSC input or by driving this in-
put with an external clock. In applications where a higher supply
voltage is desired it is possible to use the ADM660 to double
the input voltage. With input voltages from 2.5 V to 7 V, output
voltages from 5 V to 14 V are achievable with up to 100 mA
output current.
AD M660/AD M8660 O ptions
O ption
AD M660
AD M8660
Inverting Mode
Doubling Mode
External Oscillator
Shutdown
Y
Y
Y
N
Y
N
N
Y
Package Options
SO-8
N-8
Y
Y
Y
Y
Y
N
T he ADM8660 features a low power shutdown (SD) pin in-
stead of the external oscillator (OSC) pin. T his can be used to
disable the device and reduce the quiescent current to 300 nA.
RU-16
REV. A
Inform ation furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assum ed by Analog Devices for its
use, nor for any infringem ents of patents or other rights of third parties
which m ay result from its use. No license is granted by im plication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norw ood, MA 02062-9106, U.S.A.
Tel: 617/ 329-4700
Fax: 617/ 326-8703
World Wide Web Site: http:/ / w w w .analog.com
© Analog Devices, Inc., 1997
(V+ = +5 V, C1, C2 = 10 F,1 T = TMIN to TMAX unless otherwise
A
ADM660/ADM8660–SPECIFICATIONS noted)
P aram eter
Min
Typ Max
Units
Test Conditions/Com m ents
Input Voltage, V+
RL = 1 kΩ
3.5
1.5
2.5
7.0
7.0
7.0
V
V
V
Inverting Mode, LV = Open
Inverting Mode, LV = GND
Doubling Mode, LV = OUT
Supply Current
No Load
0.6
2.5
1
4.5
mA
mA
FC = Open (ADM660), GND (ADM8660)
FC = V+, LV = Open
Output Current
100
mA
Output Resistance
9
15
Ω
IL = 100 mA
Charge-Pump Frequency
OSC Input Current
25
120
±5
kHz
kHz
µA
FC = Open (ADM660), GND (ADM8660)
FC = V+
FC = Open (ADM660), GND (ADM8660)
FC = V+
±25
µA
Power Efficiency (FC = Open)
90
90
94
93
81.5
99.96
%
%
%
%
RL = 1 kΩ Connected from V+ to OUT
RL = 500 Ω Connected from OUT to GND
IL = 100 mA to GND
Voltage Conversion Efficiency
99
No Load
Shutdown Supply Current, ISHDN
Shutdown Input Voltage, VSHDN
0.3
5
µA
V
V
ADM8660, SHDN = V+
SHDN High = Disabled
SHDN Low = Enabled
IL = 100 mA
2.4
0.8
Shutdown Exit T ime
500
µs
NOT ES
1C1 and C2 are low ESR (<0.2 Ω) electrolytic capacitors. High ESR will degrade performance.
Specifications subject to change without notice.
ABSO LUTE MAXIMUM RATINGS*
(T A = +25°C unless otherwise noted)
Lead T emperature Range (Soldering 10 sec) . . . . . . . . +300°C
Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . . +215°C
Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . . +220°C
ESD Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . >2000 V
Input Voltage (V+ to GND, GND to OUT ) . . . . . . . . +7.5 V
LV Input Voltage . . . . . . . . . . (OUT – 0.3 V) to (V+, +0.3 V)
FC and OSC Input Voltage
. . . . . . . . . . . (OUT – 0.3 V) or (V+, –6 V) to (V+, +0.3 V)
OUT , V+ Output Current (Continuous) . . . . . . . . . . . 120 mA
Output Short Circuit Duration to GND . . . . . . . . . . . 10 secs
Power Dissipation, N-8 . . . . . . . . . . . . . . . . . . . . . . . 625 mW
(Derate 8.3 mW/°C above +50°C)
*T his is a stress rating only; functional operation of the device at these or any other
conditions above those indicated in the operation section of this specification is not
implied. Exposure to absolute maximum rating conditions for extended periods
may affect device reliability.
O RD ERING GUID E
θ
JA, T hermal Impedance . . . . . . . . . . . . . . . . . . . . 120°C/W
Tem perature
Range
P ackage
O ptions*
Power Dissipation R-8 . . . . . . . . . . . . . . . . . . . . . . . . 450 mW
(Derate 6 mW/°C above +50°C)
Model
θ
JA, T hermal Impedance . . . . . . . . . . . . . . . . . . . . 170°C/W
ADM660AN
ADM660AR
ADM660ARU
ADM8660AN
ADM8660AR
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
N-8
Power Dissipation RU-16 . . . . . . . . . . . . . . . . . . . . . 500 mW
(Derate 6 mW/°C above +50°C)
θ
Operating T emperature Range
Industrial (A Version) . . . . . . . . . . . . . . . . –40°C to +85°C
Storage T emperature Range . . . . . . . . . . . –65°C to +150°C
SO-8
RU-16
N-8
JA, T hermal Impedance . . . . . . . . . . . . . . . . . . . . 158°C/W
SO-8
*N = Plastic DIP; RU = T hin Shrink Small Outline; SO = Small Outline.
–2–
REV. A
ADM660/ADM8660
P IN FUNCTIO N D ESCRIP TIO NS
Inverter Configuration
Function
D oubler Configuration (AD M660 O nly)
Mnem onic
Mnem onic
Function
Frequency Control Input for Internal Oscillator
and Charge Pump. With FC = Open, fCP
25 kHz; with FC = V+, fCP = 120 kHz.
FC
Frequency Control Input for Internal Oscillator
and Charge Pump. With FC = Open (ADM660)
or connected to GND (ADM8660), fCP = 25 kHz;
with FC = V+, fCP = 120 kHz
FC
=
CAP+
GND
CAP–
OUT
LV
Positive Charge-Pump Capacitor T erminal.
Positive Input Supply.
CAP+
GND
CAP–
OUT
LV
Positive Charge-Pump Capacitor T erminal.
Power Supply Ground.
Negative Charge-Pump Capacitor T erminal.
Ground.
Negative Charge-Pump Capacitor T erminal.
Output, Negative Voltage.
Low Voltage Operation Input. Connect to OUT .
Must be left unconnected in this mode.
Doubled Positive Output.
Low Voltage Operation Input. Connect to GND
when input voltage is less than 3.5 V. Above
3.5 V, LV may be connected to G N D or left
unconnected.
OSC
V+
OSC
ADM660: Oscillator Control Input. OSC is
connected to an internal 15 pF capacitor. An
external capacitor may be connected to slow the
oscillator. An external oscillator may also be
used to overdrive OSC. T he charge-pump
frequency is equal to 1/2 the oscillator frequency.
SD
V+
ADM8660: Shutdown Control Input. T his in-
put, when high, is used to disable the charge
pump thereby reducing the power consumption.
Positive Power Supply Input.
P IN CO NNECTIO NS
8-Lead
V+
1
2
3
4
8
7
6
5
1
2
3
4
8
7
6
5
V+
FC
CAP+
GND
FC
CAP+
GND
ADM660
TOP VIEW
(Not to Scale)
ADM8660
TOP VIEW
(Not to Scale)
SD
OSC
LV
LV
CAP–
CAP–
OUT
OUT
16-Lead
1
2
3
4
5
16
15
14
13
12
NC
NC
FC
NC
NC
V+
ADM660
RU-16
TOP VIEW
(Not to Scale)
CAP+
GND
CAP–
NC
OSC
LV
6
7
8
11 OUT
NC
NC
10
9
NC
NC = NO CONNECT
REV. A
–3–
ADM660/ADM8660–Typical Performance Characteristics
3
2.5
2
100
90
80
70
60
50
40
30
IL = 10mA
VOLTAGE DOUBLER
LV = OUT
IL = 1mA
1.5
1
IL = 50mA
IL = 80mA
LV = GND
0.5
0
LV = OPEN
1.5
3.5
5.5
7.5
1k
10k
100k
1M
SUPPLY VOLTAGE – Volts
CHARGE-PUMP FREQUENCY – Hz
Figure 4. Efficiency vs. Charge-Pum p Frequency
Figure 1. Power Supply Current vs. Voltage
100
80
60
40
20
0
3.5
3
–3
EFFICIENCY
–3.4
2.5
–3.8
–4.2
2
LV = GND
VOLTAGE DOUBLER
1.5
V
OUT
1
–4.6
–5
0.5
LV = GND
VOLTAGE INVERTER
100
CHARGE-PUMP FREQUENCY – kHz
0
1
10
1000
0
20
40
60
80
100
LOAD CURRENT – mA
Figure 5. Power Supply Current vs. Charge-Pum p
Frequency
Figure 2. Output Voltage and Efficiency vs. Load Current
1.6
120
V+ = +6.5V
100
V+ = +5.5V
V+ = +4.5V
1.2
V+ = +3.5V
80
V+ = +3.5V
V+ = +2.5V
V+ = +4.5V
0.8
0.4
0
60
V+ = +1.5V
V+ = +2.5V
V+ = +1.5V
V+ = +5.5V
40
20
0
0
20
40
60
80
100
0
20
40
60
80
100
LOAD CURRENT – mA
LOAD CURRENT – mA
Figure 6. Power Efficiency vs. Load Current
Figure 3. Output Voltage Drop vs. Load Current
REV. A
–4–
ADM660/ADM8660
35
30
25
20
15
10
5
5
4.5
4
LOAD = 10mA
LOAD = 1mA
3.5
3
LOAD = 50mA
2.5
2
LV = GND
FC = OPEN
C1, C2 = 10µF
LOAD = 80mA
1.5
1
0.5
0
0
–40
1
10
100
1000
–20
0
20
40
60
80
CHARGE-PUMP FREQUENCY – kHz
TEMPERATURE – °C
Figure 10. Charge-Pum p Frequency vs. Tem perature
Figure 7. Output Voltage vs. Charge-Pum p Frequency
1k
30
25
20
15
10
5
FC = V+
LV = GND
100
FC = OPEN
LV = GND
10
1
0.1
0
1.5
1
10
100
1k
2.5
3.5
4.5
5.5
6.5
CAPACITANCE – pF
SUPPLY VOLTAGE – Volts
Figure 11. Charge-Pum p Frequency vs. External
Capacitance
Figure 8. Output Source Resistance vs. Supply Voltage
30
140
LV = GND
120
LV = GND
LV = OPEN
100
20
LV = OPEN
80
FC = OPEN
OSC = OPEN
C1, C2 = 10µF
60
FC = V+
OSC = OPEN
C1, C2 = 2.2µF
10
40
20
0
1.5
0
3
3.5
4
4.5
5
5.5
6
6.5
7
2.5
3.5
4.5
5.5
6.5
SUPPLY VOLTAGE – Volts
SUPPLY VOLTAGE – Volts
Figure 9. Charge-Pum p Frequency vs. Supply Voltage
Figure 12. Charge-Pum p Frequency vs. Supply Voltage
REV. A
–5–
ADM660/ADM8660
160
140
120
100
60
50
40
30
20
10
0
80
V+ = +1.5V
LV = GND
60
40
20
0
FC = V+
C1, C2 = 2.2µF
V+ = +3V
V+ = +5V
–40
–20
0
20
40
60
80
100
–40
–20
0
20
40
60
80
100
TEMPERATURE – °C
TEMPERATURE – °C
Figure 13. Charge-Pum p Frequency vs. Tem perature
Figure 14. Output Resistance vs. Tem perature
GENERAL INFO RMATIO N
Switched Capacitor Theor y of O per ation
T he ADM660/ADM8660 is a switched capacitor voltage con-
verter that can be used to invert the input supply voltage. T he
ADM660 can also be used in a voltage doubling mode. T he
voltage conversion task is achieved using a switched capacitor
technique using two external charge storage capacitors. An on-
board oscillator and switching network transfers charge between
the charge storage capacitors. T he basic principle behind the
voltage conversion scheme is illustrated in Figures 15 and 16.
As already described, the charge pump on the ADM660/
ADM8660 uses a switched capacitor technique in order to
invert or double the input supply voltage. Basic switched
capacitor theory is discussed below.
A switched capacitor building block is illustrated in Figure 17.
With the switch in position A, capacitor C1 will charge to volt-
age V1. T he total charge stored on C1 is q1 = C1V1. T he
switch is then flipped to position B discharging C1 to voltage
V2. T he charge remaining on C1 is q2 = C1V2. T he charge
transferred to the output V2 is, therefore, the difference be-
tween q1 and q2, so ∆q = q1–q2 = C1 (V1–V2).
S1
CAP+
S3
V+
C1
S2
S4
OUT = –V+
CAP–
C2
A
B
Φ2
V1
Φ1
V2
÷ 2
OSCILLATOR
R
C2
L
C1
Figure 15. Voltage Inversion Principle
S1
CAP+
S3
Figure 17. Switched Capacitor Building Block
V+
V
= 2V+
OUT
C1
C2
S2
As the switch is toggled between A and B at a frequency f, the
charge transfer per unit time or current is
S4
V+
CAP–
Φ2
Φ1
I = f (∆q) = f (C1)(V1 –V 2)
÷ 2
OSCILLATOR
T herefore
I = (V1 –V 2)/(1 /fC1) = (V1 –V 2)/(REQ
where REQ = 1/fC1
)
Figure 16. Voltage Doubling Principle
Figure 15 shows the voltage inverting configuration, while Figure
16 shows the configuration for voltage doubling. An oscillator
generating antiphase signals φ1 and φ2 controls switches S1, S2
and S3, S4. During φ1, switches S1 and S2 are closed charging
C1 up to the voltage at V+. During φ2, S1 and S2 open and S3
and S4 close. With the voltage inverter configuration during φ2,
the positive terminal of C1 is connected to GND via S3 and the
negative terminal of C1 connects to VOUT via S4. T he net result
is voltage inversion at VOUT wrt GND. Charge on C1 is trans-
ferred to C2 during φ2. Capacitor C2 maintains this voltage
during φ1. T he charge transfer efficiency depends on the on-
resistance of the switches, the frequency at which they are being
switched and also on the equivalent series resistance (ESR) of
the external capacitors. T he reason for this is explained in the
following section. For maximum efficiency, capacitors with low
ESR are, therefore, recommended.
T he switched capacitor may, therefore, be replaced by an
equivalent resistance whose value is dependent on both the
capacitor size and the switching frequency. T his explains why
lower capacitor values may be used with higher switching fre-
quencies. It should be remembered that as the switching fre-
quency is increased the power consumption will increase due to
some charge being lost at each switching cycle. As a result, at high
frequencies the power efficiency starts decreasing. Other losses
include the resistance of the internal switches and the equivalent
series resistance (ESR) of the charge storage capacitors.
R
EQ
V1
V2
R
C2
L
R
= 1/fC1
EQ
T he voltage doubling configuration reverses some of the con-
nections but the same principle applies.
Figure 18. Switched Capacitor Equivalent Circuit
–6–
REV. A
ADM660/ADM8660
Inver ting Negative Voltage Gener ator
Table II. AD M8660 Charge-P um p Frequency Selection
Figures 19 and 20 show the ADM660/ADM8660 configured to
generate a negative output voltage. Input supply voltages from
1.5 V up to 7 V are allowable. For supply voltage less than 3 V,
LV must be connected to GND. T his bypasses the internal
regulator circuitry and gives best performance in low voltage
applications. With supply voltages greater than 3 V, LV may
be either connected to GND or left open. Leaving it open facili-
tates direct substitution for the ICL7660.
FC
O SC
Charge P um p
C1, C2
GND
V+
Open
Open
25 kHz
120 kHz
See T ypical Characteristics
Ext CLK Frequency/2
10 µF
2.2 µF
GND or V+ Ext Cap
GND Ext CLK
+1.5V TO +7V
INPUT
+1.5V TO +7V
INPUT
CLK OSC
ADM660
ADM8660
CMOS GATE
V+
FC
FC
V+
OSC
LV
ADM660
OSC
LV
CAP+
GND
CAP+
GND
C1
C1
10µF
INVERTED
NEGATIVE
OUTPUT
INVERTED
NEGATIVE
OUTPUT
CAP–
OUT
OUT
CAP–
C2
10µF
C2
Figure 21. ADM660/ADM8660 External Oscillator
Figure 19. ADM660 Voltage Inverter Configuration
Voltage D oubling Configur ation
+1.5V TO +7V
INPUT
Figure 22 shows the ADM660 configured to generate increased
output voltages. As in the inverting mode, only two external ca-
pacitors are required. T he doubling function is achieved by re-
versing some connections to the device. T he input voltage is
applied to the GND pin and V+ is used as the output. Input
voltages from 2.5 V to 7 V are allowable. In this configuration,
pins LV, OUT must be connected to GND.
V+
FC
ADM8660
CAP+
GND
LV
C1
10µF
INVERTED
NEGATIVE
OUTPUT
OUT
CAP–
SD
C2
10µF
SHUTDOWN
CONTROL
T he unloaded output voltage in this configuration is 2 (VIN).
Output resistance and ripple are similar to the voltage inverting
configuration.
Figure 20. ADM8660 Voltage Inverter Configuration
O SCILLATO R FREQ UENCY
Note that the AD M8660 cannot be used in the voltage
doubling configur ation.
T he internal charge-pump frequency may be selected to be
either 25 kHz or 120 kHz using the Frequency Control (FC)
input. With FC unconnected (ADM660) or connected to GND
(ADM8660), the internal charge pump runs at 25 kHz while, if
FC is connected to V+, the frequency is increased by a factor of
five. Increasing the frequency allows smaller capacitors to be
used for equivalent performance or, if the capacitor size is un-
changed, it results in lower output impedance and ripple.
DOUBLED
POSITIVE
OUTPUT
V+
FC
ADM660
OSC
CAP+
10µF
+2.5V
TO +7V
INPUT
10µF
LV
GND
OUT
CAP–
If a charge-pump frequency other than the two fixed values is
desired, this is made possible by the OSC input, which can ei-
ther have a capacitor connected to it or be overdriven by an
external clock. Please refer to the T ypical Performance Charac-
teristics, which shows the variation in charge-pump frequency
versus capacitor size. T he charge-pump frequency is one-half
the oscillator frequency applied to the OSC pin.
Figure 22. Voltage Doubler Configuration
Shutdown Input
T he ADM8660 contains a shutdown input that can be used to
disable the device and hence reduce the power consumption. A
logic high level on the SD input shuts the device down reducing
the quiescent current to 0.3 µA. During shutdown the output
voltage goes to 0 V. Therefore, ground referenced loads are
not powered during this state. When exiting shutdown it takes
several cycles (approximately 500 µs) for the charge pump to
reach its final value. If the shutdown function is not being used,
then SD should be hardwired to GND.
If an external clock is used to overdrive the oscillator, its levels
should swing to within 100 mV of V+ and GND. A CMOS
driver is, therefore, suitable. When OSC is overdriven, FC has
no effect but LV must be grounded.
Note th at over dr ivin g is per m itted on ly in th e voltage
in ver ter configur ation.
Capacitor Selection
T he optimum capacitor value selection depends the charge-
pump frequency. With 25 kHz selected, 10 µF capacitors are
recommended, while with 120 kHz selected, 2.2 µF capacitors
may be used. Other frequencies allow other capacitor values to
be used. For maximum efficiency in all cases, it is recommended
that capacitors with low ESR are used for the charge pump.
Low ESR capacitors give both the lowest output resistance and
lowest ripple voltage. High output resistance degrades the overall
power efficiency and causes voltage drops, especially at high
Table I. AD M660 Charge-P um p Frequency Selection
FC
O SC
Charge P um p
C1, C2
Open
V+
Open
Open
25 kHz
120 kHz
10 µF
2.2 µF
Open or V+ Ext Cap
See T ypical Characteristics
Ext CLK Frequency/2
Open
Ext CLK
REV. A
–7–
ADM660/ADM8660
output current levels. T he ADM660/ADM8660 is tested using
low ESR, 10 µF, capacitors for both C1 and C2. Smaller values
of C1 increase the output resistance, while increasing C1 will re-
duce the output resistance. T he output resistance is also de-
pendent on the internal switches on resistance as well as the
capacitors ESR so the effect of increasing C1 becomes negligible
past a certain point.
Bypass Capacitor
T he ac impedance of the ADM660/ADM8660 may be reduced
by using a bypass capacitor on the input supply. T his capacitor
should be connected between the input supply and GND. It
will provide instantaneous current surges as required. Suitable
capacitors of 0.1 µF or greater may be used.
O UTLINE D IMENSIO NS
Figure 23 shows how the output resistance varies with oscillator
frequency for three different capacitor values. At low oscillator
frequencies, the output impedance is dominated by the 1/fC
term. T his explains why the output impedance is higher for
smaller capacitance values. At high oscillator frequencies, the
1/fC term becomes insignificant and the output impedance is
dominated by the internal switches on resistance. From an out-
put impedance viewpoint, therefore, there is no benefit to be
gained from using excessively large capacitors.
D imensions shown in inches and (mm).
8-Lead P lastic D IP
(N-8)
0.430 (10.92)
0.348 (8.84)
8
5
4
0.280 (7.11)
0.240 (6.10)
1
0.325 (8.25)
0.300 (7.62)
500
0.060 (1.52)
0.015 (0.38)
PIN 1
C1 = C2 = 2.2µF
0.195 (4.95)
0.115 (2.93)
0.210 (5.33)
MAX
0.130
400
(3.30)
MIN
0.160 (4.06)
0.115 (2.93)
0.015 (0.381)
0.008 (0.204)
SEATING
PLANE
0.022 (0.558)
0.014 (0.356)
0.070 (1.77)
0.045 (1.15)
0.100
(2.54)
BSC
300
C1 = C2 = 1µF
200
C1 = C2 = 10µF
100
8-Lead Narrow-Body SO IC
(SO -8)
0.1968 (5.00)
0.1890 (4.80)
0
0.1
1
10
100
OSCILLATOR FREQUENCY – kHz
8
1
5
4
0.1574 (4.00)
0.1497 (3.80)
0.2440 (6.20)
0.2284 (5.80)
Figure 23. Output Im pedance vs. Oscillator Frequency
Capacitor C2
T he output capacitor size C2 affects the output ripple. Increas-
ing the capacitor size reduces the peak-peak ripple. T he ESR
affects both the output impedance and the output ripple.
Reducing the ESR reduces the output impedance and ripple.
For convenience it is recommended that both C1 and C2 be the
same value.
PIN 1
0.0688 (1.75)
0.0532 (1.35)
0.0196 (0.50)
0.0099 (0.25)
x 45°
0.0098 (0.25)
0.0040 (0.10)
8°
0°
0.0500
(1.27)
BSC
0.0192 (0.49)
0.0138 (0.35)
SEATING
PLANE
0.0098 (0.25)
0.0075 (0.19)
0.0500 (1.27)
0.0160 (0.41)
Table III. Capacitor Selection
Charge-P um p
Frequency
Capacitor
C1, C2
16-Lead TSSO P
(RU-16)
0.201 (5.10)
0.193 (4.90)
25 kHz
120 kHz
10 µF
2.2 µF
16
9
P ower Efficiency and O scillator Fr equency Tr adeoff
While higher switching frequencies allow smaller capacitors to
be used for equivalent performance, or improved performance
with the same capacitors, there is a tradeoff to be considered. As
the oscillator frequency is increased, the quiescent current in-
creases. T his happens as a result of a finite charge being lost at
each switching cycle. T he charge loss per unit cycle at very high
frequencies can be significant, thereby reducing the power effi-
ciency. Since the power efficiency is also degraded at low oscil-
lator frequencies, due to an increase in output impedance, this
means that there is an optimum frequency band for maximum
power transfer. Please refer to the T ypical Performance Charac-
teristics section.
1
8
PIN 1
0.006 (0.15)
0.002 (0.05)
0.0433
(1.10)
MAX
0.028 (0.70)
0.020 (0.50)
8°
0°
0.0118 (0.30)
0.0075 (0.19)
0.0256
(0.65)
BSC
0.0079 (0.20)
0.0035 (0.090)
SEATING
PLANE
–8–
REV. A
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