ADM8324 [ADI]

Supervisory Circuits with Windowed Watchdog and Manual Reset in 5-Lead SOT-23;


型号：	ADM8324
厂家：	ADI
描述：	Supervisory Circuits with Windowed Watchdog and Manual Reset in 5-Lead SOT-23
文件：	总16页 (文件大小：283K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

Supervisory Circuits with Windowed

Watchdog and Manual Reset in 5-Lead SOT-23

Data Sheet

ADM8323/ADM8324

FEATURES

FUNCTIONAL BLOCK DIAGRAMS

Windowed watchdog, 8 timeout options

26 reset threshold options

ADM8323

2.5 V to 5 V in 100 mV increments

4 reset timeout options

1 ms, 20 ms, 140 ms, and 1120 ms (minimum)

Manual reset input

RESET

GENERATOR

REF

DEBOUNCE

RESET

Open-drain or push-pull

Low power consumption

outputs

WINDOWED

WATCHDOG

DETECTOR

Specified over wide temperature range (−40°C to +125°C)

Qualified for automotive applications

5-lead SOT-23 package

GND

WDI

Figure 1.

ADM8324

APPLICATIONS

Automotive

Microprocessor systems

Computers

RESET

GENERATOR

REF

Controllers

DEBOUNCE

Intelligent instruments

Portable equipment

WINDOWED

WATCHDOG

DETECTOR

GND

WDI

Figure 2.

GENERAL DESCRIPTION

The ADM8323/ADM8324 are supervisory circuits that monitor

power supply voltage levels and code execution integrity in

microprocessor-based systems. An on-chip watchdog timer

checks for activity within a preset timeout window. A reset

signal can also be asserted by an external push-button switch

pulse. The watchdog timeout is measured from the last falling

edge of the watchdog input (WDI). There are eight different

watchdog windows available, as shown in Table 5.

Each device is available in a choice of 26 reset threshold options

from 2.5 V to 5 V in 100 mV increments. There are also four

reset timeout options of 1 ms, 20 ms, 140 ms, and 1120 ms

(minimum).

through a manual reset input. The

output is either push-

RESET

pull (ADM8323) or open-drain (ADM8324).

A watchdog failure results in a low output on the

A failure can be triggered either by a fast watchdog error

(watchdog pulses too close together) or by a slow watchdog

error (no watchdog pulse within the timeout period). This

effectively gives a window in which to observe the watchdog

pin.

RESET

The ADM8323/ADM8324 are available in a 5-lead SOT-23

package and typically consume only 10 μA, making them

suitable for use in low power portable applications.

Rev. 0

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Tel: 781.329.4700

Technical Support

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ADM8323/ADM8324

Data Sheet

TABLE OF CONTENTS

Features .............................................................................................. 1

RESET

Output.......................................................... 10

Push-Pull

Applications....................................................................................... 1

Functional Block Diagrams............................................................. 1

General Description......................................................................... 1

Revision History ............................................................................... 2

Specifications..................................................................................... 3

Absolute Maximum Ratings............................................................ 5

ESD Caution.................................................................................. 5

Pin Configuration and Function Descriptions............................. 6

Typical Performance Characteristics ............................................. 7

Theory of Operation ...................................................................... 10

Circuit Description..................................................................... 10

RESET

Open-Drain

Output ..................................................... 10

Manual Reset Input.................................................................... 10

Windowed Watchdog Input...................................................... 10

Applications Information.............................................................. 11

Watchdog Input Current ........................................................... 11

Negative Going V_CCTransients................................................. 11

RESET

Ensuring

Valid to V_CC= 0 V........................................ 11

Options ............................................................................................ 12

Outline Dimensions....................................................................... 13

Ordering Guide .......................................................................... 13

Automotive Products................................................................. 14

REVISION HISTORY

10/13—Revision 0: Initial Version

Rev. 0 | Page 2 of 16

Data Sheet

ADM8323/ADM8324

SPECIFICATIONS

V_CC= (V_TH+ 1.5%) to 5.5 V, T_A= −40°C to +125°C, unless otherwise noted. Typical values are at T_A= 25°C.

Table 1.

Parameter

Min

Typ

Max

Unit

Test Conditions/Comments

SUPPLY

V_CCOperating Voltage Range¹

V_CCthat Guarantees Valid Output

Supply Current

0.9

5.5

µA

V_CC= 5.5 V, WDI = 0 V

V_CC= 3.6 V, WDI = 0 V

T_A= 25°C

RESET THRESHOLD VOLTAGE²

V_TH− 1%

V_TH− 1.5%

V_TH

V_TH+ 1%

V_TH+ 1.5%

T_A= −40°C to +125°C

RESET THRESHOLD TEMPERATURE COEFFICIENT

RESET THRESHOLD HYSTERESIS

RESET TIMEOUT PERIOD

ppm/°C

2.5 × V_TH

See Table 4

Reset Timeout Option A

Reset Timeout Option B

Reset Timeout Option C

Reset Timeout Option D

140

1120

1.4

200

1600

1.8

260

2080

µs

V_CCTO RESET DELAY, t_RD

V_CCfalling at 1 mV/µs

PUSH-PULL OUTPUT (ADM8323)

RESET

0.2

0.3

V_CC≥ 0.9 V, I_SINK= 25 µA

Output Voltage

V_CC≥ 1.2 V, I_SINK= 100 µA

V_CC≥ 2.7 V, I_SINK= 1.2 mA

V_CC≥ 4.5 V, I_SINK= 3.2 mA

0.9 × V_CC

V_CC≥ 2.7 V, I_SOURCE= 500 µA

V_CC≥ 4.5 V, I_SOURCE= 800 µA

From 10% to 90% V_CC, C_L= 5 pF, V_CC= 3.3 V

RESET

100

Rise Time

OPEN-DRAIN OUTPUT (ADM8324)

RESET

0.2

0.3

V_CC≥ 0.9 V, I_SINK= 25 µA

V_CC≥ 1.2 V, I_SINK= 100 µA

V_CC≥ 2.7 V, I_SINK= 1.2 mA

V_CC≥ 4.5 V, I_SINK= 3.2 mA

Output Voltage

µA

Open-Drain Reset Output Leakage Current

WATCHDOG INPUT

See Table 5

Watchdog Timeout Period (Fast), t_WD-FAST

Watchdog Timeout Option A

Watchdog Timeout Option B

Watchdog Timeout Option C

Watchdog Timeout Option D

Watchdog Timeout Option E

Watchdog Timeout Option F

Watchdog Timeout Option G

Watchdog Timeout Option H

Watchdog Timeout Period (Slow), t_WD-SLOW

Watchdog Timeout Option A

Watchdog Timeout Option B

Watchdog Timeout Option C

Watchdog Timeout Option D

Watchdog Timeout Option E

Watchdog Timeout Option F

Watchdog Timeout Option G

Watchdog Timeout Option H

1.5

768

512

sec

100

300

150

450

1.24

114

1.86

Rev. 0 | Page 3 of 16

ADM8323/ADM8324

Data Sheet

Parameter

Min

Typ

Max

Unit

µA

Test Conditions/Comments

WDI Pulse Width

WDI Glitch Immunity

WDI Input Threshold

WDI Input Current

200

V_IL= 0.3 × V_CC, V_IH= 0.7 × V_CC

100

0.3 × V_CC

−1

0.7 × V_CC

0.35

−0.35

V_WDI= V_CC

V_WDI= 0 V

MANUAL RESET INPUT

V_IL

0.8

V_IH

2.0

µs

kΩ

Input Pulse Width

Glitch Rejection

Pull-Up Resistance

to Reset Delay

100

125

350

V_CC= 5 V

¹The device switches from undervoltage reset to normal operation when 1.5 V < V_CC< 2.5 V.

²The device monitors V_CCthrough an internal factory trimmed voltage divider, which programs the nominal reset threshold. Factory trimmed reset thresholds are

available in approximately 100 mV increments from 2.5 V to 5 V.

Rev. 0 | Page 4 of 16

Data Sheet

ADM8323/ADM8324

ABSOLUTE MAXIMUM RATINGS

Stresses above those listed under Absolute Maximum Ratings

may cause permanent damage to the device. This is a stress

rating only; functional operation of the device at these or any

other conditions above those indicated in the operational

section of this specification is not implied. Exposure to absolute

maximum rating conditions for extended periods may affect

device reliability.

T_A= 25°C, unless otherwise noted.

Table 2.

Parameter

Rating

V_CC

−0.3 V to +6 V

−0.3 V to (V_CC+ 0.3 V)

20 mA

All Other Pins

Output Current (RESET)

Operating Temperature Range

Storage Temperature Range

θ_JAThermal Impedance, SOT-23

Lead Temperature

Soldering (10 sec)

Vapor Phase (60 sec)

Infrared (15 sec)

−40°C to +125°C

−65°C to +150°C

270°C/W

ESD CAUTION

300°C

215°C

220°C

Rev. 0 | Page 5 of 16

ADM8323/ADM8324

Data Sheet

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

RESET

GND

ADM8323/

ADM8324

TOP VIEW

(Not to Scale)

WDI

Figure 3. ADM8323/ADM8324 Pin Configuration

Table 3. ADM8323/ADM8324 Pin Function Descriptions

Pin No.

Mnemonic

Description

RESET

Active Low Reset Output. Asserted whenever V_CCis below the reset threshold, V_TH. This pin is a push-pull

output stage for the ADM8323 and an open-drain output stage for the ADM8324.

GND

Ground.

Manual Reset Input. This is an active low input that, when forced low for greater than the glitch filter time,

generates a reset. It features a 75 kΩ internal pull-up resistor.

WDI

V_CC

Watchdog Input. Generates a reset if the WDI pulse is not within the watchdog window.

Power Supply Voltage Being Monitored.

Rev. 0 | Page 6 of 16

Data Sheet

ADM8323/ADM8324

TYPICAL PERFORMANCE CHARACTERISTICS

100

= 5.0V

= 5V

= 3.0V

= 2.93V

= 2.5V

= 1.5V

–40 –30–20 –10

10 20 30 40 50 60 70 80 90 100 110 120130

TEMPERATURE (°C)

–40

–20

100

120

TEMPERATURE (°C)

Figure 4. Supply Current (I_CC) vs. Temperature

Figure 7. V_CCto Reset Delay vs. Temperature

500

450

400

350

300

250

200

150

100

= 2.5V

= 2.93V

= 5V

–40

–20

100

120

0.3 0.9 1.1 1.5 1.8 2.1 2.7 3.0 3.6 3.9 4.2 4.5 4.8 5.1 5.4

(V)

TEMPERATURE (°C)

Figure 8. Manual Reset to Reset Propagation Delay vs. Temperature

Figure 5. Supply Current (I_CC) vs. Supply Voltage (V_CC)

1.05

1.04

1.03

1.02

1.01

1.00

0.99

0.98

0.97

0.96

0.95

1.20

1.15

1.10

1.05

1.00

0.95

0.90

0.85

0.80

–40

–20

100

120

–40

–20

100

120

TEMPERATURE (°C)

Figure 9. Normalized Reset Timeout vs. Temperature

Figure 6. Normalized Reset Threshold vs. Temperature

Rev. 0 | Page 7 of 16

ADM8323/ADM8324

Data Sheet

1.20

WDI

1.15

1.10

RESET

1.05

1.00

0.95

0.90

CH1 2.0V

M 4.0ms 125kS/s 8.0µs/pt

A CH2 1.48V

CH2 2.0V

–40 –30–20 –10

10 20 30 40 50 60 70 80 90 100 110 120130

TEMPERATURE (°C)

Figure 13. Slow Watchdog Timeout Period, Watchdog Timeout Option A

Figure 10. Normalized Watchdog Timeout vs. Temperature, Fast Timeout

160

1.20

RESET ASSERTED ABOVE CURVE

140

1.15

1.10

= 2.93V

120

100

= 5V

1.05

1.00

= 4.63V

0.95

0.90

100

OVERDRIVE VOLTAGE (mV)

1000

–40 –30–20 –10

10 20 30 40 50 60 70 80 90 100 110 120130

TEMPERATURE (°C)

Figure 11. Normalized Watchdog Timeout vs. Temperature, Slow Timeout

Figure 14. Maximum V_CCTransient Duration vs. Reset Threshold Overdrive

850

840

830

820

810

WDI

= 2.93V

800

790

780

770

760

750

740

730

720

710

700

690

680

670

660

650

= 2.5V

RESET

= 5V

CH1 2.0V

M400µs 1.25MS/s 800ns/pt

A CH1 1.48V

CH2 2.0V

–40

–20

100

120

TEMPERATURE (°C)

Figure 12. Fast Watchdog Timeout Period, Watchdog Timeout Option A

Figure 15. Manual Reset ( ) Minimum Pulse Width vs. Temperature

Rev. 0 | Page 8 of 16

Data Sheet

ADM8323/ADM8324

3.5

3.0

2.5

2.0

1.5

1.0

0.5

0.308

0.258

0.208

0.158

0.108

0.058

0.008

= 3.2mA

= 800µA

SOURCE

= 3.2mA

= 800µA

SINK

1.1

1.3

1.5

1.7

1.9

2.1

2.3

2.5

2.7

2.9

1.1

1.3

1.5

1.7

1.9

2.1

2.3

2.5

2.7

2.9

VOLTAGE (V)

RESET

Push-Pull V_OHVoltage vs. V_CCVoltage (V_TH= 3 V)

Figure 16.

Open-Drain V_OLVoltage vs. V_CCVoltage (V_TH= 3 V)

Figure 18.

0.30

= 3.2mA

= 800µA

SINK

0.25

0.20

0.15

0.10

0.05

2.6 2.8 3.0 3.2 3.4 3.6 3.8 4.0 4.2 4.4 4.6 4.8 5.0 5.2 5.4

1.1 1.3 1.5 1.7 1.9 2.1 2.3 2.5 2.7 2.9 3.1 3.3 3.5 3.7 3.9

VOLTAGE (V)

RESET

Figure 19.

Push-Pull Rise Time vs. V_CCVoltage

Figure 17.

Push-Pull V_OLVoltage vs. V_CCVoltage (V_TH= 4 V)

Rev. 0 | Page 9 of 16

ADM8323/ADM8324

Data Sheet

THEORY OF OPERATION

the

input, and fast, negative going transients of up to 100 ns

CIRCUIT DESCRIPTION

(typical) are ignored. A 0.1 µF capacitor between

provides additional noise immunity.

and ground

The ADM8323/ADM8324 provide microprocessor supply

voltage supervision by controlling the microprocessor reset input.

Code execution errors are avoided during power-up, power-

down, and brownout conditions by asserting a reset signal when

the supply voltage is below a preset threshold and by allowing

supply voltage stabilization with a fixed timeout reset pulse

after the supply voltage rises above the threshold. In addition,

problems with microprocessor code execution can be monitored

and corrected with a windowed watchdog timer. If the user

detects a problem with system operation, a manual reset input is

available to reset the microprocessor, for example, by means of

an external push-button switch.

WINDOWED WATCHDOG INPUT

The ADM8323/ADM8324 feature a windowed watchdog timer

that monitors microprocessor activity. A timer circuit is cleared

with every high-to-low logic transition on the watchdog input pin

(WDI), which detects pulses as short as 200 ns. If this watchdog

pulse does not occur within the defined time window, a reset

asserts. Failure of the microprocessor to toggle WDI within the

watchdog window, therefore, indicates a code execution error,

and the reset pulse generated restarts the microprocessor in a

known state.

PUSH-PULL RESET OUTPUT

As well as logic transitions on WDI, the watchdog timer is also

cleared by a reset assertion due to an undervoltage condition on

The ADM8323 features an active low push-pull reset output.

The reset signal is guaranteed to be valid for V_CCdown to 0.9 V.

_CCor due to

being pulled low. When a reset is asserted, the

watchdog timer is cleared and does not begin counting again

until the reset deassserts. The windowed watchdog timer cannot

be disabled.

The reset output is asserted when V_CCis below the reset thresh-

old (V_TH), when

is driven low, or when WDI is not serviced

within the watchdog timeout window. Reset remains asserted for

the duration of the reset active timeout period (t_RP) after V_CC

All WDI input pulses are ignored while a reset is asserted. After

the reset deasserts, the first WDI falling edge is ignored for the

fast fault condition.

rises above the reset threshold, after

transitions from low to

high, or after the watchdog timer fault occurs. Figure 20

illustrates the behavior of the reset output.

t_WDI< t_WD-FASTmin

RESET

t_RP

t_RD

WDI

Figure 20. Reset Timing Diagram

t_RP

Figure 21. Watchdog Fast Timeout Fault

_WDI> t_WD-SLOWmax

RESET

OPEN-DRAIN RESET OUTPUT

The ADM8324 has an active low, open-drain reset output. This

output structure requires an external pull-up resistor to connect

the reset output to a voltage rail no higher than Vcc. Use a

resistor that complies with the logic low and logic high voltage

level requirements of the microprocessor while supplying input

WDI

RESET

current and leakage paths on the

is adequate in most situations.

line. A 10 kΩ resistor

t_RP

RESET

MANUAL RESET INPUT

Figure 22. Watchdog Slow Timeout Fault

The ADM8323/ADM8324 feature a manual reset input ( ),

t_WD-FASTmax< t_WDI< t_WD-SLOWmin

which when driven low, asserts the reset output. When

transitions from low to high, the reset output remains asserted

for the duration of the reset active timeout period before

WDI

deasserting. The

so that the input is always high when unconnected. An external

input has a 75 kΩ, internal pull-up resistor

push-button switch can be connected between

and ground

RESET

so that the user can generate a reset. Debounce circuitry for this

purpose is integrated on chip. Noise immunity is provided on

Figure 23. Normal Watchdog Operation

Rev. 0 | Page 10 of 16

Data Sheet

ADM8323/ADM8324

APPLICATIONS INFORMATION

WATCHDOG INPUT CURRENT

ENSURING RESET VALID TO V_CC= 0 V

The reset output is guaranteed valid for V_CCas low as 0.9 V.

However, by using an external resistor with the push-pull

configured reset output on the ADM8323, a valid output for V_CC

as low as 0 V is possible. For this active low reset output, a resistor

There is no way to disable the windowed watchdog functional-

ity. Do not leave the WDI pin floating because this is not a valid

mode of operation. If the WDI pin is not in a defined state at

startup, this can lead to high supply current until the microproces-

sor is enabled and takes control of the WDI pin. A solution to

this is to add a 100 kΩ pull-up or pull-down resistor on the

WDI pin to hold it in a defined state until the microprocessor is

enabled.

RESET

connected between

and ground pulls the output low

when it is unable to sink current. Use a large resistance, such as

100 kΩ, so that it does not overload the reset output when V_CC

is above 0.9 V.

NEGATIVE GOING V_CCTRANSIENTS

To avoid unnecessary resets caused by fast power supply transients,

the ADM8323/ADM8324 are equipped with glitch rejection

circuitry. The typical performance characteristic in Figure 14

plots V_CCtransient duration vs. reset threshold overdrive. The

curves show combinations of reset threshold overdrive and

duration for which a reset is not generated for 5 V, 4.63 V, and

2.93 V reset threshold devices. For example, with the 2.93 V

threshold, a transient that goes 100 mV below the threshold and

lasts 80 µs typically does not cause a reset, but if the transient is

any larger in reset threshold overdrive or duration, a reset

generates. An optional 0.1 µF bypass capacitor mounted near

RESET

ADM8323

100kΩ

RESET

Figure 24. Ensuring

Valid to V_CC= 0 V

RESET

_CCprovides additional glitch rejection.

ADM8323

MICROPROCESSOR

I/O

WDI

Figure 25. ADM8323 Typical Application Circuit

Rev. 0 | Page 11 of 16

ADM8323/ADM8324

OPTIONS

Data Sheet

Table 4. Reset Timeout Options

Suffix

Minimum

Typical

1.4

Maximum

1.8

Unit

140

1120

200

1600

260

2080

Table 5. Watchdog Timeout Options

Fast

Slow

Suffix

Maximum

Unit

Minimum

100

300

1.24

Unit

sec

1.5

768

Table 6. Reset Voltage Threshold Options

T_A= 25°C

T_A= −40°C to +125°C

Reset Threshold Number

Minimum

4.950

4.851

4.752

4.653

4.584

4.455

4.346

4.257

4.158

4.059

3.960

3.861

3.762

3.663

3.564

3.465

3.366

3.267

3.168

3.049

2.970

2.901

2.772

2.673

2.604

2.475

Typical

Maximum

5.050

4.949

4.848

4.747

4.676

4.545

4.434

4.343

4.242

4.141

4.040

3.939

3.838

3.737

3.636

3.535

3.434

3.333

3.232

3.111

3.030

2.959

2.828

2.727

2.656

2.525

Minimum

4.925

4.826

4.728

4.629

4.560

4.432

4.324

4.235

4.137

4.038

3.940

3.841

3.743

3.644

3.546

3.447

3.349

3.250

3.152

3.033

2.955

2.886

2.758

2.659

2.590

2.462

Maximum

5.075

4.974

4.872

4.771

4.700

4.568

4.456

4.365

4.263

4.162

4.060

3.959

3.857

3.756

3.654

3.553

3.451

3.350

3.248

3.127

3.045

2.974

2.842

2.741

2.670

2.538

Unit

5.000

4.900

4.800

4.700

4.630

4.500

4.390

4.300

4.200

4.100

4.00

3.900

3.800

3.700

3.600

3.500

3.400

3.300

3.200

3.080

3.000

2.930

2.800

2.700

2.630

2.500

Table 7. Standard Models

Model

Reset Threshold (V) Maximum Fast Timeout (ms)

Minimum Slow Timeout (ms)

Minimum Reset Timeout (ms)

ADM8323WCC29ARJZR7

ADM8323WCC46ARJZR7

ADM8324WCA29ARJZR7

ADM8324WCA46ARJZR7

2.93

4.63

2.93

4.63

1.5

300

140

Rev. 0 | Page 12 of 16

Data Sheet

ADM8323/ADM8324

OUTLINE DIMENSIONS

3.00

2.90

2.80

3.00

2.80

2.60

1.70

1.60

1.50

0.95 BSC

1.90

BSC

1.30

1.15

0.90

0.20 MAX

0.08 MIN

1.45 MAX

0.95 MIN

0.55

0.45

0.35

0.15 MAX

0.05 MIN

10°

5°

0°

SEATING

PLANE

0.60

BSC

0.50 MAX

0.35 MIN

COMPLIANT TO JEDEC STANDARDS MO-178-AA

Figure 26. 5-Lead Small Outline Transistor Package [SOT-23]

(RJ-5)

Dimensions shown in millimeters

ADM83

ARJZR7

ORDERING QUANTITY

R7: 3000-PIECE REEL, RoHS COMPLIANT

GENERIC NUMBER

(23 OR 24)

Z: RoHS COMPLIANT

W: AUTOMOTIVE QUAL

PACKAGE CODE

RJ: 5-LEAD SOT-23

RESET TIMEOUT PERIOD

TEMPERATURE RANGE

A: –40°C TO +125°C

A: 1ms (MIN)

B: 20ms (MIN)

C: 140ms (MIN)

D: 1120ms (MIN)

RESET THRESHOLD NUMBER

(25 TO 50)

WINDOWEDWATCHDOG

TIMEOUT PERIOD (A-H)

Figure 27. Ordering Code Structure

ORDERING GUIDE

Model^{1, 2, 3, 4}

ADM8323WxxxxARJZR7

ADM8324WxxxxARJZR7

Temperature Range

−40°C to +125°C

Ordering Quantity⁵

Package Description

Package Option

Branding

LNO

3,000

5-Lead SOT-23

RJ-5

LMU

¹Complete the ordering code by inserting reset timeout, watchdog timeout, and reset threshold suffixes from Table 4 to Table 6.

²Contact sales for the availability of nonstandard models. See Table 7 for a list of standard models.

³Z = RoHS Compliant Part.

⁴W = Qualified for Automotive Applications.

⁵A minimum of 12,000 (four reels) must be ordered for nonstandard models.

Rev. 0 | Page 13 of 16

ADM8323/ADM8324

Data Sheet

AUTOMOTIVE PRODUCTS

The ADM8323W/ADM8324W model are available with controlled manufacturing to support the quality and reliability requirements of

automotive applications. Note that these automotive models may have specifications that differ from the commercial models; therefore,

designers should review the Specifications section of this data sheet carefully. Only the automotive grade products shown are available for

use in automotive applications. Contact your local Analog Devices account representative for specific product ordering information and

to obtain the specific Automotive Reliability reports for these models.

Rev. 0 | Page 14 of 16

Data Sheet

NOTES

ADM8323/ADM8324

Rev. 0 | Page 15 of 16

ADM8323/ADM8324

NOTES

Data Sheet

registered trademarks are the property of their respective owners.

D11802-0-10/13(0)

Rev. 0 | Page 16 of 16

ADM8324 [ADI]

相关型号：

SI9130DB

SI9135LG-T1

SI9135LG-T1-E3

SI9135_11

SI9136_11

SI9130CG-T1-E3

SI9130LG-T1-E3

SI9130_11

SI9137

SI9137DB

SI9137LG

SI9122E