ADMV1012 [ADI]
17.5 GHz to 24 GHz, GaAs, MMIC, I/Q Downconverter;
| 型号： | ADMV1012 |
| 厂家： | 
ADI |
| 描述： | 17.5 GHz to 24 GHz, GaAs, MMIC, I/Q Downconverter |
| 文件： | 总19页 (文件大小：441K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
17.5 GHz to 24 GHz,
GaAs, MMIC, I/Q Downconverter
ADMV1012
Data Sheet
FEATURES
FUNCTIONAL BLOCK DIAGRAM
VDRF VGRF
RF input frequency range: 17.5 GHz to 24 GHz
IF output frequency range: 2.5 GHz to 3.5 GHz
LO input frequency range: 7 GHz to 13.5 GHz
Conversion gain (with hybrid): 15 dB typical
SSB noise figure: 2.5 dB typical
Input IP3: 3 dBm typical
Input P1dB: −5 dBm typical
25 dB of image rejection
27
31
ADMV1012
RFIN
3
LOIN 10
VDLO
20 IF2
22 IF1
×2
15
2
4
GND
GND
GND
11
Single-ended, 50 Ω RF and LO input ports
Exposed pad, 4.9 mm × 4.9 mm, 32-terminal LCC
Figure 1.
APPLICATIONS
Point to point microwave radios
Radars and electronic warfare systems
Instrumentation, automatic test equipment (ATE)
Satellite communications
GENERAL DESCRIPTION
The ADMV1012 is a compact, gallium arsenide (GaAs)
design, monolithic microwave integrated circuit (MMIC), in
phase/quadrature (I/Q) downconverter in a RoHS compliant
package optimized for point to point microwave radio designs
that operate in the 17.5 GHz to 24 GHz input frequency range.
The I/Q mixer topology reduces the need for filtering of unwanted
sideband. The ADMV1012 is a much smaller alternative to
hybrid style, double sideband (DSB) downconverter assemblies
and eliminates the need for wire bonding by allowing the use of
surface-mount manufacturing assemblies.
The ADMV1012 provides 15 dB of conversion gain with 25 dB
of image rejection, and 2.5 dB noise figure. The ADMV1012
uses a radio frequency (RF) low noise amplifier (LNA) followed
by an I/Q, double balanced mixer, where a driver amplifier drives
the local oscillator (LO) with a ×2 multiplier. IF1 and IF2 mixer
quadrature outputs are provided, and an external 90° hybrid is
required to select the required sideband.
The ADMV1012 downconverter comes in a compact, thermally
enhanced, 4.9 mm × 4.9 mm, 32-terminal LCC. The ADMV1012
operates over the −40°C to +85°C temperature range.
Rev. A
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rightsof third parties that may result fromits use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks andregisteredtrademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2017–2018 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com
ADMV1012
Data Sheet
TABLE OF CONTENTS
Features .............................................................................................. 1
Return Loss Performance.......................................................... 12
Spurious Performance ............................................................... 13
M × N Spurious Performance for LO = 0 dBm...................... 13
Theory of Operation ...................................................................... 14
LO Driver Amplifier .................................................................. 14
Mixer............................................................................................ 14
LNA.............................................................................................. 14
Applications Information.............................................................. 15
Typical Application Circuit....................................................... 15
Evaluation Board Information ................................................. 16
Bill of Materials........................................................................... 18
Outline Dimensions....................................................................... 19
Ordering Guide .......................................................................... 19
Applications....................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description......................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Absolute Maximum Ratings............................................................ 4
Thermal Resistance ...................................................................... 4
ESD Caution.................................................................................. 4
Pin Configuration and Function Descriptions............................. 5
Typical Performance Characteristics ............................................. 6
Upper Sideband (Low-Side LO)................................................. 6
Lower Sideband (High-Side LO)................................................ 8
IF Bandwidth .............................................................................. 10
Leakage Performance................................................................. 11
REVISION HISTORY
2/2018—Rev. 0 to Rev. A
Changed M × N Spurious Performance for LO = 4 dBm Section
to M × N Spurious Performance for LO = 0 dBm Section ....... 13
Changes to M × N Spurious Performance for LO = 0 dBm
Section.............................................................................................. 13
Changes to LO Driver Amplifier Section.................................... 14
Changes to Applications Information Section and Figure 34........ 15
Changes to Power-On Sequence Section .................................... 16
Changes to Figure 37...................................................................... 17
Changes to Table 6.......................................................................... 18
Changes to Ordering Guide.......................................................... 19
Changes to Features Section, General Description Section, and
Figure 1 .............................................................................................. 1
Changes to Table 1............................................................................ 3
Changes to Table 2............................................................................ 4
Added Thermal Resistance Section and Table 3; Renumbered
Sequentially ....................................................................................... 4
Changes to Figure 2 and Table 4..................................................... 5
Changes to Figure 3 and Figure 6................................................... 6
Changes to Figure 12........................................................................ 7
Changes to Figure 24, Figure 25, and Figure 26 ......................... 10
Changes to Figure 27 through Figure 30..................................... 11
10/2017—Revision 0: Initial Version
Rev. A | Page 2 of 19
Data Sheet
ADMV1012
SPECIFICATIONS
Data taken at VDRF = 3 V, V DLO = 3 V, LO = −4 dBm ≤ LO ≤ +4 dBm, −40°C ≤ TA ≤ +85°C, with a Mini-Circuits® QCN-45+ power
splitter for both upper sideband (low-side LO) and lower sideband (high-side LO), unless otherwise noted.
Table 1.
Parameter
Symbol
Test Conditions/Comments
Min
Typ Max
Unit
INPUT FREQUENCY RANGE
Radio Frequency
Local Oscillator
RF
LO
17.5
7
24
13.5
GHz
GHz
dBm
LO AMPLITUDE
−4
0
+4
3.5
20
OUTPUT FREQUENCY RANGE
Intermediate Frequency
RF PERFORMANCE
Conversion Gain
IF
2.5
GHz
dB
With hybrid
10.5
15
Single Sideband (SSB) Noise Figure
Lower Sideband (High-Side LO)
Upper Sideband (Low-Side LO)
Input Third-Order Intercept
Input 1 dB Compression Point
Image Rejection
SSB NF
2.1
2.5
3
−5
25
3.5
4
dB
dB
dBm
dBm
dB
IP3
P1dB
At −20 dBm/tone
0
−9
20
Leakage
LO to RF
LO to IF
2× LO to IF
−37 −25
−40 −25
−40 −25
dBm
dBm
dBm
IM3 at Input
−20 dBm Input Power
−25 dBm Input Power
−30 dBm Input Power
Return Loss
−23 dBm per tone
−28 dBm per tone
−33 dBm per tone
46
52
56
52
60
70
dBc
dBc
dBc
RF Input
IF Output
LO Input
−11 −10
−23 −10
−11 −10
dB
dB
dB
POWER INTERFACE
RF LNA Bias Voltage
LO Amplifier Bias Voltage
RF LNA Gate Voltage
RF Amplifier Bias Current
LO Amplifier Bias Current
RF Amplifier Gate Current
Total Power
VDRF
VDLO
VGRF
IDRF
IDLO
IGRF
3
3
3.5
3.5
−0.4
V
V
−1.8
Adjust VGRF between −1.8 V to −0.4 V to get IDRF
68
mA
mA
mA
W
170
<1
0.7
0.8
Rev. A | Page 3 of 19
ADMV1012
Data Sheet
ABSOLUTE MAXIMUM RATINGS
Table 2.
THERMAL RESISTANCE
Thermal performance is directly linked to printed circuit board
(PCB) design and operating environment. Careful attention to
PCB thermal design is required.
Parameter
Rating
Supply Voltage
VDLO
VGRF
VDRF − VGRF1
4 V
0 V
6 V
θJA is thermal resistance, junction to ambient (°C/W), and θJC is
thermal resistance, junction to case (°C/W).
Input Power
RF
LO
Table 3. Thermal Resistance
15 dBm
15 dBm
175°C
2 W
1
Package Type
θJA
θJC
Unit
E-32-1
33.4
34
°C/W
Maximum Junction Temperature
Maximum Power Dissipation
Lifetime at Maximum Junction Temperature (TJ) >1 million hours
1 See JEDEC standard JESD51-2 for additional information on optimizing the
thermal impedance (PCB with 3 × 3 vias).
Operating Temperature Range
Storage Temperature Range
Lead Temperature (Soldering 60 sec)
Moisture Sensitivity Level (MSL) Rating
Electrostatic Discharge (ESD) Sensitivity
Human Body Model (HBM)
−40°C to +85°C
−65°C to +150°C
260°C
ESD CAUTION
MSL3
750 V
500 V
Field Induced Charged Device Model
(FICDM)
1 The maximum VDRF voltage and the minimum VGRF voltage is determined
by this difference. If a maximum VDRF voltage of +4 V is required, then the
minimum VGRF voltage is −2 V.
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.
Rev. A | Page 4 of 19
Data Sheet
ADMV1012
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
NIC
GND
RFIN
GND
NIC
NIC
NIC
NIC
1
2
3
4
5
6
7
8
24 NIC
23
22 IF1
21 NIC
20 IF2
NIC
ADMV1012
TOP VIEW
(Not to Scale)
19
NIC
18 NIC
17 NIC
NOTES
1. NIC = NOT INTERNALLY CONNECTED. IT IS
RECOMMENDED TO GROUND THESE PINS
ON THE PCB.
2. EXPOSED PAD. THE EXPOSED PAD MUST BE
CONNECTED TO GND. GOOD RF AND THERMAL
GROUNDING IS RECOMMENDED.
Figure 2. Pin Configuration
Table 4. Pin Function Descriptions
Pin No.
Mnemonic Description
1, 5 to 9, 12 to 14, 16 to 19, NIC
21, 23 to 26, 28 to 30, 32
Not Internally Connected. It is recommended to ground these pins on the PCB.
2, 4, 11
3
10
15
GND
RFIN
LOIN
VDLO
Ground.
RF Input. This pin is ac-coupled internally and matched to 50 Ω single ended.
LO Input. This pin is ac-coupled internally and matched to 50 Ω single ended.
Power Supply Voltage for the LO Amplifier. Refer to the Applications Information section for the
required external components and biasing.
20, 22
27
IF2, IF1
VDRF
Quadrature IF Outputs. Matched to 50 Ω and ac coupled. No external dc block is required.
Power Supply Voltage for the RF Amplifier. Refer to the Applications Information section for the
required external components and biasing.
31
VGRF
EPAD
Power Supply Gate Voltage for the RF Amplifier. Refer to the Applications Information section for
the required external components and biasing.
Exposed Pad. The exposed pad must be connected to GND. Good RF and thermal grounding is
recommended.
Rev. A | Page 5 of 19
ADMV1012
Data Sheet
TYPICAL PERFORMANCE CHARACTERISTICS
UPPER SIDEBAND (LOW-SIDE LO)
Data taken at VDRF = 3 V, V DLO = 3 V, IDRF = 68 mA, LO = −4 dBm ≤ LO ≤ +4 dBm, −40°C ≤ TA ≤ +85°C, with Mini-Circuits QCN-45+,
power splitter as upper sideband (low-side LO), unless otherwise noted.
20
18
16
14
12
10
8
20
18
16
14
12
10
8
+85°C, 3.5GHz IF
+25°C, 3.5GHz IF
–40°C, 3.5GHz IF
+85°C, 3.0GHz IF
+25°C, 3.0GHz IF
–40°C, 3.0GHz IF
+85°C, 2.5GHz IF
+25°C, 2.5GHz IF
–40°C , 2.5GHz IF
+4°C, 3.5GHz IF
0°C, 3.5GHz IF
–4°C, 3.5GHz IF
+4°C, 3.0GHz IF
0°C, 3.0GHz IF
–4°C, 3.0GHz IF
+4°C, 2.5GHz IF
0°C, 2.5GHz IF
–4°C, 2.5GHz IF
6
6
4
4
2
2
0
20.0
0
20.0
20.5
21.0
21.5
22.0
22.5
23.0
23.5
24.0
20.5
21.0
21.5
22.0
22.5
23.0
23.5
24.0
RF FREQUENCY (GHz)
RF FREQUENCY (GHz)
Figure 3. Conversion Gain vs. RF Frequency at Various Temperatures and
Various IF Frequencies
Figure 6. Conversion Gain vs. RF Frequency at Various LO Powers and
Various IF Frequencies
60
50
40
30
60
50
40
30
–40°C, 2.5GHz IF
+25°C, 2.5GHz IF
+85°C, 2.5GHz IF
–40°C, 3.0GHz IF
+25°C, 3.0GHz IF
+85°C, 3.0GHz IF
–40°C, 3.5GHz IF
+25°C, 3.5GHz IF
+85°C, 3.5GHz IF
–4dB, 2.5GHz IF
0dB, 2.5GHz IF
+4dB, 2.5GHz IF
–4dB, 3.0GHz IF
0dB, 3.0GHz IF
+4dB, 3.0GHz IF
–4dB, 3.5GHz IF
0dB, 3.5GHz IF
+4dB, 3.5GHz IF
20
10
0
20
10
0
20.0
20.5
21.0
21.5
22.0
22.5
23.0
23.5
24.0
20.0
20.5
21.0
21.5
22.0
22.5
23.0
23.5
24.0
RF FREQUENCY (GHz)
RF FREQUENCY (GHz)
Figure 4. Image Rejection vs. RF Frequency at Various Temperatures and
Various IF Frequencies
Figure 7. Image Rejection vs. RF Frequency at Various LO Powers and
Various IF Frequencies
12
10
8
12
10
8
6
6
4
4
+85°C, 3.5GHz IF
+25°C, 3.5GHz IF
–40°C, 3.5GHz IF
+85°C, 3.0GHz IF
+25°C, 3.0GHz IF
–40°C, 3.0GHz IF
+85°C, 2.5GHz IF
+25°C, 2.5GHz IF
–40°C, 2.5GHz IF
+4dB, 3.5GHz IF
0dB, 3.5GHz IF
–4dB, 3.5GHz IF
+4dB, 3.0GHz IF
0dB, 3.0GHz IF
–4dB, 3.0GHz IF
+4dB, 2.5GHz IF
0dB, 2.5GHz IF
–4dB, 2.5GHz IF
2
2
0
20.0
0
20.0
20.5
21.0
21.5
22.0
22.5
23.0
23.5
24.0
20.5
21.0
21.5
22.0
22.5
23.0
23.5
24.0
RF FREQUENCY (GHz)
RF FREQUENCY (GHz)
Figure 5. Input IP3 vs. RF Frequency at Various Temperatures and Various
IF Frequencies
Figure 8. Input IP3 vs. RF Frequency at Various LO Powers and Various IF
Frequencies
Rev. A | Page 6 of 19
Data Sheet
ADMV1012
0
0
–0.5
–1.0
–1.5
–2.0
–2.5
–3.0
–3.5
–4.0
+85°C, 3.5GHz IF
–40°C, 3.0GHz IF
+85°C, 2.5GHz IF
+25°C, 2.5GHz IF
–40°C, 2.5GHz IF
+4dB, 3.5GHz IF
0dB, 3.5GHz IF
–4dB, 3.5GHz IF
+4dB, 3.0GHz IF
0dB, 3.0GHz IF
–4dB, 3.0GHz IF
+4dB, 2.5GHz IF
0dB, 2.5GHz IF
–4dB, 2.5GHz IF
–0.5
–1.0
–1.5
–2.0
–2.5
–3.0
–3.5
–4.0
–4.5
+25°C, 3.5GHz IF
–40°C, 3.5GHz IF
+85°C, 3.0GHz IF
+25°C, 3.0GHz IF
20.0
20.5
21.0
21.5
22.0
22.5
23.0
23.5
24.0
20.0
20.5
21.0
21.5
22.0
22.5
23.0
23.5
24.0
RF FREQUENCY (GHz)
RF FREQUENCY (GHz)
Figure 9. Input P1dB vs. RF Frequency at Various Temperatures and
Various IF Frequencies
Figure 11. Input P1dB vs. RF Frequency at Various LO Powers and Various
IF Frequencies
4.5
4.0
3.5
3.0
2.5
2.0
1.5
4.5
4.0
3.5
3.0
2.5
2.0
1.5
+85°C, 3.5GHz IF
+25°C, 3.5GHz IF
–40°C, 3.5GHz IF
+85°C, 3.0GHz IF
+25°C, 3.0GHz IF
–40°C, 3.0GHz IF
+85°C, 2.5GHz IF
+25°C, 2.5GHz IF
–40°C, 2.5GHz IF
+4°C, 3.5GHz IF
0°C, 3.5GHz IF
–4°C, 3.5GHz IF
+4°C, 3.0GHz IF
0°C, 3.0GHz IF
–4°C, 3.0GHz IF
+4°C, 2.5GHz IF
0°C, 2.5GHz IF
–4°C, 2.5GHz IF
1.0
0.5
0
1.0
0.5
0
20.0
20.5
21.0
21.5
22.0
22.5
23.0
23.5
24.0
20.0
20.5
21.0
21.5
22.0
22.5
23.0
23.5
24.0
RF FREQUENCY (GHz)
RF FREQUENCY (GHz)
Figure 10. Noise Figure vs. RF Frequency at Various Temperatures and
Various IF Frequencies
Figure 12. Noise Figure vs. RF Frequency at Various LO Powers and
Various IF Frequencies
Rev. A | Page 7 of 19
ADMV1012
Data Sheet
LOWER SIDEBAND (HIGH-SIDE LO)
Data taken at VDRF = 3 V, V DLO = 3 V, IDRF = 68 mA, LO = −4 dBm ≤ LO ≤ +4 dBm, −40°C ≤ TA ≤ +85°C, with Mini-Circuits QCN-45+,
power splitter as lower sideband (high-side LO), unless otherwise noted.
20
18
16
14
12
10
8
20
18
16
14
12
10
8
+85°C, 3.5GHz IF
+25°C, 3.5GHz IF
–40°C, 3.5GHz IF
+85°C, 3.0GHz IF
+25°C, 3.0GHz IF
–40°C, 3.0GHz IF
+85°C, 2.5GHz IF
+25°C, 2.5GHz IF
–40°C, 2.5GHz IF
+4dB, 3.5GHz IF
0dB, 3.5GHz IF
–4dB, 3.5GHz IF
+4dB, 3.0GHz IF
0dB, 3.0GHz IF
–4dB, 3.0GHz IF
+4dB, 2.5GHz IF
0dB, 2.5GHz IF
–4dB, 2.5GHz IF
6
6
4
4
2
2
0
17.0
0
17.0
17.5
18.0
18.5
19.0
19.5
20.0
17.5
18.0
18.5
19.0
19.5
20.0
RF FREQUENCY (GHz)
RF FREQUENCY (GHz)
Figure 13. Conversion Gain vs. RF Frequency at Various Temperatures
and Various IF Frequencies
Figure 16. Conversion Gain vs. RF Frequency at Various LO Powers and
Various IF Frequencies
29.0
28.5
28.0
27.5
29.0
28.5
28.0
27.5
27.0
27.0
–40°C, 2.5GHz IF
–4dB, 2.5GHz IF
+25°C, 2.5GHz IF
0dB, 2.5GHz IF
+4dB, 2.5GHz IF
–4dB, 3.0GHz IF
0dB, 3.0GHz IF
+4dB, 3.0GHz IF
26.5
26.0
25.5
25.0
24.5
24.0
23.5
+85°C, 2.5GHz IF
–40°C, 3.0GHz IF
26.5
26.0
25.5
25.0
24.5
24.0
23.5
+25°C, 3.0GHz IF
+85°C, 3.0GHz IF
–40°C, 3.5GHz IF
+25°C, 3.5GHz IF
+85°C, 3.5GHz IF
–4dB, 3.5GHz IF
0dB, 3.5GHz IF
+4dB, 3.5GHz IF
17.0
17.5
18.0
18.5
19.0
19.5
20.0
17.0
17.5
18.0
18.5
19.0
19.5
20.0
RF FREQUENCY (GHz)
RF FREQUENCY (GHz)
Figure 14. Image Rejection vs. RF Frequency at Various Temperatures and
Various IF Frequencies
Figure 17. Image Rejection vs. RF Frequency at Various LO Powers and
Various IF Frequencies
7
7
+85°C, 3.5GHz IF
+25°C, 3.5GHz IF
–40°C, 3.5GHz IF
+85°C, 3.0GHz IF
+25°C, 3.0GHz IF
–40°C, 3.0GHz IF
+85°C, 2.5GHz IF
+25°C, 2.5GHz IF
–40°C, 2.5GHz IF
+4dB, 3.5GHz IF
0dB, 3.5GHz IF
–4dB, 3.5GHz IF
+4dB, 3.0GHz IF
0dB, 3.0GHz IF
–4dB, 3.0GHz IF
+4dB, 2.5GHz IF
0dB, 2.5GHz IF
–4dB, 2.5GHz IF
6
5
4
3
2
1
6
5
4
3
2
1
0
17.0
0
17.0
17.5
18.0
18.5
19.0
19.5
20.0
17.5
18.0
18.5
19.0
19.5
20.0
RF FREQUENCY (GHz)
RF FREQUENCY (GHz)
Figure 15. Input IP3 vs. RF Frequency at Various Temperatures and
Various IF Frequencies
Figure 18. Input IP3 vs. RF Frequency at Various LO Powers and Various IF
Frequencies
Rev. A | Page 8 of 19
Data Sheet
ADMV1012
0
0
–1
–2
–3
–4
–5
–6
+85°C, 3.5GHz IF
–40°C, 3.0GHz IF
+85°C, 2.5GHz IF
+25°C, 2.5GHz IF
–40°C, 2.5GHz IF
+4dB, 3.5GHz IF
0dB, 3.5GHz IF
–4dB, 3.5GHz IF
+4dB, 3.0GHz IF
0dB, 3.0GHz IF
–4dB, 3.0GHz IF
+4dB, 2.5GHz IF
0dB, 2.5GHz IF
–4dB, 2.5GHz IF
+25°C, 3.5GHz IF
–40°C, 3.5GHz IF
+85°C, 3.0GHz IF
+25°C, 3.0GHz IF
–1
–2
–3
–4
–5
–6
17.0
17.5
18.0
18.5
19.0
19.5
20.0
17.0
17.5
18.0
18.5
19.0
19.5
20.0
RF FREQUENCY (GHz)
RF FREQUENCY (GHz)
Figure 19. Input P1dB vs. RF Frequency at Various Temperatures and
Various IF Frequencies
Figure 21. Input P1dB vs. RF Frequency at Various LO Powers and Various
IF Frequencies
4.0
3.5
3.0
2.5
2.0
1.5
3.0
2.5
2.0
1.5
+4dB, 3.5GHz IF
0dB, 3.5GHz IF
–4dB, 3.5GHz IF
+4dB, 3.0GHz IF
0dB, 3.0GHz IF
–4dB, 3.0GHz IF
+4dB, 2.5GHz IF
0dB, 2.5GHz IF
–4dB, 2.5GHz IF
1.0
0.5
0
1.0
0.5
0
+85°C, 3.5GHz IF
+25°C, 3.5GHz IF
–40°C, 3.5GHz IF
+85°C, 3.0GHz IF
+25°C, 3.0GHz IF
–40°C, 3.0GHz IF
+85°C, 2.5GHz IF
+25°C, 2.5GHz IF
–40°C, 2.5GHz IF
17.0
17.5
18.0
18.5
19.0
19.5
20.0
17.0
17.5
18.0
18.5
19.0
19.5
20.0
RF FREQUENCY (GHz)
RF FREQUENCY (GHz)
Figure 20. Noise Figure vs. RF Frequency at Various Temperatures and
Various IF Frequencies
Figure 22. Noise Figure vs. RF Frequency at Various LO Powers and
Various IF Frequencies
Rev. A | Page 9 of 19
ADMV1012
Data Sheet
IF BANDWIDTH
Data taken at VDRF = 3 V, V DLO = 3 V, IDRF = 68 mA, LO = −4 dBm ≤ LO ≤ +4 dBm at 10 GHz, −40°C ≤ TA ≤ +85°C, with
Mini-Circuits QCN-45+, power splitter, unless otherwise noted.
25
20
15
10
5
25
20
15
10
5
+4dBm, UPPER
0dBm, UPPER
–4dBm, UPPER
+4dBm, LOWER
0dBm, LOWER
–4dBm, LOWER
+85°C, UPPER
+25°C, UPPER
–40°C, UPPER
+85°C, LOWER
+25°C, LOWER
–40°C, LOWER
0
2.0
0
2.0
2.2
2.4
2.6
2.8
3.0
3.2
3.4
3.6
3.8
4.0
2.2
2.4
2.6
2.8
3.0
3.2
3.4
3.6
3.8
4.0
IF FREQUENCY (GHz)
IF FREQUENCY (GHz)
Figure 25. Conversion Gain vs. IF Frequency at Various LO Powers and
Sidebands
Figure 23. Conversion Gain vs. IF Frequency at Various Temperatures and
Sidebands
10
9
10
9
8
8
7
7
6
6
5
5
4
4
3
3
+85°C, UPPER
+4dBm, UPPER
+25°C, UPPER
0dBm, UPPER
–4dBm, UPPER
+4dBm, LOWER
0dBm, LOWER
–4dBm, LOWER
2
1
0
2
–40°C, UPPER
+85°C, LOWER
1
+25°C, LOWER
–40°C, LOWER
0
2.0
2.0
2.2
2.4
2.6
2.8
3.0
3.2
3.4
3.6
3.8
4.0
2.2
2.4
2.6
2.8
3.0
3.2
3.4
3.6
3.8
4.0
IF FREQUENCY (GHz)
IF FREQUENCY (GHz)
Figure 26. Input IP3 vs. IF Frequency at Various LO Powers and Sidebands
Figure 24. Input IP3 vs. IF Frequency at Various Temperatures and
Sidebands
Rev. A | Page 10 of 19
Data Sheet
ADMV1012
LEAKAGE PERFORMANCE
Data taken at VDRF = 3 V, V DLO = 3 V, LO = −4 dBm ≤ LO ≤ +4 dBm, −40°C ≤ TA ≤ +85°C, with Mini-Circuits QCN-45+, power
splitter, unless otherwise noted.
0
–10
–20
–30
–40
–50
–60
–70
–80
0
–10
–20
–30
–40
–50
–60
–70
–80
+85°C, UPPER
+25°C, UPPER
–40°C, UPPER
+85°C, LOWER
+25°C, LOWER
–40°C, LOWER
+4dBm, UPPER
0dBm, UPPER
–4dBm, UPPER
+4dBm, LOWER
0dBm, LOWER
–4dBm, LOWER
6
7
8
9
10
11
12
13
14
6
7
8
9
10
11
12
13
14
LO FREQUENCY (GHz)
LO FREQUENCY (GHz)
Figure 27. LO Leakage at IF Output vs. LO Frequency at Various
Temperatures and Sidebands
Figure 29. LO Leakage at IF Output vs. LO Frequency at Various LO
Powers and Sidebands
–30
–30
+4dBm
0dBm
–4dBm
+85°C
+25°C
–40°C
–35
–40
–45
–50
–55
–35
–40
–45
–50
–55
6
7
8
9
10
11
12
13
14
6
7
8
9
10
11
12
13
14
LO FREQUENCY (GHz)
LO FREQUENCY (GHz)
Figure 28. LO Leakage at RFIN vs. LO Frequency at Various Temperatures
Figure 30. LO Leakage at RFIN vs. LO Frequency at Various LO Powers
Rev. A | Page 11 of 19
ADMV1012
Data Sheet
RETURN LOSS PERFORMANCE
Data taken at VDRF = 3 V, V DLO = 3 V, IDRF = 68 mA, LO = −4 dBm ≤ LO ≤ +4 dBm, −40°C ≤ TA ≤ +85°C, with Mini-Circuits QCN-45+,
power splitter, unless otherwise noted. Measurement reference plane at connector.
0
0
+85°C, UPPER
+85°C, LOWER
+25°C, UPPER
+25°C, LOWER
–40°C, UPPER
–40°C, LOWER
–5
–5
–10
–15
–20
–25
–30
–35
–10
–15
–20
–25
–30
+85°C
+25°C
–40°C
17.5
18.5
19.5
20.5
21.5
22.5
23.5
2.5
2.7
2.9
3.1
3.3
3.5
RF FREQUENCY (GHz)
IF FREQUENCY (GHz)
Figure 31. RF Input Return Loss vs. RF Frequency at Various Temperatures
Figure 33. IF Output Return Loss vs. IF Frequency at Various Temperatures
and Sidebands
0
–5
–10
–15
+85°C
–20
+25°C
–40°C
–25
–30
7
8
9
10
11
12
13
LO FREQUENCY (GHz)
Figure 32. LO Input Return Loss vs. LO Frequency at Various Temperatures
Rev. A | Page 12 of 19
Data Sheet
ADMV1012
SPURIOUS PERFORMANCE
Data taken at VDRF = 3 V, VDLO = 3 V, IDRF = 68 mA, LO =
0 dBm, and −40°C ≤ TA ≤ +85°C with a Mini-Circuits QCN-45+,
power splitter, unless otherwise noted.
IF = 3.5 GHz
RF = 18000 MHz at RF power of −20 dBm, and LO = 10750 MHz
at LO power of 4 dBm. All values in dBc below IF power level.
N/A means not applicable.
Table 5. LO Harmonic Leakage at IF Output
N × LO
Frequency
0
1
2
3
4
LO Frequency (MHz)
7000
8500
9000
10,000
11,000
12,000
13,000
13,500
1.0
2.0
3.0
4.0
N/A
N/A
N/A
−48.2
−77.2
N/A
N/A
0
N/A
−76.6
−47.2
N/A
N/A
−57.5
−74.2
−46.2
N/A
−2
−1
0
−48
−47
−50
−49
−49
−58
−54
−55
−65
−64
−51
−40
−47
−46
−42
−40
−42
−57
−51
−52
−61
−56
−59
N/A
−57
−64
−61
−61
N/A
N/A
N/A
N/A
N/A
−42.7
−74.5
−59.9
−33.4
−83.8
N/A
M × RF
1
N/A
2
Upper Sideband
IF = 2.8 GHz
RF = 23000 MHz at RF power of −20 dBm, and LO = 10100 MHz
at LO power of 4 dBm. All values in dBc below IF power level.
N/A means not applicable.
M × N SPURIOUS PERFORMANCE FOR LO = 0 dBm
Mixer spurious products are measured in dBc from the IF
output power level. Spurious values are measured using the
following equation: (M × RF)+ (N × LO). N/A means not
applicable. The frequencies are referred from the frequencies
applied to the pin of the ADMV1012.
N × LO
0
1
2
3
4
N/A
N/A
N/A
−53.2
−60.9
N/A
N/A
−39.9
−77.8
N/A
N/A
0
N/A
−62.6
−46.9
N/A
N/A
−56.4
−72.3
−47
N/A
N/A
−2
−1
0
−40.2
−64.9
N/A
M ×RF
Lower Sideband
1
IF = 2.8 GHz
2
RF = 18000 MHz at −20 dBm and LO = 10400 MHz at 4 dBm.
All values in dBc below IF power level. N/A means not applicable.
IF = 3.3 GHz
RF = 23000 MHz at RF power of −20 dBm, and LO = 9850 MHz
at LO power of 4 dBm. All values in dBc below IF power level.
N/A means not applicable.
N × LO
0
1
2
3
4
N/A
N/A
N/A
N/A
N/A
−42
N/A
0
N/A
−58.6
−2
−1
0
N × LO
−68.5 −71.1
0
1
2
3
4
−38.4 −52.2 −53.2
M × RF
N/A
N/A
N/A
−52.9
−74.9
N/A
N/A
−40.6
−99.8
N/A
N/A
0
N/A
−53.8
−44.2
N/A
N/A
−61.5
−69
−56.5
N/A
N/A
−2
−1
0
−49.1 −70.2 −65.7 −67.9 N/A
−66.5 −74.4 N/A N/A N/A
1
2
−42
−65.3
N/A
M × RF
IF = 3.3 GHz
1
RF = 18000 MHz at RF power of −20 dBm, and LO = 10650 MHz
at LO power of 4 dBm. All values in dBc below IF power level.
N/A means not applicable.
2
IF = 3.5 GHz
RF = 23000 MHz at RF power of −20 dBm, and LO = 9750 MHz
at LO power of 4 dBm. All values in dBc below IF power level.
N/A means not applicable.
N × LO
0
1
2
3
4
N/A
N/A
N/A
−48.8
−71.7
N/A
N/A
0
N/A
−56
−83.9
−56.9
N/A
N/A
−2
−1
0
N × LO
N/A
−72.5
−54.1
−63.4
N/A
0
1
2
3
4
−42.3
−68.3
−65.8
−44.7
−69.5
N/A
M × RF
N/A
N/A
N/A
−53.6
−70.7
N/A
N/A
−41.5
−68.7
N/A
N/A
0
N/A
−50.1
−47.4
N/A
N/A
−67.6
−63.9
−64.8
N/A
−2
−1
0
1
2
−40.8
−72.2
N/A
M × RF
1
N/A
2
Rev. A | Page 13 of 19
ADMV1012
Data Sheet
THEORY OF OPERATION
The ADMV1012 is a compact GaAs, MMIC, double sideband
(DSB) downconverter in a RoHS compliant package optimized
for both upper sideband and lower sideband point to point
microwave radio applications operating in the 17.5 GHz to
24 GHz input frequency range. The ADMV1012 supports
LO input frequencies of 7 GHz to 13.5 GHz and IF output
frequencies of 2.5 GHz to 3.5 GHz.
MIXER
The mixer is an I/Q double balanced mixer, and this mixer
topology reduces the need for filtering unwanted sideband.
An external 90° hybrid is required to select the upper sideband
of operation. The ADMV1012 has been optimized to work with
the Mini-Circuits QCN-45+ RF 90° hybrid.
LNA
The ADMV1012 uses a RF LNA followed by an I/Q double
balanced mixer, where a driver amplifier drives the LO (see
Figure 1). This combination of design, process, and packaging
technology allows the functions of these subsystems to be
integrated into a single die, using mature packaging and
interconnection technologies to provide a high performance,
low cost design with excellent electrical, mechanical, and
thermal properties. In addition, the need for external
components is minimized, optimizing cost and size.
The LNA requires a single dc bias voltage (VDRF) and a single
dc gate bias (VGRF) to operate. Starting at −1.8 V at the gate
supply (VGRF), the LNA is biased at +3 V (VDRF). Then, the
gate bias (VGRF) is varied until the desired LNA bias current
(IDRF) is achieved. The desired LNA bias current is 68 mA at
3 V under small signal conditions.
The typical application circuit (see Figure 34) shows the
necessary external components on the bias lines to eliminate
any undesired stability problems for the RF amplifier and the
LO amplifier.
LO DRIVER AMPLIFIER
The LO driver amplifier takes a single LO input and doubles the
frequency and amplifies it to the desired LO signal level for the
mixer to operate optimally. The LO driver amplifier is self
biased, and it requires only a single dc bias voltage (VDLO),
which draws approximately 170 mA at 3 V under the LO drive.
The LO amplitude range of −4 dBm to +4 dBm makes it
compatible with the Analog Devices, Inc., wideband synthesizer
portfolio without the need for an external LO driver amplifier.
The ADMV1012 is a much smaller alternative to hybrid style
image reject converter assemblies, and it eliminates the need
for wire bonding by allowing the use of surface-mount
manufacturing assemblies.
The ADMV1012 downconverter comes in a compact, thermally
enhanced, 4.9 mm × 4.9 mm, 32-terminal ceramic leadless chip
carrier (LCC) package. The ADMV1012 operates over the
−40°C to +85°C temperature range.
Rev. A | Page 14 of 19
Data Sheet
ADMV1012
APPLICATIONS INFORMATION
The evaluation board and typical application circuit are
optimized for low-side LO (upper sideband) performance
with the Mini-Circuit QCN-45+ RF 90° hybrid. Because the
I/Q mixers are double balanced, the ADMV1012 can support IF
frequencies from 3.5 GHz to low frequency.
TYPICAL APPLICATION CIRCUIT
The typical applications circuit is shown in Figure 34. The
application circuit shown has been replicated for the evaluation
board circuit.
VGRF
5019
VDRF
5019
1
1
C13
C9
1µF
C11
1µF
C8
0.01µF
C12
0.01µF
C7
IF_OUTPUT_USB
R1
1
100pF
100pF
0Ω
4
3
2
AGND
AGND
25-146-1000-92
AGND
DUT
24
1
2
3
4
5
6
7
8
X1
NIC
NIC
23
22
21
20
19
18
17
RF_INPUT
1
GND
RFIN
GND
NIC
NIC
1
4
6
3
SUM_PORT
PORT_1
RF_INPUT
PORT_2
IF1
NIC
IF2
IF_OUTPUT_LSB
1
R4
4
3 2
ADMV1012AEZ
50Ω _TERM
25-146-1000-92
0Ω
NIC
NIC
NIC
NIC
GND GND
4
3
2
NIC
2
5
QCN-45+
25-146-1000-92
AGND
NIC
AGND
AGND
AGND
AGND
AGND
LO_INPUT
1
LO_INPUT
4
3 2
25-146-1000-92
C5
AGND
100pF
C10
0.01µF
C3
1µF
AGND
VDLO
5019
1
VDLO
Figure 34. Typical Application Circuit
Rev. A | Page 15 of 19
ADMV1012
Data Sheet
Power-On Sequence
EVALUATION BOARD INFORMATION
To set up the ADMV1012-EVALZ, take the following steps:
The circuit board used in the application must use RF circuit
design techniques. Signal lines must have 50 Ω impedance, and
the package ground leads and exposed pad must be connected
directly to the ground plane similarly to that shown in Figure 35
and Figure 36. Use a sufficient number of via holes to connect
the top and bottom ground planes. The evaluation circuit board
shown in Figure 34 is available from Analog Devices upon request.
1. Power up the VGRF with a −1.8 V supply.
2. Power up the VDRF with a 3 V supply.
3. Power up the VDLO with a 3 V supply.
4. Adjust the VGRF supply between −1.8 V to −0.4 V until
IDRF = 68 mA.
5. Connect LOIN to the LO signal generator with an LO
power of between −4 dBm to +4 dBm.
Layout
6. For the upper sideband, add a 50 Ω termination to the
IF_OUTPUT_LSB connector. For the lower sideband, add
a 50 Ω termination to the IF_OUTPUT_USB connector.
7. Apply a RF signal to the RF_INPUT and LO_INPUT ports.
Solder the exposed pad on the underside of the ADMV1012 to
a low thermal and electrical impedance ground plane. This pad
is typically soldered to an exposed opening in the solder mask
on the evaluation board. Connect these ground vias to all other
ground layers on the evaluation board to maximize heat
dissipation from the device package. Figure 35 shows the PCB
land pattern footprint for the ADMV1012-EVALZ , and Figure 36
shows the solder paste stencil for the ADMV1012-EVALZ
evaluation board.
Power-Off Sequence
To turn off the ADMV1012-EVALZ, take the following steps:
1. Turn off the LO and RF signals.
2. Set VGRF to −1.8 V.
3. Set the VDRF supply to 0 V and then turn off the VDRF
supply.
4. Set the VDLO supply to 0 V and then turn off the VDLO
supply.
5. Turn off the VGRF supply.
0.217" SQUARE
0.004" MASK/METAL OVERLAP
0.010" MINIMUM MASK WIDTH
SOLDER MASK
GROUND PAD
PAD SIZE
0.026" × 0.010"
PIN 1
0.197"
[0.50]
0.156"
MASK
OPENING
ø.034"
TYPICAL
VIA SPACING
ø.010"
TYPICAL VIA
0.010" REF
0.138" SQUARE MASK OPENING
0.02 × 45° CHAMFER FOR PIN 1
0.030"
MASK OPENING
0.146" SQUARE
GROUND PAD
Figure 35. PCB Land Pattern Footprint of the ADMV1012-EVALZ
Rev. A | Page 16 of 19
Data Sheet
ADMV1012
0.017
0.0197
TYP
0.219
SQUARE
0.132
SQUARE
0.017
0.027
TYP
R0.0040 TYP
132 PLCS
0.010
TYP
Figure 36. Solder Paste Stencil of the ADMV1012-EVALZ
NOTES
1. NOT ALL COMPONENTS OR BIAS LINES ARE USED ON THE EVALUATION BOARD.
Figure 37. ADMV1012-EVALZ Evaluation Board Top Layer
Rev. A | Page 17 of 19
ADMV1012
Data Sheet
BILL OF MATERIALS
Table 6.
Qty. Component
Description
Manufacturer/Part No.
1
4
Evaluation board
C5, C7, C12
PCB
Analog Devices, Supplied/042365
TDK/C1005NP01H101J050BA
100 pF, high temperature, multilayer
ceramic capacitors, NP0, 0402
4
4
7
C8, C10, C11
C3, C9, C13
GND, VDLO, VDRF, VGRF
0.01 µF ceramic capacitors, X7R, 0402
1 µF ceramic capacitors, X5R, 0603
CONN-PCB test points, compact mini, Keystone Electronics Corporation/5019.00
CNKEY5019
Murata Manufacturing/GRM155R71E103KA01D
Murata Manufacturing/GRM188R61E105KA12D
4
LO_INPUT, RF_INPUT, IF_OUTPUT_LSB,
IF_OUTPUT_USB
CONN-PCB, SMA K_SRI-NS,
CNSMAL460W295H156
SRI CONNECTOR GAGE/25-146-1000-92
2
1
R1, R4
X1
0 Ω resistor chips, SMD, JMPR, 0402
Panasonic/ERJ-2GE0R00X
Mini-Circuits/QCN-45+
XFMR, power splitter/combiner,
2500 MHz to 4500 MHz,
TSML126W63H42
1
1
Device under test (DUT)
Heatsink
17.5 GHz to 24 GHz, GaAs, MMIC, I/Q
downconverter
Heatsink
Analog Devices Supplied/ADMV1012AEZ
Analog Devices Supplied/104365
Rev. A | Page 18 of 19
Data Sheet
ADMV1012
OUTLINE DIMENSIONS
5.05
4.90 SQ
4.75
0.36
0.30
0.24
PIN 1
0.08
REF
INDICATOR
PIN 1
32
25
24
1
0.50
BSC
3.60
3.50 SQ
3.40
EXPOSED
PAD
17
8
16
9
0.38
0.32
0.26
0.20 MIN
BOTTOM VIEW
3.50 REF
TOP VIEW
SIDE VIEW
1.10
1.00
0.90
4.10 REF
FOR PROPER CONNECTION OF
THE EXPOSED PAD, REFER TO
THE PIN CONFIGURATION AND
FUNCTION DESCRIPTIONS
SEATING
PLANE
SECTION OF THIS DATA SHEET.
Figure 38. 32-Terminal Ceramic Leadless Chip Carrier [LCC]
(E-32-1)
Dimensions shown in millimeters
ORDERING GUIDE
Model1
Package Body Material
Alumina Ceramic
Lead Finish
Temperature Range
−40°C to +85°C
−40°C to +85°C
Package Description
32-Terminal LCC
32-Terminal LCC
Package Option
E-32-1
E-32-1
ADMV1012AEZ
ADMV1012AEZ-R7
ADMV1012-EVALZ
Gold Over Nickel
Gold Over Nickel
Alumina Ceramic
Evaluation Board
1 Z = RoHS Compliant Part.
©2017–2018 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D16349-0-2/18(A)
Rev. A | Page 19 of 19
相关型号：
SI9130DB
5- and 3.3-V Step-Down Synchronous ConvertersWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9135LG-T1
SMBus Multi-Output Power-Supply ControllerWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9135LG-T1-E3
SMBus Multi-Output Power-Supply ControllerWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9135_11
SMBus Multi-Output Power-Supply ControllerWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9136_11
Multi-Output Power-Supply ControllerWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9130CG-T1-E3
Pin-Programmable Dual Controller - Portable PCsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9130LG-T1-E3
Pin-Programmable Dual Controller - Portable PCsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9130_11
Pin-Programmable Dual Controller - Portable PCsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9137
Multi-Output, Sequence Selectable Power-Supply Controller for Mobile ApplicationsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9137DB
Multi-Output, Sequence Selectable Power-Supply Controller for Mobile ApplicationsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9137LG
Multi-Output, Sequence Selectable Power-Supply Controller for Mobile ApplicationsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9122E
500-kHz Half-Bridge DC/DC Controller with Integrated Secondary Synchronous Rectification DriversWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
©2020 ICPDF网 联系我们和版权申明