ADMV8420 [ADI]
10 GHz to 21.7 GHz, Tunable Band-Pass Filter;型号: | ADMV8420 |
厂家: | ADI |
描述: | 10 GHz to 21.7 GHz, Tunable Band-Pass Filter |
文件: | 总14页 (文件大小:494K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
10 GHz to 21.7 GHz, Tunable
Band-Pass Filter
Data Sheet
ADMV8420
FEATURES
FUNCTIONAL BLOCK DIAGRAM
Amplitude settling time: 200 ns
Wideband rejection: ≥20 dB
Single-chip implementation
24-lead, 4 mm × 4 mm, RoHS-compliant LFCSP
18
17
16
15
1
2
3
NIC
GND
RFIN
GND
NIC
NIC
ADMV8420
GND
RFOUT
GND
APPLICATIONS
Test and measurement equipment
Military radar and electronic warfare systems
Very small aperture terminal (VSAT) communications
4
5
6
14
13
NIC
NIC
NIC
PACKAGE
BASE
GND
NIC = NOT INTERNALLY CONNECTED.
Figure 1.
GENERAL DESCRIPTION
The ADMV8420 is a monolithic microwave integrated circuit
(MMIC), tunable band-pass filter that features a user-selectable
pass band frequency. The 3 dB filter bandwidth is approximately
20%, and the 20 dB filter bandwidth is approximately 40%.
Additionally, the center frequency (fCENTER) varies between
11.1 GHz to 19.6 GHz by applying a center frequency control
voltage between 0 V to 15 V. The usable pass band corner
frequencies (fCORNER) span from 10 GHz to 21.7 GHz. This tunable
filter is a smaller alternative to switched filter banks and cavity
tuned filters. The ADMV8420 has minimal microphonics due
to the monolithic design and provides a dynamically adjustable
solution in advanced communications applications.
Rev. B
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice.
No license is granted by implication or otherwise under any patent or patent rights of Analog
Devices. Trademarks and registeredtrademarks are the property oftheir respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2019–2020 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com
ADMV8420
Data Sheet
TABLE OF CONTENTS
Features.............................................................................................. 1
Interface Schematics .....................................................................5
Typical Performance Characteristics .............................................6
Theory of Operation ...................................................................... 10
Applications Information ............................................................. 11
Typical Application Circuit...................................................... 11
Evaluation Printed Circuit Board (PCB) ................................ 12
Outline Dimensions....................................................................... 14
Ordering Guide .......................................................................... 14
Applications ...................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description......................................................................... 1
Revision History........................................................................... 2
Specifications .................................................................................... 3
Absolute Maximum Ratings ........................................................... 4
ESD Caution.................................................................................. 4
Pin Configuration and Function Descriptions ............................ 5
REVISION HISTORY
Changes to Figure 16 ........................................................................7
Changes to Figure 25 ........................................................................9
Changes to Typical Application Circuit Section and Figure 26.....11
Changes to Figure 28 ..................................................................... 12
Added Figure 29; Renumbered Sequentially.............................. 13
Moved Table 4 ................................................................................ 13
Change to Ordering Guide ........................................................... 14
10/2020—Rev. A to Rev. B
Changes to Product Title and General Description Section ...... 1
Changes to Table 1 ........................................................................... 3
Changes to Theory of Operation Section.................................... 10
8/2019—Rev. 0 to Rev. A
Changes to Figure 1.......................................................................... 1
Changes to Table 1 ........................................................................... 3
Changes to Figure 2 and Table 3.................................................... 5
Changes to Figure 7, Figure 8, and Figure 9................................. 6
6/2019—Revision 0: Initial Version
Rev. B | Page 2 of 14
Data Sheet
ADMV8420
SPECIFICATIONS
TA = 25°C and center frequency control voltage (VFCTL) is swept from 0 V to 15 V.
Table 1.
Parameter
Min
Typ
Max
Unit
Test Conditions/Comments
FREQUENCY RANGE
fCENTER
3 dB fCORNER
11.1
10
19.6
21.7
GHz
GHz
BANDWIDTH
3 dB
20
%
REJECTION
Low-Side
High-Side
Reentry
0.8 × fCENTER
1.2 × fCENTER
2.3 × fCENTER
GHz
GHz
GHz
≥20 dB
≥20 dB
≤30 dB
LOSS
Insertion Loss
Return Loss
5
8.5
dB
dB
DYNAMIC PERFORMANCE
Input Power at 5° Shift in Insertion Phase (VFCTL = 0 V)
Input Third-Order Intercept (IP3)
Group Delay
Phase Sensitivity
Amplitude Settling
10
31
0.5
1.3
200
dBm
dBm
ns
Rad/V
ns
At VFCTL = 7 V
Time to settle to minimum insertion loss,
within ≤0.5 dB of static insertion loss
Drift Rate
RESIDUAL PHASE NOISE
1 MHz Offset
TUNING
−1.1
MHz/°C
dBc/Hz
−161
VFCTL
0
15
1
V
mA
Center Frequency Control Current (IFCTL
)
Rev. B | Page 3 of 14
ADMV8420
Data Sheet
ABSOLUTE MAXIMUM RATINGS
Table 2.
ESD CAUTION
Parameter
Rating
Tuning
VFCTL
IFCTL
−0.5 V to +15 V
1 mA
RF Input Power
27 dBm
Operating Temperature Range
Storage Temperature Range
Junction Temperature for 1 Million Mean
Time to Failure (MTTF)
−40°C to +85°C
−65°C to +150°C
150°C
Nominal Junction Temperature
(Temperature at Ground Pad = 85°C,
Input Power (PIN) = 27 dBm)
108°C
Electrostatic Discharge (ESD) Rating
Human Body Model (HBM)
Field Induced Charge Device Model
(FICDM)
1000 V
1250 V
Moisture Sensitivity Level (MSL) Rating
MSL3
Stresses at or above those listed under Absolute Maximum Ratings
may cause permanent damage to the product. This is a stress rating
only; functional operation of the product at these or any other
conditions above those indicated in the operational section of
this specification is not implied. Operation beyond the
maximum operating conditions for extended periods may
affect product reliability.
Rev. B | Page 4 of 14
Data Sheet
ADMV8420
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
1
2
3
18
17
16
15
14
13
NIC
GND
RFIN
NIC
GND
RFOUT
GND
NIC
ADMV8420
TOP VIEW
(Not to Scale)
GND 4
5
6
NIC
NIC
NIC
NOTES
1. NIC = NOT INTERNALLY CONNECTED. THESE PINS ARE NOT CONNECTED INTERNALLY.
HOWEVER, ALL DATA SHOWN HEREIN WAS MEASURED WITH THESE CONNECTED
TO RF AND DC GROUND.
2. EXPOSED PAD. THE EXPOSED PAD MUST BE CONNECTED TO RF AND DC GROUND.
Figure 2. Pin Configuration
Table 3. Pin Function Descriptions
Pin No.
Mnemonic Description
1, 5 to 8, 10 to 14, and 18 to 24
NIC
Not Internally Connected. These pins are not connected internally. All data shown is
measured with these pins connected to the RF and dc ground.
2, 4, 15, and 17
3
GND
RFIN
Ground. These pins must be connected to the radio frequency (RF) and dc ground.
RF Input. This pin is dc-coupled and matched to 50 Ω. Do not apply an external voltage
to this pin.
9
VFCTL
Center Frequency Control Voltage. This pin controls the fCENTER of the device.
16
RFOUT
RF Output. This pin is dc-coupled and matched to 50 Ω. Do not apply an external voltage
to this pin.
EPAD
Exposed Pad. The exposed pad must be connected to RF and dc ground.
INTERFACE SCHEMATICS
0.4nH
RFIN
4Ω
100Ω
V
FCTL
20pF
27pF
Figure 3. VFCTL Interface Schematic
Figure 5. RFIN Interface Schematic
GND
RFOUT
Figure 4. GND Interface Schematic
Figure 6. RFOUT Interface Schematic
Rev. B | Page 5 of 14
ADMV8420
Data Sheet
TYPICAL PERFORMANCE CHARACTERISTICS
0
0
–5
0V
7V
15V
–10
–20
–30
–40
–10
–15
–20
–25
–30
–35
–40
–50
S11, 0V
S22, 0V
S11, 7V
S22, 7V
S11, 15V
S22, 15V
–60
–70
–80
0
5
10
15
20
25
30
35
40
0
5
10
15
20
25
30
35
40
RF FREQUENCY (GHz)
RF FREQUENCY (GHz)
Figure 10. Broadband Return Loss vs. RF Frequency at Various Sxx and Voltages
Figure 7. Broadband Insertion Loss vs. RF Frequency at Various Voltages
0
0
–5
0V
7V
15V
–5
–10
–15
–20
–25
–10
–15
–20
S11, 0V
S22, 0V
S11, 7V
S22, 7V
S11, 15V
S22, 15V
–30
–35
–40
–25
–30
7
9
11
13
15
17
19
21
23
25
27
5
10
15
20
25
30
RF FREQUENCY (GHz)
RF FREQUENCY (GHz)
Figure 8. Insertion Loss vs. RF Frequency at Various Voltages
Figure 11. Return Loss vs. RF Frequency at Various Sxx and Voltages
0
0
–2
–40°C
+25°C
+85°C
–5
–4
–6
–10
–8
–15
–20
–10
–12
–14
S11, –40°C
S22, –40°C
S11, +25°C
S22, +25°C
S11, +85°C
S22, +85°C
–16
–18
–20
–25
–30
10
12
14
16
18
20
22
24
26
28
30
5
10
15
20
25
30
RF FREQUENCY (GHz)
RF FREQUENCY (GHz)
Figure 12. Return Loss vs. RF Frequency at Various Temperatures, VFCTL = 7 V
Figure 9. Minimum Insertion Loss vs. RF Frequency at Various Temperatures,
FCTL = 7 V
V
Rev. B | Page 6 of 14
Data Sheet
ADMV8420
0
25
–40°C
+25°C
+85°C
–40°C
+25°C
+85°C
–2
–4
20
15
10
5
–6
–8
–10
–12
0
0
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15
0
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15
V
(V)
V
(V)
FCTL
FCTL
Figure 13. fCENTER vs. VFCTL at Various Temperatures
Figure 16. Minimum Insertion Loss vs. VFCTL at Various Temperatures
30
25
20
15
10
5
0
–40°C
+25°C
+85°C
–40°C
+25°C
+85°C
–3
–6
–9
–12
–15
0
0
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15
0
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15
V
(V)
V
(V)
FCTL
FCTL
Figure 14. 3 dB Bandwidth vs. VFCTL at Various Temperatures
Figure 17. Maximum Return Loss in a 2 dB Bandwidth vs. VFCTL at Various
Temperatures
1.00
1.40
–40°C
+25°C
+85°C
–40°C
+25°C
+85°C
1.35
1.30
1.25
1.20
1.15
1.10
1.05
1.00
0.95
0.90
0.85
0.80
0.75
0.70
0
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15
0
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15
V
(V)
V
(V)
FCTL
FCTL
Figure 15. Low-Side Rejection Ratio vs. VFCTL at Various Temperatures
Figure 18. High-Side Rejection Ratio vs. VFCTL at Various Temperatures
Rev. B | Page 7 of 14
ADMV8420
Data Sheet
0.8
0.7
0.6
0.5
0.4
1200
1000
800
600
400
200
0
0V
–40°C
+25°C
+85°C
7V
15V
0.3
0.2
0
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15
8
9
10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25
RF FREQUENCY (GHz)
V
(V)
FCTL
Figure 19. Tuning Sensitivity vs. VFCTL at Various Temperatures
Figure 22. Group Delay vs. RF Frequency at Various Voltages
1.0
40
–40°C
+25°C
+85°C
35
30
25
20
15
10
5
0.8
0.6
0.4
0.2
0
–40°C
+25°C
+85°C
0
0
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15
0
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15
V
(V)
V
(V)
FCTL
FCTL
Figure 20. Group Delay vs. VFCTL at Various Temperatures
Figure 23. Input IP3 vs. VFCTL at Various Temperatures, PIN = 20 dBm
–100
–110
–120
–130
–140
–150
–160
–170
–180
0V
7V
15V
10
100
1k
10k
100k
1M
10M
100M
OFFSET FREQUENCY (Hz)
Figure 21. Residual Phase Noise vs. Offset Frequency at Various VFCTL Voltages
Rev. B | Page 8 of 14
Data Sheet
ADMV8420
22
20
18
16
14
12
10
8
5.5
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
V
V
V
V
V
V
= 0V
= 1V
= 3V
= 7V
= 10V
= 15V
FCTL
FCTL
FCTL
FCTL
FCTL
FCTL
APPROXIMATE
fCENTER
DELTA PHI
6
4
0.5
0
2
0
0
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15 16 17 18
0
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15
INPUT POWER (dBm)
V
FCTL
Figure 24. Phase Shift vs. Input Power
Figure 25. Phase Sensitivity vs. VFCTL Voltages
Rev. B | Page 9 of 14
ADMV8420
Data Sheet
THEORY OF OPERATION
The ADMV8420 is a MMIC band-pass filter that features a
user-selectable pass band frequency. Varying the applied analog
tuning voltage between 0 V and 15 V at VFCTL varies the fCENTER
between 11.1 GHz and 19.6 GHz.
Rev. B | Page 10 of 14
Data Sheet
ADMV8420
APPLICATIONS INFORMATION
TYPICAL APPLICATION CIRCUIT
1
2
3
4
5
6
18
17
16
15
14
13
Figure 26 shows the typical application circuit for the ADMV8420.
The RFIN and RFOUT pins are dc-coupled and external voltage
must not be applied. It is recommended to install 100 pF series
capacitors (C1 and C2) on the RF traces to prevent any prestage
or poststage interaction with the filter.
ADMV8420
C1
100pF
C2
100pF
RFIN
RFOUT
On the VFCTL control port, the C3 decoupling capacitor is
shown with 100 pF as the typical value. However, the selection
of the C3 capacitor is determined based on the system design
criteria for phase noise and tuning speed. That is, there is a
baseband noise characteristic for a particular control voltage,
which can translate into additive phase noise within the filter.
Minimizing baseband noise on the control voltage can be done
by capacitive means at the expense of voltage rise time, which
impacts the tuning speed of the filter. Carefully consider the
control voltage baseband noise and rise time performance to
ensure that system performance metrics are met.
PACKAGE
C3
100pF
BASE
GND
V
FCTL
Figure 26. Typical Application Circuit
Rev. B | Page 11 of 14
ADMV8420
Data Sheet
The circuit board in this application uses RF circuit design
EVALUATION PRINTED CIRCUIT BOARD (PCB)
techniques. Signal lines must have 50 Ω impedance. The package
ground leads and exposed pad must connect directly to the ground
plane (see Figure 27). A sufficient number of via holes connect the
top and bottom ground planes. The evaluation circuit board
shown in Figure 28 is available from Analog Devices, Inc. upon
request.
All RF traces are routed on Layer 1 (primary side). The remaining
three layers are ground planes that provide a solid ground for RF
transmission lines, as shown in Figure 27. The top dielectric
material is Rogers 4350, which offers low loss performance. The
prepreg material in Layer 2 attaches the Isola 370HR core layer to
copper traces layers. Both the prepreg material and the Isola 370HR
core layer achieve the required board finish thickness.
PRIMARY SILKSCREEN
PRIMARY SOLDER MASK
0.5oz Cu
ARLON OR ROGERS CORE 10MILS ±1MIL (CRITICAL)
PRIMARY SIDE
(LAYER 1)
NOMINAL
FINISHED
0.5oz Cu
L2_GND PLANE (LAYER 2)
BOARD
PREPREG AS REQUIRED
THICKNESS 0.062"
±10%
0.5oz Cu
370HR
L3_GND PLANE (LAYER 3)
0.5oz Cu
SECONDARY SIDE (LAYER 4)
Figure 27. The Cross Sectional View of the ADMV8420-EVALZ PCB Layers
Figure 28. Evaluation PCB Layout, Top View
Rev. B | Page 12 of 14
Data Sheet
ADMV8420
1
2
3
4
5
6
18
17
16
15
14
13
NIC
NIC
GND
RFOUT
GND
ADMV8420
U1
J1
J2
GND
RFIN
GND
NIC
1
1
2
3
4
1492-04A-5
1492-04A-5
4
3
2
NIC
NIC
NIC
AGND
AGND
AGND
DNI
DNI
DNI
1492-04A-5
J8
WHT
J5
WHT
DNI
DNI
DNI
C6
DNI
DNI
P
N
P
+
+
C1
4.7µF
C3
1000pF
C4
100pF
C7
1000pF
C9
4.7µF
100pF
N
AGND
AGND
AGND
AGND
AGND
AGND
J7
WHT
P
N
+
C8
4.7µF
C5
1000pF
C2
100pF
AGND
AGND
AGND
Figure 29. ADMV8420-EVALZ Evaluation Board Schematic
Table 4. Bill of Materials for the ADMV8420-EVALZ
Reference Designator
Description
J1 and J2
J7 and GND
PCB mount, southwest 2.4 mm connector
Test points
C2
C5
C8
U1
Capacitor, 100 pF, 0402
Capacitor, 1000 pF, 0603
Capacitor, 4.7 µF, 3216
ADMV8420
PCB1
08-0512982 evaluation PCB
1 Circuit board material is Arlon 25FR or Rogers 25FR. Rogers 4350 is the laminate on top of Arlon 25FR or Rogers 25FR.
2 The raw, bare PCB identifier is 08-051298.
Rev. B | Page 13 of 14
ADMV8420
Data Sheet
OUTLINE DIMENSIONS
DETAIL A
(JEDEC 95)
4.10
4.00 SQ
3.90
0.30
0.25
0.18
PIN 1
INDICATOR
AREA
PIN 1
IONS
INDICATOR AR EA OP T
(SEE DETAIL A)
24
19
18
1
0.50
BSC
2.70
2.60 SQ
2.50
EXPOSED
PAD
13
12
6
7
0.50
0.40
0.30
0.20 MIN
TOP VIEW
SIDE VIEW
BOTTOM VIEW
0.80
0.75
0.70
FOR PROPER CONNECTION OF
THE EXPOSED PAD, REFER TO
THE PIN CONFIGURATION AND
FUNCTION DESCRIPTIONS
0.05 MAX
0.02 NOM
COPLANARITY
0.08
SECTION OF THIS DATA SHEET.
SEATING
PLANE
0.20 REF
COMPLIANT TO JEDEC STANDARDS MO-220-WGGD-8
Figure 30. 24-Lead Lead Frame Chip Scale Package [LFCSP]
4 mm × 4 mm Body and 0.75 mm Package Height
(CP-24-15)
Dimensions shown in millimeters
ORDERING GUIDE
Model1
ADMV8420ACPZ
ADMV8420ACPZ-R5
ADMV8420-EVALZ
Temperature Range
−40°C to +85°C
−40°C to +85°C
Package Description
24-Lead LFCSP
24-Lead LFCSP, 7” Tape and Reel
Evaluation Board
Package Option
CP-24-15
CP-24-15
1 All models are RoHS-compliant parts.
©2019–2020 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D17199-10/20(B)
Rev. B | Page 14 of 14
相关型号:
SI9130DB
5- and 3.3-V Step-Down Synchronous ConvertersWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9135LG-T1
SMBus Multi-Output Power-Supply ControllerWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9135LG-T1-E3
SMBus Multi-Output Power-Supply ControllerWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9135_11
SMBus Multi-Output Power-Supply ControllerWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9136_11
Multi-Output Power-Supply ControllerWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9130CG-T1-E3
Pin-Programmable Dual Controller - Portable PCsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9130LG-T1-E3
Pin-Programmable Dual Controller - Portable PCsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9130_11
Pin-Programmable Dual Controller - Portable PCsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9137
Multi-Output, Sequence Selectable Power-Supply Controller for Mobile ApplicationsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9137DB
Multi-Output, Sequence Selectable Power-Supply Controller for Mobile ApplicationsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9137LG
Multi-Output, Sequence Selectable Power-Supply Controller for Mobile ApplicationsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9122E
500-kHz Half-Bridge DC/DC Controller with Integrated Secondary Synchronous Rectification DriversWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
©2020 ICPDF网 联系我们和版权申明