ADP2503ACPZ-5.0-R7 [ADI]
600 mA, 2.5 MHz Buck-Boost DC-to-DC Converter;
| 型号： | ADP2503ACPZ-5.0-R7 |
| 厂家： | 
ADI |
| 描述： | 600 mA, 2.5 MHz Buck-Boost DC-to-DC Converter 开关 光电二极管 |
| 文件： | 总16页 (文件大小：1583K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
600 mA/1000 mA, 2.5 MHz Buck-Boost
DC-to-DC Converters
Data Sheet
ADP2503/ADP2504
FEATURES
GENERAL DESCRIPTION
1 mm height profile
Compact PCB footprint
The ADP2503/ADP2504 are high efficiency, low quiescent current
step-up/step-down dc-to-dc converters that can operate at input
voltages greater than, less than, or equal to the regulated output
voltage. The power switches and synchronous rectifiers are
internal to minimize external device count. At high load currents,
the ADP2503/ADP2504 use a current-mode, fixed frequency
pulse-width modulation (PWM) control scheme for optimal
stability and transient response. To ensure the longest battery life
Seamless transition between modes
38 μA typical quiescent current
2.5 MHz operation enables 1.5 ꢀH inductor
Input voltage: 2.3 V to 5.5 V
Fixed output voltage: 2.8 V to 5.0 V
Adjustable model output voltage range: 2.8 V to 5.5 V
600 mA (ADP2503) and 1000 mA (ADP2504) output options
Boost converter configuration with load disconnect
SYNC pin with three different modes
Power save mode (PSM) for improved light load efficiency
Forced fixed frequency operation mode
Synchronization with external clock
Internal compensation
Soft start
Enable/shutdown logic input
Overtemperature protection
Short-circuit protection
in portable applications, the ADP2503/ADP2504 have an optional
power save mode that reduces the switching frequency under
light load conditions. For wireless and other low noise applica-
tions where variable frequency power save mode may cause
interference, the logic control input sync forces fixed frequency
PWM operation under all load conditions.
The ADP2503/ADP2504 can run from input voltages between
2.3 V and 5.5 V, allowing single lithium or lithium polymer cell,
multiple alkaline or NiMH cells, PCMCIA, USB, and other stan-
dard power sources. The ADP2503/ADP2504 have fixed output
options, or using the adjustable model, the output voltage can
be programmed through an external resistor divider. Compensa-
tion is internal to minimize the number of external components.
Undervoltage lockout protection
Small 10-lead 3 mm × 3 mm LFCSP (QFN) package
Supported by ADIsimPower™ design tool
During logic-controlled shutdown, the input is disconnected
from the output and draws less than 1 μA from the input source.
Operating as boost converters, the ADP2503/ADP2504 feature a
true load disconnect function that isolates the load from the
power source. Other key features include undervoltage lockout
to prevent deep battery discharge, and soft start to prevent input
current overshoot at startup.
APPLICATIONS
Wireless handsets
Digital cameras/portable audio players
Miniature hard disk power supplies
USB powered devices
TYPICAL APPLICATION CIRCUIT
1.5µH
SW1
SW2
ADP2503/ADP2504
V
V
OUT
2.8V TO 5V
IN
2.3V TO 5.5V
PVIN
VOUT
VIN
FB
10µF
22µF
1
SYNC
EN
AGND PGND
ON
OFF
1
ALLOWS THE ADP2503/ADP2504 TO OPERATE IN
THREE DIFFERENT MODES.
Figure 1.
Rev. D
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ADP2503/ADP2504
Data Sheet
TABLE OF CONTENTS
Features .............................................................................................. 1
Soft Start ...................................................................................... 11
SYNC Function........................................................................... 11
Enable........................................................................................... 11
Undervoltage Lockout ............................................................... 12
Thermal Shutdown .................................................................... 12
Short-Circuit Protection............................................................ 12
Reverse Current Limit ............................................................... 12
Applications Information.............................................................. 13
ADIsimPower Design Tool ....................................................... 13
Inductor Selection...................................................................... 13
Output Voltage Programming.................................................. 14
PCB Layout Guidelines.................................................................. 15
Outline Dimensions....................................................................... 16
Ordering Guide .......................................................................... 16
Applications....................................................................................... 1
General Description......................................................................... 1
Typical Application Circuit ............................................................. 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Absolute Maximum Ratings............................................................ 4
Thermal Data................................................................................ 4
Thermal Resistance ...................................................................... 4
ESD Caution.................................................................................. 4
Pin Configuration and Function Descriptions............................. 5
Typical Performance Characteristics ............................................. 6
Theory of Operation ...................................................................... 11
Power Save Mode........................................................................ 11
REVISION HISTORY
10/15—Rev. C to Rev. D
8/09—Rev. 0 to Rev. A
Changes to Figure 3 and Figure 4................................................... 6
Changes to Figure 15, Figure 16, and Figure 17 ........................... 8
Changes to Figure 22 and Figure 23............................................... 9
Changes to Features Section, Figure 1, and General Description
Section.................................................................................................1
Changes to Feedback Voltage Parameter and EN, SYNC
Leakage Current Parameter, Table 1 ...............................................3
Changes to Table 2 and Thermal Resistance Section ...................4
Added Thermal Data Section ..........................................................4
Changes to Figure 2 and Table 4......................................................5
Changes to Figure 12.........................................................................7
Changes to Figure 17.........................................................................8
Changes to SYNC Function Section............................................ 11
Changes to Undervoltage Lockout Section................................. 12
Changes to Table 6.......................................................................... 13
Added Output Voltage Programming Section ........................... 14
Added Figure 30; Renumbered Sequentially .............................. 14
Changes to Ordering Guide.......................................................... 16
8/13—Rev. B to Rev. C
Change to Features Section ............................................................. 1
Added ADIsimPower Design Tool Section................................. 13
Updated Outline Dimensions....................................................... 16
Changes to Ordering Guide .......................................................... 16
6/10—Rev. A to Rev. B
Changes to Ordering Guide .......................................................... 16
10/08—Revision 0: Initial Version
Rev. D | Page 2 of 16
Data Sheet
ADP2503/ADP2504
SPECIFICATIONS
VIN = 3.6 V, VOUT = 3.3 V, @ TA = TJ = −40°C to +125°C for minimum/maximum specifications and TA = 25°C for typical specifications,
unless otherwise noted.1
Table 1.
Parameters
Conditions
Min Typ
Max Unit
INPUT CHARACTERISTICS
Input Voltage Range
Undervoltage Lockout Threshold
2.3
5.5
V
V
V
VIN rising
VIN falling
2.15 2.20 2.25
2.10 2.14 2.20
OUTPUT CHARACTERISTICS
Output Voltage Range
Feedback Impedance
Feedback Voltage
Output Voltage Initial Accuracy
Load and Line Regulation
2.8
5.5
V
450
500
kΩ
mV
%
%
%
ADP2503/ADP2504 adjustable output (PWM operation, no load)
ADP2503/ADP2504 fixed output (PWM operation, no load)
VIN = 2.3 V to 3.6 V, ILOAD = 0 mA to 500 mA, forced PWM mode
VIN = 2.3 V to 5.5 V, ILOAD = 0 mA to 500 mA, forced PWM mode
490
−2
510
+2
0.5
0.6
CURRENT CHARACTERISTICS
Quiescent Current (VIN)
Shutdown Current
IOUT = 0 mA, VIN = EN = 3.6 V, device not switching
TA = TJ = −40°C to +125°C
38
0.2
50
1
μA
μA
SWITCH CHARACTERISTICS
N-Channel Switches
P-Channel Switches
VIN = 3.6 V
VIN = VOUT = 3.6 V
TJ = −40°C to +125°C
150
150
mΩ
mΩ
μA
P-Channel Leakage
1
Switch Current Limit
ADP2504
ADP2503
Reverse Current Limit
1.3
1.0
2.0
1.4
1.1
A
A
A
OSCILLATOR AND STARTUP
Oscillator Frequency
2.1
130
2.5
2.9
MHz
ns
ns
MHz
ns
On Time PMOS1 (Buck Mode)
On Time NMOS2 (Boost Mode)
SYNC Clock Frequency
SYNC Clock Minimum Off Time
LOGIC LEVEL CHARACTERISTICS
EN, SYNC Input High Threshold
EN, SYNC Input Low Threshold
EN, SYNC Leakage Current
THERMAL CHARACTERISTICS
Thermal Shutdown Threshold
Thermal Shutdown Hysteresis
Minimum duty cycle = 30%
Maximum duty cycle = 50% (×2)
200
2.8
2.2
160
1.2
−1
V
V
μA
0.4
VEN = VIN, VSYNC = VIN
+0.1 +1
150
25
°C
°C
1 All limits at temperature extremes are guaranteed via correlation using standard statistical quality control (SQC).
Rev. D | Page 3 of 16
ADP2503/ADP2504
Data Sheet
ABSOLUTE MAXIMUM RATINGS
θJA of the package is based on modeling and calculation using a
4-layer board. The junction-to-ambient thermal resistance is
highly dependent on the application and board layout. In applica-
tions where high maximum power dissipation exists, close
attention to thermal board design is required. The value of θJA
may vary, depending on PCB material, layout, and environmental
conditions. The specified values of θJA are based on a 4-layer,
4 inch × 3 inch circuit board. Refer to JEDEC JESD 51-9 for
detailed information on the board construction.
Table 2.
Parameter
Rating
PVIN, VIN, SW1, SW2, VOUT, SYNC, EN, FB
PGND to AGND
Operating Ambient Temperature Range
Operating Junction Temperature Range
Storage Temperature Range
Soldering Conditions
−0.3 V to +6 V
−0.3 V to 0.3 V
−40°C to +125°C
−40°C to +125°C
−65°C to +150°C
JEDEC J-STD-020
2000 V
ESD Human Body Model
ESD Charged Device Model
ESD Machine Model
1500 V
THERMAL RESISTANCE
100 V
θJA are specified for the worst-case conditions, that is, a device
soldered in a circuit board for surface-mount packages.
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.
Table 3.
Package Type
Unit
JA
10-Lead LFCSP (QFN)
84
°C/W
ESD CAUTION
THERMAL DATA
Absolute maximum ratings apply individually only, not in
combination.
The ADP2503/ADP2504 can be damaged when the junction
temperature limits are exceeded. Monitoring ambient tempera-
ture (TA) does not guarantee that the junction temperature (TJ)
is within the specified temperature limits. In applications with
high power dissipation and poor thermal resistance, the maximum
ambient temperature may have to be derated. In applications
with moderate power dissipation and low PCB thermal resis-
tance, the maximum ambient temperature can exceed the
maximum limit as long as the junction temperature is within
specification limits. TJ of the device is dependent on TA, the
power dissipation (PD) of the device, and the junction-to-
ambient thermal resistance (θJA) of the package. Maximum
TJ is calculated from TA and PD using the following formula:
TJ = TA + (PD × θJA)
Rev. D | Page 4 of 16
Data Sheet
ADP2503/ADP2504
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
VOUT 1
SW2 2
PGND 3
SW1 4
PVIN 5
10 FB
ADP2503/
ADP2504
9
8
7
6
AGND
VIN
TOP VIEW
SYNC
EN
(Not to scale)
NOTES
1. CONNECT THE EXPOSED PAD TO PGND.
Figure 2. Pin Configuration
Table 4. Pin Function Descriptions
Pin No.
Mnemonic
Description
1
2
VOUT
SW2
Output of the ADP2503/ADP2504. Connect the output capacitor between VOUT and PGND.
Power Switch 2 Connection. This is the internal connection to the input PMOS and NMOS switches. Connect
SW2 to the inductor with a short, wide track.
3
4
PGND
SW1
Power GND. Connect the input and output capacitors and the PGND pin to a PGND plane.
Power Switch 1 Connection. This is the internal connection to the output PMOS and NMOS switches. Connect
SW1 to the inductor with a short, wide track.
5
PVIN
Power Input. This the input to the buck-boost power switches. Place a 10 ꢀF capacitor between PVIN and
PGND as close as possible to the ADP2503/ADP2504.
6
7
EN
SYNC
Enable. Drive EN high to turn on the ADP2503/ADP2504. Bring EN low to put the device into shutdown mode.
The SYNC pin permits the ADP2503/ADP2504 to operate in three different modes.
Normal operation: with SYNC driven low, the ADP2503/ADP2504 operate at 2.5 MHz PWM mode for heavy
and medium loads, and moves to power save mode (PSM) mode for light loads.
Forced PWM operation: with SYNC driven high, the ADP2503/ADP2504 operate at fixed 2.5 MHz PWM mode
for all load conditions.
SYNC mode: to synchronize the ADP2503/ADP2504 switching to an external signal, drive this pin with a clock
between 2.2 MHz and 2.8 MHz. The SYNC signal must have on and off times greater than 160 ns.
8
9
10
VIN
AGND
FB
Analog Power Supply. This is the supply for the ADP2503/ADP2504 internal circuitry.
Analog Ground.
Output Feedback. This is an input to the internal error amplifier and must be connected to VOUT on fixed
output versions; for the adjustable model, this is the voltage feedback.
EP
Exposed pad
Connect the exposed pad to PGND.
Rev. D | Page 5 of 16
ADP2503/ADP2504
Data Sheet
TYPICAL PERFORMANCE CHARACTERISTICS
700
100
90
80
70
60
50
40
30
20
10
0
600
500
V
V
V
V
V
V
= 2.8V
= 3.3V
= 3.5V
= 4.2V
= 4.5V
= 5.0V
OUT
OUT
OUT
OUT
OUT
OUT
400
300
200
100
0
V
V
V
V
= 5.5V
= 4.2V
= 3.6V
= 2.3V
IN
IN
IN
IN
2.3
2.8
3.3
3.8
4.3
4.8
5.3
0.001
0.01
0.1
1
I
(A)
INPUT VOLTAGE (V)
OUT
Figure 3. ADP2503 Output Current vs. Input Voltage
Figure 6. Efficiency vs. Output Current, PSM and PWM Mode (VOUT = 5.0 V)
1100
1000
900
800
700
600
500
400
300
200
100
0
100
90
80
70
60
50
40
30
V
V
V
V
V
V
= 2.8V
= 3.3V
= 3.5V
= 4.2V
= 4.5V
= 5.0V
OUT
OUT
OUT
OUT
OUT
OUT
V
V
V
V
= 5.5V
= 4.2V
= 3.6V
= 2.3V
IN
IN
IN
IN
20
10
0
2.3
2.8
3.3
3.8
4.3
4.8
5.3
0.01
0.001
0.1
1
I
(A)
INPUT VOLTAGE (V)
OUT
Figure 4. ADP2504 Output Current vs. Input Voltage
Figure 7. Efficiency vs. Output Current, PWM Mode (VOUT = 3.3 V)
100
90
80
70
60
50
40
30
20
10
0
100
90
80
70
60
50
40
30
V
V
V
V
= 5.5V
= 4.2V
= 3.6V
= 2.3V
V
V
V
V
= 5.5V
= 4.2V
= 3.6V
= 2.3V
IN
IN
IN
IN
IN
IN
IN
IN
20
10
0
0.001
0.01
0.1
1
0.001
0.01
0.1
1
I
(A)
I
(A)
OUT
OUT
Figure 5. Efficiency vs. Output Current, PWM Mode (VOUT = 5.0 V)
Figure 8. Efficiency vs. Output Current, PSM and PWM Mode (VOUT = 3.3 V)
Rev. D | Page 6 of 16
Data Sheet
ADP2503/ADP2504
100
90
80
70
60
50
40
30
20
10
3.35
3.33
3.31
3.29
3.27
3.25
V
V
V
V
= 5.5V
= 4.2V
= 3.6V
= 2.3V
IN
IN
IN
IN
0
0.001
0.01
0.1
1
0
0.1
0.2
0.3
0.4
0.5
I (A)
OUT
0.6
0.7
0.8
0.9
1.0
I
(A)
OUT
Figure 9. Efficiency vs. Output Current, PWM Mode (VOUT = 2.8 V)
Figure 12. Load Regulation (VIN = 3.6 V, VOUT = 3.3 V)
100
90
80
70
60
50
40
30
2.8
2.7
2.6
2.5
2.4
2.3
2.2
–40°C
+25°C
+85°C
V
V
V
V
= 5.5V
= 4.2V
= 3.6V
= 2.3V
IN
IN
IN
IN
20
10
0
0.001
0.01
0.1
1
2.3
2.7
3.1
3.5
3.9
(V)
4.3
4.7
5.1
5.5
I
(A)
OUT
V
IN
Figure 10. Efficiency vs. Output Current, PSM and PWM Mode (VOUT = 2.8 V)
Figure 13. Frequency vs. Input Voltage Over Temperature (VOUT = 3.3 V)
100
90
80
70
60
50
40
30
50
45
40
35
30
25
20
15
10
5
I
I
I
= 500mA
= 100mA
= 10mA
OUT
OUT
OUT
20
10
0
0
2.3
2.8
3.3
3.8
4.3
4.8
5.3
2.3
2.7
3.1
3.5
3.9
(V)
4.3
4.7
5.1
5.5
V
(V)
V
IN
IN
Figure 11. Efficiency vs. Input Voltage (VOUT = 3.3 V)
Figure 14. Quiescent Current vs. Input Voltage (VOUT = 3.3 V)
Rev. D | Page 7 of 16
ADP2503/ADP2504
Data Sheet
V
V
= 3.0V TO 3.6V
IN
V
V
= 3.6V
= 3.3V
IN
OUT
= 5.0V
OUT
V
IN
V
OUT
1
2
SW2
I
OUT
4
SW1
2
3
SW1
SW2
4
3
V
OUT
1
B
B
B
CH1 50.0mV
CH2 1.00V
CH4 5.00V
M40.0µs A CH2 3.40mV
B
W
W
W
CH1 100mV
CH3 5.00V
CH2 250mA Ω M100µs
A CH2 60.0mA
W
B
T
18.20%
CH3 5.00V
B
B
W
T
W
25.80%
CH4 5.00V
W
Figure 15. Line Transient, PWM Mode (VIN = 3.0 V to 3.6 V, VOUT = 5.0 V)
Figure 18. Load Transient (VIN = 3.6 V, VOUT = 3.3 V, IOUT = 100 mA to 350 mA)
V
V
= 3.0V TO 3.6V
= 3.3V
V
V
= 3.6V
= 3.3V
IN
IN
OUT
OUT
V
IN
V
OUT
1
2
I
OUT
SW2
SW1
4
2
3
SW1
SW2
4
3
V
OUT
1
B
B
B
B
CH1 50.0mV
M40.0µs
A CH2 3.40V
CH2 1.00V
CH4 5.00V
CH1 100mV
CH2 250mA Ω M100µs
A CH2 60.0mA
W
W
W
W
B
B
B
T
18.20%
CH3 5.00V
T
23.00%
CH3 5.00V
CH4 5.00V
W
W
W
Figure 16. Line Transient, PWM Mode (VIN = 3.0 V to 3.6 V, VOUT = 3.3 V)
Figure 19. Load Transient (VIN = 3.6 V, VOUT = 3.3 V, IOUT = 10 mA to 300 mA)
V
V
= 3.0V TO 3.6V
IN
SW1
= 2.8V
OUT
V
IN
SW2
SW1
4
4
I
OUT
2
3
2
1
V
V
= 3.6V
= 3.3V
V
IN
OUT
OUT
V
OUT
1
B
B
B
B
CH1 100mV
CH2 500mA Ω M100µs
A CH2
–115mA
CH1 50.0mV
CH2 1.00V
CH4 5.00V
M40.0µs
A CH2 3.40mV
W
W
W
W
B
B
T
45.40%
T
18.20%
CH3 5.00V
CH4 2.00V
W
W
Figure 17. Line Transient, PWM Mode (VIN = 3.0 V to 3.6 V, VOUT = 2.8 V)
Figure 20. Mode Change by Load Transients, Load Rise (VIN = 3.6 V, VOUT = 3.3 V)
Rev. D | Page 8 of 16
Data Sheet
ADP2503/ADP2504
V
V
= 3.0V
IN
SW1
= 3.3V
OUT
SW2
SW1
3
4
4
I
OUT
I
SW
2
V
V
= 3.6V
= 3.3V
2
1
IN
OUT
V
OUT
V
OUT
1
B
B
CH1 100mV
CH2 500mA Ω M100µs
A CH2
410mA
CH1 20.0mV
CH3 5.00V
CH2 250mA Ω M 400ns
A CH4
2.40V
W
W
B
T
45.40%
B
B
T
50.00%
CH4 2.00V
CH4 5.00V
W
W
W
Figure 21. Mode Change by Load Transients, Load Fall (VOUT = 3.3 V)
Figure 24. Typical PWM Switching Waveform, Buck-Boost Operation
(VOUT = 3.3 V)
V
V
= 2.3V
IN
V
V
= 3.0V
= 3.3V
IN
OUT
= 4.0V
OUT
SW2
SW1
SW2
SW1
3
4
3
4
I
SW
I
SW
2
1
2
1
V
V
OUT
OUT
B
B
CH1 50.0mV
CH3 5.00V
CH2 250mA Ω M 400ns
A CH3
2.40V
CH1 100mV
CH3 5.00V
CH2 1.00A Ω
M 4.00µs
15.20%
A CH2
820mA
W
W
B
B
T
50.00%
B
B
T
CH4 5.00V
CH4 5.00V
W
W
W
W
Figure 22. Typical PWM Switching Waveform, Boost Operation (VOUT = 4.0 V)
Figure 25. Typical PSM Switching Waveform, Buck-Boost Operation
(VOUT = 3.3 V)
V
V
= 4.4V
IN
= 4.0V
OUT
SW2
SW1
SW1
4
3
4
V
= 3.3V
OUT
V
OUT
1
2
I
SW
I
SW
2
1
EN
V
OUT
3
B
B
W
B
CH1 2.00V
CH3 5.00V
CH2 500mAΩ
M 100µs
A CH3 2.40V
CH1 20.0mV
CH3 5.00V
CH2 250mA Ω M 400ns
A CH4
2.40V
W
W
B
B
T
9.400%
B
B
T
50.80%
CH4 5.00V
CH4 5.00V
W
W
W
W
Figure 26. Startup into PWM Mode (VOUT = 3.3 V, IOUT = 300 mA)
Figure 23. Typical PWM Switching Waveform, Buck Operation (VOUT = 4.0 V)
Rev. D | Page 9 of 16
ADP2503/ADP2504
Data Sheet
SW1
4
SW1
4
V
= 3.3V
OUT
V
V
V
= 3.3V
OUT
OUT
OUT
1
1
2
I
I
SW
SW
2
EN
EN
3
3
B
B
B
B
CH2 500mAΩ
W
CH1 2.00V
CH3 5.00V
CH2 500mAΩ
M 100µs
A CH3 2.40V
CH1 2.00V
CH3 5.00V
M 100µs
A CH3 2.40V
W
W
W
B
B
B
B
T
9.400%
T
9.400%
CH4 5.00V
CH4 5.00V
W
W
W
W
Figure 27. Startup into PWM Mode (VOUT = 3.3 V, IOUT = 10 mA)
Figure 28. Startup into PSM Mode (VOUT = 3.3 V, IOUT = 10 mA)
Rev. D | Page 10 of 16
Data Sheet
ADP2503/ADP2504
THEORY OF OPERATION
1.5µH
SW1
SW2
4
2
ADP2503/ADP2504
VIN
8
ADP2503/ADP2504
BIASING
VBAT = 2.3V
PMOS1
PMOS2
PVIN
VOUT
TO 5.5V
5
1
10µF
NMOS1
NMOS2
22µF
2.25V
SOFT START
UVLO
FB
10
BAND GAP
THERMAL
REFERENCE
PROTECTION
–0.5V
PWM CONTROL
EN
EN
CS
6
7
SYNC
PGND
OSCILLATOR
AGND
9
3
Figure 29. ADP2503/ADP2504 Block Diagram
The ADP2503/ADP2504 are synchronous average current-mode
switching buck-boost regulators designed to maintain a fixed
output voltage VOUT from an input supply VIN that can be
greater than, equal to, or less than VOUT. When VIN is signifi-
cantly greater than VOUT, the device is in buck mode: PMOS2 is
always active, NMOS2 is always off, and the PMOS1 and NMOS1
switches constitute a buck converter. When VIN is significantly
lower than VOUT, the device is in boost mode: PMOS1 is always
active, NMOS1 is always off, and the NMOS2 and PMOS2
switches constitute a boost converter. When VIN is in the range
[VOUT 10ꢀ%, the ADP2503/ADP2504 automatically enter the
buck-boost mode. In buck-boost mode, the two operations,
buck (PMOS1 and NMOS1 switching in antiphase) and boost
(NMOS2 and PMOS2 switching in antiphase), take place at each
period of the clock. This is aimed at maintaining the regulation
and keeping a minimal current ripple in the inductor to guaran-
tee good transient performances.
between PSM and fixed PWM, preventing oscillations between
these two modes.
SOFT START
When the ADP2503/ADP2504 are started, VOUT is ramped from
0 V to its final programmed value in 200 ꢁs (typical). This limits
the inrush current to less than 600 mA for a nominal output
capacitor of 20 ꢁF. Because the VOUT start-up slope is constant,
the inrush current becomes larger if the output capacitor is
made larger.
SYNC FUNCTION
When the SYNC pin is high, PSM is deactivated. The ADP2503/
ADP2504 always operate in PWM using the internal oscillator.
When the SYNC pin is switching in the 2.1 MHz to 2.9 MHz
range, the regulator switching frequency slides to the frequency
applied on SYNC and then locks on it. When the SYNC pin
stops switching, the regulator switching frequency slides back to
the internal oscillator frequency.
POWER SAVE MODE
When the SYNC pin is low, the ADP2503/ADP2504 can operate
in power save mode (PSM). In this mode, when the load current
becomes less than 75 mA nominally at VIN = 3.6 V, the control-
ler pulls up VOUT and then halts the switching regime until VOUT
goes back to a restart value. Then VOUT is pulled up again for a
new cycle. This minimizes the switching losses at light load. When
the load rises above 150 mA, the ADP2503/ADP2504 revert to
fixed PWM mode. This results in about 75 mA of hysteresis
ENABLE
The device starts operation with soft start when the EN pin
is brought high. Pulling the EN pin low forces the device into
shutdown, with a typical shutdown current of 0.2 μA.
In this mode, the PMOS power switches are turned off, the
NMOS power switches are turned on, and the control circuitry
is not enabled. For proper operation, the EN pin must be
terminated and must not be left floating.
Rev. D | Page 11 of 16
ADP2503/ADP2504
Data Sheet
UNDERVOLTAGE LOCKOUT
SHORT-CIRCUIT PROTECTION
The undervoltage lockout circuit prevents the device from oper-
ating incorrectly at low input voltages. It prevents the converter
from turning on the power switches under undefined conditions
and, therefore, prevents deep discharge of the battery supply.
When the nominal inductor peak current value of 1.5 A is
reached, the ADP2503/ADP2504 first switch off the NMOS2
transistor if it is active. If the current thereafter continues to
increase by an extra amount of 200 mA, the PMOS1 transistor
is also switched off. This operation is reversible when the short
circuit stops. It allows the inductor current ripple to be mini-
mized close to 1.5 A and, thus, the controller to restore VOUT
even if a high load current is maintained after the short circuit.
VIN must be greater than 2.25 V to enable the converter. During
operation, if VIN drops below 2.10 V, the ADP2503/ADP2504 are
disabled until the supply exceeds the UVLO rising threshold.
THERMAL SHUTDOWN
REVERSE CURRENT LIMIT
When the junction temperature, TJ, exceeds 150°C typical,
the device goes into thermal shutdown. In this mode, the power
switches are turned off. The device resumes operation when the
junction temperature again falls below 125°C typical.
In case of a short circuit on VOUT to a value greater than
expected, the inductor current becomes negative (reverse
current). The negative peak value is limited to 1.1 A by
deactivating the PMOS2 switch.
Rev. D | Page 12 of 16
Data Sheet
ADP2503/ADP2504
APPLICATIONS INFORMATION
Ceramic multilayer inductors can be used with lower current
designs for a reduced overall solution size and dc resistance
(DCR). These are available in low profile packages. Care must
be taken because these derate quickly as the inductor value is
increased, especially at higher operating temperatures.
ADIsimPower DESIGN TOOL
The ADP2503/ADP2504 is supported by ADIsimPower design
tool set. ADIsimPower is a collection of tools that produce
complete power designs optimized for a specific design goal.
The tools enable the user to generate a full schematic, bill of
materials, and calculate performance in minutes. ADIsimPower
can optimize designs for cost, area, efficiency, and device count
while taking into consideration the operating conditions and
limitations of the IC and all real external components. For
more information about ADIsimPower design tools, refer to
www.analog.com/ADIsimPower. The tool set is available from
this website, and users can also request an unpopulated board
through the tool.
Ferrite core inductors have good core loss characteristics as well as
reasonable dc resistance. A shielded ferrite inductor reduces the
EMI generated by the inductor.
Table 5. Sample of Recommended Inductors
Dimensions
L × W × H
(mm)
Value
Vendor (ꢀH)
DCR
(mΩ) (A)
ISAT
Device No.
DE2810C
DE2810C
Toko
Toko
Toko
Murata
Murata
TDK
1.2
1.5
1
55
60
1.7
1.5
1.8
1.6
1.5
1.5
1.2
1.7
1.3
1.5
2.8 × 2.8 × 1.0
2.8 × 2.8 × 1.0
2.5 × 2 × 1.2
2.5 × 2 × 1
INDUCTOR SELECTION
MDT2520-CN 100
The high 2.5 MHz switching frequency of the ADP2503/
ADP2504 allows for minimal output voltage ripple, while
minimizing inductor size and cost. Careful inductor selection
also optimizes efficiency and reduces electromagnetic interfe-
rence (EMI). The selection of the inductor value determines
the inductor current ripple and loop dynamics.
1
LQM2HP-G0
LQM2HP-G0
CPL2512T
CPL2512T
LPS3010
55
70
1.5
1.0
1.5
2.5 × 2 × 1
90
2.5 × 1.5 × 1.2
2.5 × 1.5 × 1.2
3.0 × 3.0 × 0.9
3.0 × 3.0 × 0.9
3.0 × 3.0 × 1.5
TDK
120
85
Coilcraft 1.0
Coilcraft 1.5
LPS3010
NR3015T1
120
40
VOUT (VIN VOUT
VIN fOSC L
)
Taiyo
1.5
IL , peak (Buck)
Yuden
Output Capacitor Selection
(VOUT VIN )
VIN
fOSC L
IL , peak (Boost)
The output capacitor selection determines the output voltage
ripple, transient response, and the loop dynamics of the
ADP2503/ADP2504. The output voltage ripple for a given
output capacitor is as follows:
VOUT
where:
OSC is the switching frequency (typically 2.5 MHz).
L is the inductor value in henries.
f
VOUT (VIN VOUT
)
A larger inductor value reduces the current ripple (and, therefore,
the peak inductor current), but is physically larger in size with
increased dc resistance. Inductor values between 1 μH and
1.5 μH are suggested. The maximum inductor value to ensure
stability is 2.0 μH. For increased efficiency with the ADP2504,
it is suggested that a 1.5 μH inductor be used.
VOUT, peak (Buck)
VOUT, peak(Boost)
VIN 8 L fOSC
2 COUT
I
LOAD(VOUT VIN )
COUT VOUT fOSC
If the ADP2503/ADP2504 are operating in buck mode, the
worst-case voltage ripple occurs for the highest input voltage,
VIN. If the ADP2503/ADP2504 are operating in boost mode, the
worst-case voltage ripple occurs for the lowest input voltage, VIN.
The inductor peak current is at the maximum in boost mode.
To determine the actual maximum inductor current in boost
mode, estimate the input dc current.
The maximum voltage overshoot, or undershoot, is inversely
proportional to the value of the output capacitor. To ensure
stability and excellent transient response, it is recommended
to use a minimum of 22 μF X5R 6.3 V or 2 × 10 μF X5R 6.3 V
capacitors at the output. The effective capacitance (includes
temperature and dc bias effects) needed for stability is 14 μF.
VOUT
VIN
1
η
IIN(MAX) ILOAD(MAX)
where η is efficiency (assume η ≈ 0.85 to 0.90).
The saturation current rating of the inductor must be at least
I
IN(MAX) + ΔILOAD/2.
Rev. D | Page 13 of 16
ADP2503/ADP2504
Data Sheet
Table 6. Recommended Output Capacitors
Dimensions
L × W × H (mm)
Vendor
Murata
TDK
Murata
TDK
Value
Device No.
2 × 10 μF, 6.3 V
2 × 10 μF, 6.3 V
22 μF, 6.3 V
22 μF, 6.3 V
22 μF, 10 V
GRM188R60J106ME47
C1608JB0J106K
GRM21BR60J226ME39
C2012X5R0J226M
C3216X5R1A226K
GRM21BR71A106KE51L
1.6 × 0.8 × 0.8 (2)
1.6 × 0.8 × 0.8 (2)
2 × 1.25 × 1.25
2 × 1.25 × 1.25
2 × 1.25 × 1.25
2 × 1.25 × 1.25 (2)
TDK
Murata
2 × 10 μF, 10 V
An example of the calculation for a required output voltage of
3.0 V follows.
Input Capacitor Selection
The ADP2503/ADP2504 require an input capacitor to filter
noise on the VIN pin, and provide the transient currents while
maintaining constant input and output voltage. A 10 μF X5R/
X7R ceramic capacitor rated for 6.3 V is the minimum recom-
mended input capacitor. Increased input capacitance reduces
the amplitude of the switching frequency ripple on the battery.
Because of the dc bias characteristics of ceramic capacitors, a
0603, 6.3 V, X5R/X7R, 10 μF ceramic capacitor is preferable.
360 k
60 k
3.0 V
0.5V
1.5µH
SW1
SW2
ADP2503/ADP2504
V
V
OUT
2.8V TO 5V
IN
Table 7. Recommended Input Capacitors
2.3V TO 5.5V
PVIN
VOUT
Dimensions
L × W × H
(mm)
R1
R2
VIN
FB
10µF
20µF
Vendor Value
Device No.
10 μF, 6.3 V GRM188R60J106ME47 1.6 × 0.8 × 0.8
10 μF, 6.3 V C1608JB0J106K 1.6 × 0.8 × 0.8
Murata
TDK
SYNC
EN
AGND PGND
OUTPUT VOLTAGE PROGRAMMING
ON
The ADP2503/ADP2504 have an adjustable model where the
output is programmed through an external resistor divider.
The resistor divider is connected between VOUT and FB and
between FB and GND; keep the combined total for the resistor
divider close to 400 kΩ. The typical voltage reference (VREF) is
500 mV and depending on the output voltage required, the
following equation can be used to calculate the value of the
resistors:
OFF
Figure 30. Typical Application Circuit for the Adjustable ADP2503/ADP2504
R1 R2
R2
VOUT
VREF
Rev. D | Page 14 of 16
Data Sheet
ADP2503/ADP2504
PCB LAYOUT GUIDELINES
Poor layout can affect ADP2503/ADP2504 performance, causing
electromagnetic interference (EMI) and electromagnetic
compatibility (EMC) performance, ground bounce, and voltage
losses. Poor layout can also affect regulation and stability. A good
layout is implemented using the following rules:
Route the output voltage path away from the inductor and
SW node to minimize noise and magnetic interference.
Maximize the size of ground metal on the component side
to help with thermal dissipation.
Use a ground plane with several vias connecting to the
component side ground to further reduce noise interference
on sensitive circuit nodes.
Place the inductor, input capacitor, and output capacitor
close to the IC using short tracks. These components carry
high switching frequencies and large tracks act like antennas.
Figure 31. ADP2503/ADP2504 Evaluation Board for Fixed Output Voltages
Rev. D | Page 15 of 16
ADP2503/ADP2504
Data Sheet
OUTLINE DIMENSIONS
2.48
2.38
2.23
3.10
3.00 SQ
2.90
0.50 BSC
6
10
PIN 1 INDEX
EXPOSED
PAD
1.74
1.64
1.49
AREA
0.50
0.40
0.30
5
1
PIN 1
INDICATOR
TOP VIEW
BOTTOM VIEW
(R 0.15)
FOR PROPER CONNECTION OF
THE EXPOSED PAD, REFER TO
THE PIN CONFIGURATION AND
FUNCTION DESCRIPTIONS
0.80
0.75
0.70
0.05 MAX
0.02 NOM
COPLANARITY
0.08
SECTION OF THIS DATA SHEET.
SEATING
PLANE
0.30
0.25
0.20
0.20 REF
Figure 32. 10-Lead Lead Frame Chip Scale Package [LFCSP_WD]
3 mm × 3 mm Body, Very Very Thin, Dual Lead
(CP-10-9)
Dimensions shown in millimeters
ORDERING GUIDE
Max
Temperature
Package
Model1, 2
Voltage Current Range
Package Description
Option
CP-10-9
CP-10-9
CP-10-9
CP-10-9
CP-10-9
CP-10-9
CP-10-9
CP-10-9
CP-10-9
CP-10-9
CP-10-9
CP-10-9
CP-10-9
CP-10-9
Branding
L9Y
L9Z
LAP
LA0
LA1
LA2
LE7
ADP2503ACPZ-2.8-R7
ADP2503ACPZ-3.3-R7
ADP2503ACPZ-3.5-R7
ADP2503ACPZ-4.2-R7
ADP2503ACPZ-4.5-R7
ADP2503ACPZ-5.0-R7
ADP2503ACPZ-R7
2.8 V
3.3 V
3.5 V
4.2 V
4.5 V
5.0 V
Adj
0.6 A
0.6 A
0.6 A
0.6 A
0.6 A
0.6 A
0.6 A
1 A
1 A
1 A
1 A
1 A
−40°C to +125°C 10-Lead Lead Frame Chip Scale Package [LFCSP_WD]
−40°C to +125°C 10-Lead Lead Frame Chip Scale Package [LFCSP_WD]
−40°C to +125°C 10-Lead Lead Frame Chip Scale Package [LFCSP_WD]
−40°C to +125°C 10-Lead Lead Frame Chip Scale Package [LFCSP_WD]
−40°C to +125°C 10-Lead Lead Frame Chip Scale Package [LFCSP_WD]
−40°C to +125°C 10-Lead Lead Frame Chip Scale Package [LFCSP_WD]
−40°C to +125°C 10-Lead Lead Frame Chip Scale Package [LFCSP_WD]
−40°C to +125°C 10-Lead Lead Frame Chip Scale Package [LFCSP_WD]
−40°C to +125°C 10-Lead Lead Frame Chip Scale Package [LFCSP_WD]
−40°C to +125°C 10-Lead Lead Frame Chip Scale Package [LFCSP_WD]
−40°C to +125°C 10-Lead Lead Frame Chip Scale Package [LFCSP_WD]
−40°C to +125°C 10-Lead Lead Frame Chip Scale Package [LFCSP_WD]
−40°C to +125°C 10-Lead Lead Frame Chip Scale Package [LFCSP_WD]
−40°C to +125°C 10-Lead Lead Frame Chip Scale Package [LFCSP_WD]
Evaluation Board for Fixed Output Voltages, 3.3 V and 5.0 V
ADP2504ACPZ-2.8-R7
ADP2504ACPZ-3.3-R7
ADP2504ACPZ-3.5-R7
ADP2504ACPZ-4.2-R7
ADP2504ACPZ-4.5-R7
ADP2504ACPZ-5.0-R7
ADP2504ACPZ-R7
ADP2503CPZ-REDYKIT
ADP2504CPZ-REDYKIT
ADP2503-EVALZ
2.8 V
3.3 V
3.5 V
4.2 V
4.5 V
5.0 V
Adj
L9T
L85
LAN
L9U
L9V
L9W
LE8
1 A
1 A
Evaluation Board for Fixed Output Voltages, 2.8 V and 5.0 V
Evaluation Board
ADP2504-EVALZ
Evaluation Board
1 Z = RoHS Compliant Part.
2 Redykit contains two evaluation boards with the stated output voltages plus three devices of each available fixed output voltage.
©2008–2015 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D07475-0-10/15(D)
Rev. D | Page 16 of 16
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