ADP8863DBCP-EVALZ_技术文档

Charge Pump, 7-Channel

Fun Lighting LED Driver

ADP8863

TYPICAL OPERATING CIRCUIT

FEATURES

V

Automated blinking and funlight timing for each LED driver

16 programmable fade in and fade out times

0.1 sec to 5.5 sec

Selectable linear, square, or cubic fade rates

7 independent and programmable LED drivers

7 drivers capable of 30 mA (maximum)

1 driver also capable of 60 mA (maximum)

Programmable maximum current limit (128 levels)

Separate and independent controls for backlight LEDs

Backlight fade override

Up to two built-in comparator inputs with programmable

modes for ambient light sensing

ALS

PHOTO

SENSOR

D1

D2

D3

D4

D5

D6

D7 CMP_IN

0.1µF

VIN

IN

1µF

C

VOUT

C

VDDIO

OUT

1µF

C1+

ADP8863

nRST

nINT

SDA

SCL

C1

1µF

C1–

C2+

C2

1µF

C2–

Charge pump with automatic gain selection of 1×, 1.5×, and

2× for maximum efficiency

GND1

GND2

Standby mode for <1 μA current consumption

I²C-compatible interface for all programming

Dedicated reset pin and built-in power-on reset (POR)

Short-circuit, overvoltage, and overtemperature protection

Internal soft start to limit inrush currents

Input-to-output isolation during faults or shutdown

Operation down to V_IN= 2.5 V with undervoltage lockout

(UVLO) at V_IN= 2.0 V

Figure 1.

Small lead frame chip scale package (LFCSP)

APPLICATIONS

LED indication

Funlight indicator lighting

Keypad backlighting

RGB LED color generation and mixing

General backlighting of small format displays

GENERAL DESCRIPTION

The ADP8863 combines a powerful charge pump driver with

advanced autonomous LED lighting features. It allows as

many as seven LEDs to be independently driven up to 30 mA

(maximum). The seventh LED can also be driven to 60 mA

(maximum). All LEDs are programmable for maximum current

and fade in/fade out times via the I²C interface.

This entire configuration is driven by a two-capacitor charge pump

with gains of 1×, 1.5×, and 2×. The charge pump is capable of

driving a maximum I_OUTof 240 mA from a supply of 2.5 V to

5.5 V. The device includes a variety of safety features including

short-circuit, overvoltage, and overtemperature protection.

These features allow easy implementation of a safe and robust

design. Additionally, input inrush currents are limited via an

integrated soft start combined with controlled input-to-output

isolation.

Additionally, automated blinking routines can be independently

programmed and enabled for all seven LED channels. These

LEDs can also be combined into groups to reduce the processor

instructions.

The ADP8863 is available in a compact lead frame chip scale

package (LFCSP).

Rev. 0

Information furnished by Analog Devices is believed to be accurate and reliable. However, no

responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other

rights of third parties that may result from its use. Specifications subject to change without notice. No

license is granted by implication or otherwise under any patent or patent rights of Analog Devices.

Trademarks and registeredtrademarks arethe property of their respective owners.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Tel: 781.329.4700

Fax: 781.461.3113

www.analog.com

ADP8863

TABLE OF CONTENTS

Features .............................................................................................. 1

Automated RGB Color Fades ................................................... 15

Backlight Operating Levels ....................................................... 16

Backlight Turn On/Turn Off/Dim........................................... 16

Automatic Dim and Turn Off Timers ..................................... 16

Fade Override ............................................................................. 17

Ambient Light Sensing .............................................................. 17

Automatic Backlight Adjustment............................................. 18

Using the ADP8863 to Drive Additional LEDs...................... 19

Operating LEDs from Alternative Supplies............................ 20

Short-Circuit Protection Mode ................................................ 21

Overvoltage Protection.............................................................. 21

Thermal Shutdown/Overtemperature Protection ................. 21

Interrupts..................................................................................... 21

Applications Information.............................................................. 23

Layout Guidelines....................................................................... 23

I²C Programming and Digital Control........................................ 24

Backlight Register Descriptions ............................................... 29

Independent Sink Register Descriptions................................. 36

Comparator Register Descriptions .......................................... 44

Outline Dimensions....................................................................... 48

Ordering Guide .......................................................................... 48

Applications....................................................................................... 1

Typical Operating Circuit................................................................ 1

General Description......................................................................... 1

Revision History ............................................................................... 2

Specifications..................................................................................... 3

I²C Timing Diagram .................................................................... 4

Absolute Maximum Ratings............................................................ 5

Maximum Temperature Ranges ................................................. 5

Thermal Resistance ...................................................................... 5

ESD Caution.................................................................................. 5

Pin Configuration and Function Descriptions............................. 6

Typical Performance Characteristics ............................................. 7

Theory of Operation ...................................................................... 11

Power Stage.................................................................................. 12

Operating Modes........................................................................ 13

LED Groupings........................................................................... 14

LED Current Settings................................................................. 14

Automated Fade In and Fade Out............................................ 14

Independent Sink Control......................................................... 15

RGB Color Generation .............................................................. 15

REVISION HISTORY

4/10—Revision 0: Initial Version

Rev. 0 | Page 2 of 48

ADP8863

SPECIFICATIONS

VIN = 3.6 V, SCL = 2.7 V, SDA = 2.7 V, nINT = open, nRST = 2.7 V, CMP_IN = 0 V, V_D1:D7= 0.4 V, Capacitor C1 = 1 μF, Capacitor C2 = 1 μF,

C_OUT= 1 μF, typical values are at T_A= 25°C and are not guaranteed, minimum and maximum limits are guaranteed from T_A= −40°C to

+85°C, unless otherwise noted.

Table 1.

Parameter

Symbol

Test Conditions/Comments

Min

Typ

Max Unit

SUPPLY

Input Voltage

Operating Range

V_IN

2.5

5.5

V

Start-Up Level

Low Level

V_IN(START)Hysteresis

UVLO Noise Filter

Quiescent Current

Prior to V_IN(START)

V_IN(START)

V_IN(STOP)

V_IN(HYS)

t_UVLO

V_INincreasing

V_INdecreasing

After startup

2.05

1.97

80

2.30

V

mV

μs

1.75

10

I_Q

I_Q(START)

I_Q(STBY)

I_Q(ACTIVE)

V_IN= V_IN(START)− 100 mV

V_IN= 3.6 V, Bit nSTBY = 0, SCL = SDA = 0 V

V_IN= 3.6 V, Bit nSTBY = 1, I_OUT= 0 mA,

gain = 2×

10

0.3

4.5

μA

mA

During Standby

After Startup and Switching

1.0

7.2

OSCILLATOR

Switching Frequency

Duty Cycle

f_SW

D

0.8

1

50

1.32 MHz

%

OUTPUT CURRENT CONTROL

Maximum Drive Current

D1 to D7

I_D1:D7(MAX)

V_D1:D7= 0.4 V

Bit SCR = 0 in the ISC7 register

T_J= 25°C

26.2

24.4

30

60

34.1 mA

T_J= −40°C to +85°C

D7 Only (60 mA Setting)

T_J= 25°C

T_J= −40°C to +85°C

LED Current Source Matching¹

All Current Sinks

D2 to D7 Current Sinks

Leakage Current on LED Pins

Equivalent Output Resistance

Gain = 1×

I_{D7(60 mA)}

V_D7= 0.4 V, Bit SCR = 1 in the ISC7 register

52.5

48.8

67

mA

I_MATCH

I_MATCH7

I_MATCH6

I_D1:D7(LKG)

R_OUT

V_D1:D7= 0.4 V

V_D2:D7= 0.4 V

V_IN= 5.5 V, V_D1:D7= 2.5 V, Bit nSTBY = 1

2.0

1.5

%

0.5

μA

V_IN= 3.6 V, I_OUT= 100 mA

V_IN= 3.1 V, I_OUT= 100 mA

V_IN= 2.5 V, I_OUT= 100 mA

V_IN= 3 V, gain = 2×, I_OUT= 10 mA

0.5

3.0

3.8

4.9

Ω

V

Gain = 1.5×

Gain = 2×

Regulated Output Voltage

AUTOMATIC GAIN SELECTION

Minimum Voltage

Gain Increases

Minimum Current Sink Headroom V_HR(MIN)

Voltage

V_OUT(REG)

4.3

5.5

V_HR(UP)

Decrease V_D1:D7until the gain switches up 162

I_DX= I_DX(MAX)× 95%

200

180

276

mV

Gain Delay

t_GAIN

The delay after gain has changed and

before gain is allowed to change again

100

μs

AMBIENT LIGHT SENSING

COMPARATORS

Ambient Light Sensor Current

DAC Bit Step

Threshold L2 Level

I_ALS

CMP_IN = V_D6= 2.8 V, Bit CMP2_SEL = 1

0.70

2.5

1.08

1.33 mA

I_L2BIT

I_L3BIT

I_L2BIT= I_ALS/250

I_L3BIT= I_ALS/2000

4.3

0.54

μA

Threshold L3 Level

FAULT PROTECTION

Start-Up Charging Current Source

I_SS

V_IN= 3.6 V, V_OUT= 0.8 × V_IN

3.75

5.5

mA

Rev. 0 | Page 3 of 48

ADP8863

Parameter

Symbol

Test Conditions/Comments

Min

Typ

Max Unit

Output Voltage Threshold

Exit Soft Start

Short-Circuit Protection

Output Overvoltage Protection

Activation Level

V_OUT

V_OUT(START)V_OUTrising

V_OUT(SC)

V_OVP

0.92 × V_IN

0.55 × V_IN

V

V_OUTfalling

5.8

V

OVP Recovery Hysteresis

Thermal Shutdown

Threshold

Hysteresis

Isolation from Input to Output

During Fault

V_OVP(HYS)

500

mV

TSD

TSD_(HYS)

I_OUTLKG

150

20

°C

μA

V_IN= 5.5 V, V_OUT= 0 V, Bit nSTBY = 0

1.5

Time to Validate a Fault

I²C INTERFACE

t_FAULT

2

μs

Operating V_DDIOVoltage

Logic Low Input²

Logic High Input³

V_DDIO

V_IL

V_IH

5.5

0.6

V

V_IN= 3.6 V

1.30

I²C TIMING SPECIFICATIONS

Guaranteed by design

Delay from Reset Deassertion to

I²C Access

t_RESET

20

μs

SCL Frequency

SCL High Time

SCL Low Time

Setup Time

f_SCL

t_HIGH

t_LOW

400

kHz

μs

0.6

1.3

Data

t_{SU, DAT}

t_{SU, STA}

t_{SU, STO}

100

0.6

ns

μs

Repeated Start

Stop Condition

Hold Time

Data

t_{HD, DAT}

t_{HD, STA}

t_BUF

0

0.6

1.3

0.9

μs

Start/Repeated Start

Bus Free Time (Stop and Start

Conditions)

Rise Time (SCL and SDA)

Fall Time (SCL and SDA)

Pulse Width of Suppressed Spike

Capacitive Load per Bus Line

t_R

t_F

t_SP

C_B

20 + 0.1 C_B

0

300

50

ns

pF

400

¹Current source matching is calculated by dividing the difference between the maximum and minimum current from the sum of the maximum and minimum.

²V_ILis a function of the input voltage. See Figure 15 in the Typical Performance Characteristics section for typical values over operating ranges.

³V_IHis a function of the input voltage. See Figure 15 in the Typical Performance Characteristics section for typical values over operating ranges.

I²C TIMING DIAGRAM

SDA

t_BUF

t_F

t_LOW

t_R

t_F

t_SP

t_{SU, DAT}

t_{HD, STA}

SCL

t_HIGH

t_{SU, STA}

t_{SU, STO}

t_{HD, DAT}

S

Sr

P

S

S = START CONDITION

Sr = REPEATED START CONDITION

P = STOP CONDITION

Figure 2. I²C Interface Timing Diagram

Rev. 0 | Page 4 of 48

ADP8863

ABSOLUTE MAXIMUM RATINGS

MAXIMUM TEMPERATURE RANGES

Table 2.

The maximum operating junction temperature (T_J(MAX)) takes

precedence over the maximum operating ambient temperature

(T_A(MAX)). Therefore, in situations where the ADP8863 is

exposed to poor thermal resistance and high power dissipation

(P_D), the maximum ambient temperature may need to be

derated. In these cases, the maximum ambient temperature can

be calculated with the following equation:

Parameter

Rating

VIN, VOUT

D1, D2, D3, D4, D5, D6, and D7

CMP_IN

nINT, nRST, SCL, and SDA

Output Short-Circuit Duration

Operating Ambient Temperature Range

Operating Junction Temperature Range

Storage Temperature Range

Soldering Conditions

−0.3 V to +6 V

Indefinite

–40°C to +85°C¹

–40°C to +125°C

–65°C to +150°C

JEDEC J-STD-020

T_A(MAX)= T_J(MAX)− (θ_JA× P_D(MAX))

THERMAL RESISTANCE

θ_JA(junction to air) is specified for the worst-case conditions,

that is, a device soldered in a circuit board for surface-mount

packages. The θ_JA, θ_JB(junction to board), and θ_JC(junction to

case) are determined according to JESD51-9 on a 4-layer

printed circuit board (PCB) with natural convection cooling.

For the LFCSP package, the exposed pad must be soldered to

the GND1 and/or GND2 terminal(s) on the board.

ESD (Electrostatic Discharge)

Human Body Model (HBM)

Charged Device Model (CDM)

3 kV

1.5 kV

¹The maximum operating junction temperature (T_J(MAX)) takes precedence

over the maximum operating ambient temperature (T_A(MAX)). See the

Maximum Temperature Ranges section for more information.

Stresses above those listed under Absolute Maximum Ratings

may cause permanent damage to the device. This is a stress

rating only; functional operation of the device at these or any

other conditions above those indicated in the operational

section of this specification is not implied. Exposure to absolute

maximum rating conditions for extended periods may affect

device reliability.

Table 3. Thermal Resistance

Package Type

θ_JA

θ_JC

Unit

20-Lead LFCSP_WQ

49.5

5.3

°C/W

ESD CAUTION

Absolute maximum ratings apply individually only, not in

combination. Unless otherwise specified, all voltages are

referenced to ground.

Rev. 0 | Page 5 of 48

ADP8863

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

15 GND1

D3 1

D2 2

D1 3

14 VIN

13 VOUT

12 C2+

11 C1+

ADP8863

TOP VIEW

(Not to Scale)

4

5

SCL

nRST

NOTES

1. CONNECT THE EXPOSED PADDLE

TO GND1 AND/OR GND2.

Figure 3. Pin Configuration

Table 4. Pin Function Descriptions

Pin No. Mnemonic Description

14

3

VIN

D1

Input Voltage, 2.5 V to 5.5 V.

LED Sink 1.

2

D2

LED Sink 2.

1

D3

LED Sink 3.

20

19

17

16

18

D4

D5

D6

D7

LED Sink 4.

LED Sink 5.

LED Sink 6. This pin can also be selected as a comparator input for the second phototransistor.

LED Sink 7.

Comparator Input for Phototransistor. When using this function, a capacitor (0.1 μF recommended) must be

connected from this pin to ground.

CMP_IN

13

11

9

VOUT

C1+

C1−

Charge Pump Output.

Charge Pump C1+.

Charge Pump C1−.

12

10

15

8

6

5

C2+

C2−

GND1

GND2

nINT

nRST

Charge Pump C2+.

Charge Pump C2−.

Ground. Connect the exposed pad to GND1 and/or GND2.

Processor Interrupt (Active Low). Requires an external pull-up resistor. If this pin is not used, it can be left floating.

Hardware Reset (Active Low). This pin resets the device to the default conditions. If not used, this pin must be tied

above V_IH(MIN)

.

7

4

SDA

SCL

I²C Serial Data. Requires an external pull-up resistor.

I²C Clock. Requires an external pull-up resistor.

21

EPAD

Exposed Paddle. Connect the exposed paddle to GND1 and/or GND2.

Rev. 0 | Page 6 of 48

ADP8863

TYPICAL PERFORMANCE CHARACTERISTICS

VIN = 3.6 V, SCL = 2.7 V, SDA = 2.7 V, nRST = 2.7 V, V_D1:D7= 0.4 V, C_IN= 1 μF, Capacitor C1 = 1 μF, Capacitor C2 = 1 μF, C_OUT= 1 μF,

T_A= 25°C, unless otherwise noted.

2.0

1.8

1.6

1.4

1.2

1.0

0.8

0.6

0.4

0.2

0

35

30

25

20

15

10

5

V

= 3.6V

= 30mA

IN

I

= NO LOAD

OUT

I

D1:D7

D1

D2

D3

D4

D5

D6

D7

–40°C

+25°C

+85°C

+105°C

0

1.5

2.0

2.5

3.0

3.5

(V)

4.0

4.5

5.0

5.5

0

0.2

0.4

0.6

0.8

1.0

V (V)

HR

1.2

1.4

1.6

1.8

2.0

V

IN

Figure 4. Typical Quiescent Current, G = 1×

Figure 7. Typical Diode Current vs. Current Sink Headroom Voltage (V_HR)

5.0

4.5

4.0

3.5

3.0

2.5

2.0

1.5

1.0

0.5

0

35

V

= 0.4V

D1:D7

I

= NO LOAD

OUT

34

33

32

31

30

29

28

27

26

25

D1

D2

D3

D4

D5

D6

D7

–40°C

+25°C

+85°C

+105°C

1.5

2.0

2.5

3.0

3.5

(V)

4.0

4.5

5.0

5.5

2.0

2.5

3.0

3.5

4.0

(V)

4.5

5.0

5.5

V

IN

Figure 5. Typical Quiescent Current, G = 2×, I_Q(ACTIVE)

Figure 8. Typical Diode Matching vs. V_IN

10

6

5

4

3

2

1

0

SCL = SDA = 0V

V

= 3.6V

= 30mA

–40°C

+25°C

+85°C

+105°C

IN

nRST = 2.7V

I

D1:D7

1

0.1

0.01

0.001

–40°C

+25°C

+85°C

+105°C

0

1

2

3

4

5

6

0.2

0.4

0.6

0.8

1.0

V

1.2

(V)

1.4

1.6

1.8

2.0

V

(V)

IN

HR

Figure 6. Typical Standby I_Qvs. V_IN

Figure 9. Typical Diode Matching vs. Current Sink Headroom Voltage (V_HR)

Rev. 0 | Page 7 of 48

ADP8863

35

1.0

0.9

0.8

0.7

0.6

0.5

0.4

0.3

0.2

0.1

0

V

= 3.6V

= 30mA

I

= 100mA

OUT

IN

I

D1:D7

30

25

20

15

10

5

–40°C

+25°C

+85°C

+105°C

–40°C

+25°C

+85°C

+105°C

0

0.2

0.4

0.6

0.8

1.0

(V)

1.2

1.4

1.6

1.8

2.0

2.5

3.0

3.5

4.0

(V)

4.5

5.0

5.5

V

IN

HR

Figure 10. Typical Diode Current vs. Current Sink Headroom Voltage (V_HR

)

Figure 13. Typical R_OUT(G = 1×) vs. V_IN

1

10

9

8

7

6

5

4

3

2

1

0

V

= 3.6V

= 0.40V

V

= 80% OF V

OUT IN

IN

D1:D7

0

–1

–2

–3

–4

–5

–6

–40°C

+25°C

+85°C

+105°C

–40

–10

20

50

80

110

2.0

2.5

3.0

3.5

4.0

(V)

4.5

5.0

5.5

JUNCTION TEMPERATURE (°C)

V

IN

Figure 14. Typical Output Soft Start Current, I_SS

Figure 11. Typical Change In Diode Current vs. Temperature

1.4

1.2

1.0

0.8

0.6

0.4

0.2

0

7

I

= 100mA

OUT

V

@ +25°C

@ +85°C

@ –40°C

IH

6

5

4

3

2

1

0

G = 2× @ V = 2.5V

IN

V

@ +25°C

IL

@ +85°C

@ –40°C

G = 1.5× @ V = 3V

IN

G = 1× @ V = 3.6V

IN

2.5

3.0

3.5

4.0

(V)

4.5

5.0

5.5

–40

–20

0

20

40

60

80

100

V

TEMPERATURE (°C)

IN

Figure 15. Typical I²C Thresholds, V_IHand V_IL

Figure 12. R_OUTvs. Temperature

Rev. 0 | Page 8 of 48

ADP8863

1.4

1.3

1.2

1.1

1.0

0.9

0.8

0.7

90

80

70

60

50

40

30

20

10

0

450

400

350

300

250

200

150

100

50

–40°C

+25°C

+85°C

+105°C

I

= 140mA, Vf = 3.1V

= 210mA, Vf = 3.2V

OUT

2.5

3.0

3.5

4.0

(V)

4.5

5.0

5.5

110

0

5.5

2.5

3.0

3.5

4.0

(V)

4.5

5.0

V

IN

V

IN

Figure 16. Typical ALS Current, I_ALS

Figure 19. Typical Efficiency (Low Vf Diode)

5.5

5.4

5.3

5.2

5.1

5.0

4.9

4.8

4.7

4.6

4.5

100

90

80

70

60

50

40

30

20

10

0

450

400

350

300

250

200

150

100

50

V

= 3V

IN

GAIN = 2×

= 10mA

I

OUT

I

= 140mA, Vf = 3.85V

= 210mA, Vf = 4.25V

OUT

–40

–10

20

50

80

0

5.5

JUNCTION TEMPERATURE (°C)

2.5

3.0

3.5

4.0

(V)

4.5

5.0

V

IN

Figure 17. Typical Regulated Output Voltage (V_OUT(REG)

)

Figure 20. Typical Efficiency (High Vf Diode)

6.0

5.8

5.6

5.4

5.2

T

V

(AC-COUPLED) 50mV/DIV

IN

1

OVP THRESHOLD

V

(AC-COUPLED) 50mV/DIV

OUT

2

3

I

(AC-COUPLED) 10mA/DIV

IN

C

= 1µF, C

OUT

= 1µF, C1 = 1µF, C2 = 1µF

OVP RECOVERY

80

IN

V

= 3.6V

= 120mA

500ns/DIV

I

OUT

–40

–10

20

50

JUNCTION TEMPERATURE (°C)

Figure 18. Typical Overvoltage Protection (OVP) Threshold

Figure 21. Typical Operating Waveforms, G = 1×

Rev. 0 | Page 9 of 48

ADP8863

T

C

= 10pF, C

= 1µF

IN

OUT

C1 = 1µF, C2 = 1µF

V

(AC-COUPLED) 50mV/DIV

IN

V

I

= 3.7V

= 30mA

IN

1

2

3

OUT

(ONE DIODE AT

MAX CURRENT)

V

(1V/DIV)

OUT

V

(AC-COUPLED) 50mV/DIV

OUT

2

I (10mA/DIV)

IN

I

(AC-COUPLED) 10mA/DIV

IN

= 1µF, C1 = 1µF, C2 = 1µF

OUT

C

V

= 1µF, C

= 3.0V

= 120mA

IN

4

500ns/DIV

I (10mA/DIV)

OUT

100µs/DIV

I

OUT

Figure 22. Typical Operating Waveforms, G = 1.5×

Figure 24. Typical Start-Up Waveform

T

V

(AC-COUPLED) 50mV/DIV

IN

1

2

3

V

(AC-COUPLED) 50mV/DIV

OUT

I

(AC-COUPLED) 10mA/DIV

IN

= 1µF, C1 = 1µF, C2 = 1µF

OUT

C

V

= 1µF, C

= 2.5V

IN

500ns/DIV

I

= 120mA

OUT

Figure 23. Typical Operating Waveforms, G = 2×

Rev. 0 | Page 10 of 48

ADP8863

THEORY OF OPERATION

The ADP8863 combines a powerful LED charge pump driver

with independent control of up to seven LEDs. These LED

drivers can sink up to 30 mA (typical) on six channels. The

seventh LED can also be driven to 60 mA (typical). All LEDs

can be individually programmed or combined into a group to

operate backlight LEDs. A full set of safety features, including

short-circuit, overvoltage, and overtemperature protection with

input-to-output isolation, allows for a robust and safe design.

The integrated soft start limits inrush currents at startup, restart

attempts, and gain transitions.

V

ALS

OPTIONAL

PHOTOSENSOR

D1

D4

D5

D2

D3

D6

D7

CMP_IN

GAIN

SELECT

LOGIC

V

IN

ID1

ID3

ID2

ID4

ID5

ID6

ID7

PHOTOSENSOR

CONVERSION

I

SS

VIN

SOFT START

CHARGE

PUMP

LOGIC

V

REFS

VBAT

C

VIN

IN

VOUT

I

REFS

UVLO

STNDBY

C

OUT

VDDIO

EN

CLK

NOISE FILTER

50µs

C1+

C1

1µF

LIGHT

SENSOR

LOGIC

nRST

CHARGE

PUMP

(1×, 1.5×, 2×)

C1–

C2+

RESET

STANDBY

C2

1µF

SCL

SDA

2

I C

C2–

LOGIC

SWITCH CONTROL

CURRENT SINK CONTROL

nINT

GND1

GND2

Figure 25. Detailed Block Diagram

Rev. 0 | Page 11 of 48

ADP8863

in parallel and are discharged to V_OUTin parallel. In certain fault

modes, the switches are opened and the output is physically

isolated from the input.

POWER STAGE

Because typical white LEDs require up to 4 V to drive them,

some form of boosting is required over the typical variation in

battery voltage. The ADP8863 accomplishes this with a high

efficiency charge pump capable of producing a maximum I_OUT

of 240 mA over the entire input voltage range (2.5 V to 5.5 V).

Charge pumps use the basic principle that a capacitor stores

charge based on the voltage applied to it, as shown in the

following equation:

Automatic Gain Selection

Each LED that is driven requires a current source. The voltage

on this current source must be greater than a minimum head-

room voltage (200 mV typical) to maintain accurate current

regulation. The gain is automatically selected based on the

minimum voltage (V_DX) at all of the current sources. At startup,

the device is placed into G = 1× mode and the output charges

to V_IN. If any V_DXlevel is less than the required headroom

(200 mV), the gain is increased to the next step (G = 1.5×).

A 100 μs delay is allowed for the output to stabilize prior to

the next gain switching decision. If there remains insufficient

current sink headroom, then the gain is increased again to 2×.

Conversely, to optimize efficiency, it is not desirable for the

output voltage to be too high. Therefore, the gain reduces when

the headroom voltage is great enough. This point (labeled

Q = C × V

(1)

By charging the capacitors in different configurations, the

charge, and therefore the gain, can be optimized to deliver the

voltage required to power the LEDs. Because a fixed charging

and discharging combination must be used, only certain

multiples of gain are available. The ADP8863 is capable of

automatically optimizing the gain (G) from 1×, 1.5×, and 2×.

These gains are accomplished with two capacitors (labeled C1

and C2 in Figure 25) and an internal switching network.

V

_DMAXin Figure 26) is internally calculated to ensure that the

In G = 1× mode, the switches are configured to pass VIN

directly to VOUT. In this mode, several switches are connected

in parallel to minimize the resistive drop from input to output.

In G = 1.5× and 2× modes, the switches alternatively charge

from the battery and discharge into the output. For G = 1.5×,

the capacitors are charged from V_INin series and are discharged to

lower gain still results in ample headroom for all the current

sinks. The entire cycle is illustrated in Figure 26.

Note that the gain selection criteria apply only to active current

sources. If current sources have been deactivated through an

I²C command (for example, only five LEDs are used), then the

voltages on the deactivated current sources are ignored.

V_OUTin parallel. For G = 2×, the capacitors are charged from V_IN

STARTUP:

CHARGE

EXIT STANDBY

STANDBY

V

TO V

IN

OUT

0

1

EXIT

STARTUP

VOUT > V

OUT(START)

0

WAIT

100µs (TYP)

MIN (V

D1:D7

) < V

G = 1

HR(UP)

0

WAIT

100µs (TYP)

G = 1.5

MIN (V

D1:D7

) < V

HR(UP)

MIN (V

D1:D7

) > V

DMAX

0

WAIT

100µs (TYP)

MIN (V

D1:D7

) < V

DMAX

G = 2

NOTES

1. V

IS THE CALCULATED GAIN DOWN TRANSITION POINT.

DMAX

Figure 26. State Diagram for Automatic Gain Selection

Rev. 0 | Page 12 of 48

ADP8863

Soft Start Feature

Shutdown Mode

At startup (either from UVLO activation or fault/standby

recovery), the output is first charged by I_SS(3.75 mA typical)

until it reaches about 92% of V_IN. This soft start feature reduces

the inrush current that is otherwise present when the output

capacitance is initially charged to V_IN. When this point is

reached, the controller enters G = 1× mode. If the output

voltage is not sufficient, then the automatic gain selection

determines the optimal point as defined in the Automatic Gain

Selection section.

Shutdown mode disables all circuitry, including the I²C receivers.

Shutdown occurs when V_INis below the undervoltage thresholds.

When V_INrises above V_IN(START)(2.05 V typical), all registers are

reset and the part is placed into standby mode.

Reset Mode

In reset mode, all registers are set to their default values and

the part is placed into standby. There are two ways to reset the

part: by power-on reset (POR) or using the nRST pin. POR is

activated any time that the part exits shutdown mode. After a

POR sequence is complete, the part automatically enters

standby mode.

OPERATING MODES

There are four different operating modes: active, standby,

shutdown, and reset.

After startup, the part can be reset by pulling the nRST pin low.

As long as the nRST pin is low, the part is held in a standby

state, but no I²C commands are acknowledged (all registers are

kept at their default values). After releasing the nRST pin, all

registers remain at their default values, and the part remains in

standby; however, the part does accept I²C commands.

Active Mode

In active mode, all circuits are powered up and in a fully

operational state. This mode is entered when Bit nSTBY (in

Register MDCR) is set to 1.

Standby Mode

The nRST pin has a 50 μs (typical) noise filter to prevent inad-

vertent activation of the reset function. The nRST pin must be

held low for this entire time to activate reset.

Standby mode disables all circuitry except for the I²C receivers.

Current consumption is reduced to less than 1 μA. This mode is

entered when the nSTBY bit is set to 0 or when the nRST pin is

held low for more than 100 μs (maximum). When standby is

exited, a soft start sequence is performed.

The operating modes function according to the timing diagram

in Figure 27.

SHUTDOWN

V

nRST MUST BE HIGH FOR 20µs (MAX)

BEFORE SENDING I C COMMANDS

V

CROSSES ~2.05V AND TRIGGERS POWER-ON RESET

IN

2

BIT nSTBY IN REGISTER

MDCR GOES LOW

~100µs DELAY BETWEEN POWER-UP AND

WHEN I C COMMANDS CAN BE RECEIVED

STANDBY

nRST

2

nRST IS LOW, WHICH FORCES STANDBY

25µs TO 100µs NOISE FILTER

2

LOW AND RESETS ALL I C REGISTERS

2×

~3.75mA CHARGES

1.5×

V

OUT

GAIN CHANGES OCCUR ONLY WHEN NECESSARY,

BUT HAVE A MIN TIME BEFORE CHANGING

V

TO V LEVEL

IN

V

OUT

1×

IN

SOFT START

10µs 100µs

Figure 27. Typical Timing Diagram

Rev. 0 | Page 13 of 48

ADP8863

30

25

20

15

10

5

LED GROUPINGS

Each LED can respond individually or be grouped together

into the backlight controls. By default, all LEDs are set to be

part of the backlight. This is changed by setting Bits[6:0] in

Register 0x05. LEDs that are set up as independent sinks can

be enabled individually in Register 0x10. They can also all be

enabled simultaneously via the SIS_EN bit in Register 0x01.

Any LEDs configured for the backlight can only be enabled

via the BL_EN bit in Register 0x01.

LINEAR

SQUARE

LED CURRENT SETTINGS

Any of the LED outputs (Pin D1 to Pin D7) can be used to

drive any color of LED at 0 mA to 30 mA, provided that the

LED’s Vf is less than 4.1 V. Additionally, the D7 sink can regu-

late up to 60 mA. The current settings are determined by a

7-bit code programmed by the user into Register 0x14 through

Register 0x1A (for the independent sinks) and Register 0x09 to

Register 0x0E (for the backlight sinks). The 7-bit resolution

allows the user to set the LED to one of 128 different levels.

0

32

64

CODE

96

128

Figure 28. LED Current vs. Input Code

AUTOMATED FADE IN AND FADE OUT

The LED drivers are easily configured for automated fade in

and fade out. Sixteen fade in and fade out rates can be selected

via the I²C interface. Fade in and fade out rates range from

0.0 sec to 5.5 sec (per full-scale current, either 30 mA or 60 mA).

The backlight LEDs have separate fade in and fade out time

controls from the independent sink LEDs.

The ADP8863 can implement two distinct algorithms to

achieve a linear or a nonlinear relationship between input

code and diode output current. The law and SC_LAW bits

in Register 0x04 and Register 0x0F, respectively, are used to

change between these algorithms.

Table 5. Available Fade In and Fade Out Rates

Code

0000

0001

0010

0011

0100

0101

0110

0111

1000

1001

1010

1011

1100

1101

1110

1111

Fade Rate (in sec per Full-Scale Current)

By default, the ADP8863 uses a linear algorithm (law and

SC_LAW = 00), where the LED current increases linearly for

a corresponding increase in input code. LED current (in

milliamperes) is determined by the following equation:

0.0 (disabled)

0.3

0.6

0.9

1.2

1.5

1.8

2.1

2.4

2.7

3.0

3.5

4.0

4.5

5.0

5.5

LED Current (mA) = Code × (Full-Scale Current/127)

where:

(2)

Code is the input code programmed by the user.

Full-Scale Current is the maximum sink current allowed per

LED (typically 30 mA).

The ADP8863 can also implement a nonlinear (square

approximation) relationship between input code and LED

current. In this case (law and SC_LAW = 01, 10, or 11), the LED

current (in milliamperes) is determined by the following

equation:

2

⎛

⎞

⎟

Full − Scale Current

⎜

LED Current (mA) = Code×

(3)

⎜

⎟

⎠

The fade profile is based on the transfer law selected (linear,

square, Cubic 10, or Cubic 11) and the delta between the actual

current and the target current. Smaller changes in current

reduce the fade time. For linear and square law fades, the fade

time is given by

127

⎝

Figure 28 shows the LED current level vs. input code for both

the linear and square law algorithms.

Fade Time = Fade Rate × (Code/127)

where the Fade Rate is shown in Table 5.

(4)

Rev. 0 | Page 14 of 48

ADP8863

ISCx

The Cubic 10 and Cubic 11 laws also use the square law LED

currents derived from Equation 3; however, the time between

each step is varied to produce a steeper slope at higher currents

and a shallower slope at lower currents (see Figure 29).

30

ON TIME

FADE-IN

FADE-OUT FADE-IN

FADE-OUT

MAX

25

LINEAR

OFF

TIME

20

15

SCx_EN

SET BY USER

SQUARE

10

Figure 30. Independent Sink Blink Mode with Fading

CUBIC 11

5

RGB COLOR GENERATION

CUBIC 10

0.75

The ADP8863 is easily programmed to generate any color with

an RGB LED. To configure this feature, connect each LED in a

standard RGB diode to a separate driver on the ADP8863.

Because each channel can be programmed for a different

current level, setting the currents for all three LEDs generates

the desired color. To set the current levels, use a simple RGB

color selector (see Figure 31).

0

0.25

0.50

1.00

UNIT FADE TIME

Figure 29. Comparison of the Dimming Transfers Laws

Each LED can be enabled independently and has its own

current level, but all LEDs share the same fade in rates, fade out

rates, and fade law.

INDEPENDENT SINK CONTROL

Each of the seven LEDs can be configured (in Register 0x05) to

operate as either part of the backlight or to operate as an indepen-

dent sink current (ISC). Each ISC can be enabled independently

and has its own current level. All ISCs share the same fade in

rates, fade out rates, and fade law.

The ISCs have additional timers to facilitate blinking functions.

A shared on timer (SCON) in conjunction with the off timer of

each ISC (SC1OFF, SC2OFF, SC3OFF, SC4OFF, SC5OFF, SC6OFF,

and SC7OFF) allows the LED current sinks to be configured in

various blinking modes. The on timer can be set to one of four

different settings: 0.2 sec, 0.6 sec, 0.8 sec, or 1.2 sec. The off

timers have four different settings: disabled, 0.6 sec, 1.2 sec, and

1.8 sec. Blink mode is activated by setting the off timers to any

setting other than disabled.

Figure 31. Standard RGB Color Generator

The example in Figure 31 shows a color of green, which is gener-

ated with a red content of 18 (out of 255), a green content of

190, and a blue content of 96. All numbers are out of a maximum

of 255. Thus, the percentage of red is 7.1%, the percentage of

green is 74.5%, and the percentage of blue is 37.6%. To generate

the color with the ADP8863, scale this value to each of the current

drivers.

Program all fade, on, and off timers before enabling any of the

LED current sinks. If ISCx is on during a blink cycle and

SCx_EN is cleared, the LED turns off (or fades to off if fade out

is enabled). If ISCx is off during a blink cycle and SCx_EN is

cleared, it stays off.

AUTOMATED RGB COLOR FADES

The ADP8863 is easily programmed to cycle through RGB

generated colors. This can be either a repeating or a random

pattern of one color fading into the other. To execute this cycle

autonomously, set up the RGB LEDs as described in the RGB

Color Generation section and program the on, off, fading times,

and current intensities. Adjusting the fading time in particular

can create any pattern from a fast, striking effect to a soothing

slow color change.

Rev. 0 | Page 15 of 48

ADP8863

BACKLIGHT

CURRENT

BACKLIGHT OPERATING LEVELS

Backlight brightness control operates at three distinct levels:

daylight (L1), office (L2), and dark (L3). The BLV bits in

Register 0x04 control the specific level at which the backlight

operates. These bits can be changed manually or, if in automatic

mode (CMP_AUTOEN is set high in Register 0x01), by the

ambient light sensor (see the Ambient Light Sensing section).

MAX

DIM

By default, the backlight operates at daylight level (BLV = 00),

where the maximum brightness is set using Register 0x09

(BLMX1). A daylight dim setting can also be set using Register

0x0A (BLDM1). When operating at office level (BLV = 01), the

backlight maximum and dim brightness settings are set using

Register 0x0B (BLMX2) and Register 0x0C (BLDM2). When

operating at the dark level (BLV = 10), the backlight maximum

and dim brightness settings are set using Register 0x0D (BLMX3)

and Register 0x0E (BLDM3).

BL_EN = 1 DIM_EN = 1 DIM_EN = 0 BL_EN = 0

Figure 34. Backlight Turn On/Dim/Turn Off

The maximum and dim settings can be set from 0 mA to 30 mA;

therefore, it is possible to program a dim setting that is greater

than a maximum setting. For normal expected operation,

ensure that the dim setting is programmed to be less than the

maximum setting.

DAYLIGHT (L1)

OFFICE (L2)

DARK (L3)

30mA

AUTOMATIC DIM AND TURN OFF TIMERS

DAYLIGHT_MAX

The user can program the backlight to dim automatically by

using the DIMT bits in Register 0x07. The dim timer has 127

settings ranging from 1 sec to 127 sec. Program the dim timer

(DIMT) before turning on the backlight. If BL_EN = 1, the

backlight turns on to its maximum setting and the dim timer

starts counting. When the dim timer expires, the internal state

machine sets DIM_EN = 1, and the backlight enters its dim

setting.

OFFICE_MAX

DARK_MAX

DAYLIGHT_DIM

OFFICE_DIM

DARK_DIM

0

BACKLIGHT OPERATING LEVELS

BACKLIGHT

CURRENT

Figure 32. Backlight Operating Levels

DIM TIMER

RUNNING

DIM TIMER

RUNNING

BACKLIGHT TURN ON/TURN OFF/DIM

MAX

With the device in active mode (nSTBY = 1), the backlight can

be turned on using the BL_EN bit in Register 0x01. Before

turning on the backlight, select the level (daylight (L1), office

(L2), or dark (L3)) to operate in and ensure that maximum and

dim settings are programmed for that level. The backlight turns

on when BL_EN = 1. The backlight turns off when BL_EN = 0.

DIM

BACKLIGHT

CURRENT

BL_EN = 1 DIM_EN = 1

DIM_EN = 0 DIM_EN = 1 BL_EN = 0

MAX

SET BY USER

SET BY INTERNAL STATEMACHINE

Figure 35. Dim Timer

If the user clears the DIM_EN bit, the backlight reverts to its

maximum setting and the dim timer begins counting again.

When the dim timer expires, the internal state machine again

sets DIM_EN = 1, and the backlight enters its dim setting. The

backlight can be turned off at any point during the dim timer

countdown by clearing BL_EN.

BL_EN = 1

BL_EN = 0

Figure 33. Backlight Turn On/Turn Off

While the backlight is on (BL_EN = 1), the user can change to

the dim setting by programming DIM_EN = 1 in Register 0x01.

If DIM_EN = 0, the backlight reverts to its maximum setting.

The user can also program the backlight to turn off automati-

cally by using the OFFT bits in Register 0x06. The off timer has

127 settings ranging from 1 sec to 127 sec. Program the off

timer (OFFT) before turning on the backlight. If BL_EN = 1,

the backlight turns on to its maximum setting and the off timer

Rev. 0 | Page 16 of 48

ADP8863

BACKLIGHT

CURRENT

starts counting. When the off timer expires, the internal state

machine clears the BL_EN bit, and the backlight turns off.

BACKLIGHT

FADE-IN

OVERRIDDEN

FADE-OUT

OVERRIDDEN

OFF TIMER

CURRENT

MAX

RUNNING

MAX

BL_EN = 1

BL_EN = 0

(REASSERTED)

BL_EN = 1

Figure 38. Fade Override Function (FOVR Is High)

BL_EN = 1 BL_EN = 0

SET BY USER

SET BY INTERNAL STATE MACHINE

AMBIENT LIGHT SENSING

Figure 36. Off Timer

The ADP8863 integrates two ambient light sensing compara-

tors. One of the ambient light sensing comparator pins

(CMP_IN) is always available. The second pin (D6) has an

ambient light sensor comparator (CMP_IN2) that can be

activated rather than connecting an LED to D6. Activating

the CMP_IN2 function of the pin is accomplished through the

CMP2_SEL bit in Register CFGR. Therefore, when the CMP2_

SEL bit is set to 0, Pin D6 is programmed as a current sink.

When the CMP2_SEL bit is set to 1, Pin D6 becomes the input

for a second phototransistor.

The backlight can be turned off at any point during the off

timer countdown by clearing BL_EN.

The dim timer and off timer can be used together for sequential

maximum-to-dim-to-off functionality. With both the dim and

off timers programmed, and BL_EN asserted, the backlight turns

on to its maximum setting, and when the dim timer expires, the

backlight changes to its dim setting. When the off timer expires,

the backlight turns off.

BACKLIGHT

CURRENT

DIM TIMER

These comparators have two programmable trip points (L2 and

L3) that select one of the three backlight operation modes

(daylight, office, and dark) based on the ambient lighting

conditions.

RUNNING

MAX

The L3 comparator controls the dark-to-office mode transition.

The L2 comparator controls the office-to-daylight transition

(see Figure 39). The currents for the different lighting modes

are defined in the BLMXx and BLDMx registers (see the

Backlight Operating Levels Section).

OFF TIMER

RUNNING

DIM

L2_OUT = 1

L3_OUT = 1

L2_OUT = 1

L3_OUT = 0

L2_OUT = 0

L3_OUT = 0

BL_EN = 1

DIM_EN = 1

BL_EN = 0

SET BY USER

SET BY INTERNAL STATE MACHINE

Figure 37. Dim and Off Timers Used Together

0 LUX

0A

FADE OVERRIDE

DARK

OFFICE

DAYLIGHT

A fade override feature (FOVR in Register CFGR (0x04)) enables

the host to override the preprogrammed fade in or fade out

settings. If FOVR is set and the backlight is enabled in the

middle of a fade out process, the backlight instantly (within

approximately 100 ms) returns to its maximum setting. Alter-

natively, if the backlight is fading in, reasserting BL_EN overrides

the programmed fade in time, and the backlight instantly goes

to its final fade value. This is useful for situations in which a key

is pressed during a fade sequence. However, if FOVR is cleared

and the backlight is enabled in the middle of a fade process, the

backlight gradually brightens from where it was interrupted (it

does not go down to 0 and then comes back on).

L3

L2

BRIGHTNESS

Figure 39. Light Sensor Modes Based on the Detected Ambient Light Level

Each light sensor comparator uses an external capacitor together

with an internal reference current source to form an analog-to-

digital converter (ADC) that samples the output of the external

photosensor. The ADC result is fed into two programmable trip

comparators. The ADC has an input range of 0 ꢀA to 1080 ꢀA

(typical).

Rev. 0 | Page 17 of 48

ADP8863

L2_EN

ware may select the comparator of the phototransistor that is

exposed to higher light intensity to control the transition

between the programmed backlight intensity levels.

L2_TRIP

L2_HYS

L2_OUT

The L2_CMPR and L3_CMPR comparators can be enabled

independently of each other, or they can operate simultaneously. A

single conversion from each ADC takes 80 ms (typical). When

CMP_AUTOEN is set for automatic backlight adjustment (see

the Automatic Backlight Adjustment section), the ADC and

comparators run continuously. If the backlight is disabled and

at least one independent sink is enabled, it is possible to use the

light sensor comparators in a single-shot mode. A single-shot read

of the photocomparators is performed by setting the FORCE_RD

bit in Register 0x1B. After the single-shot measurement is com-

pleted, the internal state machine clears the FORCE_RD bit.

FILTER

SETTINGS

PHOTO

SENSOR

OUTPUT

ADC

L3_TRIP

L3_HYS

L3_OUT

L3_EN

Figure 40. Ambient Light Sensing and Trip Comparators

The L2 comparator, L2_CMPR, detects when the photosensor

output has dropped below the programmable L2_TRP point

(Register 0x1D). If this event occurs, then the L2_OUT status

signal is set. L2_CMPR contains programmable hysteresis,

meaning that the photosensor output must rise above L2_TRP +

L2_HYS before L2_OUT clears. L2_CMPR is enabled via the

L2_EN bit. The L2_TRP and L2_HYS values of L2_CMPR can

be set between 0 ꢀA and 1080 ꢀA (typical) in steps of 4.3 ꢀA

(typical).

The interrupt flags (CMP_INT and CMP_INT2) can be used to

notify the system when either L2 or L3 changes state. See the

Interrupts section for more information.

AUTOMATIC BACKLIGHT ADJUSTMENT

The ambient light sensor comparators can automatically transi-

tion the backlight between one of its three operating levels. To

enable this mode, set the CMP_AUTOEN bit in Register 0x01.

When I²C selection is enabled, the internal state machine takes

control of the BLV bits and changes them based on the L2_OUT

and L3_OUT status bits. When L2_OUT is set high, it indicates

that the ambient light conditions have dropped below the

L2_TRP point and that the backlight should move to its office

(L2) level. When L3_OUT is set high, it indicates that ambient light

conditions have dropped below the L3_TRP point and that the

backlight should move to its dark (L3) level. Table 6 shows the

relationship between backlight operation and the ambient light

sensor comparator outputs.

The L3 comparator, L3_CMPR, detects when the photosensor

output drops below the programmable L3_TRP point (Register

0x1F). If this event occurs, the L3_OUT status signal is set.

L3_CMPR contains programmable hysteresis, meaning that the

photosensor output must rise above L3_TRP + L3_HYS before

L3_OUT clears. L3_CMPR is enabled via the L3_EN bit. The

L3_TRP and L3_HYS values of L3_CMPR can be set between

0 ꢀA and 137.7 ꢀA (typical) in steps of 0.54 ꢀA (typical).

L2_TRP

L2_HYS

The L3_OUT status bit has greater priority; therefore, if

L3_OUT is set, the backlight operates at L3 (dark) even if

L2_OUT is also set.

L3_TRP

L3_HYS

Filter times from 80 ms to 10 sec can be programmed for the

comparators (Register 0x1B and Register 0x1C) before they

change state.

1

10

100

1000

ADC RANGE (µA)

Table 6. Comparator Output Truth Table

CMP_AUTOEN L3_OUT L2_OUT Backlight Operation

Figure 41. Comparator Ranges

0

1

X¹

BLV can be manually set

by the user

BLV = 00, backlight

operates at L1 (daylight)

BLV = 01, backlight

operates at L2 (office)

BLV = 10, backlight

operates at L3 (dark)

Note that the full-scale value of the L2_TRP and L2_HYS

registers is 250 (decimal). Therefore, if the value of L2_TRP +

L2_HYS exceeds 250, the comparator output is unable to

deassert. For example, if L2_TRP is set to 204 (80% of the full-

scale value, or approximately 0.80 × 1080 μA = 864 μA), then

L2_HYS must be set to less than 46 (250 − 204 = 46). If it is not,

then L2_HYS + L2_TRP exceeds 250 and the L2_CMPR

comparator is never allowed to go low.

0

1

X¹

¹X is the don’t care bit.

When both phototransistors are enabled and programmed in

automatic mode (through Bit CMP_AUTOEN in Register

0x01), the user application must determine which comparator

outputs to use, by selecting Bit SEL_AB in Register 0x04 for

automatic light sensing transitions. For example, the user soft-

Rev. 0 | Page 18 of 48

ADP8863

USING THE ADP8863 TO DRIVE ADDITIONAL LEDS

In some situations, it may be desirable to drive more than seven

LEDs. This can be done in one of two ways: paralleling LEDs

using ballast resistors, or using the ADP8863 to power

additional LED drivers.

Ballast Resistors

D1

D2

D3

D4

D5

D6

D7

In the first method, multiple LEDs can be attached to any one

LED driver with the use of ballast resistors.

VIN

1µF

VDDIO

VOUT

1µF

VOUT

I

3

1

I

2

nRST

SDA

SCL

+

C1+

C1

Vf1

Vf2

Vf3

VDDIO

–

ADP8863

1µF

C1–

R

BALLAST

V

DX

C2+

C2

I

= I I

I

DX

1 + 2 + 3

1µF

C2–

Figure 42. Ballast Resistor Arrangement

nINT

Ballast resistors attempt to compensate for the forward voltage

(Vf) mismatch inherent in any parallel combination of LEDs.

The choice of a ballasting resistor is a trade-off between the

efficiency and the current matching of the LEDs in parallel.

Smaller ballast resistors give better efficiency. Larger ballast

resistors gives better current matching, because the resistor

balances out the current differences for a voltage drop. The

relationship is summarized with the following:

GND1

GND2

Figure 43. Powering Additional LEDs with Ballast Resistors

Adding Additional Parallel Sinks

The ballast resistor’s compromises of efficiency and matching

are not suitable for many applications. Therefore, another

option is to use the ADP8863 charge pump to power additional

current sinks. First, the charge pump must be optimized for this

option by setting the GDWN_DIS bit in Register 0x01, which

prevents the charge pump from switching back down in gain,

and thus stabilizes it against the unknown loads that the

additional current sinks present.

ΔVf

ΔI

R_BALLAST

where:

≈

(5)

ΔVf is the difference between the maximum Vf and the

minimum Vf of the LEDs in parallel.

ΔI is the difference between the parallel LED currents.

To use the sinks, turn the ADP8863 charge pump on before

activating the additional sinks. If the additional sinks are

activated first, the ADP8863 soft start may not complete.

The addition of the ballast resistor brings the effective Vf of the

LED to

The ADP8863 can be set up with an ADP8860 or ADP8861. An

example using the ADP8861 is shown in Figure 44.

Vf (eff ) = Vf (LED)+ I_LED×R_BALLAST

(6)

The I_LED× R_BALLASTterm forces the charge pump to work a little

harder for this additional voltage drop. Furthermore, for

guaranteed operation with the ADP8863, the total Vf(eff)

should never exceed V_OUT(REG)− V_HR(UP)(see Table 1).

Rev. 0 | Page 19 of 48

ADP8863

KEYPAD OR

FUN LIGHTING

BACKLIGHT

D2

D3

D4

D5

D6

D7

D1

D2

D3

D4

D5

D6

D7

D1

VIN

VOUT

1µF

VIN

1µF

VOUT

NC

V

ALS

PHOTO

SENSOR

C1+

nRST

ADP8861

NC

C1–

C2+

C2–

SDA

CMP_IN

0.1µF

C1+

ADP8863

SCL

C1

1µF

nRST

C1–

C2+

nINT

SDA

GNDx

C2

1µF

SCL

C2–

nINT

GNDx

Figure 44. Connecting the ADP8863 to an ADP8861 to Power More LEDs

OPERATING LEDS FROM ALTERNATIVE SUPPLIES

For some applications, it is advantageous to operate the LEDs

from a voltage source other than the ADP8863 charge pump

output. For example, it may be possible to operate a red LED

over the entire battery voltage range without any charge pump

boosting. For a charge pump,

D1

D2

D3

D4

D5

D6 D7

VIN

1µF

VDDIO

VOUT

1µF

I_IN= Gain ×I_OUT

(7)

nRST

SDA

SCL

C1+

C1–

C2+

C2–

VDDIO

Therefore, operating the red LEDs directly from the battery

removes output current of the red LEDs from the charge pump

draw. This in turn reduces the total input current by (Gain − 1) ×

C1

1µF

ADP8863

I_OUT(red)

.

C2

1µF

However, care must be taken when selecting LEDs to operate

from a different voltage input. Specifically, the voltage source

must at least be able to support the maximum forward voltage

(Vf) of the LED plus the maximum V_HR(UP)(276 mV, given in

Table 1). Additionally, operating an LED from an independent

voltage source may interfere with the ADP8863’s gain selection

algorithm. This algorithm selects the optimal gain for the

charge pump based on all seven diodes. By operating one or

more of the diodes from another supply, the algorithm may not

switch the gain back down to a lower state until the LEDs are

disabled or the part enters standby.

nINT

GND1

GND2

Figure 45. Alternate Schematic for Low Vf LEDs

Rev. 0 | Page 20 of 48

ADP8863

current sources and all other device functionality remain intact.

When the output voltage falls by about 500 mV (to 5.3 V

typical), the charge pump resumes operation. If the fault or load

event recurs, the process may repeat. An interrupt flag is set at

each OVP instance.

SHORT-CIRCUIT PROTECTION MODE

The ADP8863 can protect against short circuits on the output

(VOUT). Short-circuit protection (SCP) is activated at the point

when VOUT < 55% of V_IN. Note that SCP sensing is disabled

during both startup and restart attempts (fault recovery). SCP

sensing is reenabled 4 ms (typical) after activation. During a

short-circuit fault, the device enters a low current consumption

state and an interrupt flag is set. The device can be restarted at any

time after receiving a short-circuit fault by rewriting nSTBY = 1.

It then repeats another complete soft start sequence. Note that

the value of the output capacitance (C_OUT) should be small

enough to allow VOUT to reach approximately 55% (typical) of

V_INwithin the 4 ms (typical) time. If C_OUTis too large, the device

inadvertently enters short-circuit protection.

THERMAL SHUTDOWN/OVERTEMPERATURE

PROTECTION

If the die temperature of the ADP8863 rises above a safe limit

(150°C typical), the controllers enter thermal shutdown (TSD)

protection mode. In this mode, most of the internal functions

shut down, the part enters standby, and the TSD_INT interrupt

(Register 0x02) is set. When the die temperature decreases

below ~130°C, the part can be restarted. To restart the part,

remove it from standby. No interrupt is generated when the die

temperature falls below 130°C. However, if the software clears

the pending TSD_INT interrupt and the temperature remains

above 130°C, another interrupt is generated.

OVERVOLTAGE PROTECTION

Overvoltage protection (OVP) is implemented on the output.

There are two types of overvoltage events: normal (no fault) and

abnormal (from a fault or sudden load change).

The complete state machine for these faults (SCP, OVP, and

TSD) is shown in Figure 46.

Normal Overvoltage

INTERRUPTS

In a normal (no fault) overvoltage, the output voltage approaches

V

_OUT(REG)(4.9 V typical) during normal operation. This is not

There are five interrupt sources available on the ADP8863 in

Register 0x02.

caused by a fault or load change, but is simply a consequence of

the input voltage times the gain reaching the same level as the

clamped output voltage (V_OUT(REG)). To prevent this type of

overvoltage, the ADP8863 detects when the output voltage rises

to V_OUT(REG). It then increases the effective R_OUTof the gain stage

to reduce the voltage that is delivered. This effectively regulates

V_OUTto V_OUT(REG); however, there is a limit to the effect that this

system can have on regulating V_OUT. It is designed only for

normal operation and it is not intended to protect against faults

or sudden load changes. When the output voltage is regulated to

V_OUT(REG), no interrupt is set and the operation is transparent to

the LEDs and the overall application.

•

Main light sensor comparator: The CMP_INT interrupt

sets every time the main light sensor comparator detects a

threshold (L2 or L3) transition (rising or falling condition).

Sensor Comparator 2: The CMP2_INT interrupt works

the same way as CMP_INT, except that the sensing input

derives from the second light sensor. The programmable

thresh-olds are the same as for the main light sensor

comparator.

•

Overvoltage protection: OVP_INT is generated when the

output voltage exceeds 5.8 V (typical).

Thermal shutdown circuit: an interrupt (TSD_INT) is

generated when entering overtemperature protection.

Short-circuit detection: SHORT_INT is generated when

the device enters short-circuit protection mode.

Abnormal Overvoltage

Because of the open-loop behavior of the charge pump as well

as how the gain transitions are computed, a sudden load change

or fault can abnormally force V_OUTbeyond 6 V. This causes an

abnormal overvoltage situation. If the event happens slowly

enough, the system first tries to regulate the output to 4.9 V as

in a normal overvoltage scenario. However, if this is not suffi-

cient, or if the event happens too quickly, the ADP8863 enters

overvoltage protection (OVP) mode when V_OUTexceeds the

OVP threshold (typically 5.8 V). In OVP mode, only the charge

pump is disabled to prevent V_OUTfrom rising too high. The

The interrupt (if any) that appears on the nINT pin is deter-

mined by the bits mapped in Register INTR_EN (0x03). To

clear an interrupt, write a 1 to the interrupt in the MDCR2

register (0x02) or reset the part. Reading the interrupt, or writing a

0, has no effect.

Rev. 0 | Page 21 of 48

ADP8863

STANDBY

EXIT STBY

0

EXIT STANDBY

1

TSD FAULT

DIE TEMP > TSD

0

1

STARTUP:

CHARGE

VIN TO VOUT

DIE TEMP <

TSD – TSD

SCP FAULT

(HYS)

0

VOUT > V

OUT(START)

1

0

EXIT

STARTUP

VOUT < V

OUT(SC)

0

1

WAIT

100µs (TYP)

MIN (V

< V

)

VOUT < V

–

D1:D7

OVP

0

G = 1

V

HR(UP)

OVP(HYS)

0

VOUT > V

OVP

1

OVP FAULT

1

0

1

MIN (V

)

MIN (V

> V

)

WAIT

100µs (TYP)

D1:D7

DMAX

G = 1.5

< V

HR(UP)

0

VOUT < V

–

OVP

V

OVP(HYS)

0

VOUT > V

OUT(REG)

OVP FAULT

1

TRY TO

REGULATE

VOUT TO

V

OUT(REG)

VOUT > V

OVP

0

1

MIN (V

> V

)

WAIT

100µs (TYP)

D1:D7

VOUT < V

OVP

–

G = 2

0

V

DMAX

OVP(HYS)

0

VOUT > V

OUT(REG)

OVP FAULT

1

TRY TO

REGULATE

VOUT TO

NOTES

1. V

IS THE CALCULATED GAIN DOWN TRANSITION POINT.

V

DMAX

OUT(REG)

VOUT > V

OVP

Figure 46. Fault State Machine

Rev. 0 | Page 22 of 48

ADP8863

APPLICATIONS INFORMATION

The ADP8863 allows the charge pump to operate efficiently with a

minimum of external components. Specifically, the user must

select an input capacitor (C_IN), output capacitor (C_OUT), and two

charge pump fly capacitors (C1 and C2). C_INshould be 1 μF or

greater. The value must be high enough to produce a stable input

voltage signal at the minimum input voltage and maximum

output load. A 1 μF capacitor for C_OUTis recommended. Larger

values are permissible, but care must be exercised to ensure that

VOUT charges above 55% (typical) of V_INwithin 4 ms (typical).

See the Short-Circuit Protection Mode section for more details.

voltage drop across the regulating current source. This gives

_OUT= Vf_(MAX)+ V_DX

V

(9)

Combining Equation 8 and Equation 9 gives

V_IN= (Vf_(MAX)+ V_DX+ I_OUT× R_OUT(G))/G

(10)

Equation 10 is useful for calculating approximate bounds for the

charge pump design.

Determining the Transition Point of the Charge Pump

Consider the following design example, where:

Vf_(MAX)= 3.7 V

For best practice, it is recommended that the two charge pump fly

capacitors be 1 μF; larger values are not recommended, and smaller

values may reduce the ability of the charge pump to deliver

maximum current. For optimal efficiency, the charge pump fly

capacitors should have low equivalent series resistance (ESR). Low

ESR X5R or X7R capacitors are recommended for all four compo-

nents. The use of fly capacitors sized 0402 and smaller is allowed,

but the GDWN_DIS bit in Register 0x01 must be set. Minimum

voltage ratings should adhere to the guidelines in Table 7.

I_OUT= 140 mA (7 LEDs at 20 mA each)

R_OUT(G = 1.5×) = 3 Ω (obtained from Figure 12)

At the point of a gain transition, V_DX= V_HR(UP). Table 1 gives the

typical value of V_HR(UP)as 0.2 V. Therefore, the input voltage

level when the gain transitions from 1.5× to 2× is

V_IN= (3.7 V + 0.2 V + 140 mA × 3 Ω)/1.5 = 2.88 V

LAYOUT GUIDELINES

Note the following layout guidelines:

Table 7. Capacitor Stress in Each Charge Pump Gain State

•

For optimal noise immunity, place the C_INand C_OUTcapaci-

tors as close as possible to their respective pins. These

capacitors should share a short ground trace. If the LEDs

are a significant distance from the VOUT pin, another capaci-

tor on VOUT, placed closer to the LEDs, is advisable.

For optimal efficiency, place the charge pump fly capacitors

(C1 and C2) as close to the part as possible.

The ADP8863 does not distinguish between power ground

and analog ground. Therefore, both ground pins can be

connected directly together. It is recommended that these

ground pins be connected at the ground for the input and

output capacitors.

Capacitor Gain = 1× Gain = 1.5×

Gain = 2×

C_IN

V_IN

C_OUT

C1

V_IN

V_IN× 1.5 (max of 5.5 V) V_IN× 2.0 (max of 5.5 V)

None

V_IN/2

V_IN

C2

•

If one or both ambient light sensor comparator inputs (CMP_IN

and D6) are used, a small capacitor (0.1 μF is recommended)

must be connected from the input to ground.

Any color LED can be used if the Vf (forward voltage) is less

than 4.1 V. However, using lower Vf LEDs reduces the input

power consumption by allowing the charge pump to operate at

lower gain states.

•

The LFCSP package requires the exposed pad to be

soldered at the board to the GND1 and/or GND2 pin(s).

Unused diode pins (Pin D1 to Pin D7) can be connected to

ground or to VOUT, or remain floating. However, the

unused diode current sinks must be disabled by setting

them as independent sinks in Register 0x05 and then

disabling them in Register 0x10. If they are not disabled,

the charge pump efficiency may suffer.

The equivalent circuit model for a charge pump is shown in

Figure 47.

VOUT

R

OUT

I

OUT

V

DX

G × V

IN

C

OUT

•

If the CMP_IN phototransistor input is not used, it can be

connected to ground or remain floating.

If the interrupt pin (nINT) is not used, connect it to ground

or leave it floating. Never connect it to a voltage supply,

except through a ≥1 kꢁ series resistor.

The ADP8863 has an integrated noise filter on the nRST

pin. Under normal conditions, it is not necessary to filter

the reset line. However, if the part is exposed to an unusually

noisy signal, it is beneficial to add a small RC filter or bypass

capacitor on this pin. If the nRST pin is not used, it must

be pulled well above the V_IH(MIN)level (see Table 1). Do not

allow the nRST pin to float.

Figure 47. Charge Pump Equivalent Circuit Model

The input voltage is multiplied by the gain (G) and delivered to

the output through an effective resistance (R_OUT). The output

current flows through R_OUTand produces an IR drop to yield

V

_OUT= G ×V_IN− I_OUT× R_OUT(G)

(8)

•

The R_OUTterm is a combination of the R_DSONresistance for the

switches used in the charge pump and a small resistance that accounts

for the effective dynamic charge pump resistance. The R_OUTlevel

changes based upon the gain (the configuration of the switches).

Typical R_OUTvalues are given in Table 1, Figure 12, and Figure 13.

V_OUTis also equal to the largest Vf of the LEDs used plus the

Rev. 0 | Page 23 of 48

ADP8863

I²C PROGRAMMING AND DIGITAL CONTROL

The ADP8863 provides full software programmability to facili-

tate its adoption in various product architectures. The I²C address

is 0101011x (x = 0 during write, x = 1 during read). Therefore,

the write address is 0x56 and the read address is 0x57.

Table 8 to Table 84 provide register and bit descriptions. The

reset value for all bits in the bit map tables is all 0s, except in

Table 10 (see Table 10 for its unique reset value). Wherever the

acronym N/A appears in the tables, it means not applicable.

Note the following general behavior of registers:

•

All registers are set to their default values during reset or

after a UVLO event.

•

All registers are read/write unless otherwise specified.

Unused bits are read as zero.

B7

0

B0

B7

B0

B7

B0

ST

1

0

1

0

1

ACK

R/W

REGISTER ADDRESS

REGISTER VALUE

ACK ST

DEVICE ID

FOR WRITE

OPERATION

8-BIT VALUE TO WRITE IN THE

ADDRESSED REGISTER

SELECT REGISTER TO WRITE

SLAVE TO MASTER

MASTER TO SLAVE

Figure 48. I²C Write Sequence

B7

0

B0

R/W ACK

B7

B0

B7

0

B0

B7

B0

ST

1

0

1

0

1

ACK RS

1

0

1

0

1

R/W ACK

ACK ST

REGISTER ADDRESS

REGISTER VALUE

DEVICE ID

FOR WRITE

OPERATION

DEVICE ID

FOR READ

OPERATION

8-BIT VALUE TO WRITE IN THE

ADDRESSED REGISTER

SELECT REGISTER TO WRITE

SLAVE TO MASTER

MASTER TO SLAVE

Figure 49. I²C Read Sequence

Rev. 0 | Page 24 of 48

ADP8863

Table 8. Register Set Definitions

Address (Hex) Register Name

Description

0x00

0x01

0x02

0x03

0x04

0x05

0x06

0x07

0x08

0x09

0x0A

0x0B

0x0C

0x0D

0x0E

0x0F

0x10

0x11

0x12

0x13

0x14

0x15

0x16

0x17

0x18

0x19

0x1A

0x1B

0x1C

0x1D

0x1E

0x1F

0x20

0x21

0x22

0x23

0x24

MFDVID

MDCR

MDCR2

INTR_EN

CFGR

BLSEN

BLOFF

BLDIM

BLFR

BLMX1

BLDM1

BLMX2

BLDM2

BLMX3

BLDM3

ISCFR

ISCC

ISCT1

ISCT2

ISCF

ISC7

ISC6

ISC5

ISC4

ISC3

ISC2

ISC1

CCFG

CCFG2

L2_TRP

L2_HYS

L3_TRP

L3_HYS

PH1LEVL

PH1LEVH

PH2LEVL

PH2LEVH

Manufacturer and device ID

Device mode and status

Device mode and Status Register 2

Interrupts enable

Configuration register

Sink enable, backlight or independent

Backlight off timeout

Backlight dim timeout

Backlight fade in and fade out rates

Backlight (brightness Level 1—daylight) maximum current

Backlight (brightness Level 1—daylight) dim current

Backlight (brightness Level 2—office) maximum current

Backlight (brightness Level 2—office) dim current

Backlight (brightness Level 3—dark) maximum current

Backlight (brightness Level 3—dark) dim current

Independent sink current fade control register

Independent sink current control register

Independent sink current timer register, LED[7:5]

Independent sink current timer register, LED[4:1]

Independent sink current fade register

Independent sink current, LED7

Independent sink current, LED6

Independent sink current, LED5

Independent sink current, LED4

Independent sink current, LED3

Independent sink current, LED2

Independent sink current, LED1

Comparator configuration

Second comparator configuration

L2 comparator reference

L2 hysteresis

L3 comparator reference

L3 hysteresis

First phototransistor ambient light level—low byte register

First phototransistor ambient light level—high byte register

Second phototransistor ambient light level—low byte register

Second phototransistor ambient light level—high byte register

Rev. 0 | Page 25 of 48

ADP8863

Table 9. Register Map

Addr

(Hex)

0x00

0x01

0x02

0x03

0x04

0x05

0x06

0x07

0x08

0x09

0x0A

0x0B

0x0C

0x0D

0x0E

0x0F

0x10

0x11

0x12

0x13

0x14

0x15

0x16

0x17

0x18

0x19

0x1A

0x1B

0x1C

0x1D

0x1E

0x1F

0x20

0x21

0x22

0x23

0x24

Reg. Name

MFDVID

MDCR

MDCR2

INTR_EN

CFGR

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Manufacturer ID

Device ID

Reserved INT_CFG

Reserved

Reserved SEL_AB

nSTBY

DIM_EN

GDWN_DIS SIS_EN

CMP_AUTOEN BL_EN

SHORT_INT

SHORT_IEN

TSD_INT

TSD_IEN

OVP_INT

OVP_IEN

CMP2_INT

CMP2_IEN

CMP_INT

CMP_IEN

FOVR

CMP2_SEL

D6EN

BLV

Law

D2EN

BLSEN

BLOFF

BLDIM

BLFR

Reserved D7EN

Reserved

D5EN

D4EN

OFFT

DIMT

D3EN

D1EN

Reserved

BL_FO

BL_FI

BLMX1

BLDM1

BLMX2

BLDM2

BLMX3

BLDM3

ISCFR

Reserved

BL1_MC

BL1_DC

BL2_MC

BL2_DC

BL3_MC

BL3_DC

Reserved

SC5_EN

SC7OFF

SC3OFF

SC_LAW

SC1_EN

SC5OFF

SC1OFF

ISCC

Reserved SC7_EN

SCON

SC6_EN

SC4_EN

SC3_EN

SC2_EN

ISCT1

SC6OFF

SC2OFF

ISCT2

SC4OFF

ISCF

SCFO

SCFI

ISC7

SCR

SCD7

SCD6

SCD5

SCD4

SCD3

SCD2

SCD1

L3_OUT

ISC6

Reserved

ISC5

ISC4

ISC3

ISC2

ISC1

CCFG

FILT

FORCE_RD

FORCE_RD2

L2_OUT

L3_EN

L2_EN

L2_EN2

CCFG2

L2_TRP

L2_HYS

L3_TRP

L3_HYS

PH1LEVL

PH1LEVH

PH2LEVL

PH2LEVH

FILT2

L3_OUT2

L2_OUT2 L3_EN2

L2_TRP

L2_HYS

L3_TRP

L3_HYS

PH1LEV_LOW

Reserved

PH1LEV_HIGH

PH2LEV_HIGH

PH2LEV_LOW

Rev. 0 | Page 26 of 48

ADP8863

Manufacturer and Device ID (MFDVID)—Register 0x00

This is a read-only register.

Table 10. MFDVID Bit Map

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Device ID

Bit 0

Manufacturer ID

0

1

0

1

0

1

0

Mode Control Register (MDCR)—Register 0x01

Table 11. MDCR Bit Map

Bit 7

Bit 6

Bit 5

Bit 4

DIM_EN

Bit 3

GDWN_DIS

Bit 2

SIS_EN

Bit 1

CMP_AUTOEN

Bit 0

Reserved

INT_CFG

nSTBY

BL_EN

Table 12. Bit Descriptions for the MDCR Register

Bit Name

Bit No. Description

N/A

7

6

Reserved.

INT_CFG

Interrupt configuration.

1 = processor interrupt deasserts for 50 μs and reasserts with pending events.

0 = processor interrupt remains asserted if the host tries to clear the interrupt while there is a pending event.

nSTBY

5

4

1 = device is in active mode.

0 = device is in standby mode; only the I²C interface is enabled.

DIM_EN

DIM_EN is set by the hardware after a dim timeout. The user may also force the backlight into dim mode by

asserting this bit. Dim mode can only be entered if BL_EN is also enabled.

1 = backlight is operating at the dim current level (BL_EN must also be asserted).

0 = backlight is not in dim mode.

GDWN_DIS

3

2

Gain down disable bit. Setting this bit does not allow the charge pump to switch to lower gains.

1 = the charge pump does not switch down in gain until all LEDs are off. The charge pump switches up in gain as

needed. This feature is useful if the ADP8863 charge pump is used to drive an external load. This feature must be

used when utilizing small fly capacitors (0402 or smaller).

0 = the charge pump automatically switches up and down in gain. This provides optimal efficiency, but is not

suitable for driving loads that are not connected through the ADP8863 diode drivers. Additionally, the charge

pump fly capacitors should be low ESR and sized 0603 or greater.

SIS_EN

Synchronous independent sinks enable.

1 = enables all LED current sinks designated as independent sinks. All of the ISC enable bits must be cleared;

if any of the SCx_EN bits in Register 0x10 are set, this bit has no effect.

0 = disables all sinks designated as independent sinks. All of the ISC enable bits must be cleared; if any of the

SCx_EN bits in Register 0x10 are set, this bit has no effect.

CMP_AUTOEN

BL_EN

1

0

1 = backlight automatically responds to the comparator outputs (L2_OUT and L3_OUT). L2_EN and/or L3_EN

must be set for this to function. BLV values in Register 0x04 are overridden.

0 = backlight does not respond automatically to comparator level changes. The user can manually select

backlight operating levels using Bit BLV in Register 0x04.

1 = backlight is enabled (nSTBY must also be asserted).

0 = backlight is disabled.

Rev. 0 | Page 27 of 48

ADP8863

Mode Control Register 2 (MDCR2)—Register 0x02

Table 13. MDCR2 Bit Map

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Reserved

SHORT_INT

TSD_INT

OVP_INT

CMP2_INT

CMP_INT

Table 14. Bit Descriptions for the MDCR2 Register

Bit Name

Bit No.

[7:5]

4

Description¹

N/A

Reserved.

SHORT_INT

Short-circuit error interrupt.

1 = a short-circuit or overload condition on VOUT has been detected.

0 = no short-circuit or overload condition has been detected.

Thermal shutdown interrupt.

1 = the device temperature has exceeded 150°C (typical).

0 = no overtemperature condition has been detected.

Overvoltage interrupt.

TSD_INT

OVP_INT

3

2

1 = VOUT has exceeded V_OVP

.

0 = VOUT has not exceeded V_OVP

.

CMP2_INT

CMP_INT

1

0

1 = the second ALS comparator (CMP_IN2) has changed state.

0 = the second sensor comparator has not been triggered.

1 = main ALS comparator (CMP_IN) has changed state.

0 = the main sensor comparator has not been triggered.

¹Interrupt bits are cleared by writing a 1 to the flag; writing a 0 or reading the flag has no effect.

Interrupt Enable (INTR_EN)—Register 0x03

Table 15. INTR_EN Bit Map

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Reserved

SHORT_IEN

TSD_IEN

OVP_IEN

CMP2_IEN

CMP_IEN

Table 16. Bit Descriptions for the INTR_EN Register

Bit Name

Bit No. Description

N/A

[7:5]

4

Reserved.

SHORT_IEN

Short-circuit interrupt is enabled. When the SHORT_INT status bit is set after an error condition, an interrupt is

raised to the host if the SHORT_IEN flag is enabled.

1 = the short-circuit interrupt is enabled.

0 = the short-circuit interrupt is disabled (the SHORT_INT flag continues to assert).

TSD_IEN

OVP_IEN

CMP2_IEN

CMP_IEN

3

2

1

0

Thermal shutdown interrupt is enabled. When the TSD_INT status bit is set after an error condition, an interrupt is

raised to the host if the TSD_IEN flag is enabled.

1 = the thermal shutdown interrupt is enabled.

0 = the thermal shutdown interrupt is disabled (the TSD_INT flag continues to assert).

Overvoltage interrupt enabled. When the OVP_INT status bit is set after an error condition, an interrupt is raised to

the host if the OVP_IEN flag is enabled.

1 = the overvoltage interrupt is enabled.

0 = the overvoltage interrupt is disabled (the OVP_INT flag continues to assert).

When the CMP2_INT status bit is set after an enabled comparator trips, an interrupt is raised if the CMP2_IEN flag is

enabled.

1 = the second phototransistor comparator interrupt is enabled.

0 = the second phototransistor comparator interrupt is disabled (the CMP2_INT flag continues to assert).

When the CMP_INT status bit is set after an enabled comparator trips, an interrupt is raised if the CMP_IEN flag is

enabled.

1 = the main comparator interrupt is enabled.

0 = the main comparator interrupt is disabled (the CMP_INT flag continues to assert).

Rev. 0 | Page 28 of 48

ADP8863

BACKLIGHT REGISTER DESCRIPTIONS

Configuration Register (CFGR)—Register 0x04

Table 17. CFGR Bit Map

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

BLV

Bit 2

Bit 1

Law

Bit 0

Reserved

SEL_AB

CMP2_SEL

FOVR

Table 18. Bit Descriptions for the CFGR Register

Bit Name

Bit No. Description

N/A

7

6

Reserved.

SEL_AB

1 = selects the second phototransistor (CMP_IN2) to control the backlight.

0 = selects the main phototransistor (CMP_IN) to control the backlight.

CMP2_SEL

BLV

5

1 = the second phototransistor is enabled; the current sink on D6 is disabled.

0 = the second phototransistor is disabled.

[4:3]

Brightness level. This field indicates the brightness level at which the device is operating. The software may force the

backlight to operate at one of the three brightness levels. Setting CMP_AUTOEN high (Register 0x01) sets these

values automatically and overwrites any previously written values.

00 = Level 1 (daylight).

01 = Level 2 (office).

10 = Level 3 (dark).

11 = off (backlight set to 0 mA).

Backlight transfer law.

Law

[2:1]

00 = linear law DAC, linear time steps.

01 = square law DAC, linear time steps.

10 = square law DAC, nonlinear time steps (Cubic 10).

11 = square law DAC, nonlinear time steps (Cubic 11).

Backlight fade override.

FOVR

0

1 = the backlight fade override is enabled.

0 = the backlight fade override is disabled.

Backlight Sink Enable (BLSEN)—Register 0x05

Table 19. BLSEN Bit Map

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Reserved

D7EN

D6EN

D5EN

D4EN

D3EN

D2EN

D1EN

Table 20. Bit Descriptions for the BLSEN Register

Bit Name

Bit No.

Description

N/A

7

6

Reserved

D7EN

Diode 7 backlight sink enable

1 = selects LED7 as an independent sink

0 = connects LED7 sink to backlight enable (BL_EN)

Diode 6 backlight sink enable

1 = selects LED6 as an independent sink

0 = connects LED6 sink to backlight enable (BL_EN)

Diode 5 backlight sink enable

1 = selects LED5 as an independent sink

0 = connects LED5 sink to backlight enable (BL_EN)

Diode 4 backlight sink enable

1 = selects LED4 as an independent sink

0 = connects LED4 sink to backlight enable (BL_EN)

Diode 3 backlight sink enable

D6EN

D5EN

D4EN

D3EN

5

4

3

2

1 = selects LED3 as an independent sink

0 = connects LED3 sink to backlight enable (BL_EN)

Rev. 0 | Page 29 of 48

ADP8863

Bit Name

Bit No.

Description

D2EN

1

Diode 2 backlight sink enable

1 = selects LED2 as an independent sink

0 = connects LED2 sink to backlight enable (BL_EN)

Diode 1 backlight sink enable

D1EN

0

1 = selects LED1 as an independent sink

0 = connects LED1 sink to backlight enable (BL_EN)

Backlight Off Timeout (BLOFF)—Register 0x06

Table 21. BLOFF Bit Map

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

OFFT

Bit 2

Bit 1

Bit 0

Reserved

Table 22. Bit Descriptions for the BLOFF Register

Bit Name Bit No. Description

N/A

7

Reserved.

OFFT

[6:0]

Backlight off timeout. After the off timeout (OFFT) period, the backlight turns off. If the dim timeout (DIMT) is

enabled, the off timeout starts after the dim timeout.

0000000 = timeout disabled

0000001 = 1 sec

0000010 = 2 sec

0000011 = 3 sec

…

1111111 = 127 sec

Backlight Dim Timeout (BLDIM)—Register 0x07

Table 23. BLDIM Bit Map

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

DIMT

Bit 2

Bit 1

Bit 0

Reserved

Table 24. Bit Descriptions for the BLDIM Register

Bit Name Bit No. Description

N/A

7

Reserved.

DIMT

[6:0]

Backlight dim timeout. After the dim timeout (DIMT) period, the backlight is set to the dim current value. The dim

timeout starts after the backlight reaches the maximum current.

0000000 = timeout disabled

0000001 = 1 sec

0000010 = 2 sec

0000011 = 3 sec

…

1111111 = 127 sec

Rev. 0 | Page 30 of 48

ADP8863

Backlight Fade (BLFR)—Register 0x08

Table 25. BLFR Bit Map

Bit 7

Bit 6

Bit 5

BL_FO

Bit 4

Bit 3

Bit 2

Bit 1

BL_FI

Bit 0

Table 26. Bit Descriptions for the BLFR Register

Bit

Name

Bit No. Description

[7:4]

BL_FO

Backlight fade out rate. If fade out is disabled (BL_FO = 0000), the backlight changes instantly (within 100 ms). If the

fade out rate is set, the backlight fades from its current value to the dim or the off value. The times listed for BL_FO are

for a full-scale fade out (30 mA to 0 mA). Fades between closer current values reduce the fade time. See the Automated

Fade In and Fade Out Section for more information.

0000 = 0.1 sec (fade out disabled)¹

0001 = 0.3 sec

0010 = 0.6 sec

0011 = 0.9 sec

0100 = 1.2 sec

0101 = 1.5 sec

0110 = 1.8 sec

0111 = 2.1 sec

1000 = 2.4 sec

1001 = 2.7 sec

1010 = 3.0 sec

1011 = 3.5 sec

1100 = 4.0 sec

1101 = 4.5 sec

1110 = 5.0 sec

1111 = 5.5 sec

BL_FI

[3:0]

Backlight fade in rate. If fade in is disabled (BL_FI = 0000), the backlight changes instantly (within 100 ms). If the fade in

rate is set, the backlight fades from its current value to its maximum value when the backlight is turned on. The times

listed for BL_FI are for a full-scale fade in (0 mA to 30 mA). Fades between closer current values reduce the fade time.

See the Automated Fade In and Fade Out Section for more information.

0000 = 0.1 sec (fade in disabled)¹

0001 = 0.3 sec

0010 = 0.6 sec

0011 = 0.9 sec

…

1111 = 5.5 sec

¹When fade in and fade out are disabled, the backlight does not instantly fade, but instead, fades rapidly within about 100 ms.

Rev. 0 | Page 31 of 48

ADP8863

Backlight Level 1 (Daylight) Maximum Current Register (BLMX1)—Register 0x09

Table 27. BLMX1 Bit Map

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

BL1_MC

Bit 2

Bit 1

Bit 0

Reserved

Table 28. Bit Descriptions for the BLMX1 Register

Bit Name

Bit No.

Description

N/A

7

Reserved.

BL1_MC

[6:0]

Backlight Level 1 (daylight) maximum current. The backlight maximum current can be set according to

the linear or square law function (see Table 29 for a complete list of values).

DAC

Linear Law (mA) Square Law (mA)

0000000

0000001

0000010

0000011

…

0

0.000

0.002

0.007

0.017

…

0.236

0.472

0.709

…

1111111

30

Table 29. Linear and Square Law Currents Per DAC Code (SCR = 0)

DAC Code

0x00

0x01

0x02

0x03

0x04

0x05

0x06

0x07

0x08

0x09

0x0A

0x0B

0x0C

0x0D

0x0E

0x0F

0x10

0x11

0x12

0x13

0x14

0x15

0x16

0x17

0x18

0x19

0x1A

0x1B

0x1C

0x1D

0x1E

0x1F

0x20

0x21

Linear Law (mA)

Square Law (mA)¹

0.000

0.002

0.007

0.017

0.030

0.047

0.067

0.091

0.119

0.151

0.186

0.225

0.268

0.314

0.365

0.419

0.476

0.538

0.603

0.671

0.744

0.820

0.900

0.984

1.071

1.163

1.257

1.356

1.458

1.564

1.674

1.787

1.905

2.026

DAC Code

0x22

0x23

0x24

0x25

0x26

0x27

0x28

0x29

0x2A

0x2B

0x2C

0x2D

0x2E

0x2F

0x30

0x31

0x32

0x33

0x34

0x35

0x36

0x37

0x38

0x39

0x3A

0x3B

0x3C

0x3D

0x3E

0x3F

0x40

0x41

0x42

0x43

Linear Law (mA)

8.031

8.268

8.504

8.740

8.976

9.213

9.449

9.685

Square Law (mA)¹

2.150

2.279

2.411

2.546

2.686

2.829

2.976

3.127

3.281

3.439

3.601

3.767

3.936

4.109

4.285

4.466

4.650

4.838

5.029

5.225

5.424

5.627

5.833

6.043

6.257

6.475

6.696

6.921

7.150

7.382

7.619

7.859

8.102

8.350

0

0.236

0.472

0.709

0.945

1.181

1.417

1.654

1.890

2.126

2.362

2.598

2.835

3.071

3.307

3.543

3.780

4.016

4.252

4.488

4.724

4.961

5.197

5.433

5.669

5.906

6.142

6.378

6.614

6.850

7.087

7.323

7.559

7.795

9.921

10.157

10.394

10.630

10.866

11.102

11.339

11.575

11.811

12.047

12.283

12.520

12.756

12.992

13.228

13.465

13.701

13.937

14.173

14.409

14.646

14.882

15.118

15.354

15.591

15.827

Rev. 0 | Page 32 of 48

ADP8863

DAC Code

0x44

0x45

0x46

0x47

0x48

0x49

0x4A

0x4B

0x4C

0x4D

0x4E

0x4F

0x50

0x51

0x52

0x53

0x54

0x55

0x56

0x57

0x58

0x59

0x5A

0x5B

0x5C

0x5D

0x5E

0x5F

0x60

0x61

0x62

0x63

Linear Law (mA)

16.063

16.299

16.535

16.772

17.008

17.244

17.480

17.717

17.953

18.189

18.425

18.661

18.898

19.134

19.370

19.606

19.842

20.079

20.315

20.551

20.787

21.024

21.260

21.496

21.732

21.968

22.205

22.441

22.677

22.913

23.150

23.386

Square Law (mA)¹

8.601

8.855

9.114

9.376

9.642

9.912

DAC Code

0x64

0x65

0x66

0x67

0x68

0x69

0x6A

0x6B

0x6C

0x6D

0x6E

0x6F

0x70

0x71

0x72

0x73

0x74

0x75

0x76

0x77

0x78

0x79

0x7A

0x7B

0x7C

0x7D

0x7E

0x7F

Linear Law (mA)

23.622

23.858

24.094

24.331

24.567

24.803

25.039

25.276

25.512

25.748

25.984

26.220

26.457

26.693

26.929

27.165

27.402

27.638

27.874

28.110

28.346

28.583

28.819

29.055

29.291

29.528

29.764

30.000

Square Law (mA)¹

18.600

18.974

19.351

19.733

20.118

20.507

20.899

21.295

21.695

22.099

22.506

22.917

23.332

23.750

24.173

24.599

25.028

25.462

25.899

26.340

26.784

27.232

27.684

28.140

28.599

29.063

29.529

30.000

10.185

10.463

10.743

11.028

11.316

11.608

11.904

12.203

12.507

12.814

13.124

13.439

13.757

14.078

14.404

14.733

15.066

15.403

15.743

16.087

16.435

16.787

17.142

17.501

17.863

18.230

¹Cubic 10 and Cubic 11 laws use the square law DAC setting but vary the time

step per DAC code (see the Automated Fade In and Fade Out section).

Rev. 0 | Page 33 of 48

ADP8863

Backlight Level 1 (Daylight) Dim Current Register (BLDM1)—Register 0x0A

Table 30. BLDM1 Bit Map

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

BL1_DC

Bit 2

Bit 1

Bit 0

Reserved

Table 31. Bit Descriptions for the BLDM1 Register

Bit Name

Bit No.

Description

N/A

7

Reserved.

BL1_DC

[6:0]

Backlight Level 1 (daylight) dim current. The backlight is set to the dim current value after a dim timeout or

if the DIM_EN flag is set by the user (see Table 29 for a complete list of values).

DAC

Linear Law (mA)

Square Law (mA)

0000000

0000001

0000010

0000011

…

0

0.000

0.002

0.007

0.017

…

0.236

0.472

0.709

…

1111111

30

Backlight Level 2 (Office) Maximum Current Register (BLMX2)—Register 0x0B

Table 32. BLMX2 Bit Map

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

BL2_MC

Bit 2

Bit 1

Bit 0

Reserved

Table 33. Bit Descriptions for the BLMX2 Register

Bit Name

Bit No.

Description

N/A

7

Reserved.

BL2_MC

[6:0]

Backlight Level 2 (office) maximum current (see Table 29 for a complete list of values).

DAC

Linear Law (mA)

Square Law (mA)

0000000

0000001

0000010

0000011

…

0

0.000

0.002

0.007

0.017

…

0.236

0.472

0.709

…

1111111

30

Rev. 0 | Page 34 of 48

ADP8863

Backlight Level 2 (Office) Dim Current Register (BLDM2)—Register 0x0C

Table 34. BLDM2 Bit Map

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

BL2_DC

Bit 2

Bit 1

Bit 0

Reserved

Table 35. Bit Descriptions for the BLDM2 Register

Bit Name

Bit No.

Description

N/A

7

Reserved.

BL2_DC

[6:0]

Backlight Level 2 (office) dim current. See Table 29 for a complete list of values. The backlight is set to the

dim current value after a dim timeout or if the DIM_EN flag is set by the user.

DAC

Linear Law (mA) Square Law (mA)

0000000

0000001

0000010

0000011

…

0

0.000

0.002

0.007

0.017

…

0.236

0.472

0.709

…

1111111

30

Backlight Level 3 (Dark) Maximum Current Register (BLMX3)—Register 0x0D

Table 36. BLMX3 Bit Map

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

BL3_MC

Bit 2

Bit 1

Bit 0

Reserved

Table 37. Bit Descriptions for the BLMX3 Register

Bit Name

Bit No.

Description

N/A

7

Reserved.

BL3_MC

[6:0]

Backlight Level 3 (dark) maximum current. See Table 29 for a complete list of values.

DAC

Linear Law (mA) Square Law (mA)

0000000

0000001

0000010

0000011

…

0

0.000

0.002

0.007

0.017

…

0.236

0.472

0.709

…

1111111

30

Rev. 0 | Page 35 of 48

ADP8863

Backlight Level 3 (Dark) Dim Current Register (BLDM3)—Register 0x0E

Table 38. BLDM3 Bit Map

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Reserved

BL3_DC

Table 39. Bit Descriptions for the BLDM3 Register

Bit Name

Bit No.

Description

N/A

7

Reserved.

BL3_DC

[6:0]

Backlight Level 3 (dark) dim current. See Table 29 for a complete list of values. The backlight is set to the

dim current value after a dim timeout or if the DIM_EN flag is set by the user.

DAC

Linear Law (mA) Square Law (mA)

0000000

0000001

0000010

0000011

…

0

0.000

0.002

0.007

0.017

…

0.236

0.472

0.709

…

1111111

30

INDEPENDENT SINK REGISTER DESCRIPTIONS

Independent Sink Current Fade Control Register (ISCFR)—Register 0x0F

Table 40. ISCFR Bit Map

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

SC_LAW

Reserved

Table 41. Bit Descriptions for the ISCFR Register

Bit Name

Bit No.

Description

N/A

[7:2]

Reserved

SC_LAW

[1:0]

Independent sink current fade transfer law

00 = linear law DAC, linear time steps

01 = square law DAC, linear time steps

10 = square law DAC, nonlinear time steps (Cubic 10)

11 = square law DAC, nonlinear time steps (Cubic 11)

Independent Sink Current Control (ISCC)—Register 0x10

Table 42. ISCC Bit Map

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Reserved

SC7_EN

SC6_EN

SC5_EN

SC4_EN

SC3_EN

SC2_EN

SC1_EN

Table 43. Bit Descriptions for the ISCC Register

Bit Name

Bit No.

Description

N/A

7

6

Reserved

SC7_EN

This enable acts upon LED7

1 = SC7 is turned on

0 = SC7 is turned off

SC6_EN

SC5_EN

5

4

This enable acts upon LED6

1 = SC6 is turned on

0 = SC6 is turned off

This enable acts upon LED5

1 = SC5 is turned on

0 = SC5 is turned off

Rev. 0 | Page 36 of 48

ADP8863

Bit Name

Bit No.

Description

SC4_EN

3

This enable acts upon LED4.

1 = SC4 is turned on.

0 = SC4 is turned off.

This enable acts upon LED3.

1 = SC3 is turned on.

0 = SC3 is turned off.

This enable acts upon LED2.

1 = SC2 is turned on.

0 = SC2 is turned off.

This enable acts upon LED1.

1 = SC1 is turned on.

0 = SC1 is turned off.

SC3_EN

SC2_EN

SC1_EN

2

1

0

Independent Sink Current Time (ISCT1)—Register 0x11

Table 44. ISCT1 Bit Map

Bit 7

Bit 6

Bit 5

Bit 4

SC7OFF

Bit 3

Bit 2

SC6OFF

Bit 1

Bit 0

SCON

SC5OFF

Table 45. Bit Descriptions for the ISCT1 Register

Bit Name Bit No. Description^{1, 2}

SCON

[7:6]

SC on time. If the SCxOFF time is not disabled and the independent current sink is enabled (Register 0x10), the LED(s)

remains on for the time selected (per the following list) and then turns off.

00 = 0.2 sec

01 = 0.6 sec

10 = 0.8 sec

11 = 1.2 sec

SC7OFF

[5:4]

SC7 off time. When the SC off time is disabled, the ISC remains on while enabled. When the SC off time is set to any

other value, the ISC turns off for the off time (per the following listed times) and then turns on according to the SCON

setting.

00 = off time disabled

01 = 0.6 sec

10 = 1.2 sec

11 = 1.8 sec

SC6OFF

SC5OFF

[3:2]

[1:0]

SC6 off time. When the SC off time is disabled, the ISC remains on while enabled. When the SC off time is set to any

other value, the ISC turns off for the off time (per the following listed times) and then turns on according to the SCON

setting.

00 = off time disabled

01 = 0.6 sec

10 = 1.2 sec

11 = 1.8 sec

SC5 off time. When the SC off time is disabled, the ISC remains on while enabled. When the SC off time is set to any

other value, the ISC turns off for the off time (per the following listed times) and then turns on according to the SCON

setting.

00 = off time disabled

01 = 0.6 sec

10 = 1.2 sec

11 = 1.8 sec

¹An independent sink remains on continuously when SCx_EN = 1 and SCxOFF = 00 (disabled).

²To enable multiple independent sinks, set the appropriate SCx_EN bits. To create equivalent blinking and fading sequences, enable all independent sinks in one write

cycle to cause a preprogrammed sequence to start simultaneously.

Rev. 0 | Page 37 of 48

ADP8863

Independent Sink Current Time (ISCT2)—Register 0x12

Table 46. ISCT2 Bit Map

Bit 7

Bit 6

Bit 5

Bit 4

SC3OFF

Bit 3

Bit 2

SC2OFF

Bit 1

Bit 0

SC1OFF

SC4OFF

Table 47. Bit Descriptions for the ISCT2 Register

Bit Name

Bit No. Description^{1, 2}

SC4OFF

[7:6]

[5:4]

[3:2]

[1:0]

SC4 off time. When the SC off time is disabled, the ISC remains on while enabled. When the SC off time is set to any

other value, the ISC turns off for the off time (per the following listed times) and then turns on according to the

SCON setting.

00 = off time disabled

01 = 0.6 sec

10 = 1.2 sec

11 = 1.8 sec

SC3OFF

SC2OFF

SC1OFF

SC3 off time. When the SC off time is disabled, the ISC remains on while enabled. When the SC off time is set to any

other value, the ISC turns off for the off time (per the following listed times) and then turns on according to the

SCON setting.

00 = off time disabled

01 = 0.6 sec

10 = 1.2 sec

11 = 1.8 sec

SC2 off time. When the SC off time is disabled, the ISC remains on while enabled. When the SC off time is set to any

other value, the ISC turns off for the off time (per the following listed times) and then turns on according to the

SCON setting.

00 = off time disabled

01 = 0.6 sec

10 = 1.2 sec

11 = 1.8 sec

SC1 off time. When the SC off time is disabled, the ISC remains on while enabled. When the SC off time is set to any

other value, the ISC turns off for the off time (per the following listed times) and then turns on according to the

SCON setting.

00 = off time disabled

01 = 0.6 sec

10 = 1.2 sec

11 = 1.8 sec

¹An independent sink remains on continuously when SCx_EN = 1 and SCxOFF = 00 (disabled).

²To enable multiple independent sinks, set the appropriate SCx_EN bits. To create equivalent blinking and fading sequences, enable all independent sinks in one write

cycle. This causes a preprogrammed sequence to start simultaneously.

Rev. 0 | Page 38 of 48

ADP8863

Independent Sink Current Fade (ISCF)—Register 0x13

Table 48. ISCF Bit Map

Bit 7

Bit 6

Bit 5

SCFO

Bit 4

Bit 3

Bit 2

Bit 1

SCFI

Bit 0

Table 49. Bit Descriptions for the ISCF Register

Bit Name Bit No. Description

SCFO

[7:4]

Sink current fade out rate. The times listed here are for a full-scale fade out (30 mA to 0 mA). Fades between closer

current values reduce the fade time. See the Automated Fade In and Fade Out section for more information.

0000 = disabled

0001 = 0.30 sec

0010 = 0.60 sec

0011 = 0.90 sec

0100 = 1.2 sec

0101 = 1.5 sec

0110 = 1.8 sec

0111 = 2.1 sec

1000 = 2.4 sec

1001 = 2.7 sec

1010 = 3.0 sec

1011 = 3.5 sec

1100 = 4.0 sec

1101 = 4.5 sec

1110 = 5.0 sec

1111 = 5.5 sec

SCFI

[3:0]

Sink current fade in rate. The times listed here are for a full-scale fade in (0 mA to 30 mA). Fades between closer

current values reduce the fade time. See the Automated Fade In and Fade Out section for more information.

0000 = disabled

0001 = 0.30 sec

0010 = 0.60 sec

0011 = 0.90 sec

0100 = 1.2 sec

0101 = 1.5 sec

0110 = 1.8 sec

0111 = 2.1 sec

1000 = 2.4 sec

1001 = 2.7 sec

1010 = 3.0 sec

1011 = 3.5 sec

1100 = 4.0 sec

1101 = 4.5 sec

1110 = 5.0 sec

1111 = 5.5 sec

Rev. 0 | Page 39 of 48

ADP8863

Sink Current Register LED7 (ISC7)—Register 0x14

Table 50. ISC7 Bit Map

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

SCD7

Bit 2

Bit 1

Bit 0

SCR

Table 51. Bit Descriptions for the ISC7 Register

Bit Name

Bit No. Description

SCR

7

1 = Sink Current 1.

0 = Sink Current 0.

For Sink Current 0, use the following DAC code schedule (see Table 29 for a complete list of values).

SCD7

[6:0]

DAC

Linear Law (mA)

Square Law (mA)

0000000

0000001

0000010

0000011

…

0.000

0.236

0.472

0.709

…

0

0.002

0.007

0.017

…

1111111

30

For Sink Current 1, use the following DAC code schedule (see Table 52 for a complete list of values).

DAC

Linear Law (mA)

Square Law (mA)

0000000

0000001

0000010

0000011

…

0.000

0.472

0.945

1.42

…

0

0.004

0.014

0.034

…

1111111

60

Table 52. Linear and Square Law Currents for LED7 (SCR = 1)

DAC Code

0x00

0x01

0x02

0x03

0x04

0x05

0x06

0x07

0x08

0x09

0x0A

0x0B

0x0C

0x0D

0x0E

0x0F

0x10

0x11

0x12

0x13

0x14

0x15

0x16

0x17

Linear Law (mA)

0.000

0.472

0.945

1.42

1.89

2.36

2.83

3.31

3.78

4.25

4.72

5.20

5.67

6.14

6.61

7.09

7.56

8.03

8.50

8.98

9.45

9.92

10.39

10.87

Square Law (mA)¹

0

DAC Code

Linear Law (mA)

11.34

11.81

12.28

12.76

13.23

13.70

14.17

14.65

15.12

15.59

16.06

16.54

17.01

17.48

17.95

18.43

18.90

19.37

19.84

20.31

20.79

21.26

21.73

22.20

Square Law (mA)¹

2.142

2.326

2.514

2.712

2.916

3.128

3.348

3.574

3.81

0x18

0x19

0x1A

0x1B

0x1C

0x1D

0x1E

0x1F

0x20

0x21

0x22

0x23

0x24

0x25

0x26

0x27

0x28

0x29

0x2A

0x2B

0x2C

0x2D

0x2E

0x2F

0.004

0.014

0.034

0.06

0.094

0.134

0.182

0.238

0.302

0.372

0.45

0.536

0.628

0.73

0.838

0.952

1.076

1.206

1.342

1.488

1.64

4.052

4.3

4.558

4.822

5.092

5.372

5.658

5.952

6.254

6.562

6.878

7.202

7.534

7.872

8.218

1.8

1.968

Rev. 0 | Page 40 of 48

ADP8863

DAC Code

0x30

0x31

0x32

0x33

0x34

0x35

0x36

0x37

0x38

0x39

0x3A

0x3B

0x3C

0x3D

0x3E

0x3F

0x40

0x41

0x42

0x43

0x44

0x45

0x46

0x47

0x48

0x49

0x4A

0x4B

0x4C

0x4D

0x4E

0x4F

0x50

0x51

0x52

0x53

0x54

0x55

0x56

0x57

Linear Law (mA)

22.68

23.15

23.62

24.09

24.57

25.04

25.51

25.98

26.46

26.93

27.40

27.87

28.35

28.82

29.29

29.76

30.24

30.71

31.18

31.65

32.13

32.60

33.07

33.54

34.02

34.49

34.96

35.43

35.91

36.38

36.85

37.32

37.80

38.27

38.74

39.21

39.69

40.16

40.63

41.10

Square Law (mA)¹

8.57

8.932

9.3

9.676

10.058

10.45

10.848

11.254

11.666

12.086

12.514

12.95

13.392

13.842

14.3

14.764

15.238

15.718

16.204

16.7

DAC Code

0x58

0x59

0x5A

0x5B

0x5C

0x5D

0x5E

0x5F

0x60

0x61

0x62

0x63

0x64

0x65

0x66

0x67

0x68

0x69

0x6A

0x6B

0x6C

0x6D

0x6E

0x6F

0x70

0x71

0x72

0x73

0x74

0x75

0x76

0x77

0x78

0x79

0x7A

0x7B

0x7C

0x7D

0x7E

0x7F

Linear Law (mA)

41.57

42.05

42.52

42.99

43.46

43.94

44.41

44.88

45.35

45.83

46.30

46.77

47.24

47.72

48.19

48.66

49.13

49.61

50.08

50.55

51.02

51.50

51.97

52.44

52.91

53.39

53.86

54.33

54.80

55.28

55.75

56.22

56.69

57.17

57.64

58.11

58.58

59.06

59.53

60

Square Law (mA)¹

28.808

29.466

30.132

30.806

31.486

32.174

32.87

33.574

34.284

35.002

35.726

36.46

37.2

37.948

38.702

39.466

40.236

41.014

41.798

42.59

17.202

17.71

43.39

44.198

45.012

45.834

46.664

47.5

48.346

49.198

50.056

50.924

51.798

52.68

53.568

54.464

55.368

56.28

57.198

58.126

59.058

60

18.228

18.752

19.284

19.824

20.37

20.926

21.486

22.056

22.632

23.216

23.808

24.406

25.014

25.628

26.248

26.878

27.514

28.156

¹Cubic 10 and Cubic 11 laws use the square law DAC setting but vary the time

step per DAC code (see the Automated Fade In and Fade Out section).

Rev. 0 | Page 41 of 48

ADP8863

Sink Current Register LED6 (ISC6)—Register 0x15

Table 53. ISC6 Bit Map

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

SCD6

Bit 2

Bit 1

Bit 0

Reserved

Table 54. Bit Descriptions for the ISC6 Register

Bit Name

N/A

Bit No. Description

7

Reserved.

Sink current. Use the following DAC code schedule (see Table 29 for a complete list of values).

SCD6

[6:0]

DAC

Linear Law (mA)

Square Law (mA)

0000000

0000001

0000010

0000011

…

0

0.000

0.002

0.007

0.017

…

0.236

0.472

0.709

…

1111111

30

Sink Current Register LED5 (ISC5)—Register 0x16

Table 55. ISC5 Bit Map

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

SCD5

Bit 2

Bit 1

Reserved

Table 56. Bit Descriptions for the ISC5 Register

Bit Name

N/A

Bit No. Description

7

Reserved.

Sink current. Use the following DAC code schedule (see Table 29 for a complete list of values).

SCD5

[6:0]

DAC

Linear Law (mA)

Square Law (mA)

0000000

0000001

0000010

0000011

…

0

0.000

0.002

0.007

0.017

…

0.236

0.472

0.709

…

1111111

30

Sink Current Register LED4 (ISC4)—Register 0x17

Table 57. ISC4 Bit Map

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

SCD4

Bit 2

Bit 1

Reserved

Table 58. Bit Descriptions for the ISC4 Register

Bit Name

Bit No. Description

N/A

7

Reserved.

Sink current. Use the following DAC code schedule (see Table 29 for a complete list of values):

SCD4

[6:0]

DAC

Linear Law (mA)

Square Law (mA)

0000000

0000001

0000010

0000011

…

0

0.000

0.002

0.007

0.017

…

0.236

0.472

0.709

…

1111111

30

Rev. 0 | Page 42 of 48

ADP8863

Sink Current Register LED3 (ISC3)—Register 0x18

Table 59. ISC3 Bit Map

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

SCD3

Bit 2

Bit 1

Bit 0

Reserved

Table 60. Bit Descriptions for the ISC3 Register

Bit Name

Bit No. Description

N/A

7

Reserved.

Sink current. Use the following DAC code schedule (see Table 29 for a complete list of values).

SCD3

[6:0]

DAC

Linear Law (mA)

Square Law (mA)

0000000

0000001

0000010

0000011

…

0

0.000

0.002

0.007

0.017

…

0.236

0.472

0.709

…

1111111

30

Sink Current Register LED2 (ISC2)—Register 0x19

Table 61. ISC2 Bit Map

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

SCD2

Bit 2

Bit 1

Bit 0

Reserved

Table 62. Bit Descriptions for the ISC2 Register

Bit Name

Bit No. Description

N/A

7

Reserved.

Sink current. Use the following DAC code schedule (see Table 29 for a complete list of values).

SCD2

[6:0]

DAC

Linear Law (mA)

Square Law (mA)

0000000

0000001

0000010

0000011

…

0

0.000

0.002

0.007

0.017

…

0.236

0.472

0.709

…

1111111

30

Sink Current Register LED1 (ISC1)—Register 0x1A

Table 63. ISC1 Bit Map

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

SCD1

Bit 2

Bit 1

Bit 0

Reserved

Table 64. Bit Descriptions for the ISC1 Register

Bit Name

Bit No. Description

N/A

7

Reserved.

Sink current. Use the following DAC code schedule (see Table 29 for a complete list of values).

SCD1

[6:0]

DAC

Linear Law (mA)

Square Law (mA)

0000000

0000001

0000010

0000011

…

0

0.000

0.002

0.007

0.017

…

0.236

0.472

0.709

…

1111111

30

Rev. 0 | Page 43 of 48

ADP8863

COMPARATOR REGISTER DESCRIPTIONS

Comparator Configuration (CCFG)—Register 0x1B

Table 65. CCFG Bit Map

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

FILT

FORCE_RD

L3_OUT

L2_OUT

L3_EN

L2_EN

Table 66. Bit Descriptions for the CCFG Register

Bit Name

Bit No.

Description

FILT

[7:5]

Filter setting for the CMP_IN light sensor.

000 = 80 ms

001 = 160 ms

010 = 320 ms

011 = 640 ms

100 = 1280 ms

101 = 2560 ms

110 = 5120 ms

111 = 10,240 ms

FORCE_RD

4

Force a read of the CMP_IN light sensor while independent sinks are running, but the backlight is not. Reset by

chip after the conversion is complete and L2_OUT and L3_OUT are valid. Ignored if the backlight is enabled.

L3_OUT

L2_OUT

L3_EN

3

2

1

This bit is the output of the L3 comparator.

This bit is the output of the L2 comparator.

1 = the L3 comparator is enabled for the CMP_IN comparator.

0 = the L3 comparator is disabled for the CMP_IN comparator.

Note that the L3 comparator has priority over the L2 comparator.

1 = the L2 comparator is enabled for the CMP_IN comparator.

0 = the L2 comparator is disabled for the CMP_IN comparator.

L2_EN

0

Second Comparator Configuration (CCFG2)—Register 0x1C

Table 67. CCFG2 Bit Map

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

FILT2

FORCE_RD2

L3_OUT2

L2_OUT2

L3_EN2

L2_EN2

Table 68. Bit Descriptions for the CCFG2 Register

Bit Name

Bit No.

Description

FILT2

[7:5]

Filter setting for the CMP_IN2 light sensor.

000 = 80 ms

001 = 160 ms

010 = 320 ms

011 = 640 ms

100 = 1280 ms

101 = 2560 ms

110 = 5120 ms

111= 10,240 ms

FORCE_RD2

4

Force a read of the CMP_IN2 light sensor while independent sinks are running, but the backlight is not. Reset by

chip after the conversion is complete and L2_OUT and L3_OUT are valid. Ignored if backlight is enabled.

L3_OUT2

L2_OUT2

L3_EN2

3

2

1

This bit is the output of the L3 comparator for the second light sensor.

This bit is the output of the L2 comparator for the second light sensor.

1 = the L3 comparator is enabled for the CMP_IN2 comparator.

0 = the L3 comparator is disabled for the CMP_IN2 comparator.

Note that the L3 comparator has priority over the L2 comparator.

1 = the L2 comparator is enabled for the CMP_IN2 comparator.

0 = the L2 comparator is disabled for the CMP_IN2 comparator.

L2_EN2

0

Rev. 0 | Page 44 of 48

ADP8863

Comparator Level 2 Threshold (L2_TRP)—Register 0x1D

Table 69. L2_TRP Bit Map

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

L2_TRP

Bit 2

Bit 1

Bit 0

Table 70. Bit Descriptions for the L2_TRP Register

Bit Name

Bit No.

Description

L2_TRP

[7:0]

Comparator Level 2 threshold. If the comparator input is below L2_TRP, the comparator trips and the

backlight enters Level 2 (office) mode. The following lists the code settings for the photosensor current:

00000000 = 0 μA

00000001 = 4.3 μA

00000010 = 8.6 μA

00000011 = 12.9 μA

…

11111010 = 1080 μA

…

11111111 = 1106 μA

Although codes above 1111010 (250 decimal) are possible, they should not be used. Furthermore, the

maximum value of L2_TRP + L2_HYS must not exceed 11111010 (250).

Comparator Level 2 Hysteresis (L2_HYS)—Register 0x1E

Table 71. L2_HYS Bit Map

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

L2_HYS

Bit 2

Bit 1

Bit 0

Table 72. Bit Descriptions for the L2_HYS Register

Bit Name

Bit No.

Description

L2_HYS

[7:0]

Comparator Level 2 hysteresis. If the comparator input is above L2_TRP + L2_HYS, the comparator trips and

the backlight enters Level 1 (daylight) mode. The following lists the code settings for the photosensor

current hysteresis:

00000000 = 0 μA

00000001 = 4.3 μA

00000010 = 8.6 μA

00000011 = 12.9 μA

…

11111010 = 1080 μA

…

11111111 = 1106 μA

Although codes above 11111010 (250 decimal) are possible, they should not be used. Furthermore, the

maximum value of L2_TRP + L2_HYS must not exceed 11111010 (250).

Rev. 0 | Page 45 of 48

ADP8863

Comparator Level 3 Threshold (L3_TRP)—Register 0x1F

Table 73. L3_TRP Bit Map

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

L3_TRP

Bit 2

Bit 1

Bit 0

Table 74. Bit Descriptions for the L3_TRP Register

Bit Name

Bit No.

Description

L3_TRP

7:0

Comparator Level 3 threshold. If the comparator input is below L3_TRP, the comparator trips and the

backlight enters Level 3 (dark) mode. The following lists the code settings for photosensor current:

00000000 = 0 μA

00000001 = 0.54 μA

00000010 = 1.08 μA

00000011 = 1.62 μA

…

11111111 = 137.7 μA

Comparator Level 3 Hysteresis (L3_HYS)—Register 0x20

Table 75. L3_HYS Bit Map

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

L3_HYS

Bit 2

Bit 1

Bit 0

Table 76. Bit Descriptions for the L3_HYS Register

Bit Name

Bit No.

Description

L3_HYS

[7:0]

Comparator Level 3 hysteresis. If the comparator input is above L3_TRP + L3_HYS, the comparator trips

and the backlight enters Level 2 (office) mode. The following lists the code settings for photosensor

current hysteresis:

00000000 = 0 μA

00000001 = 0.54 μA

00000010 = 1.08 μA

00000011 = 1.62 μA

…

11111111 = 137.7 μA

First Phototransistor Register: Low Byte (PH1LEVL)—Register 0x21

Table 77. PH1LEVL Bit Map

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

PH1LEV_LOW

Table 78. Bit Descriptions for the PH1LEVL Register

Bit Name

Bit No.

Description

PH1LEV_LOW

[7:0]

Lower eight bits of the 13-bit conversion value for the first light sensor (Bit 7 to Bit 0). The value is

updated every 80 ms (when the light sensor is enabled). This is a read-only register.

Rev. 0 | Page 46 of 48

ADP8863

First Phototransistor Register: High Byte (PH1LEVH)—Register 0x22

Table 79. PH1LEVH Bit Map

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Reserved

PH1LEV_HIGH

Table 80. Bit Descriptions for the PH1LEVH Register

Bit Name

Bit No.

Description

N/A

[7:5]

Reserved.

PH1LEV_HIGH

[4:0]

Upper five bits of the 13-bit conversion value for the first light sensor (Bit 12 to Bit 8). The value is

updated every 80 ms (when the light sensor is enabled). This is a read-only register.

Second Phototransistor Register: Low Byte (PH2LEVL)—Register 0x23

Table 81. PH2LEVL Bit Map

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

PH2LEV_LOW

Table 82. Bit Descriptions for the PH2LEVL Register

Bit Name

Bit No.

Description

PH2LEV_LOW

[7:0]

Lower eight bits of the 13-bit conversion value for the second light sensor (Bit 7 to Bit 0). The value is

updated every 80 ms (when the light sensor is enabled). This is a read-only register.

Second Phototransistor Register: High Byte (PH2LEVH)—Register 0x24

Table 83. PH2LEVH Bit Map

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Reserved

PH2LEV_HIGH

Table 84. Bit Descriptions for the PH2LEVH Register

Bit Name

Bit No.

Description

N/A

[7:5]

Reserved

PH2LEV_HIGH

[4:0]

Upper five bits of the 13-bit conversion value for the second light sensor (Bit 12 to Bit 8). The value is

updated every 80 ms (when the light sensor is enabled). This is a read-only register.

Rev. 0 | Page 47 of 48

ADP8863

OUTLINE DIMENSIONS

4.10

4.00 SQ

3.90

0.30

0.25

0.20

PIN 1

INDICATOR

PIN 1

INDICATOR

16

15

20

0.50

BSC

1

EXPOSED

PAD

2.65

2.50 SQ

2.35

5

11

6

10

0.50

0.40

0.30

0.25 MIN

TOP VIEW

BOTTOM VIEW

FOR PROPER CONNECTION OF

THE EXPOSED PAD, REFER TO

THE PIN CONFIGURATION AND

FUNCTION DESCRIPTIONS

0.80

0.75

0.70

0.05 MAX

0.02 NOM

COPLANARITY

0.08

SECTION OF THIS DATA SHEET.

SEATING

PLANE

0.20 REF

COMPLIANT TO JEDEC STANDARDS MO-220-WGGD.

Figure 50. 20-Lead Lead Frame Chip Scale Package [LFCSP_WQ]

4 mm × 4 mm Body, Very Very Thin Quad

(CP-20-10)

Dimensions shown in millimeters

Figure 51. Tape and Reel Orientation for LFCSP Units

ORDERING GUIDE

Model¹

ADP8863ACPZ-R7

ADP8863DBCP-EVALZ

ADP886XMB1-EVALZ

Temperature Range

−40°C to +85°C

Package Description

Package Option

20-Lead LFCSP_WQ, 7”Tape and Reel

Daughter Card

USB-to-I²C Adapter Board

CP-20-10

¹Z = RoHS Compliant Part.

I²C refers to a communications protocol originally developed by Philips Semiconductors (now NXP Semiconductors).

registered trademarks are the property of their respective owners.

D08392-0-4/10(0)

Rev. 0 | Page 48 of 48


型号：	ADP8863DBCP-EVALZ
厂家：	ADI
描述：	Charge Pump,7-Channel Fun Lighting LED Driver 电荷泵， 7通道趣味照明LED驱动器驱动器泵
文件：	总48页 (文件大小：760K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

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SI9137

SI9137DB

SI9137LG

SI9122E