ADR318 [ADI]

Precision Low Drift SOT-23 Voltage Reference with Shutdown; 高精度低漂移SOT -23电压基准，带有关断


型号：	ADR318
厂家：	ADI
描述：	Precision Low Drift SOT-23 Voltage Reference with Shutdown 高精度低漂移SOT -23电压基准，带有关断
文件：	总8页 (文件大小：196K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

Precision Low Drift SOT-23

Voltage Reference with Shutdown

ADR318^*

FEATURES

PIN CONFIGURATION

5-Lead SOT-23

Initial Accuracy: ؎5 mV Max, ؎0.27% Max

Low Temperature Coefficient: 25 ppm/؇C Max

Load Regulation: 100 ppm/mA

Line Regulation: 25 ppm/V

Low Supply Headroom: 0.6 V

Wide Operating Range: (V_OUT+ 0.6 V) to 15 V

Low Power: 120 ␮A Max

GND

SHDN

ADR318

–V

OUT (FORCE)

OUT (SENSE)

Shutdown to Less than 3 ␮A Max

Output Current: 5 mA

Wide Temperature Range: 0؇C to 70؇C

Tiny 5-Lead SOT-23 Package

APPLICATIONS

Battery Powered Instrumentation

Portable Medical Instruments

Data Acquisition Systems

Industrial Process Control Systems

Fault Protection Critical Systems

GENERAL DESCRIPTION

The ADR318 is a precision 1.8 V band gap voltage reference

featuring high accuracy, high stability, and low power consump-

tion in a tiny footprint. Patented temperature drift curvature

correction techniques minimize nonlinearity of the voltage change

with temperature. The wide operating range and low power con-

sumption with additional shutdown capability make the part ideal

for battery powered applications. The V_{OUT (SENSE)}pin enables

greater accuracy by supporting full Kelvin operation in PCBs

employing thin or long traces.

The ADR318 is a low dropout voltage (LDV) device that provides

a stable output voltage from supplies as low as 600 mV above

the output voltage. This device is specified over the industrial

operating range of 0°C to 70°C, and is available in the tiny

5-lead SOT-23 package.

The combination of V_{OUT (SENSE)}and shutdown functions also

enables a number of unique applications, combining precision

reference/regulation with fault decision and overcurrent protection.

Details are provided in the Applications section.

*Protected by U.S. Patent No. 5,969,657; other patents pending.

REV. 0

Information furnished by Analog Devices is believed to be accurate and

reliable. However, no responsibility is assumed by Analog Devices for its

use, norforanyinfringementsofpatentsorotherrightsofthirdpartiesthat

may result from its use. No license is granted by implication or otherwise

under any patent or patent rights of Analog Devices. Trademarks and

registered trademarks are the property of their respective companies.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Tel: 781/329-4700

Fax: 781/326-8703

www.analog.com

ADR318–SPECIFICATIONS

ELECTRICAL CHARACTERISTICS ^(T_A^{= T}_MINto T_MAX,¹V_IN= 5 V, unless otherwise noted.)

Parameter

Symbol

Conditions

Min

Typ Max

Unit

Initial Accuracy

V_O

V_OERR

TCV_O

V_IN– V_OUT

∆V_OUT/∆V_IN

1.795 1.8

–0.27

600

1.802

+0.27

ppm/°C

Initial Accuracy Error

Temperature Coefficient

Minimum Supply Voltage Headroom

Line Regulation

0°C to 70°C

V_IN= 2.5 V to 15 V

0°C < T_A< 70°C

ppm/V

Load Regulation

∆V_OUT/∆I_LOADV_IN= 3 V, I_LOAD= 0 mA to 5 mA

0°C < T_A< 70°C

I_SY

100

ppm/mA

Quiescent Current

No load

0°C < T_A< 70°C

0.1 Hz to 10 Hz

100

120

140

µA

Voltage Noise

e_N

t_R

∆V_OUT

V_{O_HYS}

RRR

I_SC

µV p-p

Turn-On Settling Time

Long Term Stability²

Output Voltage Hysteresis

Ripple Rejection Ratio

Short Circuit to Ground

µs

ppm/1,000 hrs

ppm

µA

_IN= 60 Hz

V_IN= 5.0 V

V_IN= 15.0 V

Shutdown Supply Current

Shutdown Logic Input Current

Shutdown Logic Low

I_SHDN

I_LOGIC

V_INL

500

0.8

Shutdown Logic High

V_INH

2.4

NOTES

¹T_MIN= 0°C, T_MAX= 70°C

²The long-term stability specification is noncumulative. The drift in subsequent 1,000 hour periods is significantly lower than in the first 1,000 hour period.

Specifications subject to change without notice.

–2–

REV. 0

ADR318

ABSOLUTE MAXIMUM RATINGS^{1, 2}

Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 V

Output Short-Circuit Duration

Package Type

␪

Unit

5-Lead SOT-23 (RJ)

230

146

°C/W

to GND . . . . . . . . . . . . . . . . . . . . . Observe Derating Curves

Storage Temperature Range

RJ Package . . . . . . . . . . . . . . . . . . . . . . . . .–65°C to +125°C

Operating Temperature Range . . . . . . . . . . . . . . . 0°C to 70°C

Junction Temperature Range

RJ Package . . . . . . . . . . . . . . . . . . . . . . . . .–65°C to +150°C

Lead Temperature Range

Soldering, 60 sec . . . . . . . . . . . . . . . . . . . . . . . . . . . . 300°C

NOTES

¹Absolute maximum ratings apply at 25°C, unless otherwise noted.

²Stresses above those listed under Absolute Maximum Ratings may cause perma-

nent damage to the device. This is a stress rating only; functional operation of the

device at these or any other conditions above those listed in the operational

sections of this specification is not implied. Exposure to absolute maximum rating

conditions for extended periods may affect device reliability.

ORDERING GUIDE

Temperature

Range

Package

Description

Package

Option

Branding

Information

Output

Voltage

Devices

per Reel

Model

ADR318ARJ-REEL7 0ºC to 70ºC

5-Lead SOT-23

RJ-5

R0A

1.800 V

3,000

CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily

accumulate on the human body and test equipment and can discharge without detection. Although the

ADR318 features proprietary ESD protection circuitry, permanent damage may occur on devices

subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended

to avoid performance degradation or loss of functionality.

REV. 0

–3–

ADR318–Typical Performance Characteristics

1.802

1.801

1.800

1.799

1.798

110

100

–30

–40

–50

–60

–70

–80

70؇C

10V

25؇C

0؇C

2.5V

2.5

5.0

7.5

10.0

12.5

15.0

INPUTVOLTAGE –V

TEMPERATURE – ؇C

TPC 2. Supply Current vs.

Input Voltage

TPC 1. Typical Output Voltage

vs. Temperature

TPC 3. Load Regulation vs.

Temperature

–5

2.5

2.3

2.1

1.9

1.7

0؇C

–10

–15

–20

–25

25؇C

70؇C

TEMPERATURE – ؇C

TIME – 400ms/DIV

LOAD CURRENT – mA

TPC 6. Typical Output Voltage

Noise 0.1 Hz to 10 Hz

TPC 4. Line Regulation vs.

Temperature

TPC 5. Minimum Input Voltage

vs. Load Current

TIME – 10ms/DIV

TIME – 40␮s/DIV

TPC 7. Typical Output Voltage

Noise 10 Hz to 10 kHz

TPC 8. Line Transient

Response, C_BYPASS= 0 µF

TPC 9. Line Transient

Response, C_BYPASS= 0.1 µF

–4–

REV. 0

ADR318

LOAD OFF

LOAD ON

LOAD OFF

LOAD ON

LOAD OFF

LOAD ON

TIME – 200␮s/DIV

TPC 10. Load Transient Response,

C_L= 0 nF

TPC 11. Load Transient Response,

C_L= 1 nF

TPC 12. Load Transient Response,

C_L= 100 nF

OUT

SHUTDOWN PIN

OUT

TIME – 4␮s/DIV

TIME – 100␮s/DIV

TIME – 40␮s/DIV

TPC 15. Shutdown Pin Response

TPC 13. Turn On/Turn Off

TPC 14. Turn On/Turn Off Response

Response at 5 V, R_LOAD= 1.8 kΩ

at 5 V, R_LOAD= 1.8 kΩ, C_BYPASS= 0.1 µF

REV. 0

–5–

ADR318

PARAMETER DEFINITIONS

THEORY OF OPERATION

Temperature Coefficient

Band gap references are the high performance solution for low

supply voltage and low power voltage reference applications,

and the ADR318 is no exception. The uniqueness of this product

lies in its architecture. By observing Figure 1, the ideal zero TC

band gap voltage is referenced to the output, not to ground.

Therefore, if noise exists on the ground line, it will be greatly

attenuated on V_OUT. The band gap cell consists of the PNP pair

Q51 and Q52, running at unequal current densities. The difference

in V_BEresults in a voltage with a positive TC that is amplified by

the ratio of 2 ϫ R58/R54. This PTAT voltage, combined with

the V_BEs of Q51 and Q52, produces the stable band gap voltage.

Temperature coefficient is the change of output voltage with

respect to operating temperature changes, normalized by the

output voltage at 25°C. This parameter is expressed in ppm/°C,

and can be determined with the following equation:

V T –V T

(

)

( )

 ppm

TCV_O

×10⁶

(1)





°C

V 25°C × T – T

(

)

(

)





where:

V_O(25°C) = V_Oat 25°C

V_O(T₁) = V_Oat temperature 1

V_O(T₂) = V_Oat temperature 2

Long Term Stability

Long term stability is the typical shift of output voltage at 25°C

on a sample of parts subjected to a test of 1,000 hours at 25°C:

Reduction in band gap curvature is performed by the ratio of

the resistors R44 and R59, one of which is linearly temperature

dependent. Precision laser trimming and other patented circuit

techniques are used to further enhance the drift performance.

∆V_O=V_O

−V

( ₀) _O( ₁)

OUT(FORCE)

OUT(SENSE)

V_O

t −V t

V_O

( ₀) _O( ₁)

×10⁶

(2)

∆V_Oppm =

[

]

R59

R44

R58

( ₀)

where:

R49

V_O(t₀) = V_Oat 25°C at time 0

R54

V_O(t₁) = V_Oat 25°C after 1,000 hours operation at 25°C

Thermal Hysteresis

R53

Q51

Thermal hystereses is defined as the change of output voltage

after the device is cycled through temperature from +25°C to

Q52

SHDN

–40°C to +125°C and back to +25°C. This is a typical value from a

R48

sample of parts put through such a cycle.

R60

R61

V_{O _ HYS}=V_O25°C −V

GND

(

)

O _ TC

Figure 1. Simplified Schematic

Device Power Dissipation Considerations

V_O25°C −V

(

)

O _ TC

×10⁶

(3)

V_{O _ HYS}ppm =

[

]

V_O25°C

(

)

The ADR318 is capable of delivering load currents up to 5 mA

with an input voltage that ranges from 2.4 V to 15 V. When this

device is used in applications with high input voltages, care should

be taken to avoid exceeding the specified maximum power dissi-

pation or junction temperature that could result in premature

device failure. The following formula should be used to calculate

the device’s maximum junction temperature or dissipation:

where:

V_O(25°C) = V_Oat 25°C

_{O_TC}= V_Oat 25°C after temperature cycle at +25°C to –40°C

to +125°C and back to +25°C

T_J−T_A

P_D

(4)

θ_JA

In Equation 4, T_Jand T_Aare, respectively, the junction and

ambient temperatures, P_Dis the device power dissipation, and

_JAis the device package thermal resistance.

Shutdown Mode Operation

The ADR318 includes a shutdown feature that is TTL/CMOS

compatible. A logic LOW or a 0 V condition on the SHDN pin

is required to turn the device off. During shutdown, the output

of the reference becomes a high impedance state where its potential

would then be determined by external circuitry. If the shutdown

feature is not used, the SHDN pin should be connected to V_IN

(Pin 2).

–6–

REV. 0

ADR318

APPLICATIONS

General-Purpose Current Source

Basic Voltage Reference Connection

Many times in low power applications, the need arises for a preci-

sion current source that can operate on low supply voltages. As

shown in Figure 4, the ADR318 can be configured as a precision

current source. The circuit configuration illustrated is a floating

current source with a grounded load. The reference’s output voltage

is bootstrapped across R1, which sets the output current into the

load. With this configuration, circuit precision is maintained for

load currents in the range from the reference’s supply current,

typically 90 mA to approximately 5 mA. The supply current is a

The circuit in Figure 2 illustrates the basic configuration for the

ADR318. Decoupling capacitors are not required for circuit stability.

The ADR318 is capable of driving capacitative loads from 0 µF to

10 µF. However, a 0.1 µF ceramic output capacitor is recommended

to absorb and deliver the charge as is required by a dynamic load.

GND

SHUTDOWN

INPUT

SHDN

ADR318

function of I_SETand will increase slightly at a given I_SET

0.1␮F

OUT(S)

OUT(F)

ADR318

OUTPUT

0.1␮F

OUT(F)

SHDN

OUT(S)

Figure 2. Voltage Reference Connection

GND

SET

Precision Negative Voltage Reference without Precision Resistors

A negative reference can be easily generated by combining the

ADR318 with an op amp. Figure 3 shows this simple negative

reference configuration. V_OUT(F)and V_OUT(S)are at virtual ground

and therefore the negative reference can be taken directly from

the output of the op amp. The op amp should be a dual-supply,

low offset, rail-to-rail amplifier, such as the OP1177.

0.1␮F

)

ADJ

SY SET

= I

+ I (I

SV SET

)

OUT

SET

Figure 4. General-Purpose Current Source

ADR318

OUT(F)

SHDN

OUT(S)

GND

–VREF

OP1177

–V

Figure 3. Negative Reference

REV. 0

–7–

ADR318

High Power Performance with Current Limit

A similar circuit function can also be achieved using the Darlington

transistor configuration, as shown in Figure 6.

In some cases, the user may want higher output current delivered

to a load and still achieve better than 0.5% accuracy out of the

ADR318. The accuracy for a reference is normally specified on

the data sheet with no load. However, the output voltage changes

with load current.

ADR318

R1 4.7k⍀

The circuit in Figure 5 provides high current without compromis-

ing the accuracy of the ADR318. The power BJT Q1 provides

the required current, up to a 1 A. The ADR318 delivers the base

drive to Q1 through the force pin. The sense pin of the ADR318

is a regulated output and is connected to the load.

SHDN

GND

OUT(F)

OUT(S)

The transistor Q2 protects Q1 during short circuit limit faults by

robbing its base drive. The maximum current is I_{L, MAX}= 0.6 V/R_S.

ADR318

Figure 6. High Output Current with Darlington

Drive Configuration

R1 4.7k⍀

SHDN

GND

OUT(F)

OUT(S)

Figure 5. High Power Performance with Current Limit

OUTLINE DIMENSIONS

5-Lead Plastic Surface-Mount Package [SOT-23]

(RJ-5)

Dimensions shown in millimeters

2.90 BSC

2.80 BSC

1.60 BSC

PIN 1

0.95 BSC

1.90

BSC

1.30

1.15

0.90

1.45 MAX

10؇

0؇

0.15 MAX

0.50

0.30

0.60

0.45

0.30

SEATING

PLANE

0.22

0.08

COMPLIANT TO JEDEC STANDARDS MO-178AA

–8–

REV. 0

ADR318 [ADI]

相关型号：

SI9130DB

SI9135LG-T1

SI9135LG-T1-E3

SI9135_11

SI9136_11

SI9130CG-T1-E3

SI9130LG-T1-E3

SI9130_11

SI9137

SI9137DB

SI9137LG

SI9122E