ADR3540WARMZ-R7 [ADI]

Micropower, High Accuracy; 微功耗,高精度
ADR3540WARMZ-R7
型号: ADR3540WARMZ-R7
厂家: ADI    ADI
描述:

Micropower, High Accuracy
微功耗,高精度

文件: 总20页 (文件大小:862K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
Micropower, High Accuracy  
Voltage References  
Data Sheet  
ADR3525/ADR3530/ADR3533/ADR3540/ADR3550  
FEATURES  
PIN CONFIGURATION  
ENABLE  
GND SENSE  
GND FORCE  
NC  
1
2
3
4
8
7
6
5
V
V
V
Maximum temperature coefficient: 5 ppm/°C (B grade)  
Low long-term drift (LTD): 30 ppm (initial 1 khr typical)  
Initial output voltage error: 0.1ꢀ (maximum)  
Operating temperature range: −40°C to +125°C  
Output current: +10 mA source/−3 mA sink  
Low quiescent current: 100 μA (maximum)  
Low dropout voltage: 250 mV at 2 mA  
IN  
ADR35xx  
SENSE  
FORCE  
OUT  
OUT  
TOP VIEW  
(Not to Scale)  
NC  
NOTES  
1. NC = NO CONNECT. DO NOT  
CONNECT TO THIS PIN.  
Figure 1. 8-Lead MSOP (RM-8 Suffix)  
Output voltage noise (0.1 Hz to 10 Hz): 29 μV p-p at  
4.096 V (typical)  
Qualified for automotive applications  
APPLICATIONS  
Automotive battery monitors  
Portable instrumentation  
Process transmitters  
Remote sensors  
Medical instrumentation  
GENERAL DESCRIPTION  
Table 1. Selection Guide  
Model Output Voltage (V)  
The ADR3525W, ADR3530W, ADR3533W, ADR3540W, and  
ADR3550W are low cost, low power, high precision CMOS  
voltage references, featuring a maximum temperature coeffi-  
cient (TC) of 5 ppm/°C (B grade), 8 ppm/°C (A grade), low  
operating current, and low output noise in an 8-lead MSOP  
package. For high accuracy, the output voltage and temperature  
coefficient are trimmed digitally during final assembly using the  
Analog Devices, Inc., patented DigiTrim® technology.  
Input Voltage Range (V)  
2.7 to 5.5  
3.2 to 5.5  
3.5 to 5.5  
4.3 to 5.5  
ADR3525W 2.500  
ADR3530W 3.000  
ADR3533W 3.300  
ADR3540W 4.096  
ADR3550W 5.000  
5.2 to 5.5  
The low output voltage hysteresis and low long-term output  
voltage drift improve lifetime system accuracy.  
These CMOS references are available in five output voltages, all  
of which are specified over the automotive temperature range of  
−40°C to +125°C.  
Rev. 0  
Information furnished by Analog Devices is believed to be accurate and reliable. However, no  
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other  
rights of third parties that may result from its use. Specifications subject to change without notice. No  
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.  
Trademarks and registeredtrademarks arethe property of their respective owners.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781.329.4700  
Fax: 781.461.3113  
www.analog.com  
©2011 Analog Devices, Inc. All rights reserved.  
 
ADR3525/ADR3530/ADR3533/ADR3540/ADR3550  
TABLE OF CONTENTS  
Data Sheet  
Features .............................................................................................. 1  
Applications....................................................................................... 1  
Pin Configuration............................................................................. 1  
General Description......................................................................... 1  
Revision History ............................................................................... 2  
Specifications..................................................................................... 3  
ADR3525 Electrical Characteristics .......................................... 3  
ADR3530 Electrical Characteristics .......................................... 4  
ADR3533 Electrical Characteristics .......................................... 5  
ADR3540 Electrical Characteristics .......................................... 6  
ADR3550 Electrical Characteristics .......................................... 7  
Absolute Maximum Ratings............................................................ 8  
Thermal Resistance ...................................................................... 8  
ESD Caution.................................................................................. 8  
Pin Configuration and Function Descriptions............................. 9  
Typical Performance Characteristics ........................................... 10  
Terminology.................................................................................... 16  
Theory of Operation ...................................................................... 17  
Long-Term Output Voltage Drift............................................. 17  
Power Dissipation....................................................................... 17  
Applications Information.............................................................. 18  
Basic Voltage Reference Connection....................................... 18  
Input and Output Capacitors.................................................... 18  
4-Wire Kelvin Connections ...................................................... 18  
VIN Slew Rate Considerations................................................... 18  
Shutdown/Enable Feature ......................................................... 18  
Sample Applications................................................................... 19  
Outline Dimensions....................................................................... 20  
Ordering Guide .......................................................................... 20  
Automotive Products................................................................. 20  
REVISION HISTORY  
9/11—Revision 0: Initial Version  
Rev. 0 | Page 2 of 20  
 
Data Sheet  
ADR3525/ADR3530/ADR3533/ADR3540/ADR3550  
SPECIFICATIONS  
ADR3525 ELECTRICAL CHARACTERISTICS  
VIN = 2.7 V to 5.5 V, IL = 0 mA, TA = 25°C, unless otherwise noted.  
Table 2.  
Parameter  
Symbol  
VOUT  
Conditions  
Min  
Typ  
Max  
Unit  
V
OUTPUT VOLTAGE  
2.4975  
2.500 2.5025  
INITIAL OUTPUT VOLTAGE ERROR  
VOERR  
0.ꢀ  
2.5  
%
mV  
TEMPERATURE COEFFICIENT  
A Grade  
B Grade  
TCVOUT  
−40°C ≤ TA ≤ +ꢀ25°C  
2.5  
2.5  
5
8
5
ppm/°C  
ppm/°C  
ppm/V  
ppm/V  
LINE REGULATION  
ΔVOUT/ΔVIN VIN = 2.7 V to 5.5 V  
VIN = 2.7 V to 5.5 V, −40°C ≤ TA ≤ +ꢀ25°C  
50  
ꢀ20  
LOAD REGULATION  
Sourcing  
ΔVOUT/ΔIL  
IL = 0 mA to ꢀ0 mA,  
VIN = 3.0 V, −40°C ≤ TA ≤ +ꢀ25°C  
IL = 0 mA to −3 mA,  
ꢀ0  
ꢀ0  
30  
50  
ppm/mA  
ppm/mA  
Sinking  
V
IN = 3.0 V, −40°C ≤ TA ≤ +ꢀ25°C  
OUTPUT CURRENT CAPACITY  
Sourcing  
Sinking  
IL  
VIN = 3.0 V to 5.5 V  
VIN = 3.0 V to 5.5 V  
ꢀ0  
−3  
mA  
mA  
QUIESCENT CURRENT  
Normal Operation  
IQ  
ENABLE ≥ VIN × 0.85  
ENABLE = VIN, −40°C ≤ TA ≤ +ꢀ25°C  
ENABLE ≤ 0.7 V  
85  
ꢀ00  
5
μA  
μA  
μA  
mV  
mV  
Shutdown  
DROPOUT VOLTAGEꢀ  
VDO  
IL = 0 mA, TA = −40°C ≤ TA ≤ +ꢀ25°C  
IL = 2 mA, TA = −40°C ≤ TA ≤ +ꢀ25°C  
50  
75  
200  
250  
ENABLE PIN  
Shutdown Voltage  
ENABLE Voltage  
ENABLE Pin Leakage Current  
OUTPUT VOLTAGE NOISE  
VL  
VH  
IEN  
0
0.7  
VIN  
3
V
V
μA  
VIN × 0.85  
ENABLE = VIN, TA = −40°C ≤ TA ≤ +ꢀ25°C  
f = 0.ꢀ Hz to ꢀ0 Hz  
f = ꢀ0 Hz to ꢀ0 kHz  
en p-p  
ꢀ8  
42  
μV p-p  
μV rms  
ꢁV/√Hz  
ppm  
dB  
OUTPUT VOLTAGE NOISE DENSITY  
OUTPUT VOLTAGE HYSTERESIS2  
RIPPLE REJECTION RATIO  
en  
f = ꢀ kHz  
ΔVOUT_HYS  
RRR  
TA = +25°C to −40°C to +ꢀ25°C to +25°C  
fIN = 60 Hz  
70  
−60  
30  
600  
LONG-TERM OUTPUT VOLTAGE DRIFT  
TURN-ON SETTLING TIME  
ΔVOUT_LTD  
tR  
ꢀ000 hours at 50°C  
ppm  
μs  
CIN = 0.ꢀ μF, CL = 0.ꢀ μF, RL = ꢀ kΩ  
Refers to the minimum difference between VIN and VOUT such that VOUT maintains a minimum accuracy of 0.ꢀ%. See the Terminology section.  
2 See the Terminology section. The part is placed through the temperature cycle in the order of temperatures shown.  
Rev. 0 | Page 3 of 20  
 
ADR3525/ADR3530/ADR3533/ADR3540/ADR3550  
Data Sheet  
ADR3530 ELECTRICAL CHARACTERISTICS  
VIN = 3.2 V to 5.5 V, IL = 0 mA, TA = 25°C, unless otherwise noted.  
Table 3.  
Parameter  
Symbol  
VOUT  
Conditions  
Min  
Typ  
Max  
Unit  
V
OUTPUT VOLTAGE  
2.9970  
3.0000 3.0030  
INITIAL OUTPUT VOLTAGE ERROR  
VOERR  
0.ꢀ  
3.0  
%
mV  
TEMPERATURE COEFFICIENT  
A Grade  
B Grade  
TCVOUT  
−40°C ≤ TA ≤ +ꢀ25°C  
2.5  
2.5  
5
8
5
ppm/°C  
ppm/°C  
ppm/V  
ppm/V  
LINE REGULATION  
ΔVOUT/ΔVIN VIN = 3.2 V to 5.5 V  
VIN = 3.2 V to 5.5 V, −40°C ≤ TA ≤ +ꢀ25°C  
50  
ꢀ20  
LOAD REGULATION  
Sourcing  
ΔVOUT/ΔIL  
IL = 0 mA to ꢀ0 mA,  
VIN = 3.5 V, −40°C ≤ TA ≤ +ꢀ25°C  
IL = 0 mA to −3 mA,  
9
30  
50  
ppm/mA  
ppm/mA  
Sinking  
ꢀ0  
V
IN = 3.5 V, −40°C ≤ TA ≤ +ꢀ25°C  
OUTPUT CURRENT CAPACITY  
Sourcing  
Sinking  
IL  
VIN = 3.5 V to 5.5 V  
VIN = 3.5 V to 5.5 V  
ꢀ0  
−3  
mA  
mA  
QUIESCENT CURRENT  
Normal Operation  
IQ  
ENABLE ≥ VIN × 0.85  
ENABLE = VIN, −40°C ≤ TA ≤ +ꢀ25°C  
ENABLE ≤ 0.7 V  
85  
ꢀ00  
5
μA  
μA  
μA  
mV  
mV  
Shutdown  
DROPOUT VOLTAGEꢀ  
VDO  
IL = 0 mA, TA = −40°C ≤ TA ≤ +ꢀ25°C  
IL = 2 mA, TA = −40°C ≤ TA ≤ +ꢀ25°C  
50  
75  
200  
250  
ENABLE PIN  
Shutdown Voltage  
ENABLE Voltage  
ENABLE Pin Leakage Current  
OUTPUT VOLTAGE NOISE  
VL  
VH  
IEN  
0
0.7  
VIN  
3
V
V
μA  
VIN × 0.85  
ENABLE = VIN, TA = −40°C ≤ TA ≤ +ꢀ25°C  
f = 0.ꢀ Hz to ꢀ0 Hz  
f = ꢀ0 Hz to ꢀ0 kHz  
0.85  
22  
45  
en p-p  
μV p-p  
μV rms  
ꢁV/√Hz  
ppm  
dB  
OUTPUT VOLTAGE NOISE DENSITY  
OUTPUT VOLTAGE HYSTERESIS2  
RIPPLE REJECTION RATIO  
en  
f = ꢀ kHz  
ꢀ.ꢀ  
70  
ΔVOUT_HYS  
RRR  
TA = +25°C to −40°C to +ꢀ25°C to +25°C  
fIN = 60 Hz  
−60  
30  
LONG-TERM OUTPUT VOLTAGE DRIFT  
TURN-ON SETTLING TIME  
ΔVOUT_LTD  
tR  
ꢀ000 hours at 50°C  
ppm  
μs  
CIN = 0.ꢀ μF, CL = 0.ꢀ μF, RL = ꢀ kΩ  
700  
Refers to the minimum difference between VIN and VOUT such that VOUT maintains a minimum accuracy of 0.ꢀ%. See the Terminology section.  
2 See the Terminology section. The part is placed through the temperature cycle in the order of temperatures shown.  
Rev. 0 | Page 4 of 20  
 
Data Sheet  
ADR3525/ADR3530/ADR3533/ADR3540/ADR3550  
ADR3533 ELECTRICAL CHARACTERISTICS  
VIN = 3.5 V to 5.5 V, IL = 0 mA, TA = 25°C, unless otherwise noted.  
Table 4.  
Parameter  
Symbol  
VOUT  
Test Conditions/Comments  
Min  
Typ  
Max  
Unit  
V
OUTPUT VOLTAGE  
3.2967  
3.3000 3.3033  
INITIAL OUTPUT VOLTAGE ERROR  
VOERR  
0.ꢀ  
3.3  
%
mV  
TEMPERATURE COEFFICIENT  
A Grade  
B Grade  
TCVOUT  
−40°C ≤ TA ≤ +ꢀ25°C  
2.5  
2.5  
5
8
5
ppm/°C  
ppm/°C  
ppm/V  
ppm/V  
LINE REGULATION  
ΔVOUT/ΔVIN VIN = 3.5 V to 5.5 V  
VIN = 3.5 V to 5.5 V, −40°C ≤ TA ≤ +ꢀ25°C  
50  
ꢀ20  
LOAD REGULATION  
Sourcing  
ΔVOUT/ΔIL  
IL = 0 mA to ꢀ0 mA,  
VIN = 3.8 V, −40°C ≤ TA ≤ +ꢀ25°C  
IL = 0 mA to −3 mA,  
9
30  
50  
ppm/mA  
ppm/mA  
Sinking  
ꢀ0  
V
IN = 3.8 V, −40°C ≤ TA ≤ +ꢀ25°C  
OUTPUT CURRENT CAPACITY  
Sourcing  
Sinking  
IL  
VIN = 3.8 V to 5.5 V  
VIN = 3.8 V to 5.5 V  
ꢀ0  
−3  
mA  
mA  
QUIESCENT CURRENT  
Normal Operation  
IQ  
ENABLE ≥ VIN × 0.85  
ENABLE = VIN, −40°C ≤ TA ≤ +ꢀ25°C  
ENABLE ≤ 0.7 V  
85  
ꢀ00  
5
μA  
μA  
μA  
mV  
mV  
Shutdown  
DROPOUT VOLTAGEꢀ  
VDO  
IL = 0 mA, TA = −40°C ≤ TA ≤ +ꢀ25°C  
IL = 2 mA, TA = −40°C ≤ TA ≤ +ꢀ25°C  
50  
75  
200  
250  
ENABLE PIN  
Shutdown Voltage  
ENABLE Voltage  
ENABLE Pin Leakage Current  
OUTPUT VOLTAGE NOISE  
VL  
VH  
IEN  
0
0.7  
VIN  
3
V
V
μA  
VIN × 0.85  
ENABLE = VIN, TA = −40°C ≤ TA ≤ +ꢀ25°C  
f = 0.ꢀ Hz to ꢀ0 Hz  
f = ꢀ0 Hz to ꢀ0 kHz  
0.85  
25  
46  
en p-p  
μV p-p  
μV rms  
ꢁV/√Hz  
ppm  
dB  
OUTPUT VOLTAGE NOISE DENSITY  
OUTPUT VOLTAGE HYSTERESIS2  
RIPPLE REJECTION RATIO  
en  
f = ꢀ kHz  
ꢀ.2  
70  
ΔVOUT_HYS  
RRR  
TA = +25°C to −40°C to +ꢀ25°C to +25°C  
fIN = 60 Hz  
−60  
30  
LONG-TERM OUTPUT VOLTAGE DRIFT ΔVOUT_LTD  
TURN-ON SETTLING TIME tR  
ꢀ000 hours at 50°C  
ppm  
μs  
CIN = 0.ꢀ μF, CL = 0.ꢀ μF, RL = ꢀ kΩ  
750  
Refers to the minimum difference between VIN and VOUT such that VOUT maintains a minimum accuracy of 0.ꢀ%. See the Terminology section.  
2 See the Terminology section. The part is placed through the temperature cycle in the order of temperatures shown.  
Rev. 0 | Page 5 of 20  
 
ADR3525/ADR3530/ADR3533/ADR3540/ADR3550  
Data Sheet  
ADR3540 ELECTRICAL CHARACTERISTICS  
VIN = 4.3 V to 5.5 V, IL = 0 mA, TA = 25°C, unless otherwise noted.  
Table 5.  
Parameter  
Symbol  
VOUT  
Test Conditions/Comments  
Min  
Typ  
Max  
Unit  
V
OUTPUT VOLTAGE  
4.09ꢀ9  
4.0960 4.ꢀ000  
0.ꢀ  
INITIAL OUTPUT VOLTAGE ERROR  
VOERR  
%
4.096 mV  
TEMPERATURE COEFFICIENT  
A Grade  
B Grade  
TCVOUT  
−40°C ≤ TA ≤ +ꢀ25°C  
2.5  
2.5  
3
8
5
ppm/°C  
ppm/°C  
ppm/V  
ppm/V  
LINE REGULATION  
ΔVOUT/ΔVIN VIN = 4.3 V to 5.5 V  
VIN = 4.3 V to 5.5 V, −40°C ≤ TA ≤ +ꢀ25°C  
50  
ꢀ20  
LOAD REGULATION  
Sourcing  
ΔVOUT/ΔIL  
IL = 0 mA to ꢀ0 mA,  
VIN = 4.6 V, −40°C ≤ TA ≤ +ꢀ25°C  
IL = 0 mA to −3 mA,  
6
30  
50  
ppm/mA  
ppm/mA  
Sinking  
ꢀ5  
V
IN = 4.6 V, −40°C ≤ TA ≤ +ꢀ25°C  
OUTPUT CURRENT CAPACITY  
Sourcing  
Sinking  
IL  
VIN = 4.6 V to 5.5 V  
VIN = 4.6 V to 5.5 V  
ꢀ0  
−3  
mA  
mA  
QUIESCENT CURRENT  
Normal Operation  
IQ  
ENABLE ≥ VIN × 0.85  
ENABLE = VIN, −40°C ≤ TA ≤ +ꢀ25°C  
ENABLE ≤ 0.7 V  
85  
ꢀ00  
5
μA  
μA  
μA  
mV  
mV  
Shutdown  
DROPOUT VOLTAGEꢀ  
VDO  
IL = 0 mA, TA = −40°C ≤ TA ≤ +ꢀ25°C  
IL = 2 mA, TA = −40°C ≤ TA ≤ +ꢀ25°C  
50  
75  
200  
250  
ENABLE PIN  
Shutdown Voltage  
ENABLE Voltage  
ENABLE Pin Leakage Current  
OUTPUT VOLTAGE NOISE  
VL  
VH  
IEN  
0
0.7  
VIN  
3
V
V
μA  
VIN × 0.85  
ENABLE = VIN, TA = −40°C ≤ TA ≤ +ꢀ25°C  
f = 0.ꢀ Hz to ꢀ0 Hz  
f = ꢀ0 Hz to ꢀ0 kHz  
0.85  
29  
53  
en p-p  
μV p-p  
μV rms  
ꢁV/√Hz  
ppm  
dB  
OUTPUT VOLTAGE NOISE DENSITY  
OUTPUT VOLTAGE HYSTERESIS2  
RIPPLE REJECTION RATIO  
en  
f = ꢀ kHz  
ꢀ.4  
70  
ΔVOUT_HYS  
RRR  
TA = +25°C to −40°C to +ꢀ25°C to +25°C  
fIN = 60 Hz  
−60  
30  
LONG-TERM OUTPUT VOLTAGE DRIFT  
TURN-ON SETTLING TIME  
ΔVOUT_LTD  
tR  
ꢀ000 hours at 50°C  
ppm  
μs  
CIN = 0.ꢀ μF, CL = 0.ꢀ μF, RL = ꢀ kΩ  
800  
Refers to the minimum difference between VIN and VOUT such that VOUT maintains a minimum accuracy of 0.ꢀ%. See the Terminology section.  
2 See the Terminology section. The part is placed through the temperature cycle in the order of temperatures shown.  
Rev. 0 | Page 6 of 20  
 
Data Sheet  
ADR3525/ADR3530/ADR3533/ADR3540/ADR3550  
ADR3550 ELECTRICAL CHARACTERISTICS  
VIN = 5.2 V to 5.5 V, TA = 25°C, ILOAD = 0 mA, unless otherwise noted.  
Table 6.  
Parameter  
Symbol  
VOUT  
Test Conditions/Comments  
Min  
Typ  
Max  
Unit  
V
OUTPUT VOLTAGE  
4.995  
5.000 5.005  
INITIAL OUTPUT VOLTAGE ERROR  
VOERR  
0.ꢀ  
5.0  
%
mV  
TEMPERATURE COEFFICIENT  
A Grade  
B Grade  
TCVOUT  
−40°C ≤ TA ≤ +ꢀ25°C  
2.5  
2.5  
3
8
5
ppm/°C  
ppm/°C  
ppm/V  
ppm/V  
LINE REGULATION  
ΔVOUT/ΔVIN VIN = 5.2 V to 5.5 V  
VIN = 5.2 V to 5.5 V, −40°C ≤ TA ≤ +ꢀ25°C  
50  
ꢀ20  
LOAD REGULATION  
Sourcing  
ΔVOUT/ΔIL  
IL = 0 mA to ꢀ0 mA,  
VIN = 5.5 V, −40°C ≤ TA ≤ +ꢀ25°C  
IL = 0 mA to −3 mA,  
3
30  
50  
ppm/mA  
ppm/mA  
Sinking  
ꢀ9  
V
IN = 5.5 V, −40°C ≤ TA ≤ +ꢀ25°C  
OUTPUT CURRENT CAPACITY  
Sourcing  
Sinking  
IL  
VIN = 5.5 V  
VIN = 5.5 V  
ꢀ0  
−3  
mA  
mA  
QUIESCENT CURRENT  
Normal Operation  
IQ  
ENABLE > VIN × 0.85  
ENABLE = VIN, −40°C ≤ TA ≤ +ꢀ25°C  
ENABLE < 0.7 V  
85  
ꢀ00  
5
μA  
μA  
μA  
mV  
mV  
Shutdown  
DROPOUT VOLTAGEꢀ  
VDO  
IL = 0 mA, −40°C ≤ TA ≤ +ꢀ25°C  
IL = 2 mA, −40°C ≤ TA ≤ +ꢀ25°C  
50  
75  
200  
250  
ENABLE PIN  
Shutdown Voltage  
ENABLE Voltage  
ENABLE Pin Leakage Current  
OUTPUT VOLTAGE NOISE  
VL  
VH  
IEN  
0
0.7  
VIN  
3
V
V
μA  
VIN × 0.85  
ENABLE = VIN, −40°C ≤ TA ≤ +ꢀ25°C  
f = 0.ꢀ Hz to ꢀ0 Hz  
f = ꢀ0 Hz to ꢀ0 kHz  
0.85  
35  
60  
en p-p  
μV p-p  
μV rms  
μV/√Hz  
ppm  
dB  
OUTPUT VOLTAGE NOISE DENSITY  
OUTPUT VOLTAGE HYSTERESIS2  
RIPPLE REJECTION RATIO  
en  
f = ꢀ kHz  
ꢀ.5  
70  
ΔVOUT_HYS  
RRR  
TA = +25°C to −40°C to +ꢀ25°C to +25°C  
fIN = 60 Hz  
−58  
30  
LONG-TERM OUTPUT VOLTAGE DRIFT ΔVOUT_LTD  
TURN-ON SETTLING TIME tR  
ꢀ000 hours at 50°C  
ppm  
μs  
CIN = 0.ꢀ μF, CL = 0.ꢀ μF, RL = ꢀ kΩ  
900  
Refers to the minimum difference between VIN and VOUT such that VOUT maintains a minimum accuracy of 0.ꢀ%. See the Terminology section.  
2 See the Terminology section. The part is placed through the temperature cycle in the order of temperatures shown.  
Rev. 0 | Page 7 of 20  
 
ADR3525/ADR3530/ADR3533/ADR3540/ADR3550  
ABSOLUTE MAXIMUM RATINGS  
Data Sheet  
TA = 25°C, unless otherwise noted.  
THERMAL RESISTANCE  
θJA is specified for the worst-case conditions, that is, a device  
soldered in a circuit board for surface-mount packages.  
Table 7.  
Parameter  
Rating  
Supply Voltage  
6 V  
VIN  
Table 8. Thermal Resistance  
Package Type  
8-Lead MSOP (RM-8 Suffix)  
ENABLE to GND SENSE Voltage  
Operating Temperature Range  
Storage Temperature Range  
Junction Temperature Range  
θJA  
θJC  
Unit  
−40°C to +ꢀ25°C  
−65°C to +ꢀ50°C  
−65°C to +ꢀ50°C  
ꢀ32.5  
43.9  
°C/W  
ESD CAUTION  
Stresses above those listed under Absolute Maximum Ratings  
may cause permanent damage to the device. This is a stress  
rating only; functional operation of the device at these or any  
other conditions above those indicated in the operational  
section of this specification is not implied. Exposure to absolute  
maximum rating conditions for extended periods may affect  
device reliability.  
Rev. 0 | Page 8 of 20  
 
Data Sheet  
ADR3525/ADR3530/ADR3533/ADR3540/ADR3550  
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS  
ENABLE  
GND SENSE  
GND FORCE  
NC  
1
2
3
4
8
7
6
5
V
V
V
IN  
ADR35xx  
SENSE  
FORCE  
OUT  
OUT  
TOP VIEW  
(Not to Scale)  
NC  
NOTES  
1. NC = NO CONNECT. DO NOT  
CONNECT TO THIS PIN.  
Figure 2. Pin Configuration  
Table 9. Pin Function Descriptions  
Pin No.  
Mnemonic  
ENABLE  
GND SENSE  
GND FORCE  
NC  
Description  
2
3
4
5
6
7
8
Enable Connection. Enables or disables the device.  
Ground Voltage Sense Connection. Connect directly to the point of lowest potential in the application.  
Ground Force Connection.  
No Connect. Do not connect to this pin.  
No Connect. Do not connect to this pin.  
Reference Voltage Output.  
Reference Voltage Output Sensing Connection. Connect directly to the voltage input of the load devices.  
Input Voltage Connection.  
NC  
VOUT FORCE  
VOUT SENSE  
VIN  
Rev. 0 | Page 9 of 20  
 
ADR3525/ADR3530/ADR3533/ADR3540/ADR3550  
TYPICAL PERFORMANCE CHARACTERISTICS  
Data Sheet  
TA = 25°C, unless otherwise noted.  
2.5010  
5.0025  
5.0020  
5.0015  
5.0010  
5.0005  
5.0000  
4.9995  
4.9990  
4.9985  
4.9980  
4.9975  
V
= 5.5V  
V
= 5.5V  
IN  
IN  
2.5008  
2.5006  
2.5004  
2.5002  
2.5000  
2.4998  
2.4996  
2.4994  
2.4992  
2.4990  
–40 –25 –10  
5
20  
35  
50  
65  
80  
95 110 125  
–40 –25 –10  
5
20  
35  
50  
65  
80  
95 110 125  
TEMPERATURE (ºC)  
TEMPERATURE (ºC)  
Figure 3. ADR3525 Output Voltage vs. Temperature  
Figure 6. ADR3550 Output Voltage vs. Temperature  
45  
40  
35  
30  
25  
20  
15  
10  
5
40  
35  
30  
25  
20  
15  
10  
5
0
0
0
1
2
3
4
5
6
7
8
9
10  
11  
0
1
2
3
4
5
6
7
8
9
10  
11  
TEMPERATURE COEFFICIENT (ppm/°C)  
TEMPERATURE COEFFICIENT (ppm/°C)  
Figure 4. ADR3525 Temperature Coefficient Distribution  
Figure 7. ADR3550 Temperature Coefficient Distribution  
24  
22  
20  
18  
16  
14  
12  
10  
8
35  
30  
25  
20  
15  
10  
5
ADR3525  
ADR3530  
ADR3533  
ADR3540  
ADR3550  
ADR3525  
ADR3530  
ADR3533  
ADR3540  
ADR3550  
I
= 0mA TO 10mA  
I = 0mA TO –3mA  
L
SINKING  
L
SOURCING  
6
4
2
0
–40 –25 –10  
5
20  
35  
50  
65  
80  
95 110 125  
–40 –25 –10  
5
20  
35  
50  
65  
80  
95 110 125  
TEMPERATURE (°C)  
TEMPERATURE (°C)  
Figure 5. Load Regulation vs. Temperature (Sourcing)  
Figure 8. Load Regulation vs. Temperature (Sinking)  
Rev. 0 | Page ꢀ0 of 20  
 
Data Sheet  
ADR3525/ADR3530/ADR3533/ADR3540/ADR3550  
400  
–40°C  
+25°C  
350  
+125°C  
300  
250  
200  
150  
100  
50  
1
10µV/DIV  
TIME = 1s/DIV  
0
CH1 pk-pk = 18µV  
CH1 RMS = 3.14µV  
–3 –2 –1  
0
1
2
3
4
5
6
7
8
9
10  
LOAD CURRENT (mA)  
Figure 9. ADR3525 Dropout Voltage vs. Load Current  
Figure 12. ADR3525 Output Voltage Noise (0.1 Hz to 10 Hz)  
350  
300  
250  
200  
150  
100  
50  
–40°C  
+25°C  
+125°C  
1
100µV/DIV  
TIME = 1s/DIV  
0
CH1 pk-pk = 300µV  
CH1 RMS = 42.0µV  
–3 –2 –1  
0
1
2
3
4
5
6
7
8
9
10  
LOAD CURRENT (mA)  
Figure 10. ADR3550 Dropout Voltage vs. Load Current  
Figure 13. ADR3525 Output Voltage Noise (10 Hz to 10 kHz)  
12  
140  
120  
100  
80  
ADR3525  
ADR3530  
ADR3533  
ADR3540  
ADR3550  
10  
8
6
60  
4
40  
2
20  
0
0
–40 –25 –10  
5
20  
35  
50  
65  
80  
95 110 125  
0.1  
1
10  
100  
1k  
10k  
FREQUENCY (Hz)  
TEMPERATURE (°C)  
Figure 14. ADR3525 Output Noise Spectral Density  
Figure 11. Line Regulation vs. Temperature  
Rev. 0 | Page ꢀꢀ of 20  
 
 
ADR3525/ADR3530/ADR3533/ADR3540/ADR3550  
Data Sheet  
0
C
C
= 1.1µF  
L
= 0.1µF  
IN  
–10  
–20  
–30  
–40  
–50  
–60  
–70  
–80  
1
10µV/DIV  
–90  
CH1 pk-pk = 33.4µV  
CH1 RMS = 5.68µV  
10  
100  
1k  
10k  
100k  
FREQUENCY (Hz)  
Figure 15. ADR3525 Ripple Rejection Ratio vs. Frequency  
Figure 18. ADR3550 Output Voltage Noise (0.1 Hz to 10 Hz)  
C
R
= C = 0.1µF  
L
IN  
L
=
1
V
= 2V/DIV  
IN  
1
100µV/DIV  
TIME = 200µs/DIV  
2
V
= 1V/DIV  
OUT  
CH1 pk-pk = 446µV  
CH1 RMS = 60.3µV  
Figure 16. ADR3525 Start-Up Response  
Figure 19. ADR3550 Output Voltage Noise (10 Hz to 10 kHz)  
12  
10  
8
ENABLE  
V
V
C
= 1V/DIV  
= 3.0V  
= C = 0.1µF  
ENABLE  
IN  
IN  
L
L
R
=
1
6
4
V
= 1V/DIV  
OUT  
TIME = 200µs/DIV  
2
2
0
0.1  
1
10  
100  
1k  
10k  
FREQUENCY (Hz)  
Figure 17. ADR3525 Restart Response from Shutdown  
Figure 20. ADR3550 Output Noise Spectral Density  
Rev. 0 | Page ꢀ2 of 20  
Data Sheet  
ADR3525/ADR3530/ADR3533/ADR3540/ADR3550  
0
C
C
= 1.1µF  
L
= 0.1µF  
IN  
–10  
–20  
–30  
–40  
–50  
–60  
–70  
–80  
ENABLE  
1V/DIV  
C
V
R
= C = 0.1µF  
L
= 3V  
= 1k  
IN  
IN  
L
1
V
= 1V/DIV  
OUT  
2
TIME = 200µs/DIV  
–90  
10  
100  
1k  
10k  
100k  
FREQUENCY (Hz)  
Figure 24. ADR3525 Shutdown Response  
Figure 21. ADR3550 Ripple Rejection Ratio vs. Frequency  
3.2V  
2.7V  
C
C
R
= 0µF  
= 0.1µF  
IN  
L
L
500mV/DIV  
=
C
= C = 0.1µF  
L
IN  
V
IN  
2V/DIV  
1
2
V
= 10mV/DIV  
OUT  
V
OUT  
2V/DIV  
TIME = 200µs/DIV  
Figure 22. ADR3550 Start-Up Response  
ENABLE  
2
TIME = 1ms/DIV  
1
Figure 25. ADR3525 Line Transient Response  
SOURCING  
I
+10mA  
–3mA  
L
SINKING  
SINKING  
V
V
= 2V/DIV  
= 5.5V  
ENABLE  
IN  
C
R
= C = 0.1µF  
IN  
L
L
1
=
C
C
R
= 0.1µF  
IN  
=
0.1µF  
L
L
= 250  
V
= 2V/DIV  
OUT  
2.5V  
V
= 20mV/DIV  
OUT  
TIME = 200µs/DIV  
2
TIME = 1ms/DIV  
Figure 26. ADR3525 Load Transient Response  
Figure 23. ADR3550 Restart Response from Shutdown  
Rev. 0 | Page ꢀ3 of 20  
ADR3525/ADR3530/ADR3533/ADR3540/ADR3550  
Data Sheet  
100  
90  
80  
70  
60  
50  
40  
30  
20  
10  
0
V
= 5.5 V  
IN  
ENABLE  
2V/DIV  
C
V
R
= C = 0.1µF  
L
= 5V  
= 1k  
IN  
IN  
L
1
V
= 2V/DIV  
OUT  
2
TIME = 200µs/DIV  
–40 –25 –10  
5
20  
35  
50  
65  
80  
95 110 125  
TEMPERATURE (°C)  
Figure 27. ADR3550 Shutdown Response  
Figure 30. Supply Current vs. Temperature  
2.0  
–40°C  
+25°C  
+125°C  
1.8  
1.6  
1.4  
1.2  
1.0  
0.8  
0.6  
0.4  
0.2  
V
= 100mV/DIV  
IN  
5.5V  
5.2V  
C
= C = 0.1µF  
L
IN  
1
2
V
= 5mV/DIV  
OUT  
0
0
10  
20  
30  
40  
50  
60  
70  
80  
90  
100  
TIME = 1ms/DIV  
ENABLE VOLTAGE (% of V  
)
IN  
Figure 28. ADR3550 Line Transient Response  
Figure 31. Supply Current vs. ENABLE Pin Voltage  
10  
C
C
= 0.1µF  
= 1.1µF  
L
L
I
L
+10mA  
–3mA  
SOURCING  
SINKING  
1
SINKING  
C
C
R
=
=
0.1µF  
0.1µF  
= 500  
IN  
L
L
0.1  
5.0V  
V
= 20mV/DIV  
OUT  
0.01  
0.01  
0.1  
1
10  
100  
1k  
10k  
TIME = 1ms/DIV  
FREQUENCY (Hz)  
Figure 29. ADR3550 Load Transient Response  
Figure 32. ADR3550 Output Impedance vs. Frequency  
Rev. 0 | Page ꢀ4 of 20  
 
Data Sheet  
ADR3525/ADR3530/ADR3533/ADR3540/ADR3550  
80  
9
8
7
6
60  
40  
20  
5
0
4
3
2
1
–20  
–40  
–60  
–80  
0
0
200  
400  
600  
800  
1000  
ELAPSED TIME (Hours)  
RELATIVE SHIFT IN V  
(%)  
OUT  
Figure 33. Output Voltage Drift Distribution After Reflow (SHR Drift)  
Figure 35. ADR3550 Typical Long-Term Output Voltage Drift  
(Four Devices, 1000 Hours)  
8
T
= +25°C –40°C +125°C +25°C  
A
7
6
5
4
3
2
1
0
OUTPUT VOLTAGE HYSTERESIS (ppm)  
Figure 34. ADR3550 Thermally Induced Output Voltage Hysteresis Distribution  
Rev. 0 | Page ꢀ5 of 20  
ADR3525/ADR3530/ADR3533/ADR3540/ADR3550  
TERMINOLOGY  
Data Sheet  
Long-Term Output Voltage Drift (ΔVOUT_LTD  
)
Dropout Voltage (VDO  
)
Long-term output voltage drift refers to the shift in output  
voltage after 1000 hours of operation in a constant 50°C  
environment. This is expressed as either a shift in voltage or a  
difference in ppm from the nominal output.  
Dropout voltage, sometimes referred to as supply voltage  
headroom or supply-output voltage differential, is defined as  
the minimum voltage differential between the input and output  
such that the output voltage is maintained to within 0.1%  
accuracy.  
ΔVOUT _ LTD = VOUT (t1 )VOUT (t0 ) [V]  
VOUT (t1)VOUT (t0 )  
V
DO = (VIN − VOUT)min | IL = constant  
Because the dropout voltage depends upon the current passing  
through the device, it is always specified for a given load current.  
In series-mode devices, dropout voltage typically increases  
proportionally to load current (see Figure 9 and Figure 10).  
ΔVOUT _ LTD  
=
×106 [ppm]  
VOUT (t0 )  
where:  
VOUT(t0) is the VOUT at 50°C at Time 0.  
OUT(t1) is the VOUT at 50°C after 1000 hours of operation  
V
Temperature Coefficient (TCVOUT  
)
at 50°C.  
The temperature coefficient relates the change in output voltage  
to the change in ambient temperature of the device, as normalized  
by the output voltage at 25°C. This parameter is expressed in  
ppm/°C and can be determined by the following equations:  
Line Regulation  
Line regulation refers to the change in output voltage in response  
to a given change in input voltage and is expressed in percent  
per volt, ppm per volt, or microvolts per volt change in input  
voltage. This parameter accounts for the effects of self-heating.  
max{VOUT (T1,T2 )}min{VOUT (T1,T2 )}  
TCVOUT  
=
×
1
VOUT (T2 ) ×(T2 T1)  
Load Regulation  
106 [ppm/°C]  
Load regulation refers to the change in output voltage in  
response to a given change in load current and is expressed in  
microvolts per mA, ppm per mA, or ohms of dc output  
resistance. This parameter accounts for the effects of self-  
heating.  
max{VOUT (T2 ,T3 )}min{VOUT (T2 ,T3 )}  
TCVOUT  
=
×
2
VOUT (T2 ) ×(T3 T2 )  
106 [ppm/°C]  
Solder Heat Resistance (SHR) Drift  
TCVOUT = max{TCVOUT1,TCVOUT2  
}
(1)  
SHR drift refers to the permanent shift in output voltage  
induced by exposure to reflow soldering, expressed in units of  
ppm. This is caused by changes in the stress exhibited upon the  
die by the package materials when exposed to high tempera-  
tures. This effect is more pronounced in lead-free soldering  
processes due to higher reflow temperatures.  
where:  
V
OUT(T) is the output voltage at Temperature T.  
T1 = −40°C.  
T2 = +25°C.  
T3 = +125°C.  
This three-point method ensures that TCVOUT accurately  
portrays the maximum difference between any of the three  
temperatures at which the output voltage of the part is  
measured.  
Thermally Induced Output Voltage Hysteresis (ΔVOUT_HYS  
Thermally induced output voltage hysteresis represents the  
change in output voltage after the device is exposed to a  
)
specified temperature cycle. This is expressed as either a shift in  
voltage or a difference in ppm from the nominal output.  
ΔVOUT _ HYS =VOUT (25°C)VOUT _TC [V]  
V
OUT (25°C) VOUT _ TC  
ΔVOUT _ HYS  
where:  
=
×106 [ppm]  
V
OUT (25°C)  
V
OUT(25°C) is the output voltage at 25°C.  
V
OUT_TC is the output voltage after temperature cycling.  
Rev. 0 | Page ꢀ6 of 20  
 
Data Sheet  
ADR3525/ADR3530/ADR3533/ADR3540/ADR3550  
THEORY OF OPERATION  
V
IN  
LONG-TERM OUTPUT VOLTAGE DRIFT  
One of the key parameters of the ADR35xx references is long-  
term output voltage drift. Independent of the output voltage  
model and in a 50°C environment, these devices exhibit a  
typical drift of approximately 30 ppm after 1000 hours of  
continuous, unloaded operation.  
BAND GAP  
VOLTAGE  
REFERENCE  
V
BG  
ENABLE  
V
V
FORCE  
OUT  
OUT  
SENSE  
R
FB1  
GND FORCE  
It is important to understand that long-term output voltage drift  
is not tested or guaranteed by design and that the output from  
the device may shift beyond the typical 30 ppm specification.  
Because most of the drift occurs in the first 200 hours of device  
operation, burning in the system board with the reference  
mounted can reduce subsequent output voltage drift over time.  
See the AN-713 Application Note, The Effect of Long-Term Drift  
on Voltage References, at www.analog.com for more information  
regarding the effects of long-term drift and how it can be  
minimized.  
R
FB2  
GND SENSE  
Figure 36. Block Diagram  
The ADR3525W/ADR3530W/ADR3533W/ADR3540W/  
ADR3550W use a patented voltage reference architecture to  
achieve high accuracy, low temperature coefficient (TC), and  
low noise in a CMOS process. Like all band gap references, the  
references combine two voltages of opposite TCs to create an  
output voltage that is nearly independent of ambient tempera-  
ture. However, unlike traditional band gap voltage references, the  
temperature-independent voltage of the references is arranged to  
be the base-emitter voltage, VBE, of a bipolar transistor at room  
temperature rather than the VBE extrapolated to 0 K (the VBE of  
bipolar transistor at 0 K is approximately VG0, the band gap  
voltage of silicon). A corresponding positive TC voltage is then  
added to the VBE voltage to compensate for its negative TC.  
POWER DISSIPATION  
The ADR35xx voltage references are capable of sourcing up to  
10 mA of load current at room temperature across the rated  
input voltage range. However, when used in applications subject  
to high ambient temperatures, the input voltage and load cur-  
rent should be carefully monitored to ensure that the device  
does not exceed its maximum power dissipation rating. The  
maximum power dissipation of the device can be calculated via  
the following equation:  
The key benefit of this technique is that the trimming of the  
initial accuracy and TC can be performed without interfering  
with one another, thereby increasing overall accuracy across  
temperature. Curvature correction techniques further reduce  
the temperature variation.  
TJ TA  
JA  
PD   
[W]  
where:  
PD is the device power dissipation.  
TJ is the device junction temperature.  
TA is the ambient temperature.  
The band gap voltage (VBG) is then buffered and amplified to  
produce stable output voltages of 2.5 V and 5.0 V. The output  
buffer can source up to 10 mA and sink up to −3 mA of load  
current.  
θJA is the package (junction-to-air) thermal resistance.  
Because of this relationship, the acceptable load current in high  
temperature conditions may be less than the maximum current-  
sourcing capability of the device. In no case should the part be  
operated outside of its maximum power rating because doing so  
can result in premature failure or permanent damage to the device.  
The ADR35xx references leverage Analog Devices patented  
DigiTrim technology to achieve high initial accuracy and low  
TC, and precision layout techniques lead to very low long-term  
drift and thermal hysteresis.  
Rev. 0 | Page 17 of 20  
 
ADR3525/ADR3530/ADR3533/ADR3540/ADR3550  
APPLICATIONS INFORMATION  
Data Sheet  
voltages can be sensed accurately. These voltages are fed back  
into the internal amplifier and used to automatically correct for  
the voltage drop across the current-carrying output and ground  
lines, resulting in a highly accurate output voltage across the  
load. To achieve the best performance, the sense connections  
should be connected directly to the point in the load where the  
output voltage should be the most accurate. See Figure 38 for an  
example application.  
BASIC VOLTAGE REFERENCE CONNECTION  
V
2.5V  
OUT  
V
IN  
8
6
V
V
FORCE  
SENSE  
2.7V TO  
5.5V  
IN  
OUT  
1
ENABLE  
7
V
OUT  
AD3525/ADR3530/  
ARD3533/ADR3540/  
ADR3550  
0.1µF  
1µF  
0.1µF  
2
3
GND SENSE  
GND FORCE  
OUTPUT CAPACITOR(S) SHOULD  
BE MOUNTED AS CLOSE  
Figure 37. Basic Reference Connection  
TO V  
FORCE PIN AS POSSIBLE.  
OUT  
The circuit shown in Figure 37 illustrates the basic configuration  
for the ADR35xx references. Bypass capacitors should be  
connected according to the following guidelines.  
0.1µF  
6
8
V
V
V
FORCE  
OUT  
IN  
IN  
1
7
ENABLE  
V
SENSE  
OUT  
INPUT AND OUTPUT CAPACITORS  
SENSE CONNECTIONS  
SHOULD CONNECT AS  
CLOSE TO LOAD  
AD3525/ADR3530/  
ARD3533/ADR3540/  
ADR3550  
LOAD  
A 1 μF to 10 μF electrolytic or ceramic capacitor can be  
connected to the input to improve transient response in  
applications where the supply voltage may fluctuate. An  
additional 0.1 μF ceramic capacitor should be connected  
in parallel to reduce high frequency supply noise.  
1µF  
0.1µF  
DEVICE AS POSSIBLE.  
2
3
GND SENSE  
GND FORCE  
Figure 38. Application Showing Kelvin Connection  
A ceramic capacitor of at least a 0.1 μF must be connected to  
the output to improve stability and help filter out high fre-  
quency noise. An additional 1 μF to 10 μF electrolytic or  
ceramic capacitor can be added in parallel to improve transient  
performance in response to sudden changes in load current;  
however, the designer should keep in mind that doing so  
increases the turn-on time of the device.  
It is always advantageous to use Kelvin connections whenever  
possible. However, in applications where the IR drop is negligi-  
ble or an extra set of traces cannot be routed to the load, the  
force and sense pins for both VOUT and GND can simply be  
tied together, and the device can be used in the same way as a  
normal 3-terminal reference (as shown in Figure 37).  
VIN SLEW RATE CONSIDERATIONS  
Best performance and stability is attained with low ESR (for  
example, less than 1 Ω), low inductance ceramic chip-type  
output capacitors (X5R, X7R, or similar). If using an electrolytic  
capacitor on the output, a 0.1 ꢀF ceramic capacitor should be  
placed in parallel to reduce overall ESR on the output.  
In applications with slow rising input voltage signals, the refer-  
ence exhibits overshoot or other transient anomalies that appear  
on the output. These phenomena also appear during shutdown  
as the internal circuitry loses power.  
To avoid such conditions, ensure that the input voltage wave-  
form has both a rising and falling slew rate of at least 0.1 V/ms.  
4-WIRE KELVIN CONNECTIONS  
Current flowing through a PCB trace produces an IR voltage  
drop, and with longer traces, this drop can reach several  
millivolts or more, introducing a considerable error into the  
output voltage of the reference. A 1 inch long, 5 millimeter wide  
trace of 1 ounce copper has a resistance of approximately  
100 mΩ at room temperature; at a load current of 10 mA, this  
can introduce a full millivolt of error. In an ideal board layout,  
the reference should be mounted as close to the load as possible  
to minimize the length of the output traces, and, therefore, the  
error introduced by voltage drop. However, in applications  
where this is not possible or convenient, force and sense  
connections (sometimes referred to as Kelvin sensing  
connections) are provided as a means of minimizing the IR  
drop and improving accuracy.  
SHUTDOWN/ENABLE FEATURE  
The ADR35xx references can be switched to a low power shut-  
down mode when a voltage of 0.7 V or lower is input to the  
ENABLE pin. Likewise, the reference becomes operational for  
ENABLE voltages of 0.85 × VIN or higher. During shutdown, the  
supply current drops to less than 5 μA, useful in applications that  
are sensitive to power consumption.  
If using the shutdown feature, ensure that the ENABLE pin  
voltage does not fall between 0.7 V and 0.85 × VIN because this  
causes a large increase in the supply current of the device and  
may keep the reference from starting up correctly (see Figure 31).  
If not using the shutdown feature, however, the ENABLE pin  
can simply be tied to the VIN pin, and the reference remains  
operational continuously.  
Kelvin connections work by providing a set of high impedance  
voltage-sensing lines to the output and ground nodes. Because  
very little current flows through these connections, the IR drop  
across their traces is negligible, and the output and ground  
Rev. 0 | Page ꢀ8 of 20  
 
 
 
Data Sheet  
ADR3525/ADR3530/ADR3533/ADR3540/ADR3550  
SAMPLE APPLICATIONS  
Negative Reference  
8
6
V
+5V  
V
V
FORCE  
SENSE  
IN  
IN  
OUT  
R1  
10k  
1
7
ENABLE  
V
OUT  
1µF  
0.1µF  
Figure 39 shows how to connect the ADR3550 and a standard  
CMOS op amp, such as the AD8663, to provide a negative  
reference voltage. This configuration provides two main  
advantages: first, it requires only two devices and, therefore,  
does not require excessive board space; second, and more  
importantly, it does not require any external resistors, meaning  
that the performance of this circuit does not rely on choosing  
expensive parts with low temperature coefficients to ensure  
accuracy.  
0.1µF  
ADR3550  
R2  
10kꢀ  
2
3
GND SENSE  
GND FORCE  
+15V  
–5V  
ADA4000-1  
R3  
5kꢀ  
–15V  
+VDD  
Figure 40. ADR3550 Bipolar Output Reference  
1µF  
0.1µF  
8
1
6
7
AD8663  
V
V
FORCE  
SENSE  
IN  
OUT  
Boosted Output Current Reference  
–5V  
ENABLE  
V
Figure 41 shows a configuration for obtaining higher current  
drive capability from the ADR35xx references without  
sacrificing accuracy. The op amp regulates the current flow  
through the MOSFET until VOUT equals the output voltage of  
the reference; current is then drawn directly from VIN instead of  
from the reference itself, allowing increased current drive  
capability.  
OUT  
0.1µF  
ADR3550  
0.1µF  
–VDD  
2
3
GND SENSE  
GND FORCE  
Figure 39. ADR3550 Negative Reference  
In this configuration, the VOUT FORCE and VOUT SENSE pins of  
the reference sit at virtual ground, and the negative reference  
voltage and load current are taken directly from the output of  
the operational amplifier. Note that in applications where the  
negative supply voltage is close to the reference output voltage,  
a dual-supply, low offset, rail-to-rail output amplifier must be  
used to ensure an accurate output voltage. The operational  
amplifier must also be able to source or sink an appropriate  
amount of current for the application.  
V
IN  
+16V  
U6  
R1  
100  
2N7002  
8
1
6
V
V
FORCE  
SENSE  
IN  
OUT  
AD8663  
ENABLE  
V
7
OUT  
V
OUT  
1µF 0.1µF  
0.1µF  
AD3525/ADR3530/  
ARD3533/ADR3540/  
ADR3550  
C
0.1µF  
L
R
L
200ꢀ  
Bipolar Output Reference  
2
3
GND SENSE  
Figure 40 shows a bipolar reference configuration. By connecting  
the output of the ADR3550 to the inverting terminal of an  
operational amplifier, it is possible to obtain both positive and  
negative reference voltages. R1 and R2 must be matched as  
closely as possible to ensure minimal difference between the  
negative and positive outputs. Resistors with low temperature  
coefficients must also be used if the circuit is used in environments  
with large temperature swings; otherwise, a voltage difference  
develops between the two outputs as the ambient temperature  
changes.  
GND FORCE  
Figure 41. Boosted Output Current Reference  
Because the current-sourcing capability of this circuit depends  
only on the ID rating of the MOSFET, the output drive capability  
can be adjusted to the application simply by choosing an  
appropriate MOSFET. In all cases, the VOUT SENSE pin should  
be tied directly to the load device to maintain maximum output  
voltage accuracy.  
Rev. 0 | Page ꢀ9 of 20  
 
 
 
 
ADR3525/ADR3530/ADR3533/ADR3540/ADR3550  
OUTLINE DIMENSIONS  
Data Sheet  
3.20  
3.00  
2.80  
8
1
5
4
5.15  
4.90  
4.65  
3.20  
3.00  
2.80  
PIN 1  
IDENTIFIER  
0.65 BSC  
0.95  
0.85  
0.75  
15° MAX  
1.10 MAX  
0.80  
0.55  
0.40  
0.15  
0.05  
0.23  
0.09  
6°  
0°  
0.40  
0.25  
COPLANARITY  
0.10  
COMPLIANT TO JEDEC STANDARDS MO-187-AA  
Figure 42. 8-Lead Mini Small Outline Package [MSOP]  
(RM-8)  
Dimensions show in millimeters  
ORDERING GUIDE  
Ordering  
Output Voltage (V) Temperature Range Package Description Package Option Quantity Branding  
Model1, 2  
ADR3525WARMZ-R7 2.500  
ADR3525WBRMZ-R7 2.500  
ADR3530WARMZ-R7 3.000  
ADR3530WBRMZ-R7 3.000  
ADR3533WARMZ-R7 3.300  
ADR3533WBRMZ-R7 3.300  
ADR3540WARMZ-R7 4.096  
ADR3540WBRMZ-R7 4.096  
ADR3550WARMZ-R7 5.000  
ADR3550WBRMZ-R7 5.000  
−40°C to +ꢀ25°C  
−40°C to +ꢀ25°C  
−40°C to +ꢀ25°C  
−40°C to +ꢀ25°C  
−40°C to +ꢀ25°C  
−40°C to +ꢀ25°C  
−40°C to +ꢀ25°C  
−40°C to +ꢀ25°C  
−40°C to +ꢀ25°C  
−40°C to +ꢀ25°C  
8-Lead MSOP  
8-Lead MSOP  
8-Lead MSOP  
8-Lead MSOP  
8-Lead MSOP  
8-Lead MSOP  
8-Lead MSOP  
8-Lead MSOP  
8-Lead MSOP  
8-Lead MSOP  
RM-8  
RM-8  
RM-8  
RM-8  
RM-8  
RM-8  
RM-8  
RM-8  
RM-8  
RM-8  
ꢀ000  
ꢀ000  
ꢀ000  
ꢀ000  
ꢀ000  
ꢀ000  
ꢀ000  
ꢀ000  
ꢀ000  
ꢀ000  
R3C  
R2T  
R3D  
R37  
R3E  
R38  
R3F  
R39  
R3G  
R3B  
Z = RoHS Compliant Part.  
2 W = Qualified for Automotive Applications.  
AUTOMOTIVE PRODUCTS  
The ADR3525W/ADR3530W/ADR3533W/ADR3540W/ADR3550W models are available with controlled manufacturing to support the  
quality and reliability requirements of automotive applications. Note that these automotive models may have specifications that differ  
from the commercial models; therefore, designers should review the Specifications section of this data sheet carefully. Only the  
automotive grade products shown are available for use in automotive applications. Contact your local Analog Devices account  
representative for specific product ordering information and to obtain the specific Automotive Reliability reports for these models.  
©2011 Analog Devices, Inc. All rights reserved. Trademarks and  
registered trademarks are the property of their respective owners.  
D09594-0-9/11(0)  
Rev. 0 | Page 20 of 20  
 
 
 

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