ADR425ARM_技术文档

Ultraprecision, Low Noise, 2.048 V/2.500 V/

3.00 V/5.00 V XFET^®Voltage References

ADR420/ADR421/ADR423/ADR425

PIN CONFIGURATION

FEATURES

Low noise (0.1 Hz to 10 Hz)

ADR420: 1.75 μV p-p

ADR421: 1.75 μV p-p

ADR423: 2.0 μV p-p

ADR425: 3.4 μV p-p

TP

1

2

8

TP

NIC

V

ADR420/

ADR421/

ADR423/

ADR425

V

7

6

IN

NIC

3

4

OUT

TOP VIEW

(Not to Scale)

GND

5

TRIM

Low temperature coefficient: 3 ppm/°C

Long-term stability: 50 ppm/1,000 hours

Load regulation: 70 ppm/mA

Line regulation: 35 ppm/V

Low hysteresis: 40 ppm typical

Wide operating range

ADR420: 4 V to 18 V

ADR421: 4.5 V to 18 V

ADR423: 5 V to 18 V

ADR425: 7 V to 18 V

NIC = NO INTERNAL CONNECTION

TP = TEST PIN (DO NOT CONNECT)

Figure 1. 8-Lead SOIC, 8-Lead MSOP

GENERAL DESCRIPTION

The ADR42x are a series of ultraprecision, second-generation

eXtra implanted junction FET (XFET) voltage references

featuring low noise, high accuracy, and excellent long-term

stability in SOIC and MSOP footprints.

Patented temperature drift curvature correction technique and

XFET technology minimize nonlinearity of the voltage change

with temperature. The XFET architecture offers superior

accuracy and thermal hysteresis to the band gap references. It

also operates at lower power and lower supply headroom than

the buried Zener references.

Quiescent current: 0.5 mA maximum

High output current: 10 mA

Wide temperature range: −40°C to +125°C

APPLICATIONS

Precision data acquisition systems

High resolution converters

Battery-powered instrumentation

Portable medical instruments

Industrial process control systems

Precision instruments

The superb noise and the stable and accurate characteristics of

the ADR42x make them ideal for precision conversion

applications such as optical networks and medical equipment.

The ADR42x trim terminal can also be used to adjust the out-

put voltage over a ±±.ꢀ5 range without compromising any

other performance. The ADR42x series voltage references

offer two electrical grades and are specified over the extended

industrial temperature range of −4±°C to +12ꢀ°C. Devices have

8-lead SOIC or 3±5 smaller, 8-lead MSOP packages.

Optical network control circuits

ADR42x PRODUCTS

Table 1.

Initial Accuracy

Output Voltage (V_O)

Model

mV

1, 3

1.5, 4

2, 6

%

Temperature Coefficient (ppm/°C)

ADR420

ADR421

ADR423

ADR425

2.048

2.50

3.00

5.00

0.05, 0.15

0.04, 0.12

0.04, 0.13

0.04, 0.12

3, 10

Rev. G

Information furnished by Analog Devices is believed to be accurate and reliable.

However, no responsibility is assumed by Analog Devices for its use, nor for any

infringements of patents or other rights of third parties that may result from its use.

Specifications subject to change without notice. No license is granted by implication

or otherwise under any patent or patent rights of Analog Devices. Trademarks and

registered trademarks are the property of their respective owners.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Tel: 781.329.4700

Fax: 781.461.3113

www.analog.com

ADR420/ADR421/ADR423/ADR425

TABLE OF CONTENTS

Features .............................................................................................. 1

Applications....................................................................................... 1

Pin Configuration............................................................................. 1

General Description......................................................................... 1

ADR42± Electrical Specifications................................................... 3

ADR421 Electrical Specifications................................................... 4

ADR423 Electrical Specifications................................................... ꢀ

ADR42ꢀ Electrical Specifications................................................... 6

Absolute Maximum Ratings............................................................ 7

ESD Caution.................................................................................. 7

Pin Configuration and Function Descriptions............................. 8

Typical Performance Characteristics ............................................. 9

Parameter Definitions.................................................................... 1ꢀ

Theory of Operation ...................................................................... 16

Device Power Dissipation Considerations.............................. 16

Basic Voltage Reference Connections...................................... 16

Noise Performance ..................................................................... 16

Turn-On Time ............................................................................ 16

Applications..................................................................................... 17

Output Adjustment .................................................................... 17

Reference for Converters in Optical Network

Control Circuits.......................................................................... 17

A Negative Precision Reference

Without Precision Resistors...................................................... 17

High Voltage Floating Current Source.................................... 18

Kelvin Connections.................................................................... 18

Dual-Polarity References........................................................... 18

Programmable Current Source ................................................ 19

Programmable DAC Reference Voltage.................................. 19

Precision Voltage Reference for Data Converters.................. 2±

Precision Boosted Output Regulator....................................... 2±

Outline Dimensions....................................................................... 21

Ordering Guide .......................................................................... 22

REVISION HISTORY

6/05—Rev. F to Rev. G

1/03—Rev. B to Rev. C.

Changes to Table 1............................................................................ 1

Changes to Ordering Guide .......................................................... 22

Changed Mini_SOIC to MSOP........................................Universal

Changes to Ordering Guide.............................................................4

Corrections to Y-axis labels in TPCs 21 and 24 ............................9

Enhancement to Figure 13 ............................................................ 1ꢀ

Updated Outline Dimensions....................................................... 16

2/05—Rev. E to Rev. F

Updated Format..................................................................Universal

Updated Outline Dimensions....................................................... 21

Changes to Ordering Guide .......................................................... 22

3/02—Rev. A to Rev. B.

Edits to Ordering Guide ...................................................................4

Deletion of Precision Voltage Regulator section........................ 1ꢀ

Addition of Precision Boosted Output Regulator section ....... 1ꢀ

Addition of Figure 13..................................................................... 1ꢀ

7/04—Rev. D to Rev. E.

Changes to Ordering Guide ............................................................ ꢀ

3/04—Rev. C to Rev. D.

Changes to Table I ............................................................................ 1

Changes to Ordering Guide ............................................................ 4

Updated Outline Dimensions....................................................... 16

Rev. 0 to Rev. A.

Addition of ADR423 and ADR42ꢀ to

ADR42±/ADR421...............................................................Universal

Rev. G | Page 2 of 24

ADR420/ADR421/ADR423/ADR425

ADR420 ELECTRICAL SPECIFICATIONS

@ V_IN= ꢀ.± V to 1ꢀ.± V, T_A= 2ꢀ°C, unless otherwise noted.

Table 2.

Parameter

Symbol

Conditions

Min

2.045

−3

Typ

Max

2.051

+3

Unit

V

mV

Output Voltage, A Grade

Initial Accuracy

V_O

V_OERR

2.048

+0.15

2.049

+1

%

−0.15

2.047

−1

Output Voltage, B Grade

Initial Accuracy

V_O

V_OERR

2.048

V

mV

+0.05

10

%

−0.05

Temperature Coefficient A Grade,

Temperature Coefficient, B Grade

Supply Voltage Headroom

Line Regulation

TCV_O

2

1

ppm°C

ppm/°C

V

−40°C < TA < +125°C

3

V_IN– V_O

2

V_IN= 5 V to 18 V

10

35

70

ppm/V

ΔV_O/ΔV_IN

−40°C < TA < +125°C

I_LOAD= 0 mA to 10 mA

Load Regulation

ppm/mA

ΔV_O/ΔI_LOAD

−40°C < TA < +125°C

No load

Quiescent Current

I_IN

390

500

600

μA

−40°C < TA < +125°C

0.1 Hz to 10 Hz

1 kHz

Voltage Noise

e_Np-p

e_N

t_R

1.75

60

10

μV p-p

nV/√Hz

μs

ppm

dB

Voltage Noise Density

Turn-On Settling Time

Long-Term Stability

Output Voltage Hysteresis

Ripple Rejection Ratio

Short Circuit to GND

1,000 hours

f_IN= 10 kHz

50

ΔV_O

V_{O_HYS}

RRR

I_SC

40

75

27

mA

Rev. G | Page 3 of 24

ADR420/ADR421/ADR423/ADR425

ADR421 ELECTRICAL SPECIFICATIONS

@ V_IN= ꢀ.± V to 1ꢀ.± V, T_A= 2ꢀ°C, unless otherwise noted.

Table 3.

Parameter

Symbol

Conditions

Min

2.497

−3

Typ

Max

2.503

+3

Unit

Output Voltage, A Grade

Initial Accuracy

V_O

V_OERR

2.500

V

mV

+0.12

2.501

+1

%

−0.12

2.499

−1

Output Voltage, B Grade

Initial Accuracy

V_O

V_OERR

2.500

V

mV

+0.04

10

%

−0.04

Temperature Coefficient, A Grade

Temperature Coefficient, B Grade

Supply Voltage Headroom

Line Regulation

TCV_O

2

1

ppm/°C

V

−40°C < TA < +125°C

3

2

V_IN− V_O

ΔV_O/ΔV_IN

V_IN= 5 V to 18 V

10

35

70

ppm/V

−40°C < TA < +125°C

I_LOAD= 0 mA to 10 mA

Load Regulation

ppm/mA

ΔV_O/ΔI_LOAD

−40°C < TA < +125°C

No load

Quiescent Current

I_IN

390

500

600

μA

−40°C < TA < +125°C

0.1 Hz to 10 Hz

1 kHz

Voltage Noise

e_Np-p

e_N

t_R

1.75

80

10

μV p-p

nV/√Hz

μs

ppm

dB

Voltage Noise Density

Turn-On Settling Time

Long-Term Stability

Output Voltage Hysteresis

Ripple Rejection Ratio

Short Circuit to GND

1,000 hours

f_IN= 10 kHz

50

ΔV_O

V_{O_HYS}

RRR

I_SC

40

75

27

mA

Rev. G | Page 4 of 24

ADR420/ADR421/ADR423/ADR425

ADR423 ELECTRICAL SPECIFICATIONS

@ V_IN= ꢀ.± V to 1ꢀ.± V, T_A= 2ꢀ°C, unless otherwise noted.

Table 4.

Parameter

Symbol

Conditions

Min

Typ

Max

3.004

+4

Unit

Output Voltage, A Grade

Initial Accuracy

V_O

V_OERR

2.996

−4

3.000

V

mV

+0.13

3.0015

+1.5

+0.04

10

%

−0.13

2.9985

−1.5

Output Voltage, B Grade

Initial Accuracy

V_O

V_OERR

3.000

V

mV

%

−0.04

Temperature Coefficient, A Grade

Temperature Coefficient, B Grade

Supply Voltage Headroom

Line Regulation

TCV_O

2

1

ppm/°C

V

−40°C < TA < +125°C

3

2

V_IN− V_O

ΔV_O/ΔV_IN

V_IN= 5 V to 18 V

10

35

70

ppm/V

−40°C < TA < +125°C

I_LOAD= 0 mA to 10 mA

Load Regulation

ppm/mA

ΔV_O/ΔI_LOAD

−40°C < TA < +125°C

No load

Quiescent Current

I_IN

390

500

600

μA

−40°C < TA < +125°C

0.1 Hz to 10 Hz

1 kHz

Voltage Noise

e_Np-p

e_N

t_R

2

μV p-p

nV/√Hz

μs

ppm

dB

Voltage Noise Density

Turn-On Settling Time

Long-Term Stability

Output Voltage Hysteresis

Ripple Rejection Ratio

Short Circuit to GND

90

10

50

40

75

27

1,000 hours

f_IN= 10 kHz

ΔV_O

V_{O_HYS}

RRR

I_SC

mA

Rev. G | Page 5 of 24

ADR420/ADR421/ADR423/ADR425

ADR425 ELECTRICAL SPECIFICATIONS

@ V_IN= 7.± V to 1ꢀ.± V, T_A= 2ꢀ°C, unless otherwise noted.

Table 5.

Parameter

Symbol

Conditions

Min

4.994

−6

Typ

5.000

Max

5.006

+6

Unit

V

mV

Output Voltage, A Grade

Initial Accuracy

V_O

V_OERR

+0.12

5.002

+2

%

V

mV

−0.12

4.998

−2

Output Voltage, B Grade

Initial Accuracy

V_O

V_OERR

5.000

+0.04

10

3

%

−0.04

Temperature Coefficient, A Grade

Temperature Coefficient, B Grade

Supply Voltage Headroom

Line Regulation

TCV_O

2

1

ppm/°C

V

−40°C < TA < +125°C

2

V_IN− V_O

ΔV_O/ΔV_IN

V_IN= 7 V to 18 V

−40°C < TA < +125°C

I_LOAD= 0 mA to 10 mA

10

35

70

ppm/V

Load Regulation

ppm/mA

ΔV_O/ΔI_LOAD

−40°C < TA < +125°C

No load

−40°C < TA < +125°C

0.1 Hz to 10 Hz

1 kHz

Quiescent Current

I_IN

390

500

600

μA

μV p-p

nV/√Hz

μs

ppm

dB

Voltage Noise

e_Np-p

e_N

t_R

∆V_O

V_{O_HYS}

RRR

I_SC

3.4

110

10

50

40

75

27

Voltage Noise Density

Turn-On Settling Time

Long-Term Stability

Output Voltage Hysteresis

Ripple Rejection Ratio

Short Circuit to GND

1,000 hours

f_IN= 10 kHz

mA

Rev. G | Page 6 of 24

ADR420/ADR421/ADR423/ADR425

ABSOLUTE MAXIMUM RATINGS

These ratings apply at 2ꢀ°C, unless otherwise noted.

Table 6.

Parameter

Stresses above those listed under Absolute Maximum Ratings

may cause permanent damage to the device. This is a stress

rating only; functional operation of the device at these or any

other conditions above those indicated in the operational

section of this specification is not implied. Exposure to absolute

maximum rating conditions for extended periods may affect

device reliability.

Rating

Supply Voltage

18 V

Indefinite

Output Short-Circuit Duration to GND

Storage Temperature Range R, RM Packages

Operating Temperature Range ADR42x

Junction Temperature Range R, RM Packages

Lead Temperature (Soldering, 60 sec)

−65°C to +150°C

−40°C to +125°C

−65°C to +150°C

300°C

Table 7.

Package Type

1

Unit

θ_JA

8-Lead MSOP (RM)

8-Lead SOIC (R)

190

130

°C/W

¹θ_JAis specified for the worst-case conditions, that is, θ_JAis specified for

devices soldered in the circuit board for surface-mount packages.

ESD CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the

human body and test equipment and can discharge without detection. Although this product features

proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy

electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance

degradation or loss of functionality.

Rev. G | Page 7 of 24

ADR420/ADR421/ADR423/ADR425

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

TP

1

2

8

TP

NIC

V

TP

1

2

8

TP

NIC

V

ADR420/

ADR421/

ADR423/

ADR425

ADR420/

ADR421/

ADR423/

ADR425

V

7

6

7

6

IN

NIC

3

4

NIC

3

4

OUT

TOP VIEW

(Not to Scale)

TOP VIEW

(Not to Scale)

GND

5

TRIM

GND

5

TRIM

NIC = NO INTERNAL CONNECTION

TP = TEST PIN (DO NOT CONNECT)

NIC = NO INTERNAL CONNECTION

TP = TEST PIN (DO NOT CONNECT)

Figure 2. Pin Configuration for 8-Lead SOIC

Figure 3. Pin Configuration for 8-Lead MSOP

Table 8. Pin Function Descriptions

Pin No. Mnemonic Description

1, 8

TP

Test Pin. There are actual connections in TP pins but they are reserved for factory testing purposes. Users should not

connect anything to TP pins; otherwise, the device may not function properly.

2

V_IN

Input Voltage.

3, 7

4

5

NIC

GND

TRIM

No Internal Connect. NICs have no internal connections.

Ground Pin = 0 V.

Trim Terminal. It can be used to adjust the output voltage over a 0.5% range without affecting the temperature

coefficient.

6

V_OUT

Output Voltage.

Rev. G | Page 8 of 24

ADR420/ADR421/ADR423/ADR425

TYPICAL PERFORMANCE CHARACTERISTICS

5.0025

5.0023

2.0495

2.0493

2.0491

2.0489

2.0487

2.0485

2.0483

2.0481

2.0479

2.0477

2.0475

5.0021

5.0019

5.0017

5.0015

5.0013

5.0011

5.0009

5.0007

5.0005

–40

–10

20

50

80

110 125

–40

–10

20

50

80

110 125

TEMPERATURE (°C)

Figure 4. ADR420 Typical Output Voltage vs. Temperature

Figure 7. ADR425 Typical Output Voltage vs. Temperature

0.55

2.5015

2.5013

2.5011

2.5009

2.5007

2.5005

2.5003

2.5001

2.4999

2.4997

2.4995

0.50

0.45

0.40

0.35

0.30

0.25

+125°C

+25°C

–40°C

–40

–10

20

50

80

110 125

4

6

8

10

12

14

15

TEMPERATURE (°C)

INPUT VOLTAGE (V)

Figure 8. ADR420 Supply Current vs. Input Voltage

Figure 5. ADR421 Typical Output Voltage vs. Temperature

0.55

0.50

0.45

0.40

0.35

0.30

0.25

3.0010

3.0008

3.0006

3.0004

3.0002

3.0000

2.9998

2.9996

2.9994

2.9992

2.9990

+125°C

+25°C

–40°C

4

6

8

10

12

14

15

–40

–10

20

50

80

110 125

INPUT VOLTAGE (V)

TEMPERATURE (°C)

Figure 9. ADR421 Supply Current vs. Input Voltage

Figure 6. ADR423 Typical Output Voltage vs. Temperature

Rev. G | Page 9 of 24

ADR420/ADR421/ADR423/ADR425

0.55

70

60

50

40

30

20

10

0

I

= 0mA TO 5mA

L

0.50

+125°C

0.45

V

= 5V

IN

0.40

+25°C

V

= 6.5V

0.35

IN

–40°C

0.30

0.25

4

6

8

10

12

14 15

–40

–10

20

50

80

110 125

INPUT VOLTAGE (V)

TEMPERATURE (°C)

Figure 10. ADR423 Supply Current vs. Input Voltage

Figure 13. ADR421 Load Regulation vs. Temperature

0.55

0.50

0.45

0.40

0.35

0.30

0.25

70

60

50

40

30

20

10

0

I

= 0mA TO 10mA

L

+125°C

V

= 7V

IN

+25°C

–40°C

V

= 15V

IN

6

8

10

12

14

15

–40

–10

20

50

80

110 125

INPUT VOLTAGE (V)

TEMPERATURE (°C)

Figure 11. ADR425 Supply Current vs. Input Voltage

Figure 14. ADR423 Load Regulation vs. Temperature

70

60

50

40

30

20

10

0

35

30

25

20

15

10

5

V

= 15V

IN

= 0mA TO 10mA

I

= 0mA TO 5mA

L

I

L

V

= 4.5V

IN

V

= 6V

IN

0

–40

–10

20

50

80

110 125

–10

20

50

80

110 125

TEMPERATURE (°C)

Figure 12. ADR420 Load Regulation vs. Temperature

Figure 15. ADR425 Load Regulation vs. Temperature

Rev. G | Page 10 of 24

ADR420/ADR421/ADR423/ADR425

6

5

4

3

2

1

14

12

10

8

V

= 4.5V TO 15V

V

= 7.5V TO 15V

IN

6

4

2

0

–40

0

–40

–10

20

50

80

110 125

–10

20

50

80

110 125

TEMPERATURE (°C)

Figure 16. ADR420 Line Regulation vs. Temperature

Figure 19. ADR425 Line Regulation vs. Temperature

6

5

4

3

2

1

2.5

2.0

1.5

1.0

0.5

0

V

= 5V TO 15V

IN

–40°C

+25°C

+85°C

0

–40

–10

20

50

80

110 125

0

1

2

3

4

5

TEMPERATURE (°C)

LOAD CURRENT (mA)

Figure 20. ADR420 Minimum Input/Output Voltage

Differential vs. Load Current

Figure 17. ADR421 Line Regulation vs. Temperature

2.5

2.0

1.5

1.0

0.5

0

9

8

7

6

5

4

3

2

1

V

= 5V TO 15V

IN

–40°C

+25°C

+125°C

0

–40

0

1

2

3

4

5

–10

20

50

80

110

LOAD CURRENT (mA)

TEMPERATURE (°C)

Figure 21. ADR421 Minimum Input/Output Voltage

Differential vs. Load Current

Figure 18. ADR423 Line Regulation vs. Temperature

Rev. G | Page 11 of 24

ADR420/ADR421/ADR423/ADR425

2.5

2.0

–40°C

+25°C

1.5

+125°C

1.0

0.5

0

TIME (1s/DIV)

0

1

2

3

4

5

LOAD CURRENT (mA)

Figure 22. ADR423 Minimum Input/Output Voltage

Differential vs. Load Current

Figure 25. ADR421 Typical Noise Voltage 0.1 Hz to 10 Hz

2.5

2.0

1.5

1.0

0.5

0

–40°C

+25°C

+125°C

TIME (1s/DIV)

0

1

2

3

4

5

LOAD CURRENT (mA)

Figure 23. ADR425 Minimum Input/Output Voltage

Differential vs. Load Current

Figure 26. Typical Noise Voltage 10 Hz to 10 kHz

30

25

20

15

10

5

1k

TEMPERATURE

SAMPLE SIZE – 160

+25°C

–40°C

+25°C

+125°C

ADR425

ADR420

ADR423

ADR421

100

10

0

100

FREQUENCY (Hz)

1k

10k

DEVIATION (ppm)

Figure 24. ADR421 Typical Hysteresis

Figure 27. Voltage Noise Density vs. Frequency

Rev. G | Page 12 of 24

ADR420/ADR421/ADR423/ADR425

C

= 100nF

1mA LOAD

1V/DIV

L

C

= 0μF

BYPASS

LINE INTERRUPTION

500mV/DIV

V

OUT

V

IN

LOAD OFF

OUT

500mV/DIV

2V/DIV

LOAD ON

TIME (100

μs/DIV)

TIME (100μs/DIV)

Figure 28. ADR421 Line Transient Response, no C_BYPASS

Figure 31. ADR421 Load Transient Response, CL = 100 nF

C

= 0.01μF

IN

NO LOAD

C

= 0.1μF

BYPASS

LINE INTERRUPTION

500mV/DIV

V

IN

V

2V/DIV

OUT

500mV/DIV

V

2V/DIV

IN

TIME (100

μs/DIV)

TIME (4μs/DIV)

Figure 32. ADR421 Turn-Off Response

Figure 29. ADR421 Line Transient Response, C_BYPASS= 0.1 μF

C

= 0.01μF

IN

NO LOAD

C

= 0

μF

1mA LOAD

1V/DIV

L

V

2V/DIV

OUT

V

OUT

LOAD OFF

2V/DIV

IN

2V/DIV

LOAD ON

TIME (4μs/DIV)

TIME (100μs/DIV)

Figure 33. ADR421 Turn-On Response

Figure 30. ADR421 Load Transient Response, no C_L

Rev. G | Page 13 of 24

ADR420/ADR421/ADR423/ADR425

50

45

40

35

30

25

20

15

10

5

C

= 0.01μF

LOAD

NO INPUT CAP

V

2V/DIV

OUT

ADR425

ADR423

ADR421

V

2V/DIV

IN

ADR420

100k

0

10

TIME (4μs/DIV)

100

1k

10k

FREQUENCY (Hz)

Figure 37. Output Impedance vs. Frequency

Figure 34. ADR421 Turn-Off Response

0

–10

–20

–30

–40

–50

–60

–70

–80

–90

–100

C

= 0.01μF

LOAD

NO INPUT CAP

V

2V/DIV

OUT

V

2V/DIV

IN

TIME (4μs/DIV)

10

100

1k

10k

100k

1M

FREQUENCY (Hz)

Figure 38. Ripple Rejection vs. Frequency

Figure 35. ADR421 Turn-On Response

C

R

C

= 0.1μF

BYPASS

= 500Ω

L

= 0

V

5V/DIV

2V/DIV

OUT

V

IN

TIME (100μs/DIV)

Figure 36. ADR421 Turn-On/Turn-Off Response

Rev. G | Page 14 of 24

ADR420/ADR421/ADR423/ADR425

PARAMETER DEFINITIONS

Temperature Coefficient

Thermal Hysteresis

The change of output voltage over the operating temperature

range is normalized by the output voltage at 2ꢀ°C, and

expressed in ppm/°C as

The change of output voltage after the device is cycled through

temperatures from +2ꢀ°C to −4±°C to +12ꢀ°C and back to

+2ꢀ°C. This is a typical value from a sample of parts put

through such a cycle

V_O

(

T₂

)

−V_O

(

T

)

1

TCV_O

(

ppm/ °C

)

=

×1±⁶

V_{O _ HYS}= V_O

(

2ꢀ°C

)

−V_{O _ TC}

V_O2ꢀ°C

(

)

×

(

T₂−T

)

1

V_O

(

2ꢀ°C

)

−V_{O _ TC}

where:

V_O(2ꢀ°C) = V_Oat 2ꢀ°C.

V_O(T₁) = V_Oat Temperature 1.

V_{O _ HYS}ppm

(

)

=

×1±⁶

V_O2ꢀ°C

(

)

V_O(T₂) = V_Oat Temperature 2.

where:

V_O(2ꢀ°C) = V_Oat 2ꢀ°C.

_{O_TC}= V_Oat 2ꢀ °C after temperature cycle at +2ꢀ°C to −4±°C

Line Regulation

V

The change in output voltage due to a specified change in input

voltage. It includes the effects of self-heating. Line regulation is

expressed in either percent-per-volt, parts-per-million per volt,

or microvolts-per-volt change in input voltage.

to +12ꢀ°C and back to +2ꢀ°C.

Input Capacitor

Input capacitors are not required on the ADR42x. There is no

limit for the value of the capacitor used on the input, but a 1 μF

to 1± μF capacitor on the input improves transient response in

applications where the supply suddenly changes. An additional

±.1 μF capacitor in parallel also helps to reduce noise from the

supply.

Load Regulation

The change in output voltage due to a specified change in load

current. It includes the effects of self-heating. Load regulation is

expressed in either microvolts-per-milliampere, parts-per-

million per milliampere, or ohms of dc output resistance.

Output Capacitor

Long-Term Stability

The ADR42x do not need output capacitors for stability under

any load condition. An output capacitor, typically ±.1 μF, filters

out any low level noise voltage and does not affect the operation

of the part. On the other hand, the load transient response can

be improved with an additional 1 μF to 1± μF output capacitor

in parallel. A capacitor here acts as a source of stored energy for

sudden increase in load current. The only parameter that

degrades by adding an output capacitor is the turn-on time, and

it depends on the size of the selected capacitor.

Typical shift of output voltage at 2ꢀ°C on a sample of parts

subjected to operation life test of 1,±±± of hours at 12ꢀ°C

ΔV_O= V_O

ΔV_Oppm

(

t₀

)

−V_O

(

t₁

)

V_Ot₀

(

)

−V_O

(t₀)

t₁

( )

(

)

=

×1±⁶

V_O

where:

V_O(t₀) = V_Oat 2ꢀ°C at Time ±.

V_O(t₁) = V_Oat 2ꢀ°C after 1,±±± hours operation at 12ꢀ°C.

Rev. G | Page 15 of 24

ADR420/ADR421/ADR423/ADR425

THEORY OF OPERATION

The ADR42x series of references uses a new reference genera-

tion technique known as XFET (eXtra implanted junction FET).

This technique yields a reference with low supply current, good

thermal hysteresis, and exceptionally low noise. The core of the

XFET reference consists of two junction field-effect transistors

(JFET), one having an extra channel implant to raise its pinch-

off voltage. By running the two JFETs at the same drain current,

the difference in pinch-off voltage can be amplified and used to

form a highly stable voltage reference.

DEVICE POWER DISSIPATION CONSIDERATIONS

The ADR42x family of references is guaranteed to deliver load

currents to 1± mA with an input voltage that ranges from 4.ꢀ V

to 18 V. When these devices are used in applications at higher

currents, the following equation should be used to account for

the temperature effects due to power dissipation increases:

T_J= P_D× θ_JA+ T_A

where:

(2)

T_Jand T_Aare the junction and ambient temperatures,

respectively.

P_Dis the device power dissipation.

The intrinsic reference voltage is about ±.ꢀ V with a negative

temperature coefficient of about −12± ppm/°C. This slope is

essentially constant to the dielectric constant of silicon and can

be closely compensated by adding a correction term generated

in the same fashion as the proportional-to-temperature (PTAT)

term used to compensate band gap references. The primary

advantage over a band gap reference is that the intrinsic

temperature coefficient is approximately 3± times lower

(therefore requiring less correction). This results in much lower

noise because most of the noise of a band gap reference comes

from the temperature compensation circuitry.

θ_JAis the device package thermal resistance.

BASIC VOLTAGE REFERENCE CONNECTIONS

Voltage references, in general, require a bypass capacitor

connected from V_OUTto GND. The circuit in Figure 4±

illustrates the basic configuration for the ADR42x family of

references. Other than a ±.1 μF capacitor at the output to help

improve noise suppression, a large output capacitor at the

output is not required for circuit stability.

Figure 39 shows the basic topology of the ADR42x series. The

temperature correction term is provided by a current source

with a value designed to be proportional to absolute

temperature. The general equation is

TP

1

2

8

7

6

TP

ADR420/

ADR421/

ADR423/

ADR425

V

NIC

IN

10μF

+

OUTPUT

0.1μF

NIC

3

4

0.1μF

TOP VIEW

(Not to Scale)

5

TRIM

V

_OUT= G × (ΔV_P− R1 × I_PTAT

)

(1)

NIC = NO INTERNAL CONNECTION

TP = TEST PIN (DO NOT CONNECT)

where:

G is the gain of the reciprocal of the divider ratio.

ΔV_Pis the difference in pinch-off voltage between the two JFETs.

_PTATis the positive temperature coefficient correction current.

Figure 40. Basic Voltage Reference Configuration

NOISE PERFORMANCE

I

The noise generated by ADR42x references is typically less

than 2 μV p-p over the ±.1 Hz to 1± Hz band for the ADR42±,

ADR421, and ADR423. Figure 2ꢀ shows the ±.1 Hz to 1± Hz

noise of the ADR421, which is only 1.7ꢀ μV p-p. The noise

measurement is made with a band-pass filter made of a 2-pole

high-pass filter with a corner frequency at ±.1 Hz and a 2-pole

low-pass filter with a corner frequency at 1± Hz.

ADR42x are created by on-chip adjustment of R2 and R3 to

achieve 2.±48 V or 2.ꢀ±± V at the reference output, respectively.

V

IN

I

1

ADR420/ADR421/

ADR423/ADR425

I

PTAT

V

TURN-ON TIME

OUT

R2

R3

At power-up (cold start), the time required for the output

voltage to reach its final value within a specified error band is

defined as the turn-on settling time. Two components typically

associated with this are the time for the active circuits to settle

and the time for the thermal gradients on the chip to stabilize.

Figure 32 to Figure 36 show the turn-on settling time for the

ADR421.

*

ΔV

P

R1

*EXTRA CHANNEL IMPLANT

= G(ΔV – R1 × I

V

)

PTAT

GND

OUT

P

Figure 39. Simplified Schematic

Rev. G | Page 16 of 24

ADR420/ADR421/ADR423/ADR425

APPLICATIONS

OUTPUT ADJUSTMENT

SOURCE FIBER

GIMBAL + SENSOR

DESTINATION

The ADR42x trim terminal can be used to adjust the output

voltage over a ±±.ꢀ5 range. This feature allows the system

designer to trim system errors out by setting the reference to

a voltage other than the nominal. This is also helpful if the

part is used in a system at temperature to trim out any error.

Adjustment of the output has a negligible effect on the

temperature performance of the device. To avoid degrading

temperature coefficients, both the trimming potentiometer

and the two resistors need to be low temperature coefficient

types, preferably <1±± ppm/°C.

FIBER

LASER BEAM

ACTIVATOR

RIGHT

MEMS MIRROR

PREAMP

ACTIVATOR

LEFT

AMPL

DAC

AMPL

DAC

ADR421

CONTROL

ELECTRONICS

ADR421

ADC

DSP

INPUT

2

OUTPUT

= ±0.5%

V

6

5

IN

V

O

V

O

Figure 42. All-Optical Router Network

ADR420/

ADR421/

ADR423/

ADR425

A NEGATIVE PRECISION REFERENCE

WITHOUT PRECISION RESISTORS

R1

470kΩ

R

P

TRIM

GND

10kΩ

In many current-output CMOS DAC applications where the

output signal voltage must be of the same polarity as the

reference voltage, a current-switching DAC is often recon-

figured into a voltage-switching DAC with a 1.2ꢀ V reference,

an op amp, a pair of resistors, and an additional operational

amplifier at the output to reinvert the signal. A negative voltage

reference should be used because an additional operational

amplifier is not required for either reinversion (current-

switching mode) or amplification (voltage-switching mode) of

the DAC output voltage. In general, any positive voltage

reference can be converted into a negative voltage reference

through the use of an operational amplifier and a

10kΩ (ADR420)

15kΩ (ADR421)

4

R2

Figure 41. Output Trim Adjustment

REFERENCE FOR CONVERTERS IN OPTICAL

NETWORK CONTROL CIRCUITS

In the high capacity, all-optical router network of Figure 42,

arrays of micromirrors direct and route optical signals from

fiber to fiber, without first converting them to electrical form,

which reduces the communication speed. The tiny micro-

mechanical mirrors are positioned so that each is illuminated

by a single wave length that carries unique information and

can be passed to any desired input and output fiber. The mirrors

are tilted by the dual-axis actuators controlled by precision

analog-to-digital converters (ADCs) and digital-to-analog

converters (DACs) within the system. Due to the microscopic

movement of the mirrors, not only is the precision of the

converters important, but the noise associated with these

controlling converters is extremely critical, because total noise

within the system can be multiplied by the numbers of

converters used. Consequently, the exceptional low noise of the

ADR42x is necessary to maintain the stability of the control

loop for this application.

pair of matched resistors in an inverting configuration. The

disadvantage to this approach is that the largest single source of

error in the circuit is the relative matching of the resistors used.

A negative reference can easily be generated by adding a

precision op amp and configuring as shown in Figure 43. V_OUT

is at virtual ground and, therefore, the negative reference can be

taken directly from the output of the op amp. The op amp must

be dual-supply, low offset and have rail-to-rail capability if

negative supply voltage is close to the reference output.

Rev. G | Page 17 of 24

ADR420/ADR421/ADR423/ADR425

+V

DD

V

IN

2

V

IN

R

LW

V

ADR420/

ADR421/

ADR423/

ADR425

ADR420/

ADR421/

ADR423/

ADR425

OUT

SENSE

V

IN

R

LW

V

OUT

FORCE

A1

6

V

OUT

V

OUT

6

GND

4

GND

4

R

L

A1 = OP191

–V

A1

REF

A1 = OP777, OP193

Figure 45. Advantage of Kelvin Connection

–V

DD

DUAL-POLARITY REFERENCES

Figure 43. Negative Reference

Dual-polarity references can easily be made with an op amp and

a pair of resistors. In order not to defeat the accuracy obtained

by the ADR42x, it is imperative to match the resistance toler-

ance and the temperature coefficient of all components.

HIGH VOLTAGE FLOATING CURRENT SOURCE

The circuit in Figure 44 can be used to generate a floating

current source with minimal self-heating. This particular

configuration can operate on high supply voltages determined

by the breakdown voltage of the N-channel JFET.

V

IN

2

1

μF

0.1μF

V

IN

6

+5V

OUT

+V

R1

10k

S

R2

10k

Ω

U1

ADR425

SST111

VISHAY

+10V

V+

U2

2

TRIM

GND

4

5

V

IN

–5V

OP1177

V–

ADR420/

ADR421/

ADR423/

ADR425

R3

5k

Ω

–10V

V

OUT

6

Figure 46. +5 V and −5 V Reference Using ADR425

2N3904

OP09

GND

4

+2.5V

R

L

+10V

2.10kΩ

2

V

IN

–V

6

5

OUT

S

U1

ADR425

R1

5.6kΩ

Figure 44. High Voltage Floating Current Source

TRIM

GND

4

KELVIN CONNECTIONS

R2

5.6kΩ

V+

U2

In many portable instrumentation applications where PC board

cost and area are important considerations, circuit intercon-

nects are often narrow. These narrow lines can cause large

voltage drops if the voltage reference is required to provide load

currents to various functions. In fact, a circuit’s interconnects

can exhibit a typical line resistance of ±.4ꢀ mΩ/square (1 oz. Cu,

for example). Force and sense connections, also referred to as

Kelvin connections, offer a convenient method of eliminating

the effects of voltage drops in circuit wires. Load currents flow-

ing through wiring resistance produce an error (V_ERROR= R × I_L)

at the load. However, the Kelvin connection in Figure 4ꢀ

overcomes the problem by including the wiring resistance

within the forcing loop of the op amp. Because the op amp

senses the load voltage, op amp loop control forces the output to

compensate for the wiring error and to produce the correct

voltage at the load.

OP1177

V–

–2.5V

–10V

Figure 47. +2.5 V and −2.5 V Reference Using ADR425

Rev. G | Page 18 of 24

ADR420/ADR421/ADR423/ADR425

PROGRAMMABLE CURRENT SOURCE

PROGRAMMABLE DAC REFERENCE VOLTAGE

Together with a digital potentiometer and a Howland current

pump, the ADR42ꢀ forms the reference source for a program-

mable current as

With a multichannel DAC, such as the quad, 12-bit voltage

output AD7398, one of its internal DACs, and an ADR42x

voltage reference can be used as a common programmable

V_REFXfor the rest of the DACs. The circuit configuration is

shown in Figure 49. The relationship of V_REFXto V_REFdepends

on the digital code and the ratio of R1 and R, and is given by

R2 + R2

⎛

⎜

⎝

⎞

⎟

⎠

A

B

R1

I_L=

×V_W

(3)

(4)

R2_B

R2

R1

⎛

⎝

D

⎞

⎟

⎠

V_REF× 1+

⎜

and

V_REFX

=

(ꢀ)

R2

⎛

⎜

⎝

⎞

⎠

1+

×

D

⎟

2^NR1

VW =

×V_REF

2^N

where:

D = Decimal equivalent of input code.

N = Number of bits.

D = Decimal equivalent of the input code.

N = Number of bits.

V

_REF= Applied external reference.

_REFX= Reference voltage for DACs A to D.

C1

10pF

V

R1'

50kΩ

R2'

DD

2

1kΩ

Table 9. V_REFXvs. R1 and R2

R1, R2

Digital Code

V_REF

V

DD

V

TRIM

U1

5

6

IN

R1 = R2

R1 = 3R2

0000 0000 0000

1000 0000 0000

1111 1111 1111

0000 0000 0000

1000 0000 0000

1111 1111 1111

2 V_REF

1.3 V_REF

V_REF

4 V_REF

1.6 V_REF

V_REF

AD5232

U2

V+

A2

OP2177

ADR425

DIGITAL POT

C2

V

10pF

DD

V

OUT

GND

4

V–

A

R2

10Ω

B

U2

V+

A1

OP2177

V

SS

B

W

R1

50kΩ

R2

A

1kΩ

V–

LOAD

V

SS

VL

R2

±0.1%

R1

±0.1%

V

A

REF

V

A

IL

OUT

V

Figure 48. Programmable Current Source

REF

DACA

V

IN

ADR425

R1' and R2' must be equal to R1 and R2_A+ R2_B, respectively.

Theoretically, R2_Bcan be made as small as needed to achieve

V

B

REF

V

B

C

D

OUT

V

= V

(D

)

OB

OC

OD

REFX

B

C

D

the current needed within A2 output current driving capability.

In the example shown in Figure 48, OP2177 is able to deliver a

maximum of 1± mA. Because the current pump uses both

positive and negative feedback, Capacitors C1 and C2 are

needed to ensure that negative feedback prevails and, therefore,

avoids oscillation. This circuit also allows bidirectional current

flow if the inputs V_Aand V_Bof the digital potentiometer are

supplied with the dual-polarity references as previously shown.

DACB

V

C

REF

DACC

V

D

REF

DACD

AD7398

Figure 49. Programmable DAC Reference

Rev. G | Page 19 of 24

ADR420/ADR421/ADR423/ADR425

PRECISION VOLTAGE REFERENCE FOR DATA

CONVERTERS

PRECISION BOOSTED OUTPUT REGULATOR

A precision voltage output with boosted current capability

can be realized with the circuit shown in Figure ꢀ1. In this

circuit, U2 forces V_Oto be equal to V_REFby regulating the turn

on of N1. Therefore, the load current is furnished by V_IN. In

this configuration, a ꢀ± mA load is achievable at V_INof ꢀ V.

Moderate heat is generated on the MOSFET, and higher current

can be achieved by replacing the larger device. In addition, for

a heavy capacitive load with step input, a buffer may be added

at the output to enhance the transient response.

The ADR42x family has a number of features that make it ideal

for use with ADCs and DACs. The exceptionally low noise,

tight temperature coefficient, and high accuracy characteristics

make the ADR42x ideal for low noise applications such as

cellular base station applications.

AD77±1 is an example of an ADC that is well suited for the

ADR42x. The ADR421 is used as the precision reference for

the converter in Figure ꢀ±. The AD77±1 is a 16-bit ADC with

on-chip digital filtering intended for measuring wide dynamic

range and low frequency signals, such as those representing

chemical, physical, or biological processes. It contains a charge-

balancing (Σ-Δ) ADC, calibration microcontroller with on-chip

static RAM, clock oscillator, and serial communications port.

N1

V

O

IN

R

L

25Ω

5V

2

U1

V

IN

2N7002

6

5

V

+

OUT

V+

U2

ADR421

AD8601

+5V

ANALOG

SUPPLY

TRIM

GND

4

V–

–

0.1μF

10μF

AD7701

AV

V

DV

DD

SLEEP

MODE

0.1μF

Figure 51. Precision Boosted Output Regulator

V

IN

V

OUT

REF

DATA READY

DRDV

CS

0.1μF

ADR420/

ADR421/

ADR423/

ADR425

READ (TRANSMIT)

SERIAL CLOCK

SCLK

SDATA

GND

CLKIN

RANGES

BP/UP

CAL

SELECT

CLKOUT

CALIBRATE

SC1

SC2

ANALOG

INPUT

A

IN

ANALOG

GROUND

DGND

AGND

0.1μF

10μF

DV

SS

AV

SS

–5V

ANALOG

SUPPLY

0.1μF

Figure 50. Voltage Reference for 16-Bit ADC AD7701

Rev. G | Page 20 of 24

ADR420/ADR421/ADR423/ADR425

OUTLINE DIMENSIONS

5.00 (0.1968)

4.80 (0.1890)

8

1

5

4

6.20 (0.2440)

5.80 (0.2284)

4.00 (0.1574)

3.80 (0.1497)

1.27 (0.0500)

BSC

0.50 (0.0196)

× 45°

1.75 (0.0688)

1.35 (0.0532)

0.25 (0.0099)

0.25 (0.0098)

0.10 (0.0040)

8°

0.51 (0.0201)

0.31 (0.0122)

0° 1.27 (0.0500)

COPLANARITY

0.10

0.25 (0.0098)

0.17 (0.0067)

SEATING

PLANE

0.40 (0.0157)

COMPLIANT TO JEDEC STANDARDS MS-012-AA

CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS

(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR

REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN

Figure 52. 8-Lead Standard Small Outline Package [SOIC_N]

Narrow Body

(R-8)

Dimensions shown in millimeters and (inches)

3.00

BSC

8

1

5

4

4.90

BSC

3.00

BSC

PIN 1

0.65 BSC

1.10 MAX

0.15

0.00

0.80

0.60

0.40

8°

0°

0.38

0.22

0.23

0.08

COPLANARITY

0.10

SEATING

PLANE

COMPLIANT TO JEDEC STANDARDS MO-187-AA

Figure 53. 8-Lead Mini Small Outline Package [MSOP]

(RM-8)

Dimensions shown in millimeters

Rev. G | Page 21 of 24

ADR420/ADR421/ADR423/ADR425

ORDERING GUIDE

Temp

Package

Description

SOIC_N

MSOP

SOIC_N

MSOP

Package

Option

R-8

Top

Mark

ADR420

R4A

L0C

ADR420

ADR421

R5A

Output

Voltage (V_O)

2.048

2.50

3.00

5.00

Initial Accuracy

Temp Co.

Model

ADR420AR

Range (°C)

−40 to +125

mV

%

(ppm/°C)

10

3

1

3

1

4

1.5

4

0.15

0.05

0.12

0.04

0.13

0.04

0.13

0.04

0.12

0.04

ADR420AR-REEL7

ADR420ARZ¹

ADR420ARZ-REEL7¹

ADR420ARM

R-8

RM-8

R-8

ADR420ARM-REEL7

ADR420ARMZ¹

ADR420ARMZ-REEL7¹−40 to +125

ADR420BR

−40 to +125

ADR420BR-REEL7

3

ADR420BRZ¹

ADR420BRZ-REEL7¹

ADR421AR

10

3

10

3

ADR421AR-REEL7

ADR421ARZ¹

ADR421ARZ-REEL7¹

ADR421ARM

R-8

RM-8

R-8

ADR421ARM-REEL7

MSOP

R5A

R06

ADR421ARMZ¹

ADR421ARMZ-REEL7¹−40 to +125

ADR421BR

−40 to +125

SOIC_N

MSOP

ADR421

ADR423

R6A

ADR421BR-REEL7

ADR421BRZ¹

ADR421BRZ-REEL7¹

ADR423AR

ADR423AR-REEL7

ADR423ARZ¹

ADR423ARZ-REEL7¹

ADR423ARM

R-8

RM-8

R-8

ADR423ARM-REEL7

ADR423BR

MSOP

R6A

SOIC_N

MSOP

ADR423

R0U

ADR423BR-REEL7

R-8

3

ADR423ARMZ¹

RM-8

R-8

RM-8

R-8

10

3

ADR423ARMZ-REEL7¹−40 to +125

MSOP

R0U

4

ADR423BRZ¹

−40 to +125

SOIC_N

MSOP

ADR423

ADR425

R7A

R0V

1.5

6

2

ADR423BRZ-REEL7¹

ADR425AR

3

10

3

ADR425AR-REEL7

5.00

ADR425ARZ¹

ADR425ARZ-REEL7¹

ADR425ARM

ADR425ARM-REEL7

ADR425ARMZ¹

ADR425ARMZ-REEL7¹−40 to +125

ADR425BR

−40 to +125

SOIC_N

ADR425

ADR425BR-REEL7

5.00

3

ADR425BRZ¹

ADR425BRZ-REEL7¹

2

¹Z = Pb-free part.

Rev. G | Page 22 of 24

ADR420/ADR421/ADR423/ADR425

NOTES

Rev. G | Page 23 of 24

ADR420/ADR421/ADR423/ADR425

NOTES

©

registered trademarks are the property of their respective owners.

C02432-0-6/05(G)

Rev. G | Page 24 of 24


型号：	ADR425ARM
厂家：	ADI
描述：	IC 1-OUTPUT THREE TERM VOLTAGE REFERENCE, 5 V, PDSO8, MO-187AA, MSOP-8, Voltage Reference 光电二极管输出元件
文件：	总24页 (文件大小：282K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

ADR425ARM [ADI]

相关型号：

ADR425ARM-REEL7

ADR425ARMZ

ADR425ARMZ-REEL7

ADR425ARZ

ADR425ARZ-REEL7

ADR425BR

ADR425BR-REEL7

ADR425BRZ

ADR425BRZ-REEL7

ADR425_15

ADR430

ADR430A