ADR439A_技术文档

Ultralow Noise XFET^®Voltage References

with Current Sink and Source Capability

ADR430/ADR431/ADR433/ADR434/ADR435/ADR439

PIN CONFIGURATIONS

FEATURES

Low noise (0.1 Hz to 10 Hz): 3.5 µV p-p @ 2.5 V output

No external capacitor required

Low temperature coefficient

A Grade: 10 ppm/°C max

TP

1

2

3

4

8

7

6

5

TP

ADR43x

TOP VIEW

(Not to Scale)

V

IN

NC

V

OUT

GND

TRIM

B Grade: 3 ppm/°C max

NC = NO CONNECT

Load regulation: 15 ppm/mA

Line regulation: 20 ppm/V

Wide operating range

Figure 1. 8-Lead MSOP

(RM Suffix)

ADR430: 4.1 V to 18 V

ADR431: 4.5 V to 18 V

ADR433: 5.0 V to 18 V

ADR434: 6.1 V to 18 V

ADR435: 7.0 V to 18 V

TP

1

2

3

4

8

7

6

5

TP

NC

V

ADR43x

TOP VIEW

(Not to Scale)

V

IN

NC

OUT

GND

TRIM

ADR439: 6.5 V to 18 V

NC = NO CONNECT

High output current: +30 mA/−20 mA

Wide temperature range: −40°C to +125°C

Figure 2. 8-Lead SOIC

(R Suffix)

APPLICATIONS

Precision data acquisition systems

High resolution data converters

Medical instruments

Industrial process control systems

Optical control circuits

Precision instruments

GENERAL DESCRIPTION

The ADR43x series is a family of XFET voltage references

featuring low noise, high accuracy, and low temperature drift

performance. Using ADI’s patented temperature drift curvature

correction and XFET (eXtra implanted junction FET) technology,

the ADR43x’s voltage change versus temperature nonlinearity is

minimized.

All versions are specified over the extended industrial tempera-

ture range (−40°C to +125°C).

Table 1. Selection Guide

Accuracy

V_OUT(V) (mV)

Temperature Coefficient

(ppm/°C)

Model

ADR430B

ADR430A

ADR43±B

ADR43±A

ADR433B

ADR433A

ADR434B

ADR434A

ADR435B

ADR435A

ADR439B

ADR439A

2.048

2.500

3.000

4.096

5.000

4.500

±±

±3

±±

±3

±±.4

±4

±±.5

±5

±2

±6

3

±0

3

±0

3

±0

3

±0

3

±0

3

The XFET references operate at lower current (800 µA) and

supply headroom (2 V) than buried-Zener references. Buried-

Zener references require more than 5 V headroom for operations.

The ADR43x XFET references are the only low noise solutions

for 5 V systems.

The ADR43x series has the capability to source up to 30 mA

and sink up to 20 mA of output current. It also comes with a

TRIM terminal to adjust the output voltage over a 0.5% range

without compromising performance. The ADR43x is available

in the 8-lead mini SOIC and 8-lead SOIC packages.

±2

±5.4

±0

Rev. B

Information furnished by Analog Devices is believed to be accurate and reliable.

However, no responsibility is assumed by Analog Devices for its use, nor for any

infringements of patents or other rights of third parties that may result from its use.

Specifications subject to change without notice. No license is granted by implication

or otherwise under any patent or patent rights of Analog Devices. Trademarks and

registered trademarks are the property of their respective owners.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Tel: 781.329.4700

Fax: 781.326.8703

www.analog.com

ADR430/ADR431/ADR433/ADR434/ADR435/ADR439

TABLE OF CONTENTS

Specifications..................................................................................... 3

ADR430 Electrical Characteristics............................................. 3

ADR431 Electrical Characteristics............................................. 4

ADR433 Electrical Characteristics............................................. 5

ADR434 Electrical Characteristics............................................. 6

ADR435 Electrical Characteristics............................................. 7

ADR439 Electrical Characteristics............................................. 8

Absolute Maximum Ratings............................................................ 9

Package Type................................................................................. 9

ESD Caution.................................................................................. 9

Typical Performance Characteristics ........................................... 10

Theory of Operation ...................................................................... 15

Basic Voltage Reference Connections...................................... 15

Noise Performance ..................................................................... 15

Turn-On Time ............................................................................ 15

Applications..................................................................................... 16

Output Adjustment .................................................................... 16

Reference for Converters in Optical Network Control

Circuits......................................................................................... 16

Negative Precision Reference without Precision Resistors... 16

High Voltage Floating Current Source.................................... 17

Kelvin Connections.................................................................... 17

Dual Polarity References ........................................................... 17

Programmable Current Source ................................................ 18

Programmable DAC Reference Voltage.................................. 18

Precision Voltage Reference for Data Converters.................. 19

Precision Boosted Output Regulator....................................... 19

Outline Dimensions....................................................................... 20

Ordering Guide .......................................................................... 21

REVISION HISTORY

9/04—Data Sheet Changed from Rev. A to Rev. B

Added New Grade ..............................................................Universal

Changes to Specifications................................................................ 3

Replaced Figure 3, Figure 4, Figure 5........................................... 10

Updated Ordering Guide............................................................... 21

6/04—Data Sheet Changed from Rev. 0 to Rev. A

Changes to Format .............................................................Universal

Changes to the Ordering Guide.................................................... 20

12/03—Revision 0: Initial Version

Rev. B | Page 2 of 24

ADR430/ADR431/ADR433/ADR434/ADR435/ADR439

SPECIFICATIONS

ADR430 ELECTRICAL CHARACTERISTICS

V_IN= 4.1 V to 18 V, I_LOAD= 0 mA, T_A= 25°C, unless otherwise noted.

Table 2.

Parameter

Output Voltage

B Grade

Symbol

Conditions

Min

Typ

Max

Unit

V_O

2.047

2.045

2.048

2.049

2.05±

V

A Grade

Initial Accuracy

B Grade

A Grade

V_OERR

±

0.05

3

mV

%

mV

%

0.±5

Temperature Coefficient

SOIC-8 (B Grade)

SOIC-8 (A Grade)

MSOP-8

TCV_O

∆V_O/∆V_IN

−40°C < T_A< +±25°C

V_IN= 4.± V to ±8 V

−40°C < T_A< +±25°C

I_LOAD= 0 mA to ±0 mA, V_IN= 5.0 V

−40°C < T_A< +±25°C

I_LOAD= −±0 mA to 0 mA, V_IN= 5.0 V

−40°C < T_A< +±25°C

No load, −40°C < T_A< +±25°C

0.± Hz to ±0.0 Hz

±

2

3

±0

ppm/°C

ppm/V

Line Regulation

5

20

±5

Load Regulation

∆V_O/∆I_LOAD

ppm/mA

±5

800

ppm/mA

µA

µV p-p

Quiescent Current

Voltage Noise

I_IN

e_Np-p

e_N

560

3.5

60

Hz

nV√

Voltage Noise Density

Turn-On Settling Time

Long-Term Stability^±

Output Voltage Hysteresis

Ripple Rejection Ratio

Short Circuit to GND

± kHz

t_R

C_IN= 0

±,000 h

±0

40

20

–70

40

µs

∆V_O

V_{O_HYS}

RRR

I_SC

V_IN

V_IN− V_O

ppm

dB

mA

V

f_IN= ±0 kHz

Supply Voltage Operating Range

Supply Voltage Headroom

4.±

2

±8

V

^±The long-term stability specification is noncumulative. The drift in subsequent ±,000 hour periods is significantly lower than in the first ±,000 hour period.

Rev. B | Page 3 of 24

ADR430/ADR431/ADR433/ADR434/ADR435/ADR439

ADR431 ELECTRICAL CHARACTERISTICS

V_IN= 4.5 V to 18 V, I_LOAD= 0 mA, T_A= 25°C, unless otherwise noted.

Table 3.

Parameter

Output Voltage

B Grade

Symbol

Conditions

Min

Typ

Max

Unit

V_O

2.499

2.497

2.500

2.50±

2.503

V

A Grade

Initial Accuracy

B Grade

A Grade

V_OERR

±

0.04

3

mV

%

mV

%

0.±3

Temperature Coefficient

SOIC-8 (B Grade)

SOIC-8 (A Grade)

MSOP-8

TCV_O

∆V_O/∆V_IN

−40°C < T_A< +±25°C

V_IN= 4.5 V to ±8 V

±

2

3

±0

ppm/°C

Line Regulation

−40°C < T_A< +±25°C

5

20

±5

ppm/V

Load Regulation

∆V_O/∆I_LOAD

I_LOAD= 0 mA to ±0 mA, V_IN= 5.0 V

−40°C < T_A< +±25°C

I_LOAD= −±0 mA to 0 mA, V_IN= 5.0 V

−40°C < T_A< +±25°C

No load, −40°C < T_A< +±25°C

0.± Hz to ±0.0 Hz

± kHz

ppm/mA

±5

800

ppm/mA

µA

µV p-p

Quiescent Current

I_IN

580

3.5

80

Voltage Noise

e_Np-p

e_N

Hz

nV√

Voltage Noise Density

Turn-On Settling Time

Long-Term Stability^±

Output Voltage Hysteresis

Ripple Rejection Ratio

Short Circuit to GND

t_R

C_IN= 0

±0

µs

∆V_O

V_{O_HYS}

RRR

I_SC

±,000 h

40

20

−70

40

ppm

dB

mA

V

f_IN= ±0 kHz

Supply Voltage Operating Range

Supply Voltage Headroom

V_IN

V_IN– V_O

4.5

2

±8

V

^±The long-term stability specification is noncumulative. The drift in subsequent ±,000 hour periods is significantly lower than in the first ±,000 hour period.

Rev. B | Page 4 of 24

ADR430/ADR431/ADR433/ADR434/ADR435/ADR439

ADR433 ELECTRICAL CHARACTERISTICS

V_IN= 5 V to 18 V, I_LOAD= 0 mA , T_A= 25°C, unless otherwise noted.

Table 4.

Parameter

Output Voltage

B Grade

Symbol

Conditions

Min

Typ

Max

Unit

V_O

2.9985

2.996

3.000

3.00±5

3.004

V

A Grade

Initial Accuracy

B Grade

A Grade

Temperature Coefficient

SOIC-8 (B Grade)

SOIC-8 (A Grade)

MSOP-8

V_OERR

TCV_O

±.5

0.05

4

mV

%

mV

%

0.±3

−40°C < T_A< +±25°C

V_IN= 5 V to ±8 V

±

2

3

±0

ppm/°C

Line Regulation

∆V_O/∆V_IN

−40°C < T_A< +±25°C

I_LOAD= 0 mA to ±0 mA, V_IN= 6 V

−40°C < T_A< +±25°C

I_LOAD= −±0 mA to 0 mA, V_IN= 6 V

−40°C < T_A< +±25°C

No load, −40°C < T_A< +±25°C

0.± Hz to ±0.0 Hz

5

20

±5

ppm/V

Load Regulation

∆V_O/∆I_LOAD

ppm/mA

±5

800

ppm/mA

µA

µV p-p

Quiescent Current

Voltage Noise

I_IN

e_Np-p

e_N

590

3.75

90

Hz

nV√

Voltage Noise Density

Turn-On Settling Time

Long-Term Stability^±

Output Voltage Hysteresis

Ripple Rejection Ratio

Short Circuit to GND

± kHz

t_R

C_IN= 0

±,000 h

±0

40

20

−70

40

µs

∆V_O

V_{O_HYS}

RRR

I_SC

V_IN

V_IN− V_O

ppm

dB

mA

V

f_IN= ±0 kHz

Supply Voltage Operating Range

Supply Voltage Headroom

5

2

±8

V

^±The long-term stability specification is noncumulative. The drift in subsequent ±,000 hour periods is significantly lower than in the first ±,000 hour period.

Rev. B | Page 5 of 24

ADR430/ADR431/ADR433/ADR434/ADR435/ADR439

ADR434 ELECTRICAL CHARACTERISTICS

V_IN= 6.1 V to 18 V, I_LOAD= 0 mA, T_A= 25°C, unless otherwise noted.

Table 5.

Parameter

Output Voltage

B Grade

Symbol

Conditions

Min

Typ

Max

Unit

V_O

4.0945

4.09±

4.096

4.0975

4.±0±

V

A Grade

Initial Accuracy

B Grade

A Grade

Temperature Coefficient

SOIC-8 (B Grade)

SOIC-8 (A Grade)

MSOP-8

V_OERR

TCV_O

±.5

0.04

5

mV

%

mV

%

0.±3

−40°C < T_A< +±25°C

V_IN= 6.± V to ±8 V

−40°C < T_A< +±25°C

I_LOAD= 0 mA to ±0 mA, V_IN= 7 V

−40°C < T_A< +±25°C

I_LOAD= −±0 mA to 0 mA, V_IN= 7 V

−40°C < T_A< +±25°C

No load, −40°C < T_A< +±25°C

0.± Hz to ±0.0 Hz

±

2

3

±0

ppm/°C

Line Regulation

∆V_O/∆V_IN

5

20

±5

ppm/V

Load Regulation

∆V_O/∆I_LOAD

ppm/mA

±5

800

ppm/mA

µA

µV p-p

Quiescent Current

Voltage Noise

I_IN

e_Np-p

e_N

595

6.25

±00

±0

40

20

Hz

Voltage Noise Density

Turn-On Settling Time

Long-Term Stability^±

Output Voltage Hysteresis

Ripple Rejection Ratio

Short Circuit to GND

± kHz

nV√

µs

t_R

C_IN= 0

±,000 h

∆V_O

V_{O_HYS}

RRR

I_SC

V_IN

V_IN− V_O

ppm

dB

mA

V

f_IN= ±0 kHz

−70

40

Supply Voltage Operating Range

Supply Voltage Headroom

6.±

2

±8

V

^±The long-term stability specification is noncumulative. The drift in subsequent ±,000 hour periods is significantly lower than in the first ±,000 hour period.

Rev. B | Page 6 of 24

ADR430/ADR431/ADR433/ADR434/ADR435/ADR439

ADR435 ELECTRICAL CHARACTERISTICS

V_IN= 7 V to 18 V, I_LOAD= 0 mA, T_A= 25°C, unless otherwise noted.

Table 6.

Parameter

Output Voltage

B Grade

Symbol

Conditions

Min

Typ

Max

Unit

V_O

4.998

4.994

5.000

5.002

5.006

V

A Grade

Initial Accuracy

B Grade

A Grade

Temperature Coefficient

SOIC-8 (B Grade)

SOIC-8 (A Grade)

MSOP-8

V_OERR

TCV_O

2

0.04

6

mV

%

mV

%

0.±2

−40°C < T_A< +±25°C

V_IN= 7 V to ±8 V

−40°C < T_A< +±25°C

I_LOAD= 0 mA to ±0 mA, V_IN= 8 V

−40°C < T_A< +±25°C

I_LOAD= −±0 mA to 0 mA, V_IN= 8 V

−40°C < T_A< +±25°C

No load, −40°C < T_A< +±25°C

0.± Hz to ±0 Hz

±

2

3

±0

ppm/°C

Line Regulation

∆V_O/∆VIN

∆V_O/∆I_LOAD

5

20

±5

ppm/V

Load Regulation

ppm/mA

±5

800

ppm/mA

µA

µV p-p

Quiescent Current

Voltage Noise

I_IN

e_Np-p

e_N

620

8

Hz

Voltage Noise Density

Turn-On Settling Time

Long-Term Stability^±

Output Voltage Hysteresis

Ripple Rejection Ratio

Short Circuit to GND

± kHz

±±5

±0

40

20

−70

40

nV/√

µs

t_R

C_IN= 0

±,000 h

∆V_O

V_{O_HYS}

RRR

I_SC

V_IN

V_IN− V_O

ppm

dB

mA

V

f_IN= ±0 kHz

Supply Voltage Operating Range

Supply Voltage Headroom

7

2

±8

V

^±The long-term stability specification is noncumulative. The drift in subsequent ±,000 hour periods is significantly lower than in the first ±,000 hour period.

Rev. B | Page 7 of 24

ADR430/ADR431/ADR433/ADR434/ADR435/ADR439

ADR439 ELECTRICAL CHARACTERISTICS

V_IN= 6.5 V to 18 V, I_LOAD= 0 mV, T_A= 25°C, unless otherwise noted.

Table 7.

Parameter

Output Voltage

B Grade

Symbol

Conditions

Min

Typ

Max

Unit

V_O

4.498

4.4946

4.500

4.502

4.5054

V

A Grade

Initial Accuracy

B Grade

A Grade

Temperature Coefficient

SOIC-8 (B Grade)

SOIC-8 (A Grade)

MSOP-8

V_OERR

TCV_O

2

mV

%

mV

%

0.04

5.4

0.±2

−40°C < T_A< +±25°C

V_IN= 6.5 V to ±8 V

±

2

3

±0

ppm/°C

Line Regulation

∆V_O/∆V_IN

−40°C < T_A< +±25°C

I_LOAD= 0 mA to ±0 mA, V_IN= 6.5 V

−40°C < T_A< +±25°C

I_LOAD= −±0 mA to 0 mA, V_IN= 6.5 V

−40°C < T_A< +±25°C

No load, −40°C < T_A< +±25°C

0.± Hz to ±0.0 Hz

5

20

±5

ppm/V

Load Regulation

∆V_O/∆I_LOAD

ppm/mA

±5

800

ppm/mA

µA

µV p-p

Quiescent Current

Voltage Noise

I_IN

e_Np-p

e_N

600

7.5

±±0

±0

40

20

Hz

Voltage Noise Density

Turn-On Settling Time

Long-Term Stability^±

Output Voltage Hysteresis

Ripple Rejection Ratio

Short Circuit to GND

± kHz

nV/√

t_R

C_IN= 0

±,000 h

µs

∆V_O

V_{O_HYS}

RRR

I_SC

V_IN

V_IN− V_O

ppm

dB

mA

V

f_IN= ±0 kHz

−70

40

Supply Voltage Operating Range

Supply Voltage Headroom

6.5

2

±8

V

^±The long-term stability specification is noncumulative. The drift in subsequent ±,000 hour periods is significantly lower than in the first ±,000 hour period.

Rev. B | Page 8 of 24

ADR430/ADR431/ADR433/ADR434/ADR435/ADR439

ABSOLUTE MAXIMUM RATINGS

@ 25°C, unless otherwise noted.

Table 8.

Parameter

Supply Voltage

Output Short-Circuit Duration to GND

Storage Temperature Range (R, RM Packages)

Operating Temperature Range

Junction Temperature Range

Lead Temperature Range (Soldering, 60 s)

PACKAGE TYPE

Rating

Table 9.

20 V

Indefinite

−65°C to +±25°C

−40°C to +±25°C

−65°C to +±50°C

300°C

1

Package Type

8-Lead SOIC (R)

8-Lead MSOP (RM)

θ_JC

Unit

°C/W

θ_JA

±30

±90

43

^±θ_JAis specified for worst-case conditions (device soldered in circuit board for

surface-mount packages).

Stresses above those listed under Absolute Maximum Ratings

may cause permanent damage to the device. This is a stress

rating only; functional operation of the device at these or any

other conditions beyond those indicated in the operational

sections of this specification is not implied. Absolute maximum

ratings apply individually only, not in combination.

ESD CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on

the human body and test equipment and can discharge without detection. Although this product features

proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy

electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance

degradation or loss of functionality.

Rev. B | Page 9 of 24

ADR430/ADR431/ADR433/ADR434/ADR435/ADR439

TYPICAL PERFORMANCE CHARACTERISTICS

Default conditions: 5 V, C_L= 5 pF, G = 2, R_g= R_f= 1 kΩ, R_L= 2 kΩ, V_O= 2 V p-p, Frequency = 1 MHz, T_A= 25°C.

0.8

2.5009

0.7

0.6

2.5007

2.5005

2.5003

2.5001

2.4999

2.4997

2.4995

+125°C

+25°C

–40°C

0.5

0.4

0.3

–40 –25 –10

5

20

35

50

65

80

95 110 125

4

6

8

10

12

14

16

TEMPERATURE (°C)

INPUT VOLTAGE (V)

Figure 6. ADR435 Supply Current vs. Input Voltage

Figure 3. ADR431 V_OUTvs. Temperature

700

650

600

550

500

450

400

4.0980

4.0975

4.0970

4.0965

4.0960

4.0955

4.0950

–40 –25 –10

5

20

35

50

65

80

95 110 125

–40 –25 –10

5

20

35

50

65

80

95 110 125

TEMPERATURE (°C)

Figure 7. ADR435 Supply Current vs. Temperature

Figure 4. ADR434 V_OUTvs. Temperature

0.60

0.58

0.56

0.54

0.52

0.50

0.48

0.46

0.44

0.42

0.40

5.0025

5.0020

5.0015

5.0010

5.0005

5.0000

4.9995

4.9990

+125°C

+25°C

–40°C

–40 –25 –10

5

20

35

50

65

80

95 110 125

6

8

10

12

14

16

18

TEMPERATURE (°C)

INPUT VOLTAGE (V)

Figure 8. ADR431 Supply Current vs. Input Voltage

Figure 5. ADR435 V_OUTvs. Temperature

Rev. B | Page ±0 of 24

ADR430/ADR431/ADR433/ADR434/ADR435/ADR439

610

580

550

520

490

460

430

400

2.5

2.0

–40°C

1.5

+25°C

1.0

+125°C

0.5

0

–10

–5

0

5

10

–40 –25 –10

5

20

35

50

65

80

95 110 125

TEMPERATURE (°C)

LOAD CURRENT (mA)

Figure 9. ADR431 Supply Current vs. Temperature

Figure 12. ADR431 Minimum Input/Output

Differential Voltage vs. Load Current

1.9

15

12

9

I

= 0mA to 10mA

L

NO LOAD

1.8

1.7

1.6

1.5

1.4

1.3

1.2

1.1

1.0

6

3

0

–40 –25 –10

5

20

35

50

65

80

95 110 125

–40 –25 –10

5

20

35

50

65

80

95 110 125

TEMPERATURE (°C)

Figure 10. ADR431 Load Regulation vs. Temperature

Figure 13. ADR431 Minimum Headroom vs. Temperature

15

12

9

2.5

2.0

1.5

1.0

0.5

0

I

= 0mA to 10mA

L

–40°C

+25°C

6

+125°C

3

0

–10

–5

0

5

10

–40 –25 –10

5

20

35

50

65

80

95 110 125

TEMPERATURE (°C)

LOAD CURRENT (mA)

Figure 14. ADR435 Minimum Input/Output

Differential Voltage vs. Load Current

Figure 11. ADR435 Load Regulation vs. Temperature

Rev. B | Page ±± of 24

ADR430/ADR431/ADR433/ADR434/ADR435/ADR439

1.9

C

= 0.01µF

LOAD

NO LOAD

NO INPUT CAPACITOR

V

= 1V/DIV

OUT

1.7

1.5

1.3

1.1

0.9

V

= 2V/DIV

IN

TIME = 4µs/DIV

–40 –25 –10

5

20

35

50

65

80

95 110 125

TEMPERATURE (°C)

Figure 15. ADR435 Minimum Headroom vs. Temperature

Figure 18. ADR431 Turn-On Response, 0.01 µF Load Capacitor

20

16

12

8

C

= 0.01µF

IN

V

= 7V TO 18V

IN

NO LOAD

V

= 1V/DIV

OUT

V

= 2V/DIV

4

IN

TIME = 4µs/DIV

0

–4

–40 –25 –10

5

20

35

50

65

80

95 110 125

TEMPERATURE (°C)

Figure 16. ADR435 Line Regulation vs. Temperature

Figure 19. ADR431 Turn-Off Response

C

= 0.01µF

LINE

INTERRUPTION

IN

BYPASS CAPACITOR = 0µF

NO LOAD

V

= 1V/DIV

OUT

500mV/DIV

V

IN

V

= 50mV/DIV

OUT

V

= 2V/DIV

IN

TIME = 100µs/DIV

TIME = 4µs/DIV

Figure 17. ADR431 Turn-On Response

Figure 20. ADR431 Line Transient Response—No Capacitors

Rev. B | Page ±2 of 24

ADR430/ADR431/ADR433/ADR434/ADR435/ADR439

LINE

INTERRUPTION

BYPASS CAPACITOR = 0.1µF

500mV/DIV

V

IN

V

= 50mV/DIV

OUT

2µV/DIV

TIME = 1s/DIV

TIME = 100µs/DIV

Figure 21. ADR431 Line Transient Response—0.1 µF Bypass Capacitor

Figure 24. ADR435 0.1 Hz to 10.0 Hz Voltage Noise

1µV/DIV

50µV/DIV

TIME = 1s/DIV

Figure 22. ADR431 0.1 Hz to 10.0 Hz Voltage Noise

Figure 25. ADR435 10 Hz to 10 kHz Voltage Noise

14

12

10

8

6

50µV/DIV

4

TIME = 1s/DIV

2

0

–120 –90 –70 –50 –30 –10 10

30

50

70

90 120

DEVIATION (PPM)

Figure 23. ADR431 10 Hz to 10 kHz Voltage Noise

Figure 26. ADR431 Typical Hysteresis

Rev. B | Page ±3 of 24

ADR430/ADR431/ADR433/ADR434/ADR435/ADR439

50

45

40

35

30

25

20

15

10

5

10

–10

–30

–50

–70

ADR435

–90

ADR433

–110

–130

–150

ADR430

0

100

1k

10k

FREQUENCY (Hz)

100k

10

100

1k

10k

100k

1M

FREQUENCY (Hz)

Figure 27. Output Impedance vs. Frequency

Figure 28. Ripple Rejection Ratio

Rev. B | Page ±4 of 24

ADR430/ADR431/ADR433/ADR434/ADR435/ADR439

THEORY OF OPERATION

The ADR43x series of references uses a new reference generation

technique known as XFET (eXtra implanted junction FET).

This technique yields a reference with low supply current, good

thermal hysteresis, and exceptionally low noise. The core of the

XFET reference consists of two junction field-effect transistors

(JFETs), one of which has an extra channel implant to raise its

pinch-off voltage. By running the two JFETs at the same drain

current, the difference in pinch-off voltage can be amplified and

used to form a highly stable voltage reference.

The ADR43x family of references is guaranteed to deliver load

currents to 10 mA with an input voltage that ranges from 4.5 V

to 18 V. When these devices are used in applications at higher

currents, users should use the following equation to account for

the temperature effects due to the power dissipation increases.

T_J=P_D× θ_JA+ T_A

(2)

where:

T_Jand T_Aare the junction and ambient temperatures,

respectively.

P_Dis the device power dissipation.

The intrinsic reference voltage is around 0.5 V with a negative

temperature coefficient of about –120 ppm/°C. This slope is

essentially constant to the dielectric constant of silicon and can

be closely compensated by adding a correction term generated

in the same fashion as the proportional-to-temperature (PTAT)

term used to compensate band gap references. The big advantage

of an XFET reference is that the correction term is some 30 times

lower (therefore, requiring less correction) than for a band gap

reference, resulting in much lower noise, because most of the

noise of a band gap reference comes from the temperature

compensation circuitry.

θ_JAis the device package thermal resistance.

BASIC VOLTAGE REFERENCE CONNECTIONS

Voltage references, in general, require a bypass capacitor

connected from V_OUTto GND. The circuit in Figure 30

illustrates the basic configuration for the ADR43x family of

references. Other than a 0.1 µF capacitor at the output to help

improve noise suppression, a large output capacitor at the

output is not required for circuit stability.

Figure 29 shows the basic topology of the ADR43x series. The

temperature correction term is provided by a current source

with a value designed to be proportional to absolute temperature.

The general equation is

1

TP

8

7

6

V

IN

NIC

2

3

4

ADR43x

TOP VIEW

(Not to Scale)

+

OUTPUT

10µF

NIC

0.1µF

5

TRIM

V_OUT= G ×

(

ΔV_P− R1 × I_PTAT

)

(1)

NIC = NO INTERNAL CONNECTION

TP = TEST PIN (DO NOT CONNECT)

where:

G is the gain of the reciprocal of the divider ratio.

∆V_Pis the difference in pinch-off voltage between the two JFETs.

_PTATis the positive temperature coefficient correction current.

Figure 30. Basic Voltage Reference Configuration

NOISE PERFORMANCE

I

The noise generated by the ADR43x family of references is

typically less than 3.75 µV p-p over the 0.1 Hz to 10.0 Hz band

for ADR430, ADR431, and ADR433. Figure 22 shows the 0.1

Hz to 10 Hz noise of the ADR431, which is only 3.5 µV p-p. The

noise measurement is made with a band-pass filter made of a

2-pole high-pass filter with a corner frequency at 0.1 Hz and a

2-pole low-pass filter with a corner frequency at 10.0 Hz.

ADR43x devices are created by on-chip adjustment of R2 and

R3 to achieve 2.048 V or 2.500 V, respectively, at the reference

output.

V

IN

I

1

ADR43x

I

PTAT

TURN-ON TIME

V

OUT

R2

Upon application of power (cold start), the time required for

the output voltage to reach its final value within a specified

error band is defined as the turn-on settling time. Two compo-

nents normally associated with this are the time for the active

circuits to settle and the time for the thermal gradients on the

chip to stabilize. Figure 17 and Figure 18 show the turn-on

settling time for the ADR431.

*

∆V

P

R3

R1

*EXTRA CHANNEL IMPLANT

= G(∆V – R1

V

OUT

×

I

)

PTAT

P

GND

Figure 29. Simplified Schematic Device

Power Dissipation Considerations

Rev. B | Page ±5 of 24

ADR430/ADR431/ADR433/ADR434/ADR435/ADR439

APPLICATIONS

OUTPUT ADJUSTMENT

SOURCE FIBER

GIMBAL + SENSOR

DESTINATION

FIBER

The ADR43x trim terminal can be used to adjust the output

LASER BEAM

voltage over a 0.5% range. This feature allows the system

designer to trim system errors out by setting the reference to a

voltage other than the nominal. This is also helpful if the part is

used in a system at temperature to trim out any error. Adjustment

of the output has negligible effect on the temperature perform-

ance of the device. To avoid degrading temperature coefficients,

both the trimming potentiometer and the two resistors need to

be low temperature coefficient types, preferably <100 ppm/°C.

ACTIVATOR

LEFT

ACTIVATOR

RIGHT

MEMS MIRROR

PREAMP

AMPL

DAC

ADR431

CONTROL

ELECTRONICS

DAC

ADC

INPUT

DSP

V

IN

GND

OUTPUT

= ±0.5%

V

O

V

O

Figure 32. All-Optical Router Network

ADR43x

R1

470kΩ

R

10kΩ

P

NEGATIVE PRECISION REFERENCE WITHOUT

PRECISION RESISTORS

TRIM

GND

10kΩ (ADR420)

15kΩ (ADR421)

R2

In many current-output CMOS DAC applications where the

output signal voltage must be of the same polarity as the

reference voltage, it is often required to reconfigure a current-

switching DAC into a voltage-switching DAC through the use

of a 1.25 V reference, an op amp, and a pair of resistors. Using a

current-switching DAC directly requires an additional opera-

tional amplifier at the output to re-invert the signal. A negative

voltage reference is then desirable from the standpoint that an

additional operational amplifier is not required for either

re-inversion (current-switching mode) or amplification

(voltage-switching mode) of the DAC output voltage. In

general, any positive voltage reference can be converted into a

negative voltage reference through the use of an operational

amplifier and a pair of matched resistors in an inverting

configuration. The disadvantage to this approach is that the

largest single source of error in the circuit is the relative

matching of the resistors used.

Figure 31. Output Trim Adjustment

REFERENCE FOR CONVERTERS IN OPTICAL

NETWORK CONTROL CIRCUITS

In the upcoming high capacity, all-optical router network,

Figure 32 employs arrays of micromirrors to direct and route

optical signals from fiber to fiber without first converting them

to electrical form, which reduces the communication speed.

The tiny micromechanical mirrors are positioned so that each is

illuminated by a single wavelength that carries unique informa-

tion and can be passed to any desired input and output fiber.

The mirrors are tilted by the dual-axis actuators controlled by

precision ADCs and DACs within the system. Due to the

microscopic movement of the mirrors, not only is the precision

of the converters important, but the noise associated with these

controlling converters is also extremely critical, because total

noise within the system can be multiplied by the number of

converters employed. As a result, to maintain the stability of the

control loop for this application, the ADR43x is necessary due

to its exceptionally low noise.

A negative reference can easily be generated by adding a

precision op amp and configuring it as shown in Figure 33.

V_OUTis at virtual ground and, therefore, the negative reference

can be taken directly from the output of the op amp. The op

amp must be dual supply, have low offset and rail-to-rail

capability, if negative supply voltage is close to the reference

output.

Rev. B | Page ±6 of 24

ADR430/ADR431/ADR433/ADR434/ADR435/ADR439

+V

DD

V

IN

R

LW

V

OUT

2

V

IN

SENSE

2

ADR43x

R

LW

V

IN

A1

V

OUT

+

V

OUT

6

FORCE

V

OUT

6

R

L

GND

4

ADR43x

A1 = OP191

GND

4

Figure 35. Advantage of Kelvin Connection

A1

–V

REF

DUAL POLARITY REFERENCES

–V

A1 = OP777, OP193

DD

Dual polarity references can easily be made with an op amp and

a pair of resistors. In order not to defeat the accuracy obtained

by ADR43x, it is imperative to match the resistance tolerance as

well as the temperature coefficient of all the components.

Figure 33. Negative Reference

HIGH VOLTAGE FLOATING CURRENT SOURCE

The circuit in Figure 34 can be used to generate a floating

current source with minimal self-heating. This particular

configuration can operate on high supply voltages determined

by the breakdown voltage of the N-channel JFET.

V

IN

2

1

µF

0.1µF

V

OUT

6

5

+5V

IN

R1

10k

R2

10k

Ω

ADR435

Ω

U1

+10V

V+

+V

S

GND

TRIM

SST111

VISHAY

4

OP1177

U2

V–

–5V

V

IN

R3

5k

ADR43x

Ω

V

–10V

OUT

2N3904

OP90

Figure 36. +5 V and −5 V References Using ADR435

GND

+2.5V

R

L

2.1kΩ

+10V

2

–V

S

V

IN

6

5

OUT

Figure 34. High Voltage Floating Current Source

R1

5.6kΩ

ADR435

U1

KELVIN CONNECTIONS

TRIM

GND

4

In many portable instrumentation applications where PC board

cost and area go hand-in-hand, circuit interconnects are very

often of dimensionally minimum width. These narrow lines can

cause large voltage drops if the voltage reference is required to

provide load currents to various functions. In fact, a circuit’s

interconnects can exhibit a typical line resistance of 0.45 mΩ/

square (1 oz. Cu, for example). Force and sense connections,

also referred to as Kelvin connections, offer a convenient

method of eliminating the effects of voltage drops in circuit

wires. Load currents flowing through wiring resistance produce

an error (V_ERROR= R × I_L) at the load. However, the Kelvin

connection of Figure 35 overcomes the problem by including

the wiring resistance within the forcing loop of the op amp.

Because the op amp senses the load voltage, the op amp loop

control forces the output to compensate for the wiring error and

to produce the correct voltage at the load.

R2

5.6kΩ

V+

OP1177

U2

V–

–2.5V

–10V

Figure 37. +2.5 V and −2.5 V References Using ADR435

Rev. B | Page ±7 of 24

ADR430/ADR431/ADR433/ADR434/ADR435/ADR439

PROGRAMMABLE CURRENT SOURCE

PROGRAMMABLE DAC REFERENCE VOLTAGE

Together with a digital potentiometer and a Howland current

pump, ADR435 forms the reference source for a programmable

current as

With a multichannel DAC such as a quad 12-bit voltage output

DAC AD7398, one of its internal DACs and an ADR43x voltage

reference can be used as a common programmable V_REFXfor the

rest of the DACs. The circuit configuration is shown in Figure 39.

R2 +R2

⎛

⎜

⎞

⎟

A

B

R1

R2_B

⎜

⎟

I_L=

×V_W

(3)

R2

⎜

⎝

⎟

⎠

± 0.1%

V

REFA

R1 ± 0.1%

V

OUTA

V

REF

DAC A

and

V

IN

ADR436

D

V

REFB

V

OUTB

OUTC

V_W

=

×V_REF

(4)

V

= V

(D )

2^N

OB

REFX B

DAC B

where:

D is the decimal equivalent of the input code.

N is the number of bits.

V

REFC

V

= V

(D

)

OC

REFX

C

DAC C

′

In addition, R1 and R2 must be equal to R1 and R2_A+ R2_B,

respectively. R2_Bin theory can be made as small as needed to

achieve the necessary current within the A2 output current

driving capability. In this example, OP2177 can deliver a maxi-

mum of 10 mA. Because the current pump employs both positive

and negative feedback, capacitors C1 and C2 are needed to

ensure that the negative feedback prevails and, therefore, avoids

oscillation. This circuit also allows bidirectional current flow if

the inputs V_Aand V_Bof the digital potentiometer are supplied

with the dual polarity references, as shown previously.

V

REFD

V

OUTD

= V

)

D

OD

DAC D

AD7398

Figure 39. Programmable DAC Reference

The relationship of V_REFXto V_REFdepends on the digital code

and the ratio of R1 and R2, and is given by

C1

10pF

R2

R1

⎛

⎝

⎞

⎟

⎠

V_REF× 1+

⎜

V_REFX

=

(5)

R1'

50kΩ

R2'

1kΩ

V

DD

2

D

R2

R1

⎛

⎜

⎝

⎞

⎠

1+

×

⎟

2^N

V

DD

V

IN

TRIM

5

6

AD5232

U2

DIGITAL

where:

V+

ADR435

D is the decimal equivalent of input code.

N is the number of bits.

U1

C2

10pF

POTENTIOMETER

OP2177

A2

V–

V

DD

V

OUT

GND

4

A

R2

10Ω

B

V

_REFis the applied external reference.

_REFXis the reference voltage for DAC A to DAC D.

U2

V+

R1

50kΩ

V

SS

W

B

OP2177

A1

R2

A

V–

1kΩ

+

VL

–

Table 10. V_REFXvs. R1 and R2

LOAD

GND

V

SS

R1, R2

Digital Code

V_REF

IL

R± = R2

R± = 3R2

0000 0000 0000

±000 0000 0000

±±±± ±±±± ±±±±

0000 0000 0000

±000 0000 0000

±±±± ±±±± ±±±±

2 V_REF

±.3 V_REF

V_REF

4 V_REF

±.6 V_REF

V_REF

Figure 38. Programmable Current Source

Rev. B | Page ±8 of 24

ADR430/ADR431/ADR433/ADR434/ADR435/ADR439

PRECISION VOLTAGE REFERENCE FOR

DATA CONVERTERS

PRECISION BOOSTED OUTPUT REGULATOR

A precision voltage output with boosted current capability can

be realized with the circuit shown in Figure 41. In this circuit,

U2 forces V_Oto be equal to V_REFby regulating the turn on of

N1. Therefore, the load current is furnished by V_IN. In this

configuration, a 50 mA load is achievable at V_INof 5 V.

Moderate heat is generated on the MOSFET, and higher current

can be achieved with a replacement of the larger device. In

addition, for a heavy capacitive load with step input, a buffer

may be added at the output to enhance the transient response.

The ADR43x family has a number of features that make it ideal

for use with ADCs and DACs. The exceptional low noise, tight

temperature coefficient, and high accuracy characteristics make

the ADR43x ideal for low noise applications such as cellular

base station applications.

Another example of ADC for which the ADR431 is well suited

is the AD7701. Figure 40 shows the ADR431 used as the

precision reference for this converter. The AD7701 is a 16-bit

ADC with on-chip digital filtering intended for the

measurement of wide dynamic range and low frequency signals

such as those representing chemical, physical, or biological

processes. It contains a charge-balancing (Σ-∆) ADC, a

calibration microcontroller with on-chip static RAM, a clock

oscillator, and a serial communications port.

N1

V

IN

V

O

R

25Ω

L

5V

2

U1

2N7002

U2

V

IN

6

5

V

+

OUT

V+

TRIM

AD8601

+5V

ANALOG

GND

4

V–

–

SUPPLY

0.1µF

10µF

AD7701

ADR431

AV

V

DV

DD

0.1µF

SLEEP

MODE

V

IN

Figure 41. Precision Boosted Output Regulator

V

OUT

REF

DATA READY

DRDV

CS

0.1µF

ADR431

READ (TRANSMIT)

SERIAL CLOCK

GND

SCLK

SDATA

CLKIN

RANGES

SELECT

BP/UP

CAL

CLKOUT

SC1

CALIBRATE

ANALOG

INPUT

A

IN

SC2

ANALOG

GROUND

AGND

DGND

0.1µF

DV

SS

AV

SS

–5V

ANALOG

SUPPLY

10µF

0.1µF

Figure 40. Voltage Reference for 16-Bit ADC AD7701

Rev. B | Page ±9 of 24

ADR430/ADR431/ADR433/ADR434/ADR435/ADR439

OUTLINE DIMENSIONS

3.00

BSC

8

5

4

4.90

BSC

3.00

BSC

PIN 1

0.65 BSC

1.10 MAX

0.15

0.00

0.80

0.60

0.40

8°

0°

0.38

0.22

0.23

0.08

COPLANARITY

0.10

SEATING

PLANE

COMPLIANT TO JEDEC STANDARDS MO-187AA

Figure 42. 8-Lead Mini Small Outline Package [MSOP]

(RM-8)

Dimensions shown in millimeters

5.00 (0.1968)

4.80 (0.1890)

8

1

5

4

6.20 (0.2440)

5.80 (0.2284)

4.00 (0.1574)

3.80 (0.1497)

1.27 (0.0500)

BSC

0.50 (0.0196)

0.25 (0.0099)

× 45°

1.75 (0.0688)

1.35 (0.0532)

0.25 (0.0098)

0.10 (0.0040)

8°

0.51 (0.0201)

0.31 (0.0122)

0° 1.27 (0.0500)

COPLANARITY

0.10

0.25 (0.0098)

0.17 (0.0067)

SEATING

PLANE

0.40 (0.0157)

COMPLIANT TO JEDEC STANDARDS MS-012AA

CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS

(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR

REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN

Figure 43. 8-Lead Standard Small Outline Package [SOIC]

Narrow Body (R-8)

Dimensions shown in millimeters and (inches)

Rev. B | Page 20 of 24

ADR430/ADR431/ADR433/ADR434/ADR435/ADR439

ORDERING GUIDE

Initial

Accuracy

Temperature

Coefficient

Package

Output

Package

Description

Parts

per Reel

Temperature

Branding Range

Model

Voltage (V_O)

mV (%)

(ppm/°C)

ADR430AR

ADR430AR-REEL7

ADR430ARM

ADR430ARM-REEL7 2.048

ADR430BR

ADR430BR-REEL7

ADR43±AR

ADR43±AR-REEL7

ADR43±ARM

ADR43±ARM-REEL7 2.500

ADR43±BR

ADR43±BR-REEL7

ADR433AR

ADR433AR-REEL7

ADR433ARM

ADR433ARM-REEL7 3.000

ADR433BR

ADR433BR-REEL7

ADR434AR

ADR434AR-REEL7

ADR434ARM

ADR434ARM-REEL7 4.096

ADR434BR

ADR434BR-REEL7

ADR435AR

ADR435AR-REEL7

ADR435ARM

ADR435ARM-REEL7 5.000

ADR435BR

ADR435BR-REEL7

ADR439AR

ADR439AR-REEL7

ADR439ARM

ADR439ARM-REEL7 4.500

ADR439BR

2.048

3

±

0.±5

0.05

0.±2

0.04

0.±2

0.05

0.±3

0.04

0.±2

0.04

0.±2

0.04

±0

3

8-lead SOIC

8-Lead SOIC

8-Lead MSOP

8-lead SOIC

8-Lead SOIC

8-Lead MSOP

8-Lead SOIC

8-Lead MSOP

8-Lead SOIC

8-Lead MSOP

8-Lead SOIC

8-Lead MSOP

8-Lead SOIC

8-Lead MSOP

8-Lead SOIC

N/A

3,000

N/A

±,000

N/A

3,000

N/A

3,000

N/A

±,000

N/A

3,000

N/A

3,000

N/A

±,000

N/A

3,000

N/A

3,000

N/A

±,000

N/A

3,000

N/A

3,000

N/A

±,000

N/A

3,000

N/A

–40°C to +±25°C

RHA

2.048

2.500

3

±

±0

3

RJA

2.500

3.000

3

4

±.5

5

±0

3

RKA

3.000

4.096

3

±0

3

RLA

5

4.096

5.000

±.5

6

2

3

±0

3

RMA

5.000

4.500

3

5.4

2

±0

3

3,000

N/A

±,000

N/A

RNA

4.500

ADR439BR-REEL7

2

3

3,000

Rev. B | Page 2± of 24

ADR430/ADR431/ADR433/ADR434/ADR435/ADR439

NOTES

Rev. B | Page 22 of 24

ADR430/ADR431/ADR433/ADR434/ADR435/ADR439

NOTES

Rev. B | Page 23 of 24

ADR430/ADR431/ADR433/ADR434/ADR435/ADR439

NOTES

©

registered trademarks are the property of their respective owners.

D04500–0–9/04(B)

Rev. B | Page 24 of 24


型号：	ADR439A
厂家：	ADI
描述：	Ultralow Noise XFET Voltage References with Current Sink and Source Capability 超低噪声XFET基准电压与电流库和源能力
文件：	总24页 (文件大小：1182K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

ADR439A [ADI]

相关型号：

ADR439AR

ADR439AR

ADR439AR-REEL7

ADR439ARM

ADR439ARM-REEL7

ADR439ARMZ

ADR439ARMZ

ADR439ARMZ-REEL7

ADR439ARZ

ADR439ARZ-REEL7

ADR439B

ADR439BR