ADT425BR [ADI]
1-OUTPUT THREE TERM VOLTAGE REFERENCE, 5V, PDSO8, MS-012AA, SOIC-8;型号: | ADT425BR |
厂家: | ADI |
描述: | 1-OUTPUT THREE TERM VOLTAGE REFERENCE, 5V, PDSO8, MS-012AA, SOIC-8 光电二极管 输出元件 |
文件: | 总16页 (文件大小:200K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
Ultraprecision Low Noise, 2.048 V/2.500 V/
®
a
3.00 V/5.00 V XFET Voltage References
ADR420/ADR421/ADR423/ADR425
FEATURES
PIN CONFIGURATION
Low Noise (0.1 Hz to 10 Hz)
ADR420: 1.75 ꢀV p-p
ADR421: 1.75 ꢀV p-p
ADR423: 2.0 ꢀV p-p
ADR425: 3.4 ꢀV p-p
Surface-Mount Packages
8-Lead SOIC
8-Lead Mini_SOIC
Low Temperature Coefficient: 3 ppm/ꢁC
Long-Term Stability: 50 ppm/1000 Hours
Load Regulation: 70 ppm/mA
Line Regulation: 35 ppm/V
Low Hysteresis: 40 ppm Typical
Wide Operating Range
1
2
3
4
8
7
6
5
TP
NIC
V
TP
ADR42x
V
IN
NIC
OUT
TOP VIEW
(Not to Scale)
TRIM
GND
NIC = NO INTERNAL CONNECTION
TP = TEST PIN (DO NOT CONNECT)
ADR420: 4 V to 18 V
ADR421: 4.5 V to 18 V
ADR423: 5 V to 18 V
ADR425: 7 V to 18 V
Quiescent Current: 0.5 mA Maximum
High Output Current: 10 mA
Wide Temperature Range: –40ꢁC to +125ꢁC
APPLICATIONS
Precision Data Acquisition Systems
High-Resolution Converters
Battery-Powered Instrumentation
Portable Medical Instruments
Industrial Process Control Systems
Precision Instruments
Optical Network Control Circuits
GENERAL DESCRIPTION
Table I. ADR42x Products
The ADR42x series are ultra-precision second-generation XFET
voltage references featuring low noise, high accuracy, and excel-
lent long-term stability in a SOIC and Mini_SOIC footprints.
Patented temperature drift curvature correction technique and XFET
(eXtra implanted junction FET) technology minimize nonlinearity
of the voltage change with temperature. The XFET architecture
offers superior accuracy and thermal hysteresis than the bandgap
references. It also operates at lower power and lower supply
headroom than the Buried Zener references.
Output
Voltage
Products VO
Initial
Accuracy
%
ADR420
Tempco
ppm/
mV
°C
ADR420
ADR421
ADR423
ADR425
2.048
1, 3
1, 3
1.5, 4
2, 6
0.05, 0.15 3, 10
0.04, 0.12 3, 10
0.04, 0.12 3, 10
0.04, 0.12 3, 10
2.50
3.00
5.00
The superb noise, stable, and accurate characteristics of ADR42x
make them ideal for precision conversion applications such as
optical network and medical equipment. The ADR42x trim
terminal can also be used to adjust the output voltage over a
0.5% range without compromising any other performance. The
ADR42x series voltage references offer two electrical grades and
are specified over the extended industrial temperature range
of –40°C to +125°C. Devices are available in 8-lead SOIC-8 or
30% smaller 8-lead Mini_SOIC-8 packages.
XFET is a registered trademark of Analog Devices, Inc.
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, norforanyinfringementsofpatentsorotherrightsofthirdpartiesthat
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
Fax: 781/326-8703
www.analog.com
© Analog Devices, Inc., 2001
ADR42x–SPECIFICATIONS
(@ VIN = 5.0 V to 15.0 V, TA = 25ꢁC, unless otherwise noted.)
ADR420 ELECTRICAL SPECIFICATIONS
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
Output Voltage
Initial Accuracy
A Grade
B Grade
VO
VOERR
2.045
–3
–0.15
2.047
–1
2.048
2.051
+3
+0.15
2.049
+1
V
mV
%
V
mV
%
Output Voltage
Initial Accuracy
VO
VOERR
2.048
–0.05
+0.05
Temperature Coefficient A Grade
B Grade
Supply Voltage Headroom
TCVO
–40°C < TA < +125°C
2
1
10
3
ppm/°C
ppm/°C
V
VIN – VO
2
Line Regulation
∆VO/∆VIN
VIN = 5 V to 18 V
–40°C < TA < +125°C
ILOAD = 0 mA to 10 mA
–40°C < TA < +125°C
No Load
–40°C < TA < +125°C
0.1 Hz to 10 Hz
1 kHz
10
35
70
ppm/V
Load Regulation
∆VO/∆ILOAD
ppm/mA
Quiescent Current
IIN
390
500
600
µA
µA
µV p-p
nV/√Hz
µs
ppm
ppm
dB
Voltage Noise
eN p-p
eN
tR
∆VO
VO_HYS
RRR
ISC
1.75
60
10
50
40
Voltage Noise Density
Turn-On Settling Time
Long-Term Stability
Output Voltage Hysteresis
Ripple Rejection Ratio
Short Circuit to GND
1000 Hours
f
IN = 10 kHz
75
27
mA
Specifications subject to change without notice.
ADR421 ELECTRICAL SPECIFICATIONS (@ VIN = 5.0 V to 15.0 V, TA = 25ꢁC, unless otherwise noted.)
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
Output Voltage
Initial Accuracy
A Grade
VO
VOERR
2.497
–3
–0.12
2.499
–1
2.500
2.503
+3
+0.12
2.501
+1
+0.04
10
3
V
mV
%
V
mV
%
ppm/°C
ppm/°C
V
Output Voltage
Initial Accuracy
B Grade
VO
VOERR
2.500
–0.04
Temperature Coefficient A Grade
B Grade
Supply Voltage Headroom
Line Regulation
TCVO
–40°C < TA < +125°C
2
1
VIN – VO
∆VO/∆VIN
2
VIN = 5 V to 18 V
–40°C < TA < +125°C
ILOAD = 0 mA to 10 mA
–40°C < TA < +125°C
No Load
–40°C < TA < +125°C
0.1 Hz to 10 Hz
1 kHz
10
35
70
ppm/V
Load Regulation
∆VO/∆ILOAD
ppm/mA
Quiescent Current
IIN
390
500
600
µA
µA
µV p-p
nV/√Hz
µs
ppm
ppm
dB
Voltage Noise
e
N p-p
1.75
80
10
50
40
75
27
Voltage Noise Density
Turn-On Settling Time
Long-Term Stability
Output Voltage Hysteresis
Ripple Rejection Ratio
Short Circuit to GND
eN
tR
∆VO
VO_HYS
RRR
ISC
1000 Hours
f
IN = 10 kHz
mA
Specifications subject to change without notice.
–2–
REV. A
ADR420/ADR421/ADR423/ADR425
ADR423 ELECTRICAL SPECIFICATIONS
(@ VIN = 5.0 V to 15.0 V, TA = 25ꢁC, unless otherwise noted.)
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
Output Voltage
Initial Accuracy
A Grade
VO
VOERR
2.996
–4
–0.13
2.9985
–1.5
3.000
3.004
+4
V
mV
%
V
mV
%
ppm/°C
ppm/°C
V
+0.13
3.0015
+1.5
+0.04
10
Output Voltage
Initial Accuracy
B Grade
VO
VOERR
3.000
–0.04
Temperature Coefficient A Grade
B Grade
Supply Voltage Headroom
Line Regulation
TCVO
–40°C < TA < +125°C
2
1
3
VIN − VO
∆VO/∆VIN
2
VIN = 5 V to 18 V
–40°C < TA < +125°C
ILOAD = 0 mA to 10 mA
–40°C < TA < +125°C
No Load
–40°C < TA < +125°C
0.1 Hz to 10 Hz
1 kHz
10
35
70
ppm/V
Load Regulation
∆VO/∆ILOAD
ppm/mA
Quiescent Current
IIN
390
500
600
µA
µA
µV p-p
nV/√Hz
µs
ppm
ppm
dB
Voltage Noise
e
N p-p
2
Voltage Noise Density
Turn-On Settling Time
Long-Term Stability
Output Voltage Hysteresis
Ripple Rejection Ratio
Short Circuit to GND
eN
tR
∆VO
VO_HYS
RRR
ISC
90
10
50
40
75
27
1000 Hours
f
IN = 10 kHz
mA
Specifications subject to change without notice.
ADR425 ELECTRICAL SPECIFICATIONS (@ VIN = 7.0 V to 15.0 V, TA = 25ꢁC, unless otherwise noted.)
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
Output Voltage
Initial Accuracy
A Grade
VO
VOERR
4.994
–6
–0.12
4.998
–2
5.000
5.006
+6
+0.12
5.002
+2
V
mV
%
V
Output Voltage
Initial Accuracy
B Grade
VO
VOERR
5.000
mV
–0.04
+0.04
10
3
%
Temperature Coefficient A Grade
B Grade
Supply Voltage Headroom
Line Regulation
TCVO
–40°C < TA < +125°C
2
1
ppm/°C
ppm/°C
V
VIN – VO
∆VO/∆VIN
2
VIN = 7 V to 18 V
–40°C < TA < +125°C
ILOAD = 0 mA to 10 mA
–40°C < TA < +125°C
No Load
10
35
70
ppm/V
Load Regulation
∆VO/∆ILOAD
ppm/mA
Quiescent Current
IIN
390
500
600
µA
–40°C < TA < +125°C
0.1 Hz to 10 Hz
1 kHz
µA
Voltage Noise
e
N p-p
3.4
110
10
50
40
µV p-p
nV/√Hz
µs
ppm
ppm
dB
Voltage Noise Density
Turn-On Settling Time
Long-Term Stability
Output Voltage Hysteresis
Ripple Rejection Ratio
Short Circuit to GND
eN
tR
∆VO
VO_HYS
RRR
ISC
1000 Hours
fIN = 10 kHz
75
27
mA
Specifications subject to change without notice.
–3–
REV. A
ADR420/ADR421/ADR423/ADR425
ABSOLUTE MAXIMUM RATINGS
*
PIN FUNCTION DESCRIPTIONS
Pin Mnemonic Description
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 V
Output Short-Circuit Duration to GND . . . . . . . . . Indefinite
Storage Temperature Range
R, RM Packages . . . . . . . . . . . . . . . . . . . . –65°C to +150°C
Operating Temperature Range
ADR42x . . . . . . . . . . . . . . . . . . . . . . . . . . –40°C to +125°C
Junction Temperature Range
R, RM Packages . . . . . . . . . . . . . . . . . . . . –65°C to +150°C
Lead Temperature Range (Soldering, 60 sec) . . . . . . . 300°C
*Absolute maximum ratings apply at 25°C, unless otherwise noted.
1, 8 TP
Test Pin. There are actual connections in TP
pins but they are reserved for factory testing
purposes. Users should not connect any-
thing to TP pins, otherwise the device may
not function properly.
2
VIN
Input Voltage
3, 7 NIC
No Internal Connect. NICs have no internal
connections.
4
5
GND
TRIM
Ground Pin = 0 V
PIN CONFIGURATIONS
Trim Terminal. It can be used to adjust the
output voltage over a 0.5% range without
affecting the temperature coefficient.
SOIC-8
Mini_SOIC-8
6
VOUT
Output Voltage
8
7
6
5
1
2
3
4
8
1
2
3
4
TP
NIC
V
TP
NIC
V
TP
TP
ADR42x
ADR42x
7
6
5
V
V
IN
IN
NIC
NIC
Package Type
θJA*
Unit
OUT
OUT
TRIM
TRIM
GND
GND
8-Lead Mini_SOIC (RM)
8-Lead SOIC (R)
190
130
°C/W
°C/W
NIC = NO INTERNAL CONNECTION
TP = TEST PIN (DO NOT CONNECT)
NIC = NO INTERNAL CONNECTION
TP =TEST PIN (DO NOT CONNECT)
*θJA is specified for the worst-case conditions, i.e., θJA is specified for device soldered
in circuit board for surface-mount packages.
ORDERING GUIDE
Output
Voltage
VO
Initial
Accuracy
Number of Temp
Temp
Package
Package Top
Parts per
Range
°C
Model
mV% ppm/°C Coefficient Description Option
Mark Reel
ADR420AR
ADR420AR-Reel7
ADR420BR
ADR420BR-Reel7
2.048
2.048
2.048
2.048
3
3
1
1
3
0.15%
0.15%
0.05%
0.05%
0.15%
10
10
3
3
10
SOIC
SOIC
SOIC
SOIC
SO-8
SO-8
SO-8
SO-8
RM-8
98
3,000
98
3,000
1,000
–40 to +125
–40 to +125
–40 to +125
–40 to +125
–40 to +125
ADR420ARM-Reel7 2.048
Mini_SOIC
R4A
R5A
TBD
TBD
ADR421AR
ADR421AR-Reel7
ADT421BR
ADT421BR-Reel7
2.50
2.50
2.50
2.50
3
3
1
1
3
0.12%
0.12%
0.04%
0.04%
0.12%
10
10
3
3
10
SOIC
SOIC
SOIC
SOIC
SO-8
SO-8
SO-8
SO-8
RM-8
98
3,000
98
3,000
1,000
–40 to +125
–40 to +125
–40 to +125
–40 to +125
–40 to +125
ADR421ARM-Reel7 2.50
Mini_SOIC
ADR423AR
ADR423AR-Reel7
ADT423BR
ADT423BR-Reel7
3.00
3.00
3.00
3.00
4
4
1.5
1.5
4
0.13%
0.13%
0.04%
0.04%
0.13%
10
10
3
3
10
SOIC
SOIC
SOIC
SOIC
SO-8
SO-8
SO-8
SO-8
RM-8
98
3,000
98
3,000
1,000
–40 to +125
–40 to +125
–40 to +125
–40 to +125
–40 to +125
ADR423ARM-Reel7 3.00
Mini_SOIC
ADR425AR
ADR425AR-Reel7
ADT425BR
ADT425BR-Reel7
5.00
5.00
5.00
5.00
6
6
2
2
6
0.12%
0.12%
0.04%
0.04%
0.12%
10
10
3
3
10
SOIC
SOIC
SOIC
SOIC
SO-8
SO-8
SO-8
SO-8
RM-8
98
3,000
98
3,000
1,000
–40 to +125
–40 to +125
–40 to +125
–40 to +125
–40 to +125
ADR425ARM-Reel7 5.00
Mini_SOIC
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the AD42x features proprietary ESD protection circuitry, permanent damage may occur on devices
subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are
recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
–4–
REV. A
ADR420/ADR421/ADR423/ADR425
PARAMETER DEFINITIONS
Thermal Hysteresis
Temperature Coefficient
Thermal Hysteresis is defined as the change of output voltage
after the device is cycled through temperature from +25°C to
–40°C to +125°C and back to +25°C. This is a typical value
from a sample of parts put through such a cycle.
The change of output voltage over the operating temperature
range and normalized by the output voltage at 25°C, expressed
in ppm/°C. The equation follows:
VO(T2 )–VO(T )
VO(25°C)×(T2 – T )
TCVO ppm/°C
=
×106
VO _HYS =VO (25°C)–VO _TC
VO(25°C)–VO _TC
1
(
)
1
VO _HYS (ppm) =
×106
where
VO(25°C)
V
V
V
O (25°C) = VO at 25°C
where
O (T1) = VO at Temperature 1
O (T2) = VO at Temperature 2.
V
O (25°C) = VO at 25°C
V
O_TC = VO at 25°C after temperature cycle at +25°C to –40°C
to +125°C and back to +25°C.
Line Regulation
The change in output voltage due to a specified change in input
voltage. It includes the effects of self-heating. Line regulation is
expressed in either percent per volt, parts-per-million per volt,
or microvolts per volt change in input voltage
Input Capacitor
Input capacitors are not required on the ADR42x. There is no
limit for the value of the capacitor used on the input, but a 1 µF to
10 µF capacitor on the input will improve transient response in
applications where the supply suddenly changes. An additional
0.1 µF in parallel will also help to reduce noise from the supply.
Load Regulation
The change in output voltage due to a specified change in load
current. It includes the effects of self-heating. Load Regulation
is expressed in either microvolts per milliampere, parts-per-
million per milliampere, or ohms of dc output resistance.
Output Capacitor
The ADR42x does not need output capacitors for stability
under any load condition. An output capacitor, typical 0.1 µF,
will filter out any low-level noise voltage and will not affect
the operation of the part. On the other hand, the load transient
response can be improved with an additional 1 µF to 10 µF
output capacitor in parallel. A capacitor here will act as a source
of stored energy for sudden increase in load current. The only
parameter that will degrade, by adding an output capacitor,
is turn-on time and it depends on the size of the capacitor chosen.
Long-Term Stability
Typical shift of output voltage at 25°C on a sample of parts
subjected to operation life test of 1000 hours at 125°C:
∆VO = VO(t0 ) – VO(t1)
VO(t0 ) – VO(t1)
∆VO (ppm) =
× 106
VO(t0 )
where
V
V
O (t0) = VO at 25°C at Time 0
O (t1) = VO at 25°C after 1000 hours operation at 125°C.
REV. A
–5–
A
DR42x Series–Typical Performance Characteristics
5.0025
2.0495
2.0493
2.0491
2.0489
2.0487
2.0485
2.0483
2.0481
2.0479
2.0477
2.0475
5.0023
5.0021
5.0019
5.0017
5.0015
5.0013
5.0011
5.0009
5.0007
5.0005
–40
–10
20
40
80
110 125
–40
–10
20
50
80
110 125
TEMPERATURE – ꢁC
TEMPERATURE – ꢁC
TPC 1. ADR420 Typical Output Voltage vs. Temperature
TPC 4. ADR425 Typical Output Voltage vs. Temperature
0.55
2.5015
2.5013
2.5011
2.5009
2.5007
2.5005
2.5003
2.5001
2.4999
2.4997
2.4995
0.50
0.45
0.40
0.35
0.30
0.25
+125ꢁC
+25ꢁC
–40ꢁC
4
6
8
10
12
14
15
–40
–10
20
50
80
110 125
INPUTVOLTAGE – V
TEMPERATURE – ꢁC
TPC 2. ADR421 Typical Output Voltage vs. Temperature
TPC 5. ADR420 Supply Current vs. Input Voltage
3.0010
3.0008
0.55
0.50
3.0006
3.0004
3.0002
0.45
+125ꢁC
3.0000
2.9998
2.9996
0.40
+25ꢁC
0.35
–40ꢁC
2.9994
2.9992
2.9990
0.30
0.25
4
6
8
10
12
14
15
–40
–10
20
40
80
110 125
INPUTVOLTAGE – V
TEMPERATURE – ꢁC
TPC 3. ADR423 Typical Output Voltage vs. Temperature
TPC 6. ADR421 Supply Current vs. Input Voltage
–6–
REV. A
ADR420/ADR421/ADR423/ADR425
70
0.55
0.50
0.45
0.40
0.35
0.30
0.25
I
= 0mATO 5mA
L
60
50
40
+125ꢁC
V
= 5V
IN
+25ꢁC
–40ꢁC
30
20
10
0
V
= 6.5V
IN
–40
–10
20
50
80
110 125
4
6
8
10
12
14 15
TEMPERATURE – ꢁC
INPUTVOLTAGE –V
TPC 7. ADR423 Supply Current vs. Input Voltage
TPC 10. ADR421 Load Regulation vs. Temperature
0.55
0.50
70
I
= 0mATO 10mA
L
60
50
40
30
+125ꢁC
0.45
V
= 7V
IN
0.40
V
= 15V
IN
+25ꢁC
0.35
20
10
–40ꢁC
0.30
0.25
0
6
8
10
12
14
15
–40
–10
20
40
80
110 125
INPUTVOLTAGE –V
TEMPERATURE – ꢁC
TPC 8. ADR425 Supply Current vs. Input Voltage
TPC 11. ADR423 Load Regulation vs. Temperature
35
70
V
= 15V
= 0mATO 10mA
IN
I
= 0mA TO 5mA
L
I
L
30
60
50
40
V
= 4.5V
25
20
15
IN
V
= 6V
IN
30
20
10
0
10
5
0
–40
–10
20
40
80
110 125
–40
–10
20
50
80
110 125
TEMPERATURE – ꢁC
TEMPERATURE – ꢁC
TPC 9. ADR420 Load Regulation vs. Temperature
TPC 12. ADR425 Load Regulation vs. Temperature
REV. A
–7–
A
DR420/ADR421/ADR423/ADR425
14
12
6
V
= 7.5VTO 15V
IN
V
= 4.5V TO 15V
IN
5
4
3
2
1
0
10
8
6
4
2
0
–40
–10
20
50
80
110 125
–40
–10
20
50
80
110 125
TEMPERATURE – ꢁC
TEMPERATURE – ꢁC
TPC 13. ADR420 Line Regulation vs. Temperature
TPC 16. ADR425 Line Regulation vs. Temperature
2.5
6
V
= 5V TO 15V
IN
5
4
3
2
1
0
2.0
–40ꢁC
+25ꢁC
1.5
+85ꢁC
1.0
0.5
0
0
1
2
3
4
5
–40
–10
20
50
80
110 125
LOAD CURRENT – mA
TEMPERATURE – ꢁC
TPC 14. ADR421 Line Regulation vs. Temperature
TPC 17. ADR420 Minimum Input-Output Voltage
Differential vs. Load Current
9
2.5
V
= 5VTO 15V
IN
8
7
6
5
4
2.0
–40ꢁC
+25ꢁC
1.5
+125ꢁC
1.0
3
2
1
0.5
0
0
–40
–10
20
50
80
110
0
1
2
3
4
5
TEMPERATURE – ꢁC
LOAD CURRENT – mA
TPC 15. ADR423 Line Regulation vs. Temperature
TPC 18. ADR421 Minimum Input-Output Voltage
Differential vs. Load Current
–8–
REV. A
ADR420/ADR421/ADR423/ADR425
2.5
2.0
1.5
–40ꢁC
+25ꢁC
+125ꢁC
1.0
0.5
0
0
1
2
3
4
5
TIME – 1s/DIV
LOAD CURRENT – mA
TPC 19. ADR423 Minimum Input-Output Voltage
Differential vs. Load Current
TPC 22. ADR421 Typical Noise Voltage
0.1 Hz to 10 Hz
2.5
2.0
–40ꢁC
+25ꢁC
1.5
+125ꢁC
1.0
0.5
0
0
1
2
3
4
5
TIME – 1s/DIV
LOAD CURRENT – mA
TPC 20. ADR425 Minimum Input-Output Voltage
Differential vs. Load Current
TPC 23. Typical Noise Voltage 10 Hz to 10 kHz
1k
30
SAMPLE SIZE – 160
TEMPERATURE
+25ꢁC
–40ꢁC
+25ꢁC
+125ꢁC
25
20
15
10
5
ADR425
ADR423
100
ADR421
ADR420
10
0
10
100
FREQUENCY – Hz
1k
10k
DEVIATION – ppm
TPC 21. ADR421 Typical Hysteresis
TPC 24. Voltage Noise Density vs. Frequency
REV. A
–9–
ADR420/ADR421/ADR423/ADR425
1mA LOAD
C
= 0ꢀF
C
= 100nF
BYPASS
L
LINE INTERRUPTION
V
OUT
1V/DIV
V
IN
500mV/DIV
LOAD OFF
V
500mV/DIV
OUT
LOAD ON
2V/DIV
TIME – 100ꢀs/DIV
TIME – 100ꢀs/DIV
TPC 25. ADR421 Line Transient Response
TPC 28. ADR421 Load Transient Response
C
= 0.01ꢀF
C
= 0.1ꢀF
IN
BYPASS
LINE INTERRUPTION
500mV/DIV
NO LOAD
V
IN
V
2V/DIV
OUT
V
500mV/DIV
OUT
V
2V/DIV
IN
TIME – 4ꢀs/DIV
TIME – 100ꢀs/DIV
TPC 26. ADR421 Line Transient Response
TPC 29. ADR421 Turn-Off Response
1mA LOAD
C
= 0.01ꢀF
C
= 0ꢀF
IN
NO LOAD
L
V
OUT
1V/DIV
V
2V/DIV
OUT
LOAD OFF
V
2V/DIV
IN
2V/DIV
LOAD ON
TIME – 100ꢀs/DIV
TIME – 4ꢀs/DIV
TPC 27. ADR421 Load Transient Response
TPC 30. ADR421 Turn-On Response
–10–
REV. A
ADR420/ADR421/ADR423/ADR425
50
45
40
35
30
C
= 0.01ꢀF
LOAD
NO INPUT CAP
V
2V/DIV
OUT
ADR425
ADR423
ADR421
25
20
15
10
V
2V/DIV
IN
5
ADR420
1k
10k
100k
10
100
TIME – 4ꢀs/DIV
FREQUENCY – Hz
TPC 31. ADR421 Turn-Off Response
TPC 34. Output Impedance vs. Frequency
C
= 0.01ꢀF
LOAD
–10
–20
–30
–40
–50
–60
–70
–80
–90
NO INPUT CAP
V
2V/DIV
OUT
V
2V/DIV
IN
10
100
1k
10k
100k
1M
TIME – 4ꢀs/DIV
FREQUENCY – Hz
TPC 32. ADR421 Turn-On Response
TPC 35. Ripple Rejection vs. Frequency
C
= 0.1ꢀF
BYPASS
R
C
= 500ꢂ
= 0
L
L
V
OUT
5V/DIV
2V/DIV
V
IN
TIME – 100ꢀs/DIV
TPC 33. ADR421 Turn-On/Turn-Off Response
REV. A
–11–
ADR420/ADR421/ADR423/ADR425
Basic Voltage Reference Connections
THEORY OF OPERATION
Voltage references, in general, require a bypass capacitor con-
nected from VOUT to GND. The circuit in Figure 2 illustrates
the basic configuration for the ADR42x family of references.
Other than a 0.1 µF capacitor at the output to help improve
noise suppression, a large output capacitor at the output is not
required for circuit stability.
The ADR42x series of references uses a new reference generation
technique known as XFET (eXtra implanted junction FET).
This technique yields a reference with low supply current, good
thermal hysteresis, and exceptionally low noise. The core of the
XFET reference consists of two junction field-effect transistors,
one of which has an extra channel implant to raise its pinch-off
voltage. By running the two JFETs at the same drain current,
the difference in pinch-off voltage can be amplified and used to
form a highly stable voltage reference.
1
2
3
4
8
7
6
5
TP
TP
V
NIC
OUTPUT
IN
ADR42x
+
The intrinsic reference voltage is around 0.5 V with a negative
temperature coefficient of about –120 ppm/°C. This slope is
essentially constant to the dielectric constant of silicon and can
be closely compensated by adding a correction term generated
in the same fashion as the proportional-to-temperature (PTAT)
term used to compensate bandgap references. The big advan-
tage over a bandgap reference is that the intrinsic temperature
coefficient is some thirty times lower (therefore requiring less
correction), which results in much lower noise since most of the
noise of a bandgap reference comes from the temperature com-
pensation circuitry.
10ꢀF
0.1ꢀF
TOP VIEW
(Not to Scale)
NIC
0.1ꢀF
TRIM
NIC = NO INTERNAL CONNECTION
TP = TEST PIN
(DO NOT CONNECT)
Figure 2. Basic Voltage Reference Configuration
Noise Performance
The noise generated by the ADR42x family of references is typi-
cally less than 2 µV p-p over the 0.1 Hz to 10 Hz band for
ADR420, ADR421, and ADR423. TPC 22 shows the 0.1 Hz to
10 Hz noise of the ADR421, which is only 1.75 µV p-p. The noise
measurement is made with a bandpass filter made of a 2-pole
high-pass filter with a corner frequency at 0.1 Hz and a 2-pole
low-pass filter with a corner frequency at 10 Hz.
Figure 1 shows the basic topology of the ADR42x series. The
temperature correction term is provided by a current source
with a value designed to be proportional to absolute tempera-
ture. The general equation is:
Turn-On Time
(1)
VOUT = G ×(∆VP − R1× IPTAT
)
Upon application of power (cold start), the time required for the
output voltage to reach its final value within a specified error
band is defined as the turn-on settling time. Two components
normally associated with this are the time for the active circuits
to settle, and the time for the thermal gradients on the chip to
stabilize. TPC 29 through TPC 33, inclusive, show the turn-on
settling time for the ADR421.
where G is the gain of the reciprocal of the divider ratio, ∆VP is
the difference in pinch-off voltage between the two JFETs, and
PTAT is the positive temperature coefficient correction current.
ADR42x are created by on-chip adjustment of R2 and R3 to
achieve 2.048 V or 2.500 V at the reference output respectively.
I
V
IN
APPLICATIONS SECTION
I
I
1
1
OUTPUT ADJUSTMENT
ADR42x
I
PTAT
The ADR42x trim terminal can be used to adjust the output volt-
age over a 0.5% range. This feature allows the system designer
to trim system errors out by setting the reference to a voltage
other than the nominal. This is also helpful if the part is used in
a system at temperature to trim out any error. Adjustment of the
output has negligible effect on the temperature performance of
the device. To avoid degrading temperature coefficient, both the
trimming potentiometer and the two resistors need to be low
temperature coefficient types, preferably <100 ppm/°C.
V
OUT
R2
*
ꢃV
P
R1
R3
*EXTRA CHANNEL IMPLANT
= G(ꢃV – R1 ꢄ I
V
)
PTAT
GND
P
OUT
INPUT
Figure 1. Simplified Schematic
Device Power Dissipation Considerations
The ADR42x family of references is guaranteed to deliver load
currents to 10 mA with an input voltage that ranges from 4.5 V
to 18 V. When these devices are used in applications at higher
current, users should account for the temperature effects due to
the power dissipation increases with the following equation:
V
OUTPUT
= ꢅ0.5%
IN
V
V
O
O
ADR42x
R1
470kꢂ
Rp
10kꢂ
TRIM
GND
10kꢂ (ADR420)
15kꢂ (ADR421)
R2
(2)
TJ = PD × θJA +TA
where TJ and TA are the junction and ambient temperatures,
respectively, PD is the device power dissipation, and θJA is the
device package thermal resistance.
Figure 3. Output Trim Adjustment
–12–
REV. A
ADR420/ADR421/ADR423/ADR425
+V
DD
Reference for Converters in Optical Network Control Circuits
In the upcoming high-capacity all-optical router network, Fig-
ure 4 employs arrays of micro-mirrors to direct and route optical
signals from fiber to fiber, without first converting them to elec-
trical form, which reduces the communication speed. The tiny
micro-mechanical mirrors are positioned so that each is illumi-
nated by a single wavelength that carries unique information and
can be passed to any desired input and output fiber. The mir-
rors are tilted by the dual-axis actuators controlled by precision
ADCs and DACs within the system. Due to the microscopic
movement of the mirrors, not only is the precision of the converters
important, but the noise associated with these controlling con-
verters is also extremely critical, because total noise within
the system can be multiplied by the numbers of converters
employed. As a result, the ADR42x is necessary for this applica-
tion for its exceptional low noise to maintain the stability of
the control loop.
2
V
IN
6
V
OUT
ADR42x
GND
4
A1
–V
REF
A1 = OP777, OP193
–V
DD
Figure 5. Negative Reference
High-Voltage Floating Current Source
The circuit of Figure 6 can be used to generate a floating current
source with minimal self-heating. This particular configuration
can operate on high supply voltages determined by the break-
down voltage of the N-channel JFET.
SOURCE FIBER
GIMBAL + SENSOR
DESTINATION
FIBER
LASER BEAM
+V
S
SST111
VISHAY
ACTIVATOR
LEFT
ACTIVATOR
RIGHT
MEMS MIRROR
PREAMP
V
IN
ADR42x
AMPL
DAC
AMPL
V
OUT
2N3904
OP90
ADR421
ADR421
ADR421
GND
CONTROL
ELECTRONICS
R
L
2.10kꢂ
ADC
DSP
DAC
–V
S
Figure 6. High-Voltage Floating Current Source
Figure 4. All-Optical Router Network
Kelvin Connections
A Negative Precision Reference without Precision Resistors
In many current-output CMOS DAC applications, where the
output signal voltage must be of the same polarity as the reference
voltage, it is often required to reconfigure a current-switching
DAC into a voltage-switching DAC through the use of a 1.25 V
reference, an op amp, and a pair of resistors. Using a current-
switching DAC directly requires the need for an additional
operational amplifier at the output to reinvert the signal. A
negative voltage reference is then desirable from the point that
an additional operational amplifier is not required for either
reinversion (current-switching mode) or amplification (voltage-
switching mode) of the DAC output voltage. In general, any
positive voltage reference can be converted into a negative volt-
age reference through the use of an operational amplifier and a pair
of matched resistors in an inverting configuration. The disad-
vantage to that approach is that the largest single source of error
in the circuit is the relative matching of the resistors used.
In many portable instrumentation applications, where PC board
cost and area go hand-in-hand, circuit interconnects are very
often of dimensionally minimum width. These narrow lines can
cause large voltage drops if the voltage reference is required to
provide load currents to various functions. In fact, a circuit’s
interconnects can exhibit a typical line resistance of 0.45 mΩ/
square (1 oz. Cu, for example). Force and sense connections,
also referred to as Kelvin connections, offer a convenient method
of eliminating the effects of voltage drops in circuit wires. Load
currents flowing through wiring resistance produce an error
(VERROR = R × IL ) at the load. However, the Kelvin connection
of Figure 7 overcomes the problem by including the wiring
resistance within the forcing loop of the op amp. Since the op
amp senses the load voltage, op amp loop control forces the
output to compensate for the wiring error and to produce the
correct voltage at the load.
V
IN
R
LW
A negative reference can easily be generated by adding a preci-
sion op amp and configured as in Figure 5. VOUT is at virtual
ground and, therefore, the negative reference can be taken directly
from the output of the op amp. The op amp must be dual sup-
ply, low offset, and have rail-to-rail capability if negative supply
voltage is close to the reference output.
V
OUT
SENSE
2
V
IN
R
LW
ADR42x
V
OUT
A1
FORCE
V
6
OUT
R
L
GND
4
A1 = OP191
Figure 7. Advantage of Kelvin Connection
REV. A
–13–
ADR420/ADR421/ADR423/ADR425
Dual Polarity References
Together with a digital potentiometer and a Howland current
pump, ADR425 forms the reference source for a programmable
current as
V
IN
2
1ꢀF
0.1ꢀF
V
V
IN
+5V
6
5
OUT
R2A + R2B
(3)
R1
10kꢂ
R2
R1
R2B
ADR425
10kꢂ
IL =
×VW
U1
+10V
V+
TRIM
GND
4
and
OP1177
U2
–5V
V–
R3
5kꢂ
D
2N
VW
×VREF
(4)
=
–10V
Figure 8. +5 V and –5 V Reference Using ADR425
where
D = Decimal Equivalent of the Input Code
+2.5V
N = Number of Bits
+10V
2
V
V
IN
In addition, R1' and R2' must be equal to R1 and R2A + R2B,
respectively. R2B in theory can be made as small as needed to
achieve the current needed within A2 output current driving
capability. In this example, OP2177 is able to deliver a maxi-
mum of 10 mA. Since the current pump employs both positive and
negative feedback, capacitors C1 and C2 are needed to ensure the
negative feedback prevails and, therefore, avoid oscillation. This
circuit also allows bidirectional current flow if the inputs VA and
VB of the digital potentiometer are supplied with the dual polar-
ity references as shown previously.
6
5
OUT
ADR425
R1
U1
5.6kꢂ
TRIM
GND
4
R2
5.6kꢂ
V+
OP1177
U2
V–
–2.5V
–10V
Figure 9. +2.5 V and –2.5 V Reference Using ADR425
Programmable DAC Reference Voltage
With a multichannel DAC such as a Quad 12-bit voltage output
DAC AD7398, one of its internal DACs and an ADR42x voltage
reference can be served as a common programmable VREFX for the
rest of the DACs. The circuit configuration is shown in Figure 12.
The relationship of VREFX to VREF depends upon the digital code
and the ratio of R1 and R2 and is given by:
Dual polarity references can easily be made with an op amp and
a pair of resistors. In order not to defeat the accuracy obtained
by ADR42x, it is imperative to match the resistance tolerance as
well as the temperature coefficient of all the components.
Programmable Current Source
D
2N
R2
VREF × 1+
C1
R1
10pF
VREFX
=
(5)
R2
V
1+
×
R1’
R2’
1kꢂ
DD
R1
50kꢂ
2
V
DD
V
IN
TRIM
5
6
where
AD5232
U2
DIGITAL POT
V+
OP2177
A2
ADR425
D = Decimal Equivalent of Input Code and
N = Number of Bits
REF = Applied External Reference
U1
C2
10pF
V
DD
V
OUT
GND
4
V–
A
R2
10ꢂ
B
V
V
U2
R1
50kꢂ
V+
REFX = Reference Voltage for DAC A to D
V
SS
B
W
OP2177
A1
R2
1kꢂ
A
V–
LOAD
V
VL
SS
IL
Figure 10. Programmable Current Source
–14–
REV. A
ADR420/ADR421/ADR423/ADR425
+5V
ANALOG
SUPPLY
Table III. VREFX vs. R1 and R2
0.1ꢀF
10ꢀF
R1, R2
Digital Code
VREF
AD7701
AV
DV
DD
DD
R1 = R2
R1 = R2
R1 = R2
R1 = 3R2
R1 = 3R2
R1 = 3R2
0000 0000 0000
1000 0000 0000
1111 1111 1111
0000 0000 0000
1000 0000 0000
1111 1111 1111
2 VREF
1.3 VREF
VREF
4 VREF
1.6 VREF
VREF
0.1ꢀF
SLEEP
V
IN
MODE
V
V
OUT
REF
DRDV
CS
DATA READY
0.1ꢀF
ADR42x
READ (TRANSMIT)
SERIAL CLOCK
SERIAL CLOCK
GND
SCLK
SDATA
CLKIN
RANGES
SELECT
BP/UP
CLKOUT
CAL
CALIBRATE
R2
ꢅ0.1%
SC1
SC2
R1
ꢅ0.1%
ANALOG
INPUT
V
A
REFA
IN
V
OUTA
V
ANALOG
GROUND
REF
DACA
AGND
DGND
V
0.1ꢀF
IN
0.1ꢀF
10ꢀF
ADR425
DV
SS
AV
SS
V
–5V
ANALOG
SUPPLY
REFB
V
OUTB
V
=V
=V
=V
(D )
B
OB
REFX
REFX
REFX
0.1ꢀF
DACB
Figure 12. Voltage Reference for 16-Bit A/D Converter
AD7701
V
REFC
V
OUTC
V
(D )
C
OC
DACC
Precision Voltage Regulator
Together with a precision op amp and discrete MOSFETs,
ADR42x can be configured as a precision LDO (Low Dropout
Regulator). The advantages of using such an alternative over
integrated solutions are the 0.05% accuracy and ultralow noise
characteristics, which cannot be achieved with typical LDOs or
switching regulators. Other output voltages are also possible if
adding a pair of precision resistors: one connected between the
drain of M2 and the negative input of the op amp, and another
connected between the negative input of the op amp and
ground. M1 can be any low-cost N-Channel MOSFET. On
the other hand, M2 is a P-Channel MOSFET and is chosen to
handle the amount of load current desired. The choice of R1 is
the trade-off between the current lost through it and the output
turn-off time. R1 is needed or else M2 cannot be turned off
once it is on. Like most voltage references, ADR42x suffers
from low ripple rejection ratio at high frequency. Therefore,
users should avoid using the output of a switching power
supply as the input of ADR42x. While the minimum input is 2 V
above the nominal output of a given ADR42x reference, the
maximum output is limited by the maximum gate-to-source
voltage handling of M2. M2, M1, and R1 can be replaced by a
single N-Channel MOSFET if VI is lower than the supply voltage
of the op amp.
V
REFD
V
OUTD
V
(D )
D
OD
DACD
AD7398
Figure 11. Programmable DAC Reference
Precision Voltage Reference for Data Converters
The ADR42x family has a number of features that make it ideal for
use with A/D and D/A converters. The exceptional low noise,
tight temperature coefficient, and high accuracy characteristics
make the ADR42x ideal for low noise applications such as cellular
base station applications.
Another example of ADC for which the ADR421 is also well-
suited is the AD7701. Figure 12 shows the ADR421 used as the
precision reference for this converter. The AD7701 is a 16-bit
A/D converter with on-chip digital filtering intended for the
measurement of wide dynamic range and low frequency signals
such as those representing chemical, physical, or biological
processes. It contains a charge-balancing (sigma-delta) ADC,
calibration microcontroller with on-chip static RAM, a clock
oscillator, and a serial communications port.
REV. A
–15–
ADR420/ADR421/ADR423/ADR425
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
8-Lead Narrow Body SOIC
(R-8)
0.1968 (5.00)
0.1890 (4.80)
8
1
5
4
0.2440 (6.20)
0.2284 (5.80)
0.1574 (4.00)
0.1497 (3.80)
PIN 1
0.0196 (0.50)
0.0099 (0.25)
0.0500 (1.27)
BSC
ꢄ 45ꢁ
0.0688 (1.75)
0.0532 (1.35)
0.0098 (0.25)
0.0040 (0.10)
SEATING
PLANE
8ꢁ
0ꢁ
0.050 (1.27)
0.016 (0.40)
0.020 (0.51)
0.013 (0.33)
0.0098 (0.25)
0.0075 (0.19)
CONTROLLING DIMENSIONS ARE IN MILLIMETERS
ALL DIMENSIONS PER JEDEC STANDARDS MS-012 AA
8-Lead Mini_SOIC
(RM-8)
0.122 (3.10)
0.114 (2.90)
8
5
4
0.122 (3.10)
0.114 (2.90)
0.199 (5.05)
0.187 (4.75)
1
PIN 1
0.0256 (0.65) BSC
0.120 (3.05)
0.112 (2.84)
0.120 (3.05)
0.112 (2.84)
0.043 (1.09)
0.037 (0.94)
0.006 (0.15)
0.002 (0.05)
33ꢁ
0.018 (0.46)
0.008 (0.20)
27ꢁ
0.028 (0.71)
0.016 (0.41)
0.011 (0.28)
0.003 (0.08)
SEATING
PLANE
Revision History
Location
Page
Data Sheet changed from REV. 0 to REV. A.
Addition of ADR423 and ADR425 to ADR420/ADR421 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Universal
–16–
REV. A
相关型号:
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