ADT7408 [ADI]
+-2 C Accurate, 12-Bit Digital Temperature Sensor; + -2 C精度， 12位数字温度传感器
| 型号： | ADT7408 |
| 厂家： | 
ADI |
| 描述： | +-2 C Accurate, 12-Bit Digital Temperature Sensor |
| 文件： | 总24页 (文件大小：455K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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CC
ꢂT7408
FEATURES
FUN°TIONAL BLO°K DIAGRAM
V
12-bit temperature-to-digital converter
2ꢀ° accuracy
DD
8
DIGITAL COMPARATOR
12- / 10-Bit
–
+
EVENT#
7
DECIMATOR
Operation from −20ꢀ° to +125ꢀ°
Operation from 3 V to 3.6 V
TEMPERATURE
SENSOR
LPF
1-BIT
CAPABILITY
REGISTER
240 μA typical average supply current
Selectable 1.5ꢀ°, 3ꢀ°, 6ꢀ° hysteresis
SMBus-/I2°®-compatible interface
Dual-purpose event pin: comparator or interrupt
8-lead LF°SP_VD, 3 mm × 3 mm (JEDE° MO-229 VEED-4)
package
+
CONFIGURATION
REGISTER
–
REFERENCE
∑-∆
ALARM TEMP
UPPER
BOUNDARY TRIP
REGISTER
1-BIT
DAC
CLK
AND TIMING
GENERATION
ADDRESS
POINTER
REGISTER
ALARM TEMP
LOWER
BOUNDARY TRIP
REGISTER
°omplies with JEDE° standard J°-42.4 memory module
Thermal sensor component specification
MANUFACTURER’S
ID REGISTER
CRITICAL TEMP
REGISTER
ADT7408
FACTORY
RESERVED
REGISTER
TEMPERATURE
REGISTER
APPLI°ATIONS
Memory module temperature monitoring
Isolated sensors
Environmental control systems
°omputer thermal monitoring
Thermal protection
1
2
3
A0
A1
A2
5
6
SDA
SCL
SMBus/I²C INTERFACE
4
V
ss
Figure 1.
Industrial process control
Power system monitors
GENERAL DES°RIPTION
The ADT7408 is specified for operation at supply voltages from
3.0 V to 3.6 V. Operating at 3.3 V, the average supply current is
less than 240 μA typical. The ADT7408 offers a shutdown mode
that powers down the device and gives a shutdown current of 3 μA
typical. The ADT7408 is rated for operation over the −20°C to
+125°C temperature range. The ADT7408 is available in a lead-
free, 8-lead LFCSP_VD, 3 mm × 3 mm (JEDEC MO-229 VEED-4)
package.
The ADT7408 is the first digital temperature sensor that complies
with JEDEC standard JC-42.4 for the mobile platform memory
module. The ADT7408 contains a band gap temperature sensor
and a 12-bit ADC to monitor and digitize the temperature to a
resolution of 0.0625°C.
There is an open-drain EVENT# output that is active when the
monitoring temperature exceeds a critical programmable limit or
when the temperature falls above or below an alarm window.
This pin can operate in either comparator or interrupt mode.
There are three slave device address pins that allow up to eight
ADT7408s to be used in a system that monitors temperature of
various components and subsystems.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registeredtrademarks arethe property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
www.analog.com
©2006 Analog Devices, Inc. All rights reserved.
ꢂT7408C
C
T -LECOFC°ONTENTSC
Features .............................................................................................. 1
Applications....................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description......................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Timing Characteristics ................................................................ 4
Timing Diagram ........................................................................... 4
Absolute Maximum Ratings............................................................ 5
ESD Caution.................................................................................. 5
Pin Configuration and Function Descriptions............................. 6
Typical Performance Characteristics ............................................. 7
Theory of Operation ........................................................................ 8
Circuit Information...................................................................... 8
Converter Details.......................................................................... 8
Modes of Operation ..................................................................... 8
Registers........................................................................................... 10
Address Pointer Register (Write Only).................................... 10
Capability Register (Read Only) .............................................. 10
Configuration Register (Read/Write)...................................... 11
Temperature Trip Point Registers ............................................ 13
ID Registers................................................................................. 14
Temperature Data Format......................................................... 15
Event Pin Functionality............................................................. 16
Serial Interface............................................................................ 17
SMBus/I2C Communications ................................................... 18
Application Information................................................................ 21
Thermal Response Time ........................................................... 21
Self-Heating Effects.................................................................... 21
Supply Decoupling ..................................................................... 21
Temperature Monitoring........................................................... 21
Outline Dimensions....................................................................... 22
Ordering Guide .......................................................................... 22
REVISION HISTORY
3/06—Revision 0: Initial Version
Rev. 0 | Page 2 of 24
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ꢂT7408
SPE°IFI° TIONSC
All specifications TA = −20°C to +125°C, VDD = 3.0 V to 3.6 V, unless otherwise noted.
Table 1.
Parameter
Symbol
Min
Typ
Max
Unit Test °onditions/°omments
TEMPERATURE SENSOR AND ADC
Local Sensor Accuracy (C Grade)
±0.ꢀ
±±
±2.0
±3.0
±4.0
°C
7ꢀ°C ≤ TA ≤ 9ꢀ°C, 3.0 V ≤ VDD ≤ 3.6 V active range
40°C ≤ TA ≤ ±2ꢀ°C, 3.0 V ≤ VDD ≤ 3.6 V monitor range
−20°C ≤ TA ≤ ±2ꢀ°C, 3.0 V ≤ VDD ≤ 3.6 V
°C
±±
°C
ADC Resolution
±2
0.062ꢀ
60
Bits
°C
ms
°C
Temperature Resolution
Temperature Conversion Time
Long Term Drift
±2ꢀ
0.08±
Drift over ±0 years, if part is operated at ꢀꢀ°C
EVENT# OUTPUT (OPEN DRAIN)
Output Low Voltage, VOL
Pin Capacitance
High Output Leakage Current
Rise Time±
Fall Time±
RON Resistance (Low Output)±
0.4
±
V
IOL = 3 mA
±0
0.±
30
30
±ꢀ
pF
μA
ns
ns
Ω
IOH
tLH
tHL
EVENT# = 3.6 V
Supply and temperature dependent
DIGITAL INPUTS
Input Current
Input Low Voltage
IIH, IIL
VIL
−±
+±
0.8
μA
V
VIN = 0 V to VDD
3.0 V ≤ VDD ≤ 3.6 V
Input High Voltage
SCL, SDA Glitch Rejection±
Pin Capacitance±
VIH
2.±
V
3.0 V ≤ VDD ≤ 3.6 V
Input filtering suppresses noise spikes of less than ꢀ0 ns
ꢀ0
±0
ns
pF
DIGITAL OUTPUT (OPEN DRAIN)
Output Low Current
Output Low Voltage
Output High Voltage
Output Capacitance±
POWER REQUIREMENTS
Supply Voltage
Average Supply Current
Supply Current
Shutdown Mode at 3.3 V
Average Power Dissipation
IOL
6
mA
V
SDA forced to 0.6 V
VOL
VOH
COUT
0.4
±0
3.0 V ≤ VDD ≤ 3.6 V at IOPULL_UP = 3ꢀ0 μA
2.±
V
pF
VDD
IDD
IDD_CONV
3.0
3.3
240
360
3
3.6
ꢀ00
ꢀꢀ0
20
V
μA
μA
μA
μW
Device current while converting
VDD = 3.3 V, normal mode at 2ꢀ°C
PD
790
± Guaranteed by design and characterization, not production tested.
Rev. 0 | Page 3 of 24
ꢂT7408C
C
TIMING °HARA°TERISTI°S
TA = −20°C to +125°C, VDD = 3.0 V to 3.6 V, unless otherwise noted.
Table 2.
Parameter1
Symbol Min Typ Max
Unit °omments
SCL Clock Frequency
Bus Free Time Between a Stop (P) and Start (S) Condition
Hold Time After (Repeated) Start Condition
fSCL
tBUF
tHD:STA
±0
4.7
4.0
±00
kHz
ꢁs
ꢁs
After this period, the first clock
is generated.
Repeated Start Condition Setup Time
High Period of the SCL Clock
Low Period of the SCL Clock
Fall Time of Both SDA and SCL Signals
Rise Time of Both SDA and SCL Signals
Data Setup Time
Data Hold Time
Setup Time for Stop Condition
Capacitive Load for Each Bus Line, CB
tSU:STA
tHIGH
tLOW
tF
4.7
4.0
4.7
ꢁs
ꢁs
ꢁs
ns
ns
ns
ns
ꢁs
pF
ꢀ0
300
±000
tR
tSU:DAT
tHD:DAT
tSU:STO
2ꢀ0
300
4.0
400
± Guaranteed by design and characterization, not production tested.
TIMING DIAGRAM
tF
tR
V
IH
SCL
tHD:STA
V
IL
t
HIGH
t
SU:STO
tSU:STA
tLOW
tR
tHD:DAT
tSU:DAT
tF
V
IH
tBUF
SDA
V
IL
P
S
S
P
Figure 2. SMBus/I2C Timing Diagram
Rev. 0 | Page 4 of 24
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ꢂT7408
-SOLUTECM XIMUMCR TINGSC
Table 3.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Parameter
Rating
VDD to VSS
–0.3 V to +7 V
SDA Input Voltage to VSS
SDA Output Voltage to VSS
SCL Input Voltage to VSS
EVENT# Output Voltage to VSS
Operating Temperature Range
Storage Temperature Range
Maximum Junction Temperature, TJMAX
Thermal Resistance±
–0.3 V to VDD + 0.3 V
–0.3 V to VDD + 0.3 V
–0.3 V to VDD + 0.3 V
–0.3 V to VDD + 0.3 V
–ꢀꢀ°C to +±ꢀ0°C
–6ꢀ°C to +±60°C
±ꢀ0°C
60 – 150 SECONDS
RAMP UP
3°C/SECOND MAX
8ꢀoC/W
θJA, Junction-to-Ambient (Still Air)
IR Reflow Soldering Profile
260 – 5/+0°C
Refer to Figure 3
217°C
± Power Dissipation PMAX = (TJMAX − TA)/θJA, where TA is the ambient
temperature. Thermal resistance value relates to the package being used on
a standard 2-layer PCB, which gives a worst-case θJA. Some documents may
publish junction-to-case thermal resistance θJC, but it refers to a component
that is mounted on an ideal heat sink. As a result, junction-to-ambient
thermal resistance is more practical for air-cooled, PCB-mounted
components.
150°C – 200°C
RAMP DOWN
6°C/SECOND
MAX.
TIME (Seconds)
60 – 180 SECONDS
480 SECONDS MAX.
20 – 40 SECONDS
Figure 3. LFCSP Pb-Free Reflow Profile Based on JEDEC J-STD-20C
ESD °AUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degrada-
tion or loss of functionality.
Rev. 0 | Page ꢀ of 24
ꢂT7408C
C
PINC°ONFIGUR TIONC NꢂCFUN°TIONCꢂES°RIPTIONSC
A0 1
A1 2
8 V
DD
ADT7408
TOP VIEW
(Not to scale)
7 EVENT#
A2 3
6 SCL
5 SDA
V
4
SS
Figure 4. Pin Configuration
Table 4. Pin Function Descriptions
Pin No. Mnemonic Description
±
2
3
4
ꢀ
A0
A±
A2
VSS
SDA
SMBus/I2C Serial Bus Address Selection Pin. Logic input. Can be set to VSS or VDD.
SMBus/I2C Serial Bus Address Selection Pin. Logic input. Can be set to VSS or VDD.
SMBus/I2C Serial Bus Address Selection Pin. Logic input. Can be set to VSS or VDD.
Negative Supply or Ground.
SMBus/I2C Serial Data Input/Output. Serial data to be loaded into the part’s registers and read from these registers
is provided on this pin. Open-drain configuration; it needs a pull-up resistor.
6
SCL
Serial Clock Input. This is the clock input for the serial port. The serial clock is used to clock data into and clock data
out from any register of the ADT7408. Open-drain configuration needs a pull-up resistor.
7
8
EVENT#
VDD
Active Low. Open-drain event output pin. Driven low on comparator level or alert interrupt.
Positive Supply Power. The supply should be decoupled to ground.
Rev. 0 | Page 6 of 24
CC
ꢂT7408
TYPI° LCPERFORM N°EC°H R °TERISTI°SC
5.0
4.5
0.4
T
= 85°C
V
= 3.3V
A
DD
0.3
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
0.2
0.1
0
–0.1
–0.2
–0.3
–0.4
3.0
3.1
3.2
3.3
3.4
3.5
3.6
3.7
3.8
3.9
4.0
–40
–20
0
20
40
60
80
100
120
120
3.9
140
140
4.0
SUPPLY VOLTAGE (V)
TEMPERATURE (°C)
Figure 5. Temperature Accuracy
Figure 8. Shutdown Current vs. Supply Voltage
450
400
350
300
250
200
150
100
50
0.25
0.20
0.15
0.10
0.05
0
T
V
= 85°C
A
= 3.3V ± 10%
DD
A 0.1µF CAPACITOR IS CONNECTED AT THE V PIN.
DD
CONVERTING 3.3V
AVERAGE 3.3V
0
–40
–20
0
20
40
60
80
100
0
1
2
3
4
5
6
TEMPERATURE (°C)
SUPPLY RIPPLE FREQUENCY (MHz)
Figure 6. Supply Current vs. Temperature
Figure 9. Temperature Accuracy vs. Supply Ripple Frequency
300
275
250
225
200
175
150
T
= 85°C
A
3.0
3.1
3.2
3.3
3.4
3.5
3.6
3.7
3.8
SUPPLY VOLTAGE (V)
Figure 7. Supply Current vs. Supply Voltage
Rev. 0 | Page 7 of 24
ꢂT7408C
C
THEORYCOFCOPER TIONC
°IR°UIT INFORMATION
MODES OF OPERATION
The conversion clock for the part is internally generated. No
external clock is required except when reading from and writing
to the serial port. In normal mode, the internal clock oscillator
runs an automatic conversion sequence that initiates a
conversion every 100 ms. At this time, the part powers up its
analog circuitry and performs a temperature conversion. This
temperature conversion typically takes 60 ms, after which time
the analog circuitry of the part automatically shuts down. The
analog circuitry powers up again 40 ms later, when the 100 ms
timer times out and the next conversion begins. Because the
SMBus/I2C circuitry never shuts down, the result of the most
recent temperature conversion is always available in the
temperature value register.
The ADT7408 is a 12-bit digital temperature sensor presented
in 13 bits, including the sign bit format (see the bit map in the
Temperature Value Register (Read Only) section). Its output is
twos complement in that Bit D12 is the sign bit and Bit D0 to
Bit D11 are data bits. An on-board sensor generates a voltage
precisely proportional to absolute temperature, which is
compared to an internal voltage reference and input to a
precision digital modulator. Overall accuracy for the ADT7408
is 2°C from 75°C to 95°C, 3°C from 40°C to +125°C, and
4°C from −20°C to +125°C, with excellent transducer linearity.
The serial interface is SMBus-/I2C-compatible, and the open-
drain output of the ADT7408 is capable of sinking 6 mA.
The on-board temperature sensor has excellent accuracy and
linearity over the entire rated temperature range without
needing correction or calibration by the user.
The ADT7408 can be placed in shutdown mode via the
configuration register, in which case the on-chip oscillator is
shut down, and no further conversions are initiated until the
ADT7408 is taken out of shutdown mode by writing 0 to Bit D8
in the configuration register. The conversion result from the last
conversion prior to shutdown can still be read from the ADT7408,
even when it is in shutdown mode.
A first-order ∑-Δ modulator, also known as the charge balance
type analog-to-digital converter (ADC), digitizes the sensor
output. This type of converter utilizes time domain oversampling
and a high accuracy comparator to deliver 12 bits of effective
accuracy in an extremely compact circuit.
In normal conversion mode, the internal clock oscillator is reset
after every read or write operation. This causes the device to
start a temperature conversion, the result of which is typically
available 60 ms later. Similarly, when the part is taken out of
shutdown mode, the internal clock oscillator starts, and a
conversion is initiated. The conversion result is typically available
60 ms later. Reading from the device before a conversion is com-
plete does not stop the ADT7408 from converting; the part does
not update the temperature value register immediately after the
conversion but waits until communication to the part is finished.
This read operation provides the previous result. It is possible to
miss a conversion result if the SCL frequency is very slow
(communication is greater than 40 ms), because the next
conversion will have started. There is a 40 ms window between
the end of one conversion and the start of the next conversion
for the temperature value register to be updated with a new
temperature value.
°ONVERTER DETAILS
The ∑-Δ modulator consists of an input sampler, a summing
network, an integrator, a comparator, and a 1-bit DAC, as
shown in Figure 10. This architecture creates a negative
feedback loop that minimizes the integrator output by changing
the duty cycle of the comparator output in response to input
voltage changes. There are two simultaneous but different
sampling operations in the device. The comparator samples the
output of the integrator at a much higher rate than the input
sampling frequency, that is, oversampling. Oversampling
spreads the quantization noise over a much wider band than
that of the input signal, improving overall noise performance
and increasing accuracy.
The modulated output of the comparator is encoded using a
circuit technique that results in SMBus/I2C temperature data.
Σ-∆ MODULATOR
The measured temperature value is compared with the
INTEGRATOR
COMPARATOR
temperature set at the alarm temperature upper boundary trip
register, the alarm temperature lower boundary trip register,
and the critical temperature trip register. If the measured value
exceeds these limits, then the EVENT# pin is activated. This
EVENT# output is programmable for interrupt mode, comparator
mode, and the output polarity via the configuration register.
+
VOLTAGE REF
AND VPTAT
+
–
–
1-BIT
DAC
1-BIT
The thermal sensor continuously monitors the temperature and
updates the temperature data 10 times per second. Temperature
data is latched internally by the device and can be read by
software from the bus host at any time.
CLOCK
GENERATOR
LPF DIGITAL
FILTER
TEMPERATURE
VALUE REGISTER
12-BIT
Figure 10. First-Order Σ-Δ Modulator
Rev. 0 | Page 8 of 24
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ꢂT7408
SMBus/I2C slave address selection pins allow up to eight such
devices to co-exist on the same bus. This means that up to eight
memory modules can be supported, given that each module has
one slave device address slot.
After initial power-on, the configuration registers are set to the
default values. Software can write to the configuration register
to set bits as per the bit definitions in the Registers section.
Rev. 0 | Page 9 of 24
ꢂT7408C
C
REGISTERS
The ADT7408 contains 16 accessible registers, shown in Table 5.
The address pointer register is the only register that is eight bits;
the other registers are 16 bits wide. On power-up, the address
pointer register is loaded with 0x00 and points to the capability
register.
ADDRESS POINTER REGISTER (WRITE ONLY)
This 8-bit write only register selects which of the 16-bit registers
is accessed in subsequent read/write operations. Address space
between 0x08 and 0x0F is reserved for factory usage.
MSB
D7
0
LSB
D0
Table 5. Registers
D6 D5 D4 D3
D2
D1
Pointer
Address
Power-On
Default
0
0
0
Register Register Register Register
select select select select
Name
Read/Write
Not
Applicable
Address Pointer
Register
0x00
Write
Table 6. Address Pointer Selected Registers
D2 D1 D0 Register Selected
0x00
0x0±
0x02
Capability Register
Configuration Register 0x0000
0x00±D
Read
Read/Write
Read/Write
Alarm Temperature
Upper Boundary
Trip Register
Alarm Temperature
Lower Boundary
Trip Register
Critical Temperature
Trip Register
Temperature Value
Register
0x0000
0x0000
0x0000
0
0
0
0
0
±
0
±
0
Capability Register
Configuration Register
Alarm Temperature Upper Boundary Trip
Register
0x03
Read/Write
Read/Write
0
±
±
Alarm Temperature Lower Boundary Trip
Register
0x04
0x0ꢀ
0x06
0x07
±
±
±
±
0
0
±
±
0
±
0
±
Critical Temperature Trip Register
Temperature Value Register
Manufacturer ID Register
Undefined Read
Device ID/Revision Register
Manufacturer ID
Register
Device ID/Revision
Register
0x±±D4
0x080X
0x0000
Read
°APABILITY REGISTER (READ ONLY)
Read
This 16-bit, read-only register indicates the capabilities of the
thermal sensor, as shown in Table 7 and the following bit map.
Note that RFU means reserved for future use.
0x08 to 0x0F Vendor-Defined
Registers
Reserved
MSB
LSB
D15 D14 D13 D12 D11 D10 D9
D8
RFU RFU RFU RFU RFU RFU RFU RFU RFU RFU TRES± TRES0 Wider
range
D7
D6
D5
D4
D3
D2
D1
D0
RFU
Higher
precision
Alarm/Critical
trips
Table 7. Capability Mode Description
Bit
Function
D0
Basic capability
Alarm/Critical Trips
D0
Trips °apability
±
Alarm and critical trips capability
D±
Accuracy
Higher Precision
D1
Accuracy °apability
0
Default accuracy ±2°C over the active range and ±3°C over the monitor range
D2
Wider range
Wider Range
D2
Temperature Range °apability
Can read temperature below 0°C and set sign bit accordingly (default)
±
[D4:D3]
Temperature resolution
Temperature Resolution
[D4:D3] Temperature Resolution
0±
±±
0.2ꢀ°C LSB
0.062ꢀ°C LSB (default)
[D±ꢀ:Dꢀ]
Reserved for future use; must be 0
Rev. 0 | Page ±0 of 24
CC
ꢂT7408
°ONFIGURATION REGISTER (READ/WRITE)
This 16-bit read/write register stores various configuration modes for the ADT7408, as shown in Table 8 and the following bit map.
Note that RFU means reserved for future use.
MSB
LSB
D0
D15 D14 D13 D12 D11 D10 D9 D8
D7
D6
D5
D4
D3
D2
D1
RFU
RFU RFU RFU RFU Hysteresis Shut- Critical Alarm
Clear
event output
status
Event
Event
output
control
Critical
event
only
Event
polarity mode
Event
down lock bit lock bit
mode
Table 8. Configuration Mode Description
Bit
Description
D0
Event mode
0: Comparator output mode (default)
±: Interrupt mode
When either lock bit (D6 and D7) is set, this bit cannot be altered until unlocked.
Event polarity
0: Active low (default)
D±
D2
D3
D4
±: Active high
When either lock bit (D6 and D7) is set, this bit cannot be altered until unlocked.
Critical event only
0: Event output on alarm or critical temperature event (default)
±: Event only if temperature is above the value in the critical temperature trip register
When either lock bit (D6 and D7) is set, this bit cannot be altered until unlocked.
Event output control
0: Event output disabled (default)
±: Event output enabled
When either lock bit (D6 and D7) is set, this bit cannot be altered until unlocked.
Event output status (read only)
0: Event output condition is not being asserted by this device
±: Event output pin is being asserted by this device due to alarm window or critical trip condition
The actual cause of an event can be determined from the read of the temperature value register. Interrupt events can be cleared
by writing to the clear event bit. Writing to this bit has no effect on the output status because it is a read function only.
Dꢀ
D6
D7
D8
Clear event (write only)
0: No effect
±: Clears an active event in interrupt mode
Writing to this register has no effect in comparator mode. When read, this bit always returns 0. Once the DUT temperature
is greater than the critical temperature, an event cannot be cleared (see Figure ±2).
Alarm window lock bit
0: Alarm trips are not locked and can be altered (default)
±: Alarm trip register settings cannot be altered
This bit is initially cleared. When set, this bit returns a ± and remains locked until cleared by internal power on reset. These bits
can be written with a single write and do not require double writes.
Critical trip lock bit
0: Critical trip is not locked and can be altered (default)
±: Critical trip register settings cannot be altered
This bit is initially cleared. When set, this bit returns a ± and remains locked until cleared by internal power on reset. These bits
can be written with a single write and do not require double writes.
Shutdown mode
0: TS enabled (default)
±: TS shut down
When shut down, the thermal sensing device and ADC are disabled to save power. No events are generated. When either lock bit
is set, this bit cannot be set until unlocked. However, it can be cleared at any time.
Rev. 0 | Page ±± of 24
ꢂT7408C
C
Bit
Description
D±0:D9
Hysteresis enable
00: Disable hysteresis
0±: Enable hysteresis at ±.ꢀ°C
±0: Enable hysteresis at 3°C
±±: Enable hysteresis at 6°C
T
H
T
H – HYST
T
L
T
L – HYST
BELOW WINDOW BIT
ABOVE WINDOW BIT
Figure 11. Hysteresis
Rev. 0 | Page ±2 of 24
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ꢂT7408
TEMPERATURE TRIP POINT REGISTERS
There are three temperature trip point registers. They are the alarm temperature upper boundary trip register, the alarm temperature
lower boundary trip register, and the critical temperature trip register.
Alarm Temperature Upper Boundary Trip Register (Read/Write)
The value is the upper threshold temperature value for alarm mode. The data format is twos complement with one LSB = 0.25oC.
RFU (reserved for future use) bits are not supported and always report 0. Interrupts respond to the programmed boundary values.
If boundary values are being altered in-system, the user should turn off interrupts until a known state can be obtained to avoid
superfluous interrupt activity. The format of this register is shown in the following bit map:
Sign
MSB
LSB
D2
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D1
D0
0
0
0
Alarm window upper boundary temperature
RFU
RFU
Alarm Temperature Lower Boundary Trip Register (Read/Write)
The value is the lower threshold temperature value for alarm mode. The data format is twos complement with one LSB = 0.25oC.
RFU bits are not supported and always report 0. Interrupts respond to the programmed boundary values. If boundary values are being
altered in-system, the user should turn off interrupts until a known state can be obtained to avoid superfluous interrupt activity. The
format of this register is shown in the following bit map:
Sign
MSB
LSB
D2
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D1
D0
0
0
0
Alarm window upper boundary temperature
RFU
RFU
Critical Temperature Trip Register (Read/Write)
The value is the critical temperature. The data format is twos complement with one LSB = 0.25oC. RFU bits are not supported and always
report 0. The format of this register is shown in the following bit map:
Sign
MSB
LSB
D2
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D1
D0
0
0
0
Critical temperature trip point
RFU
RFU
Temperature Value Register (Read Only)
This 16-bit, read-only register stores the trip status and the temperature measured by the internal temperature sensor, as shown in Table 9.
The temperature is stored in 13-bit, twos complement format with the MSB being the temperature sign bit and the 12 LSBs representing
temperature. One LSB = 0.0625oC. The most significant bit has a resolution of 128oC.
When reading from this register, the eight MSBs (Bit D15 to Bit D8) are read first, and then the eight LSBs (Bit D7 to Bit D0) are read.
The trip status bits represent the internal temperature trip detection and are not affected by the status of the event or configuration bits,
for example, event output control, clear event. If both above and below are 0, then the current temperature is exactly within the alarm
window boundaries, as defined in the configuration register. The format and descriptions are shown in Table 9 and the following bit map:
Sign
MSB
LSB
D0
D15
D14
D13
D12 D11 D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
Above Above
critical alarm
Below
alarm
trip
window
window
Temperature
Rev. 0 | Page ±3 of 24
ꢂT7408C
C
Table 9. Temperature Register Trip Status Description
Bit
Definition
D±3
Below alarm window
Below alarm window
D13
0
±
Temperature Alarm Status
Temperature is equal to or above the alarm window lower boundary temperature.
Temperature is below the alarm window lower boundary temperature.
D±4
Above alarm window
Above alarm window
D14
0
±
Temperature Alarm Status
Temperature is equal to or below the alarm window upper boundary temperature.
Temperature is above the alarm window upper boundary temperature.
D±ꢀ
Above critical trip
Above critical trip
D15
0
°ritical Trip Status
Temperature is below the critical temperature setting.
±
Temperature is equal to or above the critical temperature setting.
ID REGISTERS
Manufacturer ID Register (Read Only)
This manufacturer ID matches that assigned to a vendor within the PCI SIG. This register can be used to identify the manufacturer of the
device in order to perform manufacturer-specific operations. Manufacturer IDs can be found at www.pcisig.com. The format of this
register is shown in the following bit map:
D15
D14
D13
D12
D11
D10
D9
D8
D7
D16
D5
D4
D3
D2
D1
D0
0
0
0
±
0
0
0
±
±
±
0
±
0
±
0
0
Device ID and Revision Register (Read Only)
This device ID and device revision are assigned by the device manufacturer. The device revision starts at 0 and is incremented by 1
whenever an update to the device is issued by the manufacturer. The format of this register in shown in the following bit map:
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
0
0
0
0
±
0
0
0
0
0
0
0
0
0
0
±
Rev. 0 | Page ±4 of 24
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ꢂT7408
Similarly, Bit D12 (the sign bit) is not included in the ADC
TEMPERATURE DATA FORMAT
code, but the sign is inserted in the final result. This ADC code
contains DB2 to DB11. DB0 to DB1 are not in this calculation.
The values used in the temperature register and three
temperature trip point registers are in twos complement format.
The temperature register has a 12-bit resolution with 256°C
range with 1 LSB = 0.0625°C (256°C/212); see Table 10. The
temperature data in the three temperature trip point registers
(alarm upper, alarm lower, and critical) is a 10-bit format with
256°C range with 1 LSB = 0.25°C (see the bit maps in the Alarm
Temperature Lower Boundary Trip Register (Read/Write)
section, the Critical Temperature Trip Register (Read/Write)
section, and the Temperature Value Register (Read Only) section.)
Bit D12 in all these registers represents the sign bit such that
0 = positive temperature and 1 = negative temperature. In twos
complement format, the data bits are inverted and add 1 if
Bit D12 (the sign bit) is negative.
Although one LSB of the ADC corresponds to 0.0625°C, the
ADC can theoretically measure a temperature range of 255°C
(−128°C to +127°C ). The ADT7408 is guaranteed to measure
a low value temperature limit of −55°C to a high value temperature
limit of +125°C.
Reading back the temperature from the temperature value
register requires a 2-byte read.
Designers accustomed to using a 9-bit temperature data format
can still use the ADT7408 by ignoring the last three LSBs of the
12-bit temperature value.
Table 10. 12-Bit Temperature Data Format
Temperature Conversion Formulas
Digital Output (Binary)
Digital Output
(Hex)
12-Bit Temperature Data Format
D12 to D0
Temperature
−ꢀꢀ°C
−ꢀ0°C
−2ꢀ°C
−0.062ꢀ°C
0°C
+0.062ꢀ°C
+±0°C
+2ꢀ°C
+ꢀ0°C
+7ꢀ°C
Positive Temperature = ADC Code(d)/16
(1)
± ±±00 ±00± 0000
± ±±00 ±±±0 0000
± ±±±0 0±±0 ±±±±
± ±±±± ±±±± ±±±±
0 0000 0000 0000
0 0000 0000 000±
0 0000 ±0±0 0000
0 000± ±00± 0000
0 00±± 00±0 0000
0 0±00 ±0±± 0000
0 0±±0 0±00 0000
0 0±±± ±±0± 0000
C90
CE0
E6F
FFF
Negative Temperature = (ADC Code(d) − 4096)/16 (2)
where d is the 12-bit digital output in decimal.
000
Note that Bit D12 (the sign bit) is not included in the ADC
code, but the sign is inserted in the final result.
0x00±
0x0A0
0x±90
0x320
0x4B0
0x640
0x7D0
Table 10 tabulates some temperature results vs. digital outputs.
10-Bit Temperature Data Format
Positive Temperature = ADC Code(d)/4
(3)
+±00°C
+±2ꢀ°C
Negative Temperature = (ADC Code(d) − 1024)/4 (4)
Rev. 0 | Page ±ꢀ of 24
ꢂT7408C
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Critical Trip
EVENT PIN FUN°TIONALITY
The device can be programmed in such a way that the EVENT#
output is triggered only when the temperature exceeds critical
trip point. The critical temperature setting is programmed in
the critical temperature register. When the temperature sensor
reaches the critical temperature value in this register, the device
is automatically placed in comparator mode, meaning that the
critical event output cannot be cleared through software by
setting the clear event bit.
Figure 12 shows the three differently defined outputs of EVENT#
corresponding to the temperature change. EVENT# can be
programmed to be one of the three output modes in the
configuration register.
If while in interrupt mode the temperature reaches the critical
temperature, the device switches to the comparator mode
automatically and asserts the EVENT# output. When the
temperature drops below the critical temperature, the part
switches back to either interrupt mode or comparator mode,
as programmed in the configuration register.
Interrupt Mode
After an event occurs, software can write a 1 to the clear event
bit in the configuration register to de-assert the EVENT#
interrupt output, until the next trigger condition occurs.
Note that Figure 12 is drawn with no hysteresis, but the values
programmed into Configuration Register 0x01, Bit[10:9] affect
the operation of the event trigger points. See Figure 11 for the
explanation of hysteresis functionality.
Comparator Mode
Reads/writes on the device registers do not affect the EVENT#
output in comparator mode. The EVENT# signal remains
asserted until the temperature drops outside the range or until
the range is reprogrammed such that the current temperature is
outside the range.
Event Thresholds
All event thresholds use hysteresis as programmed in the
Configuration Register 0x01, Bit[10:9] to set when they
deassert.
Alarm Window Trip
The device provides a comparison window with an upper
temperature trip point in the alarm upper boundary register
and a lower trip point in the alarm lower boundary register.
When enabled, the EVENT# output is triggered whenever entering
or exiting (crossing above or below) the alarm window.
TEMPERATURE
CRITICAL
HYSTERESIS AFFECTS
THESE TRIP POINTS
ALARM
WINDOW
TIME
S/W CLEARS EVENT
EVENT# IN “INTERRUPT”
EVENT# IN “COMPARATOR” MODE
EVENT# IN “CRITICAL TEMP ONLY” MODE
1. EVENT# CANNOT BE CLEARED ONCE THE DUT TEMPERATURE
IS GREATER THAN THE CRITICAL TEMPERATURE
Figure 12. Temperature, Trip, and Events
Rev. 0 | Page ±6 of 24
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ꢂT7408
SERIAL INTERFA°E
The serial bus protocol operates as follows:
Control of the ADT7408 is carried out via the SMBus-/I2C-
compatible serial interface. The ADT7408 is connected to this
bus as a slave and is under the control of a master device.
1. The master initiates data transfer by establishing a start
condition, defined as a high-to-low transition on the serial
data line SDA, while the serial clock line, SCL, remains
high. This indicates that an address/data stream follows.
All slave peripherals connected to the serial bus respond to
the start condition and shift in the next eight bits,
Figure 13 shows a typical SMBus/I2C interface connection.
PULLUP
PULLUP
V
V
DD
DD
V
DD
W
consisting of a 7-bit address (MSB first) plus a R/ bit.
10kΩ
10kΩ
W
The R/ bit determines whether data is written to, or read
ADT7408
10kΩ
from, the slave device.
2. The peripheral with the address corresponding to the
transmitted address responds by pulling the data line low
during the low period before the ninth clock pulse, known
as the acknowledge bit. All other devices on the bus now
remain idle while the selected device waits for data to be
EVENT#
SCL
SDA
A0
A1
A2
GND
W
read from or written to it. If the R/ bit is a 0, then the
Figure 13. Typical SMBus/I2C Interface Connection
W
master writes to the slave device. If the R/ bit is a 1, the
Serial Bus Address
master reads from the slave device.
Like all SMBus-/I2C-compatible devices, the ADT7408 has a 7-bit
serial address. The four MSBs of this address for the ADT7408 are
set to 0011. The three LSBs are set by Pin 1, Pin 2, and Pin 3
(A0, A1, and A2). These pins can be configured either low or
high, permanently or dynamically, to give eight different
address options. Table 11 shows the different bus address
options available. Recommended pull-up resistor value on the
SDA and SCL lines is 2.2 kΩ to 10 kΩ .
3. Data is sent over the serial bus in sequences of nine clock
pulses: eight bits of data followed by an acknowledge bit
from the receiver of data. Transitions on the data line must
occur during the low period of the clock signal and remain
stable during the high period, because a low to high
transition when the clock is high can be interpreted as a
stop signal.
4. When all data bytes have been read or written, stop
conditions are established. In write mode, the master pulls
the data line high during the 10th clock pulse to assert a
stop condition. In read mode, the master device pulls the
data line high during the low period before the ninth clock
pulse. This is known as no acknowledge. The master then
takes the data line low during the low period before the
10th clock pulse, then high during the 10th clock pulse to
assert a stop condition.
Table 11. SMBus/I2C Bus Address Options
BINARY
A6 to A0
00±± 0 0 0
00±± 0 0 ±
00±± 0 ± 0
00±± 0 ± ±
00±± ± 0 0
00±± ± 0 ±
00±± ± ± 0
00±± ± ± ±
HEX
0x±8
0x±9
0x±A
0x±B
0x±C
0x±D
0x±E
0x±F
Any number of bytes of data can be transferred over the serial
bus in one operation. However, it is not possible to mix read
and write in one operation because the type of operation is
determined at the beginning and cannot subsequently be
changed without starting a new operation.
The ADT7408 has been designed with a SMBus/I2C timeout.
The SMBus/I2C interface times out after 75 ms to 100 ms of no
activity on the SDA line. After this timeout the ADT7408 resets
the SDA line back to its idle state (SDA set to high impedance)
and waits for the next start condition.
The I2C address set up by the three address pins is not latched
by the device until after this address has been sent twice. On the
eighth SCL cycle of the second valid communication, the serial
bus address is latched in. This is the SCL cycle directly after the
device has seen its own I2C serial bus address. Any subsequent
changes on this pin have no effect on the I2C serial bus address.
Rev. 0 | Page ±7 of 24
ꢂT7408C
C
SMBUS/I2° °OMMUNI°ATIONS
The data byte has the most significant bit first. At the end of a
read, the ADT7408 accepts either acknowledge (ACK) or no
acknowledge (NO ACK) from the master. No acknowledge is
typically used as a signal for the slave that the master has read
its last byte. It typically takes the ADT7408 100 ms to measure
the temperature.
The data registers in the ADT7408 are selected by the pointer
register. At power-up the pointer register is set to 0x00, the
location for the capability register. The pointer register latches
the last location to which it was set. Each data register falls into
one of the following three types of user accessibility:
Writing Data to a Register
•
•
•
Read only
With the exception of the pointer register, all other registers are
16 bits wide, so two bytes of data are written to these registers.
Writing two bytes of data to these registers consists of the serial
bus address, the data register address written to the pointer
register, followed by the two data bytes written to the selected
data register (see Figure 14). If more than the required number
of data bytes is written to a register, then the register ignores
these extra data bytes. To write to a different register, another
start or repeated start is required.
Write only
Write/Read same address
A write to the ADT7408 always includes the address byte and
the pointer byte. A write to any register other than the pointer
register requires two data bytes.
Reading data from the ADT7408 occurs in one of the following
two ways:
•
If the location latched in the pointer register is correct,
then the read simply consists of an address byte,
followed by retrieving the two data bytes.
•
If the pointer register needs to be set, then an address
byte, pointer byte, repeat start, and another address
byte accomplish a read.
1
9
1
9
SCL
SDA
A6
A5
A4
A3
A2
A1
A0
R/W
D7
D6
D5
D4
D3
D2
D1
D0
ACK
BY
TS
ACK
BY
TS
START BY
MASTER
STOP
BY
MASTER
FRAME 1
SERIAL BUS ADDRESS BYTE
FRAME 2
POINTER BYTE
1
9
1
9
SCL
(CONTINUED)
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
SDA
(CONTINUED)
ACK
BY
TS
ACK
BY
TS
STOP
BY
MASTER
FRAME 4
LEAST SIGNIFICAN DATA BYTE
FRAME 3
MOST SIGNIFICANT DATA BYTE
Figure 14. Writing to the Address Pointer Register, Followed by Two Bytes of Data
Rev. 0 | Page ±8 of 24
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ꢂT7408
The write operation consists of the serial bus address followed
by the pointer byte. No data is written to any of the data
registers. Because the location latched in the pointer register is
correct, then the read consists of an address byte, followed by
retrieving the two data bytes (see Figure 16).
Reading Data From the ADT7408
Reading data from the ADT7408 can take place in one of the
following two ways:
Writing to the Pointer Register for a Subsequent Read
To read data from a particular register, the pointer register must
contain the address of the data register. If it does not, the
correct address must be written to the address pointer register
by performing a single-byte write operation (see Figure 15).
Reading from Any Pointer Register
On the other hand, if the pointer register needs to be set, then
an address byte, pointer byte, repeat start, and another address
byte accomplish a read (see Figure 17).
1
9
1
9
SCL
SDA
A6
A5
A4
A3
A2
A1
A0
R/W
D7
D6
D5
D4
D3
D2
D1
D0
STOP
BY
MASTER
START
BY MASTER
ACK
BY
TS
ACK
BY
TS
FRAME 1
FRAME 2
SERIAL BUS ADDRESS BYTE
POINTER BYTE
Figure 15. Writing to the Address Pointer Register to Select a Register for a Subsequent Read Operation
1
9
1
9
SCL
SDA
A6
A5
A4
A3
A2
A1
A0
R/W
D15
D14
D13
D12
D11
D10
D9
D8
START
BY
MASTER
ACK
BY
TS
ACK
BY
MASTER
FRAME 1
SERIAL BUS ADDRESS BYTE
FRAME 2
MOST SIGNIFICANT DATA BYTE
1
9
SCL
(CONTINUED)
SDA
(CONTINUED)
D7
D6
D5
D4
D3
D2
D1
D0
NO ACK
BY
MASTER
STOP
BY
MASTER
FRAME 3
LEAST SIGNIFICANT DATA BYTE
Figure 16. Reading Back Data from the Register with the Preset Pointer
Rev. 0 | Page ±9 of 24
ꢂT7408C
C
1
9
1
9
SCL
SDA
A6
A5
A4
A3
A2
A1
A0
R/W
D15
D14
D13
D12
D11
D10
D9
D8
START
ACK
BY
TS
ACK
BY
MASTER
BY
MASTER
FRAME 1
SERIAL BUS ADDRESS BYTE
FRAME 2
POINTER BYTE
1
9
1
9
SCL
(CONTINUED)
SDA
(CONTINUED)
A6
A5
A4
A3
A2
A1
A0
R/W
D15
D14
D13
D12
D11
D10
D9
D8
ACK
BY
TS
ACK
BY
MASTER
REPEAT START
BY MASTER
FRAME 3
SERIAL BUS ADDRESS BYTE
FRAME 4
POINTER BYTE
1
9
SCL
(CONTINUED)
SDA
(CONTINUED)
D7
D6
D5
D4
D3
D2
D1
D0
NO ACK
BY
MASTER
STOP
BY
MASTER
FRAME 5
LEAST SIGNIFICANT DATA BYTE
Figure 17. A Write to the Pointer Register Followed by a Repeat Start and an Immediate Data-Word Read
Rev. 0 | Page 20 of 24
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ꢂT7408
PPLI° TIONCINFORM TIONC
Local supply bypassing consisting of a 0.1 ꢁF ceramic capacitor
is critical for the temperature accuracy specifications to be
achieved. This decoupling capacitor must be placed as close as
possible to the ADT7408 VDD pin.
THERMAL RESPONSE TIME
The time required for a temperature sensor to settle to a specified
accuracy is a function of the thermal mass of the sensor and the
thermal conductivity between the sensor and the object being
sensed. Thermal mass is often considered equivalent to capaci-
tance. Thermal conductivity is commonly specified using the
symbol Q and can be thought of as thermal resistance. It is
commonly specified in units of degrees per watt of power
transferred across the thermal joint. Thus, the time required for
the ADT7408 to settle to the desired accuracy is dependent on
the package selected, the thermal contact established in that
particular application, and the equivalent power of the heat source.
In most applications, the settling time is best determined
empirically.
TTL/CMOS
LOGIC
CIRCUITS
0.1µF
ADT7408
POWER
SUPPLY
Figure 18. Using Separate Traces to Reduce Power Supply Noise
TEMPERATURE MONITORING
The ADT7408 is ideal for monitoring the thermal environment
within electronic equipment. For example, the surface-mounted
package accurately reflects the exact thermal conditions that
affect nearby integrated circuits.
SELF-HEATING EFFE°TS
The temperature measurement accuracy of the ADT7408 might
be degraded in some applications due to self-heating. Errors can
be introduced from the quiescent dissipation and power dissipated
when converting. The magnitude of these temperature errors is
dependent on the thermal conductivity of the ADT7408 package,
the mounting technique, and the effects of airflow. At 25°C,
static dissipation in the ADT7408 is typically 778 μW operating
at 3.3 V. In the 8-lead LFCSP_VD package mounted in free air,
this accounts for a temperature increase due to self-heating of
The ADT7408 measures and converts the temperature at the
surface of its own semiconductor chip. When the ADT7408 is
used to measure the temperature of a nearby heat source, the
thermal impedance between the heat source and the ADT7408
must be considered. Often, a thermocouple or other temperature
sensor is used to measure the temperature of the source, while
the temperature is monitored by reading back from the ADT7408
temperature value register.
ꢀT = PDISS × θJA = 778 μW × 85°C/W = 0.066°C
Once the thermal impedance is determined, the heat source
temperature can be inferred from the ADT7408 output. As
much as 60% of the heat transferred from the heat source to the
thermal sensor on the ADT7408 die is discharged via the copper
tracks, the package pins, and the bond pads. Of the pins on the
ADT7408, the GND pin (VSS pin) transfers most of the heat.
Therefore, when the temperature of a heat source is being
measured, thermal resistance between the ADT7408 VSS pin
and the heat source should be reduced as much as possible.
Current dissipated through the device should be kept to a
minimum by applying shutdown when the device can be put in
the idle state, because it has a proportional effect on the
temperature error.
SUPPLY DE°OUPLING
The ADT7408 should be decoupled with a 0.1 μF ceramic
capacitor between VDD and GND. This is particularly important
when the ADT7408 is mounted remotely from the power supply.
Precision analog products, such as the ADT7408, require a well-
filtered power source. Because the ADT7408 operates from a
single supply, it might seem convenient to tap into the digital
logic power supply.
An example of the ADT7408’s unique properties is shown in
monitoring a high power dissipation DIMM module. Ideally,
the ADT7408 device should be mounted in the middle between
the two memory chips’ major heat sources (see Figure 19). The
ADT7408 produces a linear temperature output, while needing
only two I/O pins and requiring no external characterization.
Unfortunately, the logic supply is often a switch-mode design,
which generates noise in the 20 kHz to 1 MHz range. In addition,
fast logic gates can generate glitches hundreds of mV in
amplitude due to wiring resistance and inductance.
BOTTOM
MIDDLE
TOP
RIGHT
LEFT
If possible, the ADT7408 should be powered directly from the
system power supply. This arrangement, shown in Figure 18,
isolates the analog section from the logic switching transients.
Even if a separate power supply trace is not available, however,
generous supply bypassing reduces supply-line-induced errors.
SO-DIMM THERMAL SENSOR LOCATIONS
Figure 19. Locations of ADT7408 on DIMM Module
Rev. 0 | Page 2± of 24
ꢂT7408C
C
OUTLINECꢂIMENSIONSC
0.50
0.40
0.30
3.00
BSC SQ
0.60 MAX
8
PIN 1
INDICATOR
1
PIN 1
INDICATOR
1.89
1.74
1.59
2.75
BSC SQ
TOP
VIEW
1.50
REF
0.50
BSC
4
5
1.60
1.45
1.30
0.70 MAX
0.65TYP
12° MAX
0.90 MAX
0.85 NOM
0.05 MAX
0.01 NOM
SEATING
PLANE
0.30
0.23
0.18
0.20 REF
Figure 20. 8-Lead Frame Chip Scale Package [LFCSP_VD]
3 mm x 3 mm Body, Very Thin, Dual Lead
(CP-8-2)
Dimensions shown in millimeters
ORDERING GUIDE
Temperature
Range
Temperature
Accuracy1
Package
Description
Package
Option
Ordering
Quantity
Model
Branding
T±M
T±M
ADT7408CCPZ-R22
ADT7408CCPZ-REEL2
ADT7408CCPZ-REEL72
−20°C to +±2ꢀ°C
−20°C to +±2ꢀ°C
−20°C to +±2ꢀ°C
±2°C
±2°C
±2°C
8-Lead LFCSP_VD
8-Lead LFCSP_VD
8-Lead LFCSP_VD
CP-8-2
CP-8-2
CP-8-2
2ꢀ0
ꢀ000
±ꢀ00
T±M
± Temperature accuracy is over the +7ꢀ°C to +9ꢀ°C temperature range.
2 Z = Pb-free part.
Rev. 0 | Page 22 of 24
CC
ꢂT7408
NOTESC
Rev. 0 | Page 23 of 24
ꢂT7408C
NOTESC
C
Purchase of licensed I2C components of Analog Devices or one of its sublicensed Associated Companies conveys a license for the purchaser under the Philips I2C Patent
Rights to use these components in an I2C system, provided that the system conforms to the I2C Standard Specification as defined by Philips.
©
2006 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D05716-0-3/06(0)
Rev. 0 | Page 24 of 24
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