ADUM3200TRZ-EP [ADI]

Dual-Channel, Digital Isolator, Enhanced System-Level ESD Reliability;
ADUM3200TRZ-EP
型号: ADUM3200TRZ-EP
厂家: ADI    ADI
描述:

Dual-Channel, Digital Isolator, Enhanced System-Level ESD Reliability

光电二极管 接口集成电路
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Dual-Channel, Digital Isolators,  
Enhanced System-Level ESD Reliability  
Enhanced Product  
ADuM3200-EP/ADuM3201-EP  
FEATURES  
GENERAL DESCRIPTION  
Enhanced system-level ESD performance per IEC 61000-4-x  
High temperature operation: 125°C  
Narrow-body, RoHS compliant, 8-lead SOIC  
Low power operation  
The ADuM3200-EP/ADuM3201-EP1 are dual-channel, digital  
isolators based on the Analog Devices, Inc., iCoupler® technology.  
Combining high speed CMOS and monolithic transformer  
technology, these isolation components provide outstanding  
performance characteristics superior to alternatives such as  
optocoupler devices.  
5 V operation  
1.7 mA per channel maximum at 0 Mbps to 1 Mbps  
4.1 mA per channel maximum at 10 Mbps  
8.6 mA per channel maximum at 25 Mbps  
3.3 V operation  
1.5 mA per channel maximum at 0 Mbps to 1 Mbps  
2.5 mA per channel maximum at 10 Mbps  
5.2 mA per channel maximum at 25 Mbps  
High common-mode transient immunity: >25 kV/µs  
Safety and regulatory approvals (pending)  
UL recognition: 2500 V rms for 1 minute per UL 1577  
CSA Component Acceptance Notice 5A  
VDE certificate of conformity  
The ADuM3200-EP/ADuM3201-EP isolators provide two  
independent isolation channels in a variety of channel config-  
urations and data rates (see the Ordering Guide). They operate  
with 3.3 V or 5 V supply voltages on either side, providing compat-  
ibility with lower voltage systems as well as enabling voltage  
translation functionality across the isolation barrier.  
In comparison to the ADuM1200-EP isolator, the ADuM3200-EP/  
ADuM3201-EP isolators contain various circuit and layout changes  
to provide increased capability relative to system-level IEC 61000-  
4-x testing (ESD, burst, and surge). The precise capability in  
these tests for either the ADuM1200-EP or ADuM3200-EP/  
ADuM3201-EP products is strongly determined by the design  
and layout of the board or module. For more information, see  
the AN-793 Application Note, ESD/Latch-Up Considerations  
with iCoupler Isolation Products.  
DIN V VDE V 0884-10 (VDE V 0884-10):2006-12  
V
IORM = 560 VPEAK  
ENHANCED FEATURES  
Supports defense and aerospace applications (AQEC standard)  
Military temperature range (−55°C to +125°C)  
Controlled manufacturing baseline  
For additional application and technical information, see the  
ADuM3200/ADuM3201 data sheet.  
Enhanced product change notification  
Qualification data available on request  
APPLICATIONS  
Size critical multichannel isolation  
Serial peripheral interface (SPI)/data converter isolation  
RS-232/RS-422/RS-485 transceiver isolation  
Digital field bus isolation  
Hybrid electric vehicles, battery monitors  
FUNCTIONAL BLOCK DIAGRAMS  
ADuM3200-EP  
ADuM3201-EP  
1
2
3
4
8
7
6
5
V
V
V
V
1
2
3
4
8
7
6
5
V
V
V
V
DD1  
DD2  
DD1  
DD2  
OA  
OB  
DECODE  
ENCODE  
ENCODE  
DECODE  
ENCODE  
ENCODE  
DECODE  
DECODE  
V
OA  
V
IA  
IA  
V
V
IB  
OB  
IB  
GND  
GND  
2
GND  
GND  
2
1
1
Figure 2. ADuM3201-EP Functional Block Diagram  
Figure 1. ADuM3200-EP Functional Block Diagram  
1 Protected by U.S. Patents 5,952,849; 6,873,065; 7,075,329.  
Rev. B Document Feedback  
Information furnished by Analog Devices is believed to be accurate and reliable. However, no  
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other  
rightsof third parties that may result fromits use. Specifications subject to change without notice. No  
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.  
Trademarks andregisteredtrademarks are the property of their respective owners.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781.329.4700 ©2015–2016 Analog Devices, Inc. All rights reserved.  
Technical Support  
www.analog.com  
 
 
 
 
 
ADuM3200-EP/ADuM3201-EP  
Enhanced Product  
TABLE OF CONTENTS  
Features .............................................................................................. 1  
Package Characteristics ................................................................7  
Regulatory Information................................................................7  
Insulation and Safety Related Specifications .............................7  
Enhanced Features............................................................................ 1  
Applications....................................................................................... 1  
General Description......................................................................... 1  
Functional Block Diagrams............................................................. 1  
Revision History ............................................................................... 2  
Specifications..................................................................................... 3  
Electrical Characteristics—5 V, 125°C Operation ................... 3  
Electrical Characteristics—3.3 V, 125°C Operation ................ 4  
Insulation Characteristics (DIN V VDE V 0884-10 (VDE V  
0884-10):2006-12).........................................................................8  
Recommended Operating Conditions .......................................8  
Absolute Maximum Ratings ............................................................9  
ESD Caution...................................................................................9  
Pin Configurations and Function Descriptions......................... 10  
Typical Performance Characteristics ........................................... 11  
Outline Dimensions....................................................................... 12  
Ordering Guide .......................................................................... 12  
Electrical Characteristics—Mixed 5 V/3.3 V, 125°C  
Operation....................................................................................... 5  
Electrical Characteristics—Mixed 3.3 V/5 V, 125°C  
Operation....................................................................................... 6  
REVISION HISTORY  
3/16—Rev. A to Rev. B  
Changes to Logic High Output Voltages Parameter and  
Logic Low Output Parameter, Table 3 ........................................... 3  
Changes to Logic High Output Voltages Parameter and  
Logic Low Output Parameter, Table 6 ........................................... 4  
Changes to Logic High Output Voltages Parameter and  
Logic Low Output Parameter, Table 9 ........................................... 5  
Changes to Logic High Output Voltages Parameter and  
Logic Low Output Parameter, Table 12 ......................................... 6  
8/15—Rev. 0 to Rev. A  
Changed −40°C ≤ TA ≤ +125°C to −55°C ≤ TA ≤  
+125°C............................................................................. Throughout  
Changes to Logic High Output Voltages Parameter, Table 3...... 3  
Change to Logic Low Input Threshold Parameter, Table 9......... 5  
Change to Logic Low Input Threshold Parameter, Table 12 ...... 6  
5/15—Revision 0: Initial Version  
Rev. B | Page 2 of 12  
 
Enhanced Product  
ADuM3200-EP/ADuM3201-EP  
SPECIFICATIONS  
ELECTRICAL CHARACTERISTICS—5 V, 125°C OPERATION  
All typical specifications are at TA = 25°C, VDD1 = VDD2 = 5 V. Minimum/maximum specifications apply over the entire recommended  
operation range: 4.5 V ≤ VDD1 ≤ 5.5 V, 4.5 V ≤ VDD2 ≤ 5.5 V, and −55°C ≤ TA ≤ +125°C, unless otherwise noted. Switching specifications  
are tested with CL = 15 pF and CMOS signal levels, unless otherwise noted.  
Table 1.  
Parameter  
Symbol  
Min  
20  
Typ  
Max  
Unit  
Test Conditions/Comments  
SWITCHING SPECIFICATIONS  
Data Rate  
Propagation Delay  
Pulse Width Distortion  
Change vs. Temperature  
Pulse Width  
Propagation Delay Skew  
Channel Matching  
Codirectional  
Opposing Direction  
Output Rise/Fall Time  
25  
45  
3
Mbps  
ns  
ns  
ps/°C  
ns  
ns  
Within PWD limit  
50% input to 50% output  
|tPLH − tPHL|  
tPHL, tPLH  
PWD  
5
PW  
tPSK  
40  
Within PWD limit  
Between any two units  
15  
tPSKCD  
tPSKOD  
tR/tF  
3
15  
ns  
ns  
ns  
2.5  
10% to 90%  
Table 2.  
1 Mbps  
10 Mbps  
25 Mbps  
Parameter  
Symbol Min Typ Max Min Typ Max Min Typ Max Unit Test Conditions/Comments  
SUPPLY CURRENT  
ADuM3200-EP  
IDD1  
IDD2  
IDD1  
IDD2  
1.3  
1.0  
1.1  
1.3  
1.8  
1.6  
1.6  
1.9  
3.5  
2.0  
3.1  
3.1  
4.6  
2.8  
4.2  
4.0  
7.7  
3.8  
6.8  
6.1  
10.0  
4.9  
8.9  
mA  
mA  
mA  
mA  
No load  
No load  
No load  
No load  
ADuM3201-EP  
8.3  
Table 3. For All Models  
Parameter  
Symbol  
Min  
Typ  
Max  
Unit  
Test Conditions/Comments  
DC SPECIFICATIONS  
Logic High Input Threshold  
Logic Low Input Threshold  
Logic High Output Voltages  
VIH  
VIL  
VOH  
0.7 VDDx  
V
V
V
V
V
V
µA  
0.3 VDDx  
VDDx − 0.1  
VDDx − 0.5  
VDDx  
VDDx – 0.2  
0.0  
0.2  
+0.01  
IOx = −20 µA, VIx = VIxH  
IOx = −3.2 mA, VIx = VIxH  
IOx = 20 µA, VIx = VIxL  
IOx = 3.2 mA, VIx = VIxL  
0 V ≤ VIx ≤ VDDx  
Logic Low Output Voltages  
VOL  
II  
0.1  
0.4  
+10  
Input Current per Channel  
Supply Current per Channel  
Quiescent Input Supply Current  
Quiescent Output Supply Current  
Dynamic Input Supply Current  
Dynamic Output Supply Current  
AC SPECIFICATIONS  
−10  
IDDI(Q)  
IDDO(Q)  
IDDI(D)  
IDDO(D)  
0.4  
0.5  
0.19  
0.05  
0.8  
0.6  
mA  
mA  
mA/Mbps  
mA/Mbps  
VIA = VIB = 0 V  
VIA = VIB = 0 V  
Common-Mode Transient Immunity1  
|CM|  
fr  
25  
35  
kV/µs  
Mbps  
VIx = VDDx, VCM = 1000 V,  
transient magnitude = 800 V  
Refresh Rate  
1.2  
1 |CM| is the maximum common-mode voltage slew rate that can be sustained while maintaining VOUT > 0.8 VDD. The common-mode voltage slew rates apply to both  
rising and falling common-mode voltage edges.  
Rev. B | Page 3 of 12  
 
 
ADuM3200-EP/ADuM3201-EP  
Enhanced Product  
ELECTRICAL CHARACTERISTICS—3.3 V, 125°C OPERATION  
All typical specifications are at TA = 25°C, VDD1 = VDD2 = 3.3 V. Minimum/maximum specifications apply over the entire recommended  
operation range: 3.0 V ≤ VDD1 ≤ 3.6 V, 3.0 V ≤ VDD2 ≤ 3.6 V, and −55°C ≤ TA ≤ +125°C, unless otherwise noted. Switching specifications  
are tested with CL = 15 pF and CMOS signal levels, unless otherwise noted.  
Table 4.  
Parameter  
Symbol  
Min  
Typ  
Max  
Unit  
Test Conditions/Comments  
SWITCHING SPECIFICATIONS  
Data Rate  
Propagation Delay  
Pulse Width Distortion  
ADuM3200-EP  
25  
55  
Mbps  
ns  
Within PWD limit  
50% input to 50% output  
tPHL, tPLH  
PWD  
20  
3
4
ns  
ns  
|tPLH − tPHL  
|tPLH − tPHL  
|
|
ADuM3201-EP  
Change vs. Temperature  
Pulse Width  
Propagation Delay Skew  
Channel Matching  
Codirectional  
5
ps/°C  
ns  
ns  
PW  
tPSK  
40  
Within PWD limit  
Between any two units  
16  
tPSKCD  
tPSKOD  
tR/tF  
3
16  
ns  
ns  
ns  
Opposing Direction  
Output Rise/Fall Time  
3.0  
10% to 90%  
Table 5.  
1 Mbps  
10 Mbps  
25 Mbps  
Parameter  
Symbol Min Typ Max Min Typ Max Min Typ Max Unit Test Conditions/Comments  
SUPPLY CURRENT  
ADuM3200-EP  
IDD1  
IDD2  
IDD1  
IDD2  
0.8  
0.7  
0.7  
0.8  
1.3  
1.0  
1.3  
1.6  
2.2  
1.3  
1.9  
1.9  
3.2  
1.7  
2.5  
2.5  
4.8  
2.3  
4.1  
3.7  
6.4  
3.0  
5.3  
5.1  
mA  
mA  
mA  
mA  
No load  
No load  
No load  
No load  
ADuM3201-EP  
Table 6. For All Models  
Parameter  
Symbol  
Min  
Typ  
Max  
Unit  
Test Conditions/Comments  
DC SPECIFICATIONS  
Logic High Input Threshold  
Logic Low Input Threshold  
Logic High Output Voltages  
VIH  
VIL  
VOH  
0.7 VDDx  
V
V
V
V
0.3 VDDx  
VDDx − 0.1  
VDDx − 0.5  
VDDx  
VDDx  
0.2  
IOx = −20 µA, VIx = VIxH  
IOx = −3.2 mA, VIx = VIxH  
Logic Low Output Voltages  
VOL  
II  
0.0  
0.2  
+0.01  
0.1  
0.4  
+10  
V
V
µA  
IOx = 20 µA, VIx = VIxL  
IOx = 3.2 mA, VIx = VIxL  
0 V ≤ VIx ≤ VDDx  
Input Current per Channel  
Supply Current per Channel  
Quiescent Input Supply Current  
Quiescent Output Supply Current  
Dynamic Input Supply Current  
Dynamic Output Supply Current  
AC SPECIFICATIONS  
−10  
IDDI(Q)  
IDDO(Q)  
IDDI(D)  
IDDO(D)  
0.3  
0.3  
0.10  
0.03  
0.5  
0.5  
mA  
mA  
mA/Mbps  
mA/Mbps  
VIA = VIB = 0 V  
VIA = VIB = 0 V  
Common-Mode Transient Immunity1  
|CM|  
fr  
25  
35  
kV/µs  
Mbps  
VIx = VDDx, VCM = 1000 V,  
transient magnitude = 800 V  
Refresh Rate  
1.1  
1 |CM| is the maximum common-mode voltage slew rate that can be sustained while maintaining VOUT > 0.8 VDD. The common-mode voltage slew rates apply to both  
rising and falling common-mode voltage edges.  
Rev. B | Page 4 of 12  
 
Enhanced Product  
ADuM3200-EP/ADuM3201-EP  
ELECTRICAL CHARACTERISTICS—MIXED 5 V/3.3 V, 125°C OPERATION  
All typical specifications are at TA = 25°C, VDD1 = 5 V, V DD2 = 3.3 V. Minimum/maximum specifications apply over the entire recommended  
operation range: 4.5 V ≤ VDD1 ≤ 5.5 V, 3.0 V ≤ VDD2 ≤ 3.6 V, and −55°C ≤ TA ≤ +125°C, unless otherwise noted. Switching specifications  
are tested with CL = 15 pF and CMOS signal levels, unless otherwise noted.  
Table 7.  
Parameter  
Symbol  
Min  
15  
Typ  
Max  
Unit  
Test Conditions/Comments  
SWITCHING SPECIFICATIONS  
Data Rate  
Propagation Delay  
Pulse Width Distortion  
Change vs. Temperature  
Pulse Width  
Propagation Delay Skew  
Channel Matching  
Codirectional  
Opposing Direction  
Output Rise/Fall Time  
25  
50  
3
Mbps  
ns  
ns  
ps/°C  
ns  
ns  
Within PWD limit  
50% input to 50% output  
|tPLH − tPHL|  
tPHL, tPLH  
PWD  
5
PW  
tPSK  
40  
Within PWD limit  
Between any two units  
15  
tPSKCD  
tPSKOD  
tR/tF  
3
15  
ns  
ns  
ns  
3.0  
10% to 90%  
Table 8.  
1 Mbps  
10 Mbps  
25 Mbps  
Parameter  
Symbol Min Typ Max Min Typ Max Min Typ Max Unit Test Conditions/Comments  
SUPPLY CURRENT  
ADuM3200-EP  
IDD1  
IDD2  
IDD1  
IDD2  
1.3  
0.7  
1.1  
0.8  
1.8  
1.0  
1.6  
1.6  
3.5  
1.3  
3.1  
1.9  
4.6  
1.7  
4.2  
2.5  
7.7  
2.3  
6.8  
3.7  
10.0  
3.0  
8.9  
mA  
mA  
mA  
mA  
No load  
No load  
No load  
No load  
ADuM3201-EP  
5.1  
Table 9. For All Models  
Parameter  
Symbol  
Min  
Typ  
Max  
Unit  
Test Conditions/Comments  
DC SPECIFICATIONS  
Logic High Input Threshold  
Logic Low Input Threshold  
Logic High Output Voltages  
VIH  
VIL  
VOH  
0.7 VDDx  
V
V
V
V
V
V
µA  
0.3 VDDx  
VDDx − 0.1  
VDDx − 0.5  
VDDx  
VDDx − 0.2  
0.0  
0.2  
+0.01  
IOx = −20 µA, VIx = VIxH  
IOx = −3.2 mA, VIx = VIxH  
IOx = 20 µA, VIx = VIxL  
IOx = 3.2 mA, VIx = VIxL  
0 V ≤ VIx ≤ VDDx  
Logic Low Output Voltages  
VOL  
II  
0.1  
0.4  
+10  
Input Current per Channel  
Supply Current per Channel  
Quiescent Input Supply Current  
Quiescent Output Supply Current  
Dynamic Input Supply Current  
Dynamic Output Supply Current  
AC SPECIFICATIONS  
−10  
IDDI(Q)  
IDDO(Q)  
IDDI(D)  
IDDO(D)  
0.4  
0.3  
0.19  
0.03  
0.8  
0.5  
mA  
mA  
mA/Mbps  
mA/Mbps  
VIA = VIB = 0 V  
VIA = VIB = 0 V  
Common-Mode Transient Immunity1  
|CM|  
fr  
25  
35  
kV/µs  
Mbps  
VIx = VDDx, VCM = 1000 V,  
transient magnitude = 800 V  
Refresh Rate  
1.2  
1 |CM| is the maximum common-mode voltage slew rate that can be sustained while maintaining VOUT > 0.8 VDD. The common-mode voltage slew rates apply to both  
rising and falling common-mode voltage edges.  
Rev. B | Page 5 of 12  
 
ADuM3200-EP/ADuM3201-EP  
Enhanced Product  
ELECTRICAL CHARACTERISTICS—MIXED 3.3 V/5 V, 125°C OPERATION  
All typical specifications are at TA = 25°C, VDD1 = 3.3 V, V DD2 = 5.0 V. Minimum/maximum specifications apply over the entire recommended  
operation range: 3.0 V ≤ VDD1 ≤ 3.6 V, 4.5 V ≤ VDD2 ≤ 5.5 V, and −55°C ≤ TA ≤ +125°C, unless otherwise noted. Switching specifications  
are tested with CL = 15 pF and CMOS signal levels, unless otherwise noted.  
Table 10.  
Parameter  
Symbol  
Min  
Typ  
Max  
Unit  
Test Conditions/Comments  
SWITCHING SPECIFICATIONS  
Data Rate  
Propagation Delay  
Pulse Width Distortion  
ADuM3200-EP  
25  
50  
Mbps  
ns  
Within PWD limit  
50% input to 50% output  
tPHL, tPLH  
PWD  
15  
3
4
ns  
ns  
|tPLH − tPHL  
|tPLH − tPHL  
|
|
ADuM3201-EP  
Change vs. Temperature  
Pulse Width  
Propagation Delay Skew  
Channel Matching  
Codirectional  
5
ps/°C  
ns  
ns  
PW  
tPSK  
40  
Within PWD limit  
Between any two units  
15  
tPSKCD  
tPSKOD  
tR/tF  
3
15  
ns  
ns  
ns  
Opposing Direction  
Output Rise/Fall Time  
2.5  
10% to 90%  
Table 11.  
1 Mbps  
Typ  
10 Mbps  
Typ  
25 Mbps  
Typ  
Test Conditions/  
Comments  
Parameter  
Symbol  
Min  
Max  
Min  
Max  
Min  
Max  
Unit  
SUPPLY CURRENT  
ADuM3200-EP  
IDD1  
IDD2  
IDD1  
IDD2  
0.8  
1.0  
0.7  
1.3  
1.3  
1.6  
1.3  
1.9  
2.2  
2.0  
1.9  
3.1  
3.2  
2.8  
2.5  
4.0  
4.8  
3.8  
4.1  
6.1  
6.4  
4.9  
5.3  
8.3  
mA  
mA  
mA  
mA  
No load  
No load  
No load  
No load  
ADuM3201-EP  
Table 12. For All Models  
Parameter  
Symbol  
Min  
Typ  
Max  
Unit  
Test Conditions/Comments  
DC SPECIFICATIONS  
Logic High Input Threshold  
Logic Low Input Threshold  
Logic High Output Voltages  
VIH  
VIL  
VOH  
0.7 VDDx  
V
V
V
V
V
V
µA  
0.3 VDDx  
VDDx − 0.1  
VDDx − 0.5  
VDDx  
VDDx − 0.2  
0.0  
0.2  
+0.01  
IOx = −20 µA, VIx = VIxH  
IOx = −3.2 mA, VIx = VIxH  
IOx = 20 µA, VIx = VIxL  
IOx =3.2 mA, VIx = VIxL  
0 V ≤ VIx ≤ VDDx  
Logic Low Output Voltages  
VOL  
II  
0.1  
0.4  
+10  
Input Current per Channel  
Supply Current per Channel  
Quiescent Input Supply Current  
−10  
IDDI(Q)  
IDDO(Q)  
IDDI(D)  
IDDO(D)  
0.3  
0.5  
0.10  
0.05  
0.5  
0.6  
mA  
mA  
mA/Mbps  
mA/Mbps  
VIA = VIB = 0 V  
VIA = VIB = 0 V  
Quiescent Output Supply Current  
Dynamic Input Supply Current  
Dynamic Output Supply Current  
AC SPECIFICATIONS  
Common-Mode Transient Immunity1  
|CM|  
fr  
25  
35  
kV/µs  
Mbps  
VIx = VDDx, VCM = 1000 V,  
transient magnitude = 800 V  
Refresh Rate  
1.1  
1 |CM| is the maximum common-mode voltage slew rate that can be sustained while maintaining VOUT > 0.8 VDD. The common-mode voltage slew rates apply to both rising and  
falling common-mode voltage edges.  
Rev. B | Page 6 of 12  
 
Enhanced Product  
ADuM3200-EP/ADuM3201-EP  
PACKAGE CHARACTERISTICS  
Table 13.  
Parameter  
Symbol  
RI-O  
CI-O  
CI  
θJCI  
Min  
Typ  
1012  
1.0  
4.0  
46  
Max  
Unit  
pF  
pF  
°C/W  
Test Conditions/Comments  
Resistance (Input to Output)1  
Capacitance (Input to Output)1  
Input Capacitance  
f = 1 MHz  
IC Junction to Case Thermal Resistance, Side 1  
Thermocouple located at center  
of package underside  
IC Junction to Case Thermal Resistance, Side 2  
θJCO  
41  
°C/W  
1 The device is considered a 2-terminal device; Pin 1, Pin 2, Pin 3, and Pin 4 are shorted together, and Pin 5, Pin 6, Pin 7, and Pin 8 are shorted together.  
REGULATORY INFORMATION  
The ADuM3200-EP/ADuM3201-EP devices are pending approval by the organizations listed in Table 14. Refer to Table 19 for details  
regarding recommended maximum working voltages for specific cross isolation waveforms and insulation levels.  
Table 14.  
UL (Pending)  
CSA (Pending)  
VDE (Pending)  
Recognized Under UL 1577 Component  
Recognition Program1  
Approved under CSA Component Acceptance Notice 5A  
Certified according to  
DIN V VDE V 0884-10  
(VDE V 0884-10):2006-122  
Single/Basic 2500 V rms Isolation Voltage  
Basic insulation per CSA 60950-1-03 and IEC 60950-1,  
400 V rms (566 VPEAK) maximum working voltage  
Reinforced insulation, 560 VPEAK  
Functional insulation per CSA 60950-1-03 and IEC 60950-1,  
800 V rms (1131 VPEAK) maximum working voltage  
File E214100  
File 205078  
File 2471900-4880-0001  
1 In accordance with UL 1577, each ADuM3200-EP/ADuM3201-EP is proof tested by applying an insulation test voltage ≥3000 V rms for 1 sec.  
2 In accordance with DIN V VDE V 0884-10, each ADuM3200-EP/ADuM3201-EP is proof tested by applying an insulation test voltage ≥1050 VPEAK for 1 sec (partial discharge  
detection limit = 5 pC). An asterisk (*) marking branded on the component designates DIN V VDE V 0884-10 approval.  
INSULATION AND SAFETY RELATED SPECIFICATIONS  
Table 15.  
Parameter  
Symbol Value Unit  
Test Conditions/Comments  
Rated Dielectric Insulation Voltage  
Minimum External Tracking (Creepage)  
2500  
4.0  
V rms  
1-minute duration  
L(I02)  
L(I01)  
L(PCB)  
mm min Measured from input terminals to output terminals,  
shortest distance path along package body  
mm min Measured from input terminals to output terminals,  
shortest distance through air  
mm min Measured from input terminals to output terminals,  
shortest distance through air, line of sight, in the PCB  
mounting plane  
Minimum External Air Gap (Clearance)  
4.0  
Minimum Clearance in the Plane of the Printed  
Circuit Board (PCB Clearance)  
4.01  
Minimum Internal Gap (Internal Clearance)  
Tracking Resistance (Comparative Tracking Index)  
Isolation Group  
0.017  
>400  
II  
mm min Insulation distance through insulation  
CTI  
V
DIN IEC 112/VDE 0303 Part 1  
Material group (DIN VDE 0110, 1/89, Table 1)  
1 This value is for information only, to aid in PCB design. Package clearance is identical to creepage as specified in L(I02).  
Rev. B | Page 7 of 12  
 
 
 
 
ADuM3200-EP/ADuM3201-EP  
Enhanced Product  
INSULATION CHARACTERISTICS (DIN V VDE V 0884-10 (VDE V 0884-10):2006-12)  
These isolators are suitable for reinforced isolation only within the safety limit data. Maintenance of the safety data is ensured by protective  
circuits. The asterisk (*) marking on the package denotes DIN V VDE V 0884-10 approval for a 560 VPEAK working voltage.  
Table 16.  
Description  
Test Conditions/Comments  
Symbol Characteristic  
Unit  
Installation Classification per DIN VDE 0110  
For Rated Mains Voltage ≤ 150 V rms  
For Rated Mains Voltage ≤ 300 V rms  
For Rated Mains Voltage ≤ 400 V rms  
Climatic Classification  
Pollution Degree per DIN VDE 0110, Table 1  
Maximum Working Insulation Voltage  
Input to Output Test Voltage, Method B1  
I to IV  
I to III  
I to II  
40/125/21  
2
VIORM  
VPR  
560  
1050  
VPEAK  
VPEAK  
VIORM × 1.875 = VPR, 100% production test, tm = 1 sec,  
partial discharge < 5 pC  
Input to Output Test Voltage, Method A  
After Environmental Tests Subgroup 1  
After Input and/or Safety Test Subgroup 2 VIORM × 1.2 = VPR, tm = 60 sec, partial discharge < 5 pC  
and Subgroup 3  
VIORM × 1.6 = VPR, tm = 60 sec, partial discharge < 5 pC  
VPR  
896  
672  
VPEAK  
VPEAK  
Highest Allowable Overvoltage  
Surge Isolation Voltage  
Transient overvoltage, tTR = 10 sec  
VPEAK = 10 kV, 1.2 µs rise time, 50 µs, 50% fall time  
VTR  
VIOSM  
4000  
4000  
VPEAK  
VPEAK  
Safety Limiting Values  
Maximum value allowed in the event of a failure  
(see Figure 3)  
Case Temperature  
Total Power Dissipation at 25°C  
Insulation Resistance at TS  
TS  
PS  
RS  
150  
1.56  
>109  
°C  
W
VIO = 500 V  
200  
180  
160  
140  
RECOMMENDED OPERATING CONDITIONS  
Table 17.  
Parameter  
Symbol Min Max  
TA −55 +125 °C  
VDD1, VDD2 3.0  
Unit  
Operating Temperature  
Supply Voltages1  
Maximum Input Signal Rise and  
Fall Times  
SIDE 2  
SIDE 1  
120  
100  
80  
60  
40  
20  
0
5.5  
1.0  
V
ms  
Start-Up Current  
IDD1, IDD2  
20  
mA  
1 All voltages are relative to their respective ground.  
0
50  
100  
150  
200  
CASE TEMPERATURE (°C)  
Figure 3. Thermal Derating Curve, Dependence of Safety Limiting Values  
on Case Temperature, per DIN V VDE V 0884-10  
Rev. B | Page 8 of 12  
 
 
 
Enhanced Product  
ADuM3200-EP/ADuM3201-EP  
ABSOLUTE MAXIMUM RATINGS  
TA = 25°C, unless otherwise noted.  
Stresses at or above those listed under Absolute Maximum  
Ratings may cause permanent damage to the product. This is a  
stress rating only; functional operation of the product at these  
or any other conditions above those indicated in the operational  
section of this specification is not implied. Operation beyond  
the maximum operating conditions for extended periods may  
affect product reliability.  
Table 18.  
Parameter  
Rating  
Storage Temperature (TST)  
Ambient Operating Temperature (TA)  
−55°C to +150°C  
−55°C to +125°C  
−0.5 V to +7.0 V  
−0.5 V to VDDI + 0.5 V  
−0.5 V to VDDO + 0.5 V  
−22 mA to +22 mA  
1
Supply Voltages (VDD1, VDD2  
)
Input Voltages (VIA, VIB)1, 2  
Output Voltages (VOA, VOB)1, 2  
ESD CAUTION  
Average Output Current, per Pin (IO)3  
Common-Mode Transients (CML, CMH)4 −100 kV/μs to +100 kV/μs  
1 All voltages are relative to their respective ground.  
2 VDDI and VDDO refer to the supply voltages on the input and output sides of a  
given channel, respectively.  
3 See Figure 3 for maximum rated current values for various temperatures.  
4 Refers to common-mode transients across the insulation barrier. Common-  
mode transients exceeding the absolute maximum ratings can cause latch-up  
or permanent damage.  
Table 19. Maximum Continuous Working Voltage1  
Parameter  
Max  
Unit  
Constraint  
AC Voltage, Bipolar Waveform  
AC Voltage, Unipolar Waveform  
Functional Insulation  
Basic Insulation  
565  
VPEAK  
50-year minimum lifetime  
1131  
560  
VPEAK  
VPEAK  
Maximum approved working voltage per IEC 60950-1  
Maximum approved working voltage per IEC 60950-1 and VDE V 0884-10  
DC Voltage  
Functional Insulation  
Basic Insulation  
1131  
560  
VPEAK  
VPEAK  
Maximum approved working voltage per IEC 60950-1  
Maximum approved working voltage per IEC 60950-1 and VDE V 0884-10  
1 Refers to continuous voltage magnitude imposed across the isolation barrier.  
Table 20. ADuM3200-EP Truth Table (Positive Logic)  
VIA Input  
High  
Low  
High  
Low  
X1  
VIB Input  
High  
Low  
Low  
High  
X1  
VDD1 State  
Powered  
Powered  
Powered  
Powered  
Unpowered  
VDD2 State  
Powered  
Powered  
Powered  
Powered  
Powered  
VOA Output  
High  
Low  
High  
Low  
VOB Output  
High  
Low  
Low  
High  
Notes  
High  
High  
Outputs return to the input state within  
1 μs of VDDI power restoration.  
Outputs return to the input state within  
1 μs of VDDO power restoration.  
X1  
X1  
Powered  
Unpowered  
Indeterminate  
Indeterminate  
1 X means don’t care.  
Table 21. ADuM3201-EP Truth Table (Positive Logic)  
VIA Input  
High  
Low  
High  
Low  
X1  
VIB Input  
High  
Low  
Low  
High  
X1  
VDD1 State  
Powered  
Powered  
Powered  
Powered  
Unpowered  
VDD2 State  
Powered  
Powered  
Powered  
Powered  
Powered  
VOA Output  
High  
Low  
High  
Low  
VOB Output  
High  
Low  
Low  
High  
Notes  
Indeterminate  
High  
Outputs return to the input state within  
1 μs of VDDI power restoration.  
Outputs return to the input state within  
1 μs of VDDO power restoration.  
X1  
X1  
Powered  
Unpowered  
High  
Indeterminate  
1 X means don’t care.  
Rev. B | Page 9 of 12  
 
 
 
ADuM3200-EP/ADuM3201-EP  
Enhanced Product  
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS  
V
1
2
3
4
8
7
6
5
V
V
V
DD1  
DD2  
OA  
OB  
ADuM3200-EP  
V
IA  
IB  
V
TOP VIEW  
(Not to Scale)  
GND  
GND  
2
1
Figure 4. ADuM3200-EP Pin Configuration  
Table 22. ADuM3200-EP Pin Function Descriptions  
Pin No.  
Mnemonic  
Description  
1
2
3
4
5
6
7
8
VDD1  
VIA  
VIB  
GND1  
GND2  
VOB  
VOA  
VDD2  
Supply Voltage for Isolator Side 1.  
Logic Input A.  
Logic Input B.  
Ground 1. Ground reference for Isolator Side 1.  
Ground 2. Ground reference for Isolator Side 2.  
Logic Output B.  
Logic Output A.  
Supply Voltage for Isolator Side 2.  
V
1
2
3
4
8
7
6
5
V
V
V
DD1  
DD2  
ADuM3201-EP  
V
OA  
IA  
V
TOP VIEW  
(Not to Scale)  
IB  
OB  
GND  
GND  
2
1
Figure 5. ADuM3201-EP Pin Configuration  
Table 23. ADuM3201-EP Pin Function Descriptions  
Pin No.  
Mnemonic  
Description  
1
2
3
4
5
6
7
8
VDD1  
VOA  
VIB  
GND1  
GND2  
VOB  
VIA  
VDD2  
Supply Voltage for Isolator Side 1.  
Logic Output A.  
Logic Input B.  
Ground 1. Ground reference for Isolator Side 1.  
Ground 2. Ground reference for Isolator Side 2.  
Logic Output B.  
Logic Input A.  
Supply Voltage for Isolator Side 2.  
Rev. B | Page 10 of 12  
 
Enhanced Product  
ADuM3200-EP/ADuM3201-EP  
TYPICAL PERFORMANCE CHARACTERISTICS  
10  
20  
15  
10  
5
8
6
4
5.0V  
5.0V  
2
3.3V  
3.3V  
0
0
0
10  
20  
30  
0
10  
20  
30  
DATA RATE (Mbps)  
DATA RATE (Mbps)  
Figure 6. Typical Input Supply Current per Channel vs. Data Rate  
for 5 V and 3.3 V Operation  
Figure 9. Typical ADuM3200-EP IDD1 Supply Current vs. Data Rate  
for 5 V and 3.3 V Operation  
4
3
2
4
3
5.0V  
2
5.0V  
3.3V  
1
1
3.3V  
0
0
0
10  
20  
30  
0
10  
20  
30  
DATA RATE (Mbps)  
DATA RATE (Mbps)  
Figure 7. Typical Output Supply Current per Channel vs. Data Rate  
for 5 V and 3.3 V Operation (No Output Load)  
Figure 10. Typical ADuM3200-EP IDD2 Supply Current vs. Data Rate  
for 5 V and 3.3 V Operation  
4
10  
8
3
6
2
5.0V  
4
5.0V  
1
2
3.3V  
3.3V  
0
0
0
10  
20  
30  
0
10  
20  
30  
DATA RATE (Mbps)  
DATA RATE (Mbps)  
Figure 8. Typical Output Supply Current per Channel vs. Data Rate  
for 5 V and 3.3 V Operation (15 pF Output Load)  
Figure 11. Typical ADuM3201-EP IDD1 or IDD2 Supply Current vs. Data Rate  
for 5 V and 3.3 V Operation  
Rev. B | Page 11 of 12  
 
ADuM3200-EP/ADuM3201-EP  
OUTLINE DIMENSIONS  
Enhanced Product  
5.00 (0.1968)  
4.80 (0.1890)  
8
1
5
4
6.20 (0.2441)  
5.80 (0.2284)  
4.00 (0.1574)  
3.80 (0.1497)  
0.50 (0.0196)  
0.25 (0.0099)  
1.27 (0.0500)  
BSC  
45°  
1.75 (0.0688)  
1.35 (0.0532)  
0.25 (0.0098)  
0.10 (0.0040)  
8°  
0°  
0.51 (0.0201)  
0.31 (0.0122)  
COPLANARITY  
0.10  
1.27 (0.0500)  
0.40 (0.0157)  
0.25 (0.0098)  
0.17 (0.0067)  
SEATING  
PLANE  
COMPLIANT TO JEDEC STANDARDS MS-012-AA  
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS  
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR  
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.  
Figure 12. 8-Lead Standard Small Outline Package [SOIC_N]  
Narrow Body (R-8)  
Dimensions shown in millimeters (inches)  
ORDERING GUIDE  
No. of  
No. of  
Maximum Maximum  
Maximum  
Inputs,  
VDD1 Side  
Inputs,  
Data Rate Propagation  
Pulse Width  
Temperature  
Package  
Description  
Package  
Option  
Model1  
V
0
0
1
1
DD2 Side (Mbps)  
Delay, 5 V (ns) Distortion (ns) Range  
ADuM3200TRZ-EP  
ADuM3200TRZ-EP-RL7  
ADuM3201TRZ-EP  
ADuM3201TRZ-EP-RL7  
2
2
1
1
25  
25  
25  
25  
45  
45  
45  
45  
3
3
3
3
−55°C to +125°C 8-Lead SOIC_N R-8  
−55°C to +125°C 8-Lead SOIC_N R-8  
−55°C to +125°C 8-Lead SOIC_N R-8  
−55°C to +125°C 8-Lead SOIC_N R-8  
1 Z = RoHS Compliant Part.  
©2015–2016 Analog Devices, Inc. All rights reserved. Trademarks and  
registered trademarks are the property of their respective owners.  
D13088-0-3/16(B)  
Rev. B | Page 12 of 12  
 
 
 

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