ANSG08SL_技术文档

ANSG08

8-Ch Auto Sensitivity Calibration Capacitive Touch Sensor

SPECIFICATION

Preliminary

Marketing

Q A

Approval

작성

검토

팀장

July, 2011

AD Semiconductor

ADSemiconductor_®

ANSG08 (8-CH Auto Sensitivity Calibration Capacitive Touch Sensor)

 Revision History

Rev.

1.0

1.1

Description of change

Date

11.07.11

11.08.16

Originator

KD PARK

EW LEE

First creation

LDO output pin removal

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ANSG08 (8-CH Auto Sensitivity Calibration Capacitive Touch Sensor)

1. Specification

1.1 General Feature

 8-Channel capacitive sensor with auto sensitivity calibration

 Available LED PWM drive up to 8

 Multi interface - I²C serial interface / Parallel outputs

 Selectable output operation mode (Single output / Multi output)

 Adjustable 256 steps sensitivity

 Almost no external component needed

 Low current consumption

 Embedded common and normal noise elimination circuit

 RoHS compliant 24 QFN / 24 SOP / 16 SOP packages

 Moisture sensitivity level 2 (MSL2)

1.2 Application

 Home appliances (TV, Monitor keypads)

 Mobile applications (PMP, MP3, Car navigation)

 Membrane switch replacement

 Sealed control panels, keypads

 Touch screen replacement application

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1.3 Packages

ANSG08QL (24 QFN)

ANSG08SL (24 SOP)

ANSG08SH (16 SOP)

※ Drawings not to scale

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2 Pin Description

VDD, GND

Supply voltage and ground pin.

R.N.D

Radio frequency Noise Detection pin. Normally, R.N.D pin does not connect to anywhere.

But, in radio frequency noise environment, this pin must form a pattern line on PCB.

CS1 ~ CS8

Capacitive sensor input pins.

LCAP

Internal LDO output port.

D1 ~ D8

Parallel output ports of CS1~CS8 respectively / LED PWM drive output ports. The structure of these

parallel output ports is open drain NMOS for active low output level operation.

SCL, SDA

SCL is I²C clock input pin and SDA is I²C data input-output pin. These ports have internal pull-up resistor.

In case of not use, this pin must be not connected to any circuitry.

INT

Touch sensing interrupt output pin.

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2.1 ANSG08QL (24 QFN package)

Pin No.

Name

CS4

CS5

CS6

CS7

CS8

SCL

I/O

Description

Protection

VDD/GND

1

2

3

4

5

6

Analog Input Capacitive sensor input 4

Analog Input Capacitive sensor input 5

Analog Input Capacitive sensor input 6

Analog Input Capacitive sensor input 7

Analog Input Capacitive sensor input 8

Digital Input

Digital

I²C clock input

I²C data input-output

7

SDA

VDD/GND

Input / Output Open drain NMOS structure

Ground Supply ground

Analog Input Radio frequency Noise Detection pin

8

9

GND

R.N.D

N.C

VDD

VDD/GND

-

10

-

Parallel output of CS1

Digital Output LED PWM drive output1

Open drain NMOS structure

11

12

13

14

15

16

17

18

D1

D2

D3

D4

D5

D6

D7

D8

VDD/GND

Parallel output of CS2

Digital Output LED PWM drive output2

Open drain NMOS structure

Parallel output of CS3

Digital Output LED PWM drive output3

Open drain NMOS structure

Parallel output of CS4

Digital Output LED PWM drive output4

Open drain NMOS structure

Parallel output of CS5

Digital Output LED PWM drive output5

Open drain NMOS structure

Parallel output of CS6

Digital Output LED PWM drive output6

Open drain NMOS structure

Parallel output of CS7

Digital Output LED PWM drive output7

Open drain NMOS structure

Parallel output of CS8

Digital Output LED PWM drive output8

Open drain NMOS structure

19

20

LCAP

INT

Analog Output Internal LDO Output

VDD/GND

Touch sensing interrupt output

Digital Output

Open drain NMOS structure

21

22

23

24

VDD

CS1

CS2

CS3

Power

Power (3.0V~5.5V)

GND

Analog Input Capacitive sensor input 1

Analog Input Capacitive sensor input 2

Analog Input Capacitive sensor input 3

VDD/GND

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2.2 ANSG08SL (24 SOP package)

Pin No.

Name

CS6

I/O

Description

Protection

VDD/GND

1

2

3

4

Analog Input Capacitive sensor input 6

Analog Input Capacitive sensor input 7

Analog Input Capacitive sensor input 8

CS7

CS8

SCL

Digital Input

Digital

Input / Output Open drain NMOS structure

I²C clock input

I²C data input-output

5

SDA

VDD/GND

6

7

GND

RND

Ground Supply ground

VDD

Analog Input Radio frequency Noise Detection pin

VDD/GND

Parallel output of CS1

Digital Output LED PWM drive output1

Open drain NMOS structure

8

D1

D2

D3

D4

D5

D6

D7

D8

VDD/GND

Parallel output of CS2

Digital Output LED PWM drive output2

Open drain NMOS structure

9

Parallel output of CS3

Digital Output LED PWM drive output3

Open drain NMOS structure

10

11

12

13

14

15

Parallel output of CS4

Digital Output LED PWM drive output4

Open drain NMOS structure

Parallel output of CS5

Digital Output LED PWM drive output5

Open drain NMOS structure

Parallel output of CS6

Digital Output LED PWM drive output6

Open drain NMOS structure

Parallel output of CS7

Digital Output LED PWM drive output7

Open drain NMOS structure

Parallel output of CS8

Digital Output LED PWM drive output8

Open drain NMOS structure

16

17

LCAP

INT

Analog Output Internal LDO Output

VDD/GND

Touch sensing interrupt output

Digital Output

Open drain NMOS structure

18

19

20

21

22

23

24

VDD

CS1

CS2

CS3

CS4

N.C.

CS5

Power

Power (3.0V~5.5V)

GND

Analog Input Capacitive sensor input 1

Analog Input Capacitive sensor input 2

Analog Input Capacitive sensor input 3

Analog Input Capacitive sensor input 4

VDD/GND

-

Analog Input Capacitive sensor input 5

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2.3 ANSG08SH (16 SOP package)

Pin No.

Name

CS3

CS4

CS5

CS6

CS7

CS8

SCL

I/O

Description

Protection

VDD/GND

1

2

3

4

5

6

7

Analog Input Capacitive sensor input 3

Analog Input Capacitive sensor input 4

Analog Input Capacitive sensor input 5

Analog Input Capacitive sensor input 6

Analog Input Capacitive sensor input 7

Analog Input Capacitive sensor input 8

Digital Input

I²C clock input

Digital

I²C data input-output

Input / Output Open drain NMOS structure

8

SDA

VDD/GND

9

GND

Ground Supply ground

VDD

10

R.N.D

Analog Input Radio frequency Noise Detection pin

VDD/GND

Parallel output of CS1

Digital Output LED PWM drive output1

Open drain NMOS structure

11

D1

VDD/GND

Touch sensing interrupt output

Digital Output

12

INT

VDD/GND

Open drain NMOS structure

13

14

15

16

VDD

LCAP

CS1

Power

Power (3.0V~5.5V)

GND

Analog Output Internal LDO Output

Analog Input Capacitive sensor input 1

Analog Input Capacitive sensor input 2

VDD/GND

CS2

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3 Absolute Maximum Rating

Battery supply voltage

6V

Maximum voltage on any pin VDD+0.3

Maximum current on any PAD 100mA

Power Dissipation

800mW

Storage Temperature

Operating Temperature

Junction Temperature

-50 ~ 150℃

-20 ~ 75℃

150℃

Note : Unless any other command is noted, all above are operated in normal temperature.

4 ESD & Latch-up Characteristics

4.1 ESD Characteristics

Mode

Polarity

Max

Reference

7000V

500V

VDD

VSS

H.B.M

Pos / Neg

P to P

VDD

M.M

Pos / Neg

500V

VSS

500V

P to P

C.D.M

-

1000V

Field Induced Charge

4.2 Latch-up Characteristics

Mode

Polarity

Positive

Negative

Positive

Max

100mA

-100mA

8.5V

Reference

JESD78A

I Test

V supply over 5.0V

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5 Electrical Characteristics

▪ Note : V_DD=3.3V, Typical system frequency (Unless otherwise noted), T_A= 25℃

Characteristics

Symbol

Test Condition

Min

Typ

Max

Units

Power supply requirement and current consumption

Operating voltage

V_DD

I_DD

3.0

-

5.5

-

V

V_DD

3.3V

=

Current consumption

Standby state @10MHz

0.50

2.6

㎃

Reset and input level

Internal reset voltage

Input high level

V_{DD_RST}

VIH

VIL

T_A= 25℃

| I_IH| ≤ +5μA

| I_IL| ≤ +5μA

-

V_DD*0.6

-

V_DD+0.3

V

Input low level

–0.3

-

V_DD*0.3

Slow calibration speed

Normal calibration speed

Fast calibration speed

100

80

-

Self calibration time after

system reset

T_CAL

-

msec

-

60

Internal Pull Up resister of

SDA, SCL, INT

R_P/U

-

30

-

kΩ

Touch sensing performance

Minimum detective

capacitance difference

Sense input

ΔC_MIN

C_S

0.1

-

㎊

Ω

50

capacitance range¹

Output impedance

(open drain)

ΔC > ΔC_MIN

ΔC < ΔC_MIN

-

12

30M

-

Zo

System performance

Max. output current

(LED drive current)

LED PWM control²

Sensitivity control³

I_OUT

Per unit drive output port

-

8.0

㎃

N_PWM

-

16

256

-

step

Max. I²C SCL clock speed

Touch expired time

f_{SCL_MAX}

T_EX

Maximum internal I²C clock

Normal calibration speed

-

30

2

-

MHz

sec

1

The sensitivity can be decreased with higher parallel capacitance of CS pin including parasitic capacitance made by

neighbor GND or other pattern. The series resistor(under 1kΩ) of CS can be used in noisy condition to avoid mal-function

from external surge and ESD.

2

Refer to the chapter 8.2.13. LED luminance control register

3

Refer to the chapter 8.2.10. Sensitivity register

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6 ANSG08 Implementation

6.1 Typical current consumption

ANSG08 uses internal bias circuit, so internal clock frequency and current consumption is fixed

and no external bias circuit is needed. Internal clock frequency and calibration speed can be

changed by I²C register setting⁴. Faster calibration speed needs more current consumption than

normal or slower calibration speed. Slow calibration speed isn’t recommended if it has not

problem of current consumption.

Internal bias circuit can make the circuit design simple and reduce external components.

6.2 CS implementation

ANSG08 has 256 step selections of sensitivity and internal surge protection resister. Sensitivity

of each sensing channel (CS) can be independently controlled on others. External components

of CS pin such as series resistor or parallel capacitor isn’t necessary. The parallel parasitic

capacitance of CS pins caused by touch line, touch pad and neighbor GND or other pattern

may affect sensitivity. The sensitivity will be decreased when bigger parallel parasitic

capacitance of CS pin is added.

Parallel capacitor (C_S1~S8) of CS pin is useful in case of detail sensitivity mediation is required

such as for complementation sensitivity difference between channels. Same as above parallel

parasitic capacitance, sensitivity will be decreased when a big value of parallel capacitor

(C_S1~S8) is used. Under 50pF capacitor can be used as sensitivity meditation capacitor and a

few pF is usually used. The R_S, serial connection resistor of CS pins, may be used to avoid

mal-function from external surge and ESD. (It might be optional.) From 200Ω to 1kΩ is

recommended for R_S. Refer to below CS pins application figure.

R_S8

CS8<<

Touch PAD8

C_S8

R_S1

Touch PAD1

CS1<<

C_S1

4

Refer to 8.2.6 Clock control register.

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The ANSG08 has eight independent touch sensor input from CS1 to CS8. The internal touch

decision process of each channel is separated from others. Therefore eight channel touch key

board application can be designed by using only one ANSG08 without coupling problems.

The size and shape of PAD might have influence on the sensitivity. The sensitivity will be optimal

when the size of PAD is approximately an half of the first knuckle (it’s about 10 ㎜ｘ 7 ㎜). The

connection line of CS to touch PAD is recommended to be routed as short as possible to

prevent from abnormal touch detect caused by connection line. The unused CS pin should not

be connected with the ground.

6.3 LED drive implementation

ANSG08 has a function to control the LED using D1~D8 ports. For using D1~D8 as LED driver

ports, LEDs and resisters must be equipped as below figure, and write the ‘port_mode” register⁵

as ‘1’. D1 ~ D8 ports can drive LEDs by ‘PWM_ctrlx’ register⁶control. ANSG08 can drive up to 8

LED as below method.

V_DD

LED8

LED1

R_D8

R_D1

D1 <<

D8 <<

6.4 Parallel output

ANSG08 acts as active low parallel output mode. Structures of D1~D8 are same. In case of

active low parallel output mode, parallel output ports (D1~D8) have an open drain NMOS

structure. For this reason, the parallel output mode of ANSG08 needs R_OUTas below figures.

The maximum output drive current is 8mA, so over a few kΩ must be used as R_OUT. Normally

10kΩ is used as R_OUT

.

5

Refer to the chapter 8.2.14. Port mode control register

6

Refer to the chapter 8.2.13. LED luminance control register

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VDD

R_OUT1

R_OUT2

OUTPUT1

D1

OUTPUT2

D2

R_OUT8

OUTPUT8

D8

Active low parallel output mode circuit

6.5 INT (Interrupt output) Implementation

An INT pin is for the touch sensing interrupt output. The interrupt pulse is generated only during

short period of every each channel touch start point and touch end point. Interrupt pulse has

logical low level. INT has NMOS open drain structure and internal pull-up resister of which value

is 30kΩ typical.

6.6 Change initial reset register values (EEPROM writing)

ANSG08 has an EEPROM.

So, initial reset register values can be rewritten.

The erase and write cycle endurance of the EEPROM is at least 300,000.

There are three operation modes about EEPROM read/write. These are automatically load

operation mode, writing operation mode and reading operation mode.

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Automatically load operation mode

After power reset, ANSG08 start to read the data of 00H and 7FH address in EEPROM.

ANSG08 automatically loads the data of the EEPROM when the data of 00H is 0xAA and the

data of 7FH is 0x55. And then ANSG08 is starting to work with control register values that are

loaded from EEPROM. ANSG08 is working with initial control register value when the data of

00H isn’t 0xAA or the data of 7FH isn’t 0x55.

Writing operation mode

EEPROM writing provides the flexible reset register values that control all the operation options

of ANSG08. So, additional communication programs on MCU for operation option select or

register value setting aren’t required.

There is only one writing operation mode, all bytes writing mode.

When the ‘write_all’ bit of ‘prom_cmd’ register⁷is ‘1’, all bytes writing mode is activated. User

can write all registers frame data on EEPROM. Read or write command register is ‘prom_cmd’

registers and user can start writing by ‘wr_start’ bit of ‘prom_cmd’ register setting as ‘1’. This

‘wr_start’ bit of ‘prom_cmd’ register is recovered as ‘0’ at ending of writing.

When the ‘write_all’ bit of ‘prom_cmd’ register is ‘0’, writing operation isn’t activated.

Reading operation mode

When EEPROM data is required to be read, user can read all EEPROM date by reading

operation. When the ‘read_all’ bit of ‘prom_cmd’ register is ‘0’, user can read one byte data that

is written on selected address of EEPROM.

When the ‘read_all’ bit of ‘prom_cmd’ register is ‘1’, user can read all data on EEPROM.

EEPROM read start command bit is ‘rd_start’ bit of ‘prom_cmd’ register. When the ‘rd_start’ bit

of ‘prom_cmd’ register is ‘1’, ANSG08 starts to read. This ‘rd_start’ bit of ‘prom_cmd’ register is

recovered as ‘0’ at ending of reading.

6.7 SCL, SDA implementation

SCL is I²C clock input and SDA is I²C data input-output. These ports have internal pull-up

resistor. SCL has Schmitt trigger input structure to prevent clock signal from being broken.

Maximum supported I²C clock frequency is 2MHz. SDA has NMOS open drain structure and

internal pull-up resister of which value is 30kΩ typical. So, according to communication speed

a few kΩ resister must be used as pull-up resister for proper data pulse rising time. For more

details refer to ‘Chapter 7. I²C Interface’.

7

Refer to the chapter 8.2.15. EEPROM control register.

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7 I²C Interface

7.1 I²C Enable / Disable

If the SDA or SCL signal goes to low, I²C control block is enabled automatically. And if the SDA

and SCL signal maintain high during about 2 us, I²C control block is disabled automatically also.

7.2 Start & stop condition

 Start Condition (S)

 Stop Condition (P)

 Repeated Start (Sr)

7.3 Data validity

The SDA should be stable when the SCL is high and the SDA can be changed when the SCL is

low.

7.4 Byte format

The byte structure is composed with 8Bit data and an acknowledge signal.

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7.5 Acknowledge

It is a check bit whether the receiver gets the data from the transmitter without error or not. The

receiver will write ‘0’ when it received the data successfully and ‘1’ if not.

7.6 First byte

7.6.1 Slave address

It is the first byte from the start condition. It is used to access the slave device. The initial chip

address of ANSG08 is ‘48’ hex number and the chip address is possible to change with “I²C

Address of ANSG08” register⁸.

─

7.6.2 R/W

The direction of data is decided by the bit and it follows the address data.

MSB

LSB

─

R/W

Address

7 bit

1bit

8

Refer to the chapter 8.2.4. I2C address of ANSG08.

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7.7 Transferring data

7.7.1 Write operation

The byte sequence is as follows:

1. The first byte gives the device address plus the direction bit (R/W = 0).

2. The second byte contains the internal address of the first register to be accessed.

3. The next byte is written in the internal register. Following bytes are written in successive

internal registers.

4. The transfer lasts until stop conditions are encountered.

5. The ANSG08 acknowledges every byte transfer.

7.7.2 Read operation

The address of the first register to read is programmed in a write operation without data, and

terminated by the stop condition. Then, another start is followed by the device address and

R/W= 1. All following bytes are now data to be read at successive positions starting from the

initial address.

7.7.3 Read/Write Operation

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7.8 I²C write and read operations in normal mode

The following figure represents the I²C normal mode write and read registers.

☞ Write register 0x00 to 0x01 with data AA and BB

Device

Address 0x48

Register

Address 0x00

Start

ACK

Data AA

ACK

Data BB

ACK

Stop

Read register 0x00 and 0x01

Device

Address 0x48

Register

Address 0x00

Start

ACK

Stop

Device

Start

ACK

Data Read AA

Data Read BB

Stop

ACK

Address 0x49

From Slave to Master

From Master to Slave

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8 ANSG08 Control Register List

 Note: The unused bits (defined as reserved) in I²C registers must be kept to zero.

 Note: The reset value of ANSG08 can be changed by EEPROM writing.

8.1 I²C Register Map

Reset

Bit name of each bytes

Addr.

Name

Value

(Bin)

(Hex)

Bit7

Bit6

Bit5

Bit4

Bit3

Bit2

Bit1

Bit0

prom_set1

00H 0000 0000

01H 1111 1111

eeprom_set1

ch_enable

/soft_rst

ch8_en

o_ch8

ch7_en

ch6_en

o_ch6

ch5_en

ch4_en

o_ch4

ch3_en

o_ch3

ch2_en

ch1_en

i2c_id

06H 0100 1000

2AH 0000 0000

34H 0000 0110

36H 0100 1100

37H 0101 1111

38H 0001 1110

39H 0001 1100

3AH 0001 1100

3BH 0001 1100

3CH 0001 1100

3DH 0001 1100

3EH 0001 1100

3FH 0001 1100

40H 0001 1100

41H 0000 0000

i2c_id

o_ch5

-

wr_bit

o_ch1

output

o_ch7

init_cal_opt

response_off_ctrl

1

o_ch2

bf_mode

1

clock_ctrl

clk_sel

response_ctrl

rb_sel

global_ctrl1

state_count

global_ctrl2

sensitivity1

sensitivity2

sensitivity3

sensitivity4

sensitivity5

sensitivity6

sensitivity7

sensitivity8

cal_speed

software_rst

0

cal_pre_scaler

imp_sel

sin_multi_mode

cal_hold_time

clk_off

sensitivity01

sensitivity02

sensitivity03

sensitivity04

sensitivity05

sensitivity06

sensitivity07

sensitivity08

rnd_bf_up

rnd_bs_up

rnd_bf_down

rnd_bs_down

sen_bf_up

sen_bs_up

sen_bf_down

sen_bs_down

cal_BS_speed 42H 0000 0000

PWM_ctrl1

PWM_ctrl2

PWM_ctrl3

PWM_ctrl4

port_mode

rd_ch_H1

43H 0000 0000

44H 0000 0000

45H 0000 0000

46H 0000 0000

4FH 0000 0000

50H 0000 0000

pwm_d2

pwm_d4

pwm_d6

pwm_d8

pwm_d1

pwm_d3

pwm_d5

pwm_d7

pmod_d8

pmod_d7

pmod_d6

pmod_d5

pmod_d4

pmod_d3

pmod_d2

pmod_d1

rd_ch_H1

rd_ch_L1

51H

---- --00

-

rd_ch_L1

Percent_H

Percent_M

Percent_L

rd_ch_H2

52H 0000 0000

53H 0000 0000

54H 0000 0000

56H 0000 0000

touch_percent[24:17]

touch_percent[16:9]

touch_percent[8:1]

rd_ch_H2

rd_ch_L2

57H

5CH

---- ---0

-

rd_ch_L2

prom_cmd

prom_addr

--00 --00

write_all

read_all

-

wr_start

rd_start

5FH 0000 0000

eeprom_addr

prom_wr_data 60H 0000 0000

prom_rd_data 61H ---- ----

prom_set2 7FH 0000 0000

eeprom_wr_data

eeprom_rd_data

eeprom_set2

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8.2 Details

8.2.1 EEPROM Set 1

Type: R/W

Address

00h

Register Name

prom_set1

Bit7

Bit6

Bit5

Bit4

Bit3

Bit2

Bit1

Bit0

eeprom_set1

Description

The first flag byte for the valid data of EEPROM. If the data of this address isn‟t 0xAA on EEPROM, all data

on EEPROM are invalid. So, the data of this address must be written by 0xAA if user wants to change the reset

value using EEPROM.

Bit name

Reset value

Function

10101010 : EEPROM data is valid

others : EEPROM data is invalid

eeprom_set1

00000000

8.2.2 Channel enable / reset register

Type: R/W

Address

Register Name

Bit7

Bit6

Bit5

Bit4

Bit3

Bit2

Bit1

Bit0

ch_enable

/soft_rst

ch8_en

ch7_en

ch6_en

ch5_en

ch4_en

ch3_en

ch2_en

ch1_en

01h

Description

Enable, disable and reset of each channel control register.

Bit name

Reset value

Function

Channel enable / disable and Channel reset (chx_en is control bit for CSx channel)

0 : Channel disable and sensing channel reset

1 : Channel enable

chx_en

1

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ANSG08 (8-CH Auto Sensitivity Calibration Capacitive Touch Sensor)

8.2.3 I²C address of ANSG08

Type: R/W

Address

06h

Register Name

i2c_id

Bit7

Bit6

Bit5

Bit4

Bit3

Bit2

Bit1

Bit0

i2c_id

wr_bit

Description

Chip address of ANSG08 control register. User can change this address value with EEPROM write. During

reset period EEPROM data is loaded to registers.

Bit name

wr_bit

Reset value

0

Function

Write/Read address selection - 0 : Write address, 1 : Read address

Chip address of ANSG08.

i2c_id

0100100

8.2.4 Output data

Type: R

Address

2Ah

Register Name

output

Bit7

Bit6

Bit5

Bit4

Bit3

Bit2

Bit1

Bit0

o_ch8

o_ch7

o_ch6

o_ch5

o_ch4

o_ch3

o_ch2

o_ch1

Description

The output data register from channel 1 to channel 8.

Bit name

Reset value

Function

o_chx is output bit for CSx channel

0 : No touch detected

o_chx

0

1 : Touch detected

8.2.5 Clock control register

Type: R/W

Address

Register Name

clock_ctrl

Bit7

Bit6

Bit5

Bit4

Bit3

Bit2

Bit1

Bit0

init_cal_opt

-

clk_sel

rb_sel

34h

Description

This register controls the global options of ANSG08

Bit name

Reset value

Function

ANSG08 provides three internal calibration speeds with this register.

00, 01 : Fast

10 : Normal

rb_sel

10

11 : Slow

ANSG08 provides four internal calibration speeds with this register.

00 : Fast

01 : Normal

clk_sel

01

10 : Slow

11 : Slowest

To control the initial BF time.

init_cal_opt[2:0] * 5 + 5 (Seconds)

init_cal_opt

000

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ANSG08 (8-CH Auto Sensitivity Calibration Capacitive Touch Sensor)

8.2.6 Global option control register 1

Type: R/W

Address

Register Name

global_ctrl1

Bit7

Bit6

Bit5

Bit4

Bit3

Bit2

Bit1

Bit0

software

_rst

response_off_ctrl

response_ctrl

bf_mode

36h

Description

This register controls the global options of ANSG08

Bit name

Reset value

Function

Software reset control bit. Reset the data of all sensing channel.

software_rst

0

0 : No reset

1 : Reset

Operation mode selection

0 : Normal mode

1 : BF mode

bf_mode

0

Numbers of continuous touch detections for touch decision.

response_ctrl[2:0] + 1 (Maximum time : 7)

response_ctrl

011

010

Numbers of continuous touch off detections for touch off decision.

response_off_ ctrl[2:0] + 1 (Maximum time : 7)

response_off_ctrl

8.2.7 State count control register

Type: R/W

Address

Register Name

state_count

Bit7

Bit6

Bit5

Bit4

Bit3

Bit2

Bit1

Bit0

0

1

0

cal_pre_scaler

37h

Description

Register to set the pre-scaler for the calibration speed.

Bit name

Reset value

Function

The pre-scaler for the calibration speed.

cal_pre_scaler[4:0] x 16ms (1-period)

cal_pre_scaler

1 1111

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ANSG08 (8-CH Auto Sensitivity Calibration Capacitive Touch Sensor)

8.2.8 Global option control register 2

Type: R/W

Address

38h

Register Name

global_ctrl2

Bit7

Bit6

Bit5

Bit4

Bit3

Bit2

Bit1

Bit0

sin_mult

i_mode

imp_sel

cal_hold_time

-

clk_off

Description

This register controls the global options of ANSG08.

Bit name

Reset value

Function

System clock off control bit.

0 : Not clock off

clk_off

0

1 : Clock off

Output expiration Time control.

cal_hold_tim

e

cal_hold_time[3:0] x 4 ( seconds)

The output expiration time is infinite when the data of the “cal_hold_time” is

“0000”.

0111

Single/Multi output operation mode selection bit.

0 : Single output mode

sin_multi_mo

de

0

1 : Multi output mode

Impedance of the sensing wire of all channels control bit.

0 : High impedance

imp_sel

1 : Low impedance except sensing period.

8.2.9 Sensitivity register

Type: R/W

Address

39H

Register Name

sensitivity1

sensitivity2

sensitivity3

sensitivity4

sensitivity5

sensitivity6

sensitivity7

sensitivity8

Bit7

Bit6

Bit5

Bit4

Bit3

Bit2

Bit1

Bit0

sensitivity01

sensitivity02

sensitivity03

sensitivity04

sensitivity05

sensitivity06

sensitivity07

sensitivity08

3AH

3BH

3CH

3DH

3EH

3FH

40H

Description

This register controls the global options of ANSG08.

Bit name

Reset value

Function

Sensitivities of each channel.

sensitivity0x

0001 1100

Sensitivity of CSx channel: {(sensitivity0x[7:0] x 0.025)} (%).

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ANSG08 (8-CH Auto Sensitivity Calibration Capacitive Touch Sensor)

8.2.10 Calibration speed control register

Type: R/W

Address

41H

Register Name

cal_speed

Bit7

Bit6

Bit5

Bit4

Bit3

Bit2

Bit1

Bit0

rnd_bf_up

rnd_bf_down

sen_bf_up

sen_bf_down

Description

Calibration speed can be controlled by this „cal_speed‟ register at BF mode.

Bit name

Reset value

Function

Sense channel down calibration speed at BF mode control bits.

00 : Fastest

01 : Fast

sen_bf_down

00

10 : Normal

11 : Slow

Sense channel up calibration speed at BF mode control bits.

00 : Fastest

01 : Fast

10 : Normal

11 : Slow

sen_bf_up

rnd_bf_down

rnd_bf_up

00

RND channel down calibration speed at BF mode control bits.

00 : Fastest

01 : Fast

10 : Normal

11 : Slow

RND channel up calibration speed at BF mode control bits.

00 : Fastest

01 : Fast

10 : Normal

11 : Slow

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ANSG08 (8-CH Auto Sensitivity Calibration Capacitive Touch Sensor)

8.2.11 Calibration speed control register at BS mode

Type: R/W

Address

42H

Register Name

cal_BS_speed

Bit7

Bit6

Bit5

Bit4

Bit3

Bit2

Bit1

Bit0

rnd_bs_up

rnd_bs_down

sen_bs_up

sen_bs_down

Description

Calibration speed can be controlled by this „cal_BS_speed‟ register at BS mode.

Bit name

Reset value

Function

Sense channel down calibration speed at BS mode control bits.

00 : Fastest

01 : Fast

sen_bs_down

00

10 : Normal

11 : Slow

Sense channel up calibration speed at BS mode control bits.

00 : Fastest

01 : Fast

10 : Normal

11 : Slow

sen_bs_up

rnd_bs_down

rnd_bs_up

00

RND channel down calibration speed at BS mode control bits.

00 : Fastest

01 : Fast

10 : Normal

11 : Slow

RND channel up calibration speed at BS mode control bits.

00 : Fastest

01 : Fast

10 : Normal

11 : Slow

8.2.12 LED luminance control register

Type: R/W

Address

43h

Register Name

PWM_ctrl1

PWM_ctrl2

PWM_ctrl3

PWM_ctrl4

Bit7

Bit6

Bit5

Bit4

Bit3

Bit2

Bit1

Bit0

pwm_d2

pwm_d1

pwm_d4

pwm_d6

pwm_d8

pwm_d3

pwm_d5

pwm_d7

44h

45h

46h

Description

LED luminance can be controlled by “PWM_ctrlx” register.

Bit name

Reset value

Function

The LED PWM control bits of Dx port.

0000 : The minimum low duty

pwm_dx

0000

1111 : The maximum low duty

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ANSG08 (8-CH Auto Sensitivity Calibration Capacitive Touch Sensor)

8.2.13 Port mode control register

Type: R/W

Address

Register Name

port_mode

Bit7

Bit6

Bit5

Bit4

Bit3

Bit2

Bit1

Bit0

pmod_d

8

pmod_d

7

pmod_d

6

pmod_d

5

pmod_d

4

pmod_d

3

pmod_d

2

pmod_d

1

4Fh

Description

This register controls the mode of output port.

Bit name

Reset value

Function

Select the output port operation mode of each channels.

0 : Parallel output mode

pmod_dx

0

1 : LED drive mode

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ANSG08 (8-CH Auto Sensitivity Calibration Capacitive Touch Sensor)

8.2.14 Sense, reference count read register

Type: R

Address

50h

Register Name

rd_ch_H1

Bit7

Bit6

Bit5

Bit4

Bit3

Bit2

Bit1

Bit0

rd_ch_H1

rd_ch_L1

-

rd_ch_L1

51h

touch_percent[25:18]

touch_percent[17:10]

touch_percent[9:2]

rd_ch_H2

Percent_H

Percent_M

Percent_L

rd_ch_H2

52h

53h

54h

56h

rd_ch_L2

-

rd_ch_L2

57h

Description

ANSG08 provides the special function to read sense count of each channels or reference count.

Bit name

Reset value

Function

Read channel indication register.

00000001 : D2 channel

00000010 : R.N.D channel

00000100 : CS1 channel

00001000 : CS2 channel

00010000 : CS3 channel

00100000 : CS4 channel

01000000 : CS5 channel

10000000 : CS6 channel

rd_ch_H1

Read only

Read channel indication register.

01 : CS7 channel

rd_ch_L1

Read only

10 : CS8 channel

The percent data of RND channel and sense channels.

[25:18] bits of the touch percent data.

touch_percent[24:17]

touch_percent[16:9]

touch_percent[8:1]

Read only

The percent data of RND channel and sense channels.

[17:10] bits of the touch percent data.

The percent data of RND channel and sense channels.

[9:2] bits of the touch percent data.

Read channel indication register.

00000001 : D2 channel

00000010 : R.N.D channel

00000100 : CS1 channel

00001000 : CS2 channel

00010000 : CS3 channel

00100000 : CS4 channel

01000000 : CS5 channel

10000000 : CS6 channel

rd_ch_H2

rd_ch_L2

Read only

Read channel indication register.

01 : CS7 channel

10 : CS8 channel

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ANSG08 (8-CH Auto Sensitivity Calibration Capacitive Touch Sensor)

8.2.15 EEPROM control register (EEPROM command)

Type: R/W

Address

5Ch

Register Name

prom_cmd

Bit7

Bit6

Bit5

Bit4

Bit3

Bit2

Bit1

Bit0

0

write_all

read_all

0

wr_start

rd_start

Description

EEPROM commands to access.

Bit name

Reset value

Function

Reading the EEPROM start command bit.

0 : Don‟t start

rd_start

0

1 : Start to read

Writing on the EEPROM start command bit.

0 : Don‟t write

wr_start

read_all

write_all

0

1 : Start to write

Unit of reading the EEPROM control bit.

0 : 1-Byte reading

1 : All bytes of the EEPROM reading

Unit of writing on the EEPROM control bit.

0 : No writing

1 : All bytes of selected EEPROM cell writing

8.2.16 EEPROM data address select register

Type: R/W

Address

5Fh

Register Name

prom_addr

Bit7

Bit6

Bit5

Bit4

Bit3

Bit2

Bit1

Bit0

-

eeprom_addr

Description

Register for the specific address of the EEPROM.

User can read the EEPROM data of specific address by leaving „read_all‟ bit in the „prom_cmd‟ register „0‟.

Bit name

Reset

Function

Select specific address of EEPROM.

eeprom_addr[6:0] : Address

prom_addr

00000000

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ANSG08 (8-CH Auto Sensitivity Calibration Capacitive Touch Sensor)

8.2.17 EEPROM data register to read

Type: R

Address

61h

Register Name

prom_rd_data

Bit7

Bit6

Bit5

Bit4

Bit3

Bit2

Bit1

Bit0

eeprom_rd_data

Description

The data register for reading data from specific address of selected EEPROM cell.

Bit name

Reset

Function

Data register for reading the EEPROM data.

eeprom_rd_data [7:0] : Data

prom_rd_data

---- ----

8.2.18 EEPROM Set 2

Type: R/W

Address

7Fh

Register Name

prom_set2

Bit7

Bit6

Bit5

Bit4

Bit3

Bit2

Bit1

Bit0

eeprom_set2

Description

The second flag byte for the valid data of EEPROM. If the data of this address isn‟t 0x55 on EEPROM, all data

on EEPROM are invalid. So, the data of this address must be written by 0x55 if user wants to change the reset

value using EEPROM.

Bit name

Reset value

Function

01010101 : EEPROM data is valid

others : EEPROM data is invalid

eeprom_set2

00000000

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ANSG08 (8-CH Auto Sensitivity Calibration Capacitive Touch Sensor)

9 Recommended Circuit Diagram

9.1 ANSG08QL (24 QFN)

ANSG08QL (24 QFN) Application Example Circuit

ANSG08QL is reset by internal reset circuit. VDD voltage rising time should be shorter than 100msec

for proper operation.

Normally, R.N.D pin dose not connection to anywhere. But, in radio frequency noise environment,

R.N.D pin must form a pattern line on PCB.

The VDD periodic voltage ripple over 50mV and the ripple frequency is lower than 10 kHz can cause

wrong sensitivity calibration. To prevent above problem, power (VDD, GND) line of touch circuit

should be separated from other circuit. Especially LED driver power line or digital switching circuit

power line certainly should be treated to be separated from touch circuit.

The CS patterns also should be routed as short as possible and the width of line might be about 0.25mm.

Parallel capacitor of CS pin could be useful in case detail sensitivity mediation is required such as for

complementation sensitivity difference between channels.

Serial connection resistor of CS pins may be used to avoid mal-function from external surge and ESD.

The capacitor that is between VDD and GND is an obligation. It should be located as close as possible

from ANSG08QL.

The CS pattern routing should be formed by bottom metal (opposite metal of touch PAD).

The empty space of PCB must be filled with GND pattern to strengthen GND pattern and to prevent

external noise from interfere with sensing frequency.

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9.2 Example – Power Line Split Strategy PCB Layout

A. Not split power Line (Bad power line design)

The noise that is generated by AC load or relay can be loaded at 5V power line.

A big inductance might be appeared in case of the connection line between main board and

display board is too long, moreover the voltage ripple could be generated by LED (LCD)

display driver at VDD (5V).

B. Split power Line (One 5V regulator used) – Recommended

C. Split power Line (Separated 5V regulator used) – Strongly recommended

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10 MECHANICAL DRAWING

10.1 Mechanical Drawing of ANSG08QL (24 QFN Full lead type)

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10.2 Mechanical Drawing of ANSG08SL (24 SOP)

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10.3 Mechanical Drawing of ANSG08SH (16 SOP)

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ANSG08 (8-CH Auto Sensitivity Calibration Capacitive Touch Sensor)

11 MARKING DESCRIPTION

11.1 Marking Description of ANSG08QL (24 QFN)

Company Code : ADS

AD Semiconductor

Device Code : ANSG 8

Channel Number

Touch Switch Group

Customer / Assembly Lot Code : CC TTT

Assembly Lot Code

Customer Code

Year / Week Code : YY WW

Manufacturing Week

Manufacturing Year

11.2 Marking Description of ANSG08SL (24 SOP)

Company Code : ADS

AD Semiconductor

Device Code : ANSG 08 SL

Package Type

Channel Number

Touch Switch Group

Year / Week Code : YY WW

Manufacturing Week

Manufacturing Year

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11.3 Marking Description of ANSG08SH (16 SOP)

Company Code : ADS

AD Semiconductor

Device Code : ANSG 08 SH

Package Type

Channel Number

Touch Switch Group

Year / Week Code : YY WW

Manufacturing Week

Manufacturing Year

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ANSG08 (8-CH Auto Sensitivity Calibration Capacitive Touch Sensor)

NOTES:

LIFE SUPPORT POLICY

AD SEMICONDUCTOR’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN

LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE

PRESIDENT AND GENERAL COUNSEL OF AD SEMICONDUCTOR CORPORATION

The ADS logo is a registered trademark of ADSemiconductor

www.adsemicon.com

www.adsemicon.co.kr

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型号：	ANSG08SL
厂家：	ADI
描述：	韩国ADS公司八键点对点+I方C双通讯模式触摸按键IC
文件：	总37页 (文件大小：1097K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

ANSG08SL [ADI]

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