CMP402GSZ [ADI]

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CMP402GSZ
型号: CMP402GSZ
厂家: ADI    ADI
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23 ns and 65 ns  
Low Voltage Comparators  
a
CMP401/CMP402  
FUNCTIO NAL BLO CK D IAGRAM  
FEATURES  
23 ns or 65 ns Propagation Delay  
Single-Supply Operation  
Com patible w ith +3 V and +5 V Logic  
Separate Input and Output Sections  
Low Pow er  
V
=
V
=
ANALOG+  
+0V TO +5V  
DIGITAL  
+3V OR +5V  
IN+  
IN–  
OUTPUT  
Wide Input Range: 5 V to +3.9 V  
APPLICATIONS  
Battery Operated Instrum entation  
Line Receivers  
V
=
ANALOG–  
+0V TO –5V  
Level Translators  
NOTE: (V  
) – (V ) 3V  
ANALOG+ ANALOG–  
Read Channel Detection  
GENERAL D ESCRIP TIO N  
2v  
T he CMP401 and CMP402 are 23 ns and 65 ns quad comp-  
arators with separate input and output supplies. Separate supplies  
enable the input stage to be operated from +3 volts to as high as  
±6 volts. The output can be supplied with either +3 volts or  
+5 volts as determined by the interface logic or available supplies.  
Independent input and output supplies combined with fast prop-  
agation make the CMP401 and CMP402 excellent choices for  
interfacing to portable instrumentation.  
50mV  
100  
90  
10  
T he CMP401 and CMP402 are specified over the extended  
industrial (–40°C to +125°C) temperature range. Both are  
available in 16-pin plastic DIP or narrow SO-16 surface mount  
packages. Consult factory for 16-lead T SSOP availability.  
0%  
10nS  
CMP401: 20 MHz Noninverting Switching. VIN = ±100 m V  
REV. 0  
Inform ation furnished by Analog Devices is believed to be accurate and  
reliable. However, no responsibility is assum ed by Analog Devices for its  
use, nor for any infringem ents of patents or other rights of third parties  
which m ay result from its use. No license is granted by im plication or  
otherwise under any patent or patent rights of Analog Devices.  
© Analog Devices, Inc., 1995  
One Technology Way, P.O. Box 9106, Norw ood, MA 02062-9106, U.S.A.  
Tel: 617/ 329-4700  
Fax: 617/ 326-8703  
CMP401/CMP402–SPECIFICATIONS  
ELECTRICAL SPECIFICATIONS (@ V+ANA = V+DIG = +5.0 V, V = 0.1 V, 40؇C T +125؇C unless otherwise noted)  
CM  
A
P aram eter  
Sym bol  
Conditions  
Min  
Typ  
Max  
Units  
INPUT CHARACT ERIST ICS  
Offset Voltage1  
VOS  
VOS  
T A = +25°C  
3
4
mV  
mV  
mV  
µA  
Offset Voltage1  
Hysteresis  
Input Bias Current  
2
IB  
T A = +25°C  
3
IB  
4
µA  
Input Offset Current  
IOS  
±3  
+4.0  
µA  
V
dB  
V/mV  
µV/°C  
Input Common-Mode Voltage Range  
Common-Mode Rejection  
Large Signal Voltage Gain  
Offset Voltage Drift  
VCM  
CMRR  
AVO  
0
60  
0.1 V VCM 3.9 V  
RL = 10 kΩ  
10  
1
VOS/T  
OUT PUT CHARACT ERIST ICS  
Output High Voltage  
Output Low Voltage  
VOH  
VOL  
IOH = –3.2 mA  
IOL = 3.2 mA  
4.6  
60  
V
V
0.2  
POWER SUPPLY  
Power Supply Rejection Ratio  
Analog Supply Current – CMP401  
Digital Supply Current – CMP401  
Analog Supply Current – CMP401  
Digital Supply Current – CMP401  
Analog Supply Current – CMP402  
Digital Supply Current – CMP402  
Analog Supply Current – CMP402  
Digital Supply Current – CMP402  
PSRR  
IANA  
IDIG  
IANA  
IDIG  
IANA  
IDIG  
IANA  
IDIG  
V+ANA and V+DIG +2.7 V to +6 V  
T A = +25°C  
VO = 0 V, RL = , T A = +25°C  
dB  
6.5  
2.0  
8.0  
2.25  
1.4  
2.0  
1.75  
2.25  
mA  
mA  
mA  
mA  
mA  
mA  
mA  
mA  
VO = 0 V, RL = ∞  
T A = +25°C  
VO = 0 V, RL = , T A = +25°C  
VO = 0 V, RL = ∞  
DYNAMIC PERFORMANCE  
Propagation Delay – CMP401  
tP  
tP  
100 mV Step with 20 mV OD,  
T
A = +25°C  
100 mV Step with 5 mV OD,  
A = +25°C  
17  
33  
23  
ns  
Propagation Delay – CMP401  
T
ns  
ns  
Propagation Delay – CMP401  
Propagation Delay – CMP402  
tP  
tP  
100 mV Step with 20 mV OD  
100 mV Step with 20 mV OD,  
T A = +25°C  
30  
65  
54  
60  
ns  
Propagation Delay – CMP402  
Propagation Delay – CMP402  
tP  
tP  
100 mV Step with 5 mV OD,  
T A = +25°C  
100 mV Step with 20 mV OD  
ns  
ns  
75  
ELECTRICAL SPECIFICATIONS (@ V = V = +3.0 V, V = 0.1 V, T = +25؇C unless otherwise noted)  
ANA  
DIG  
CM  
A
P aram eter  
Sym bol  
Conditions  
Min  
Typ  
Max  
Units  
INPUT CHARACT ERIST ICS  
Offset Voltage1  
Input Common-Mode Voltage Range  
Input Differential Voltage Range  
Common-Mode Rejection  
VOS  
VCM  
VDIFF  
CMRR  
4.5  
+2.0  
mV  
V
V
0
±2.0  
60  
0.1 V VCM 1.9 V  
dB  
OUT PUT CHARACT ERIST ICS  
Output High Voltage  
Output Low Voltage  
VOH  
VOL  
IOH = –3.2 mA  
IOL = 3.2 mA  
2.6  
60  
V
V
0.25  
POWER SUPPLY  
Power Supply Rejection Ratio  
Analog Supply Current – CMP401  
Digital Supply Current – CMP401  
Analog Supply Current – CMP402  
Digital Supply Current – CMP402  
PSRR  
IANA  
IDIG  
IANA  
IDIG  
V+ANA and V+DIG +2.7 V to +6 V  
VO = 0 V, RL = ∞  
dB  
6
1
1.2  
1
mA  
mA  
mA  
mA  
VO = 0 V, RL = ∞  
DYNAMIC PERFORMANCE  
Propagation Delay – CMP401  
Propagation Delay – CMP402  
tP  
tP  
100 mV Step with 20 mV OD  
100 mV Step with 20 mV OD  
32  
70  
ns  
ns  
–2–  
REV. 0  
CMP401/CMP402  
(@ V±ANA = ±5 V, V = +5.0 V, T = +25؇C unless otherwise noted)  
ELECTRICAL SPECIFICATIONS  
P aram eter  
DIG  
A
Sym bol  
Conditions  
Min  
Typ  
Max  
Units  
INPUT CHARACT ERIST ICS  
Offset Voltage1  
Input Common-Mode Voltage Range  
Input Differential Voltage Range  
Common-Mode Rejection  
Offset Voltage Drift  
VOS  
VCM  
VDIFF  
CMRR  
VOS/T  
VCM = 0 V  
3
mV  
V
V
dB  
µV/°C  
–5.0  
±8.0  
60  
+4.0  
–4.9 V VCM 3.9 V  
1
5
POWER SUPPLY  
Power Supply Rejection Ratio  
Analog Supply Current – CMP401  
Digital Supply Current – CMP401  
Analog Supply Current – CMP402  
Digital Supply Current – CMP402  
PSRR  
IANA  
IDIG  
IANA  
IDIG  
V±ANA ±3 V to ±6 V  
VO = 0 V, RL = ∞  
VO = 0 V, RL = ∞  
60  
dB  
6.5  
2.0  
2.0  
2.0  
mA  
mA  
mA  
mA  
DYNAMIC PERFORMANCE  
Propagation Delay – CMP401  
Propagation Delay – CMP402  
tP  
tP  
100 mV Step with 20 mV OD  
100 mV Step with 20 mV OD  
23  
65  
ns  
ns  
NOT ES  
1Offset voltage is defined as (VOS+ + VOS–)/2.  
Specifications subject to change without notice.  
REV. 0  
–3–  
CMP401/CMP402  
ABSO LUTE MAXIMUM RATINGS1  
DICE CHARACTERISTICS  
T otal Analog Supply Voltage . . . . . . . . . . . . . . . . . . . . . +16 V  
Digital Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . +7 V  
Analog Positive Supply—Digital Positive Supply . . . . –200 mV  
Input Voltage2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±7 V  
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . ±9 V  
Output Short-Circuit Duration to GND . . . . . . . . . Indefinite  
Storage T emperature Range  
P, S, RU Package . . . . . . . . . . . . . . . . . . . –65°C to +150°C  
Operating T emperature Range  
CMP401G, CMP402G . . . . . . . . . . . . . . –40°C to +125°C  
Junction T emperature Range  
2
1
16 15  
3
4
5
14  
13  
12  
6
7
11  
10  
8
9
P, S, RU Package . . . . . . . . . . . . . . . . . . . –65°C to +150°C  
Lead T emperature Range (Soldering, 60 sec) . . . . . . . +300°C  
CMP401/CMP402 Die Size 0.065 × 0.069 inch, 4,485 sq. m ils  
Substrate (Die Backside) Is Connected to V+  
Transistor Count 104.  
3
P ackage Type  
JC  
Units  
JA  
16-Pin Plastic DIP (P)  
16-Pin SO (S)  
16-Lead T SSOP (RU)  
90  
113  
180  
47  
37  
37  
°C/W  
°C/W  
°C/W  
V+ DIG  
V+ ANA  
NOT ES  
1Absolute maximum ratings apply to both DICE and packaged parts, unless  
otherwise noted.  
2T he analog input voltage is equal to ±7 volts or the analog supply voltage,  
whichever is less.  
–IN  
+IN  
OUT  
3θJA is specified for the worst case conditions, i.e., θJA is specified for device in socket  
for P-DIP, and θJA is specified for device soldered in circuit board for SOIC and  
T SSOP packages.  
O RD ERING GUID E  
DIG GND  
V– ANA  
Tem perature  
Range  
P ackage  
D escription  
P ackage  
O ption  
Model  
Figure 1. Sim plified Schem atic  
CMP401GP  
CMP401GS  
–40°C to +125°C 16-Pin Plastic DIP N-16  
–40°C to +125°C 16-Pin SOIC  
R-16A  
RU-16  
CMP401GRU –40°C to +125°C 16-Lead T SSOP  
CMP402GP  
CMP402GS  
–40°C to +125°C 16-Pin Plastic DIP N-16  
–40°C to +125°C 16-Pin SOIC  
R-16A  
RU-16  
CMP402GRU –40°C to +125°C 16-Lead T SSOP  
CMP 401/CMP 402 P IN CO NFIGURATIO NS  
16-Lead  
TSSO P  
16-Lead Epoxy D IP  
(P Suffix)  
16-Lead Nar r ow-SO  
(S Suffix)  
(RU Suffix)  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
OUT B  
OUT A  
V+ DIG  
V+ ANA  
–IN A  
OUT C  
OUT D  
DIG GND  
V– ANA  
–IN D  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
OUT B  
OUT A  
V+ DIG  
V+ ANA  
–IN A  
OUT C  
OUT D  
DIG GND  
V– ANA  
–IN D  
1
16  
OUT B  
OUT A  
V+ DIG  
V+ ANA  
–IN A  
+IN A  
–IN B  
+IN B  
OUT C  
OUT D  
DIG GND  
V– ANA  
–IN D  
+IN D  
–IN C  
CMP401/  
402  
CMP401/  
402  
TOP VIEW  
(Not toScale)  
TOP VIEW  
(Not toScale)  
+IN C  
11 +IN D  
+IN A  
11 +IN D  
+IN A  
8
9
–IN C  
+IN C  
10  
9
–IN B  
–IN C  
+IN C  
10  
9
–IN B  
+IN B  
+IN B  
CAUTIO N  
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily  
accumulate on the human body and test equipment and can discharge without detection.  
Although the CMP401/CMP402 features proprietary ESD protection circuitry, permanent damage  
may occur on devices subjected to high energy electrostatic discharges. T herefore, proper ESD  
precautions are recommended to avoid performance degradation or loss of functionality.  
WARNING!  
ESD SENSITIVE DEVICE  
–4–  
REV. 0  
Typical Performance Characteristics–CMP401/CMP402  
40  
35  
30  
25  
20  
15  
10  
5
110  
90  
80  
70  
60  
50  
40  
30  
20  
40  
35  
30  
25  
20  
15  
10  
+V = +V  
AN DIG  
= +5V  
+V = +V  
AN  
= +5V  
+V = +V  
AN DIG  
= +5V  
DIG  
–V = 0V TO –5V  
AN  
–V = 0V TO –5V  
AN  
–V = 0V TO –5V  
AN  
R
50, C = 15pF  
R
T
50, C = 15pF  
S
R
T
50, C = 15pF  
L
S
L
S
L
= +25°C  
= +25°C  
A
A
+P  
DELAY  
+P  
DELAY  
+P  
DELAY  
–P  
DELAY  
–P  
DELAY  
–P  
DELAY  
0
0
10  
20  
30  
40  
50  
0
10  
20  
30  
40  
50  
–50 –25  
0
25  
50  
75  
100 125  
OVERDRIVE – mV  
OVERDRIVE – mV  
TEMPERATURE – °C  
Figure 2. CMP401 Propagation Delay  
vs. Overdrive  
Figure 3. CMP402 Propagation Delay  
vs. Overdrive  
Figure 4. CMP401 Propagation Delay  
vs. Tem perature – 5 m V OD  
90  
30  
25  
20  
60  
+V = +V  
AN  
= +5V  
DIG  
–V = 0V TO –5V  
AN  
+P  
DELAY  
50  
80  
70  
60  
50  
40  
30  
R
50, C = 15pF  
L
S
40  
+P  
–P  
DELAY  
+P  
DELAY  
–P  
DELAY  
15  
10  
5
30  
20  
10  
0
DELAY  
–P  
DELAY  
+V = +V  
AN  
= +5V  
+V = +V  
AN  
= +5V  
DIG  
DIG  
–V = 0V TO –5V  
AN  
–V = 0V TO –5V  
AN  
R
50, C = 15pF  
L
R
50, C = 15pF  
L
S
S
0
–50 –25  
0
25  
50  
75  
100 125  
–50 –25  
0
25  
50  
75  
100 125  
–50 –25  
0
25  
50  
75  
100 125  
TEMPERATURE – °C  
TEMPERATURE – °C  
TEMPERATURE – °C  
Figure 5. CMP402 Propagation Delay  
vs. Tem perature – 5 m V OD  
Figure 6. CMP401 Propagation Delay  
vs. Tem perature – 20 m V OD  
Figure 7. CMP402 Propagation Delay  
vs. Tem perature – 20 m V OD  
90  
80  
120  
+V = +V  
AN  
= +5V  
DIG  
+V = +V  
AN  
= +5V  
+V = +V  
AN DIG  
DIG  
80  
–V = 0V TO –5V  
AN  
70  
60  
50  
40  
30  
20  
10  
0
–V = 0V TO –5V  
AN  
–V = 0V TO –5V  
AN  
100  
80  
60  
40  
20  
0
T
= +25°C  
A
70  
60  
50  
40  
30  
20  
10  
0
R
T
50, C = 15pF  
T
= +25°C  
S
L
A
= +25°C  
A
+P  
DELAY  
+P  
DELAY  
+P  
DELAY  
–P  
DELAY  
–P  
DELAY  
–P  
DELAY  
0
2
3
4
5
6
10  
100  
1k  
10k  
100k  
10  
100  
1k  
10k  
100k  
POSITIVE SUPPLY VOLTAGE – Volts  
SOURCE RESISTANCE – Ω  
SOURCE RESISTANCE – Ω  
Figure 9. CMP402 Propagation Delay  
vs. Source Resistance – 20 m V OD  
Figure 8. CMP401 Propagation Delay  
vs. Source Resistance – 20 m V OD  
Figure 10. CMP401 Propagation Delay  
vs. Supply Voltage – 20 m V OD  
REV. 0  
–5–  
CMP401/CMP402  
50  
45  
40  
35  
30  
25  
20  
15  
10  
5
110  
90  
80  
70  
60  
50  
40  
30  
20  
10  
0
+V = +V  
AN DIG  
100  
90  
80  
70  
60  
50  
40  
30  
–V = 0V TO –5V  
AN  
R
T
50, C = 15pF  
S
L
+P  
DELAY  
= +25°C  
A
+P  
DELAY  
–P  
DELAY  
–P  
DELAY  
+P  
DELAY  
+V = +V  
AN DIG  
=
+5V  
+V = +V = +5V  
AN DIG  
–P  
–V = 0V TO –5V  
AN  
–V = 0V TO –5V  
AN  
DELAY  
R
= 50, T = +25°C  
R 50, T = +25°C  
S A  
S
A
0
0
100  
200  
300  
400  
500  
1
2
3
4
5
6
0
100  
200  
300  
400  
500  
CAPACITIVE LOAD – pF  
POSITIVE SUPPLY VOLTAGE – Volts  
CAPACITIVE LOAD – pF  
Figure 11. CMP402 Propagation Delay  
vs. Supply Voltage – 20 m V OD  
Figure 12. CMP401 Propagation Delay Figure 13. CMP402 Propagation Delay  
vs. Capacitive Load  
vs. Capacitive Load  
80  
70  
60  
50  
40  
1000  
1200  
+V = +V  
AN  
DIG  
+V = +V  
AN DIG  
T
= +25°C  
A
–V = 0V TO –5V  
AN  
–V = 0V TO –5V  
AN  
1000  
800  
600  
400  
200  
0
R
T
50, C = 15pF  
S
L
R
T
50, C = 15pF  
S
L
100  
10  
1
= +25°C  
A
= +25°C  
A
RAIL  
–SLEW  
+SLEW  
+P  
DELAY  
+RAIL  
30  
–P  
DELAY  
20  
10  
0
0.1  
1
2
3
4
5
6
1
2
3
4
5
6
1
10  
100  
1000  
10000 100000  
POSITIVE SUPPLY VOLTAGE – Volts  
SUPPLY VOLTAGE – Volts  
LOAD CURRENT – µA  
Figure 14. CMP401/CMP402 Slew Rate  
vs. Positive Supply Voltage  
Figure 15. CMP401 Propagation Delay Figure 16. CMP401/CMP402 Delta  
vs. Supply Voltage  
Output Swing from Power Supplies vs.  
Load Current  
2.5  
2.0  
1.5  
1
2.0  
2.0  
1.6  
1.6  
+5V  
+5V  
1.2  
0.8  
1.2  
0.8  
0.5  
0
0.4  
+3V  
0.0  
0.4  
+3V  
0.0  
–75 –50 –25  
0
25 50 75 100 125 150  
–75 –50 –25  
0
25 50 75 100 125 150  
–75 –50 –25  
0
25 50 75 100 125 150  
TEMPERATURE – °C  
TEMPERATURE – °C  
TEMPERATURE – °C  
Figure 17. CMP401/CMP402 Input  
Offset Voltage vs. Tem perature  
Figure 18. CMP401 Digital Supply  
Current vs. Tem perature  
Figure 19. CMP402 Digital Supply  
Current vs. Tem perature  
–6–  
REV. 0  
CMP401/CMP402  
1.6  
1.2  
0.8  
0.4  
0.0  
1.6  
1.2  
0.8  
0.4  
0.0  
7.0  
6.0  
5.0  
4.0  
3.0  
2.0  
–40°C  
–40°C  
+25°C  
±5V  
+25°C  
+5V  
+125°C  
+3V  
+125°C  
–75 –50 –25  
0
25 50 75 100 125 150  
1
2
3
4
5
1
2
3
4
5
DIGITAL SUPPLY VOLTAGE – V  
DIGITAL SUPPLY VOLTAGE – V  
TEMPERATURE – °C  
Figure 20. CMP401 Digital Supply  
Current vs. Digital Supply Voltage  
Figure 21. CMP402 Digital Supply  
Current vs. Digital Supply Voltage  
Figure 22. CMP401 Analog Supply  
Current vs. Tem perature  
1.4  
7.0  
6.0  
1.4  
±5V  
+125°C  
+5V  
+3V  
1.2  
1.0  
0.8  
0.6  
0.4  
1.2  
1.0  
0.8  
0.6  
0.4  
+125°C  
+25°C  
–40°C  
5.0  
4.0  
3.0  
2.0  
+25°C  
–40°C  
–75 –50 –25  
0
25 50 75 100 125 150  
1
2
3
4
5
6
7
8
9
10  
1
2
3
4
5
6
7
8
9
10  
TEMPERATURE – °C  
ANALOG SUPPLY VOLTAGE – V  
ANALOG SUPPLY VOLTAGE – V  
Figure 23. CMP402 Analog Supply  
Current vs. Tem perature  
Figure 24. CMP401 Analog Supply  
Current vs. Analog Supply Voltage  
Figure 25. CMP402 Analog Supply  
Current vs. Analog Supply Voltage  
REV. 0  
–7–  
CMP401/CMP402  
O UTLINE D IMENSIO NS  
D imensions shown in inches and (mm).  
16-P in Epoxy D IP  
(N-16)  
0.840 (21.33)  
0.745 (18.93)  
16  
9
8
0.280 (7.11)  
0.240 (6.10)  
1
0.325 (8.25)  
0.300 (7.62)  
0.195 (4.95)  
0.115 (2.93)  
0.060 (1.52)  
0.015 (0.38)  
PIN 1  
0.210 (5.33)  
MAX  
0.130  
(3.30)  
MIN  
0.160 (4.06)  
0.115 (2.93)  
0.015 (0.381)  
0.070 (1.77) SEATING  
0.100  
(2.54)  
BSC  
0.022 (0.558)  
0.014 (0.356)  
0.008 (0.204)  
PLANE  
0.045 (1.15)  
16-P in Nar r ow-SO IC  
(R-16A)  
16  
1
9
0.1574 (4.00)  
0.1497 (3.80)  
PIN 1  
0.2440 (6.20)  
0.2284 (5.80)  
8
0.3937 (10.00)  
0.3859 (9.80)  
0.0196 (0.50)  
x 45  
°
0.0099 (0.25)  
0.0688 (1.75)  
0.0532 (1.35)  
8
0
°
°
0.0098 (0.25)  
0.0040 (0.10)  
0.0500 (1.27)  
0.0160 (0.41)  
0.0500 (1.27)  
BSC  
0.0192 (0.49)  
0.0138 (0.35)  
0.0099 (0.25)  
0.0075 (0.19)  
16-Lead TSSO P  
(RU-16)  
0.201 (5.10)  
0.193 (4.90)  
16  
9
1
8
PIN 1  
0.006 (0.15)  
0.002 (0.05)  
0.0433  
(1.10)  
MAX  
0.028 (0.70)  
0.020 (0.50)  
8°  
0°  
0.0118 (0.30)  
0.0075 (0.19)  
0.0256  
(0.65)  
BSC  
SEATING  
PLANE  
0.0079 (0.20)  
0.0035 (0.090)  
–8–  
REV. 0  

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