EV1HMC7992LP3D [ADI]
EVAL BOARD FOR HMC7992;
| 型号： | EV1HMC7992LP3D |
| 厂家： | 
ADI |
| 描述： | EVAL BOARD FOR HMC7992 |
| 文件： | 总12页 (文件大小：261K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Nonreflective, Silicon SP4T Switch,
0.1 GHz to 6.0 GHz
Data Sheet
HMC7992
FEATURES
FUNCTIONAL BLOCK DIAGRAM
GND
RFC
GND
GND
Nonreflective, 50 Ω design
16
15
14
13
High isolation: 45 dB typical at 2 GHz
Low insertion loss: 0.6 dB at 2 GHz
High power handling
33 dBm through path
27 dBm terminated path
HMC7992
1
12
11
10
9
RF1
GND
GND
RF2
RF4
GND
GND
RF3
2
3
4
High linearity
1 dB compression (P1dB): 35 dBm typical
Input third-order intercept (IIP3): 58 dBm typical
ESD rating: 2 kV human body model (HBM), Class 2
Single positive supply: 3.3 V to 5.0 V
Standard TTL-, CMOS-, and 1.8 V-compatible control
16-lead, 3 mm × 3 mm LFCSP package (9 mm2)
Pin compatible with the HMC241ALP3E
2:4 TTL DECODER
5
6
7
8
PACKAGE
BASE
GND
V
B
A
DD
GND
APPLICATIONS
Figure 1.
Cellular/4G infrastructure
Wireless infrastructure
Automotive telematics
Mobile radios
Test equipment
GENERAL DESCRIPTION
The HMC7992 is a general-purpose, nonreflective, 0.1 GHz to
6.0 GHz, silicon, single-pole, four-throw (SP4T) switch in a
leadless, surface-mount package. The switch is ideal for cellular
infrastructure applications, offers high isolation of 45 dB typical
at 2 GHz, and a low insertion loss of 0.6 dB at 2 GHz. It offers
excellent power handling capability up to 6.0 GHz, with input
power of 1 dB compression point (P1dB) of 35 dBm at 5 V
operation. The HMC7992 has good low frequency input power
handling below 0.1 GHz and can operate well down to 10 kHz,
with a typical 1 dB compression of 21 dBm (see Figure 21) and
an IIP3 of 37 dBm (see Figure 22) at 1 MHz.
The on-chip circuitry allows the HMC7992 to operate at a single,
positive supply voltage range from 3.3 V to 5 V, and as well as a
single, positive control voltage from 0 V to 1.8 V/3.3 V/5.0 V. A
2:4 decoder integrated in the switch requires only two controlled
input signals, with a positive control voltage range from 0 V to
1.8 V/3.3 V/5.0 V, to select one of the four radio frequency (RF)
paths.
Rev. A
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Tel: 781.329.4700 ©2016–2019 Analog Devices, Inc. All rights reserved.
Technical Support
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HMC7992
Data Sheet
TABLE OF CONTENTS
Features .............................................................................................. 1
Insertion Loss, Isolation, and Return Loss ................................6
Applications....................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description......................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Absolute Maximum Ratings............................................................ 4
ESD Caution.................................................................................. 4
Pin Configuration and Function Descriptions............................. 5
Interface Schematics..................................................................... 5
Typical Performance Characteristics ............................................. 6
Input Compression and Input Third-Order Intercept
(0.1 GHz to 6.0 GHz)....................................................................8
Input Compression and Input Third-Order Intercept (10 kHz
to 1 GHz)........................................................................................9
Theory of Operation ...................................................................... 10
Applications Information.............................................................. 11
Outline Dimensions....................................................................... 12
Ordering Guide .......................................................................... 12
REVISION HISTORY
8/2019—Rev. 0 to Rev. A
Changes to Specifications Section and Table 1............................. 3
Deleted Table 2 and Table 3; Renumbered Sequentially ............. 4
Changes to Table 3............................................................................ 5
Moved Table 4 ................................................................................. 10
Deleted Table 5................................................................................ 10
Changes to Ordering Guide .......................................................... 12
1/2016—Revision 0: Initial Version
Rev. A | Page 2 of 12
Data Sheet
HMC7992
SPECIFICATIONS
VDD = 3.3 V to 5.0 V, VCTL = 0 V/VDD, TCASE = 25°C, 50 Ω system, unless otherwise noted.
Table 1.
Parameter
Symbol
Test Conditions/Comments
0.1 GHz to 2.0 GHz
2.0 GHz to 4.0 GHz
Min
Typ
0.6
0.7
1.0
Max
0.9
1.1
Unit
dB
dB
INSERTION LOSS
4.0 GHz to 6.0 GHz
1.5
dB
ISOLATION
RFC to RF1to RF4 (Worst Case)
0.1 GHz to 2.0 GHz
2.0 GHz to 4.0 GHz
4.0 GHz to 6.0 GHz
40
32
25
45
37
30
dB
dB
dB
RETURN LOSS
On State
0.1 GHz to 2.0 GHz
2.0 GHz to 4.0 GHz
4.0 GHz to 6.0 GHz
0.1 GHz to 2.0 GHz
0.4 GHz to 1.0 GHz
1.0 GHz to 6.0 GHz
25
24
17
7
15
20
dB
dB
dB
dB
dB
dB
Off State
SWITCHING SPEED
Rise Time and Fall Time
On Time and Off Time
tRISE, tFALL
tON, tOFF
10% to 90% of RF output
50% of VCTL to 90% of RF output
50% VCTL to 0.1 dB margin of final RFOUT
0.1 GHz to 6.0 GHz
VDD = 5 V
VDD = 3.3 V
VDD = 5 V
VDD = 3.3 V
30
150
320
ns
ns
ns
RADIO FREQUENCY (RF) SETTLING TIME
INPUT POWER COMPRESSION
1 dB Compression
P1dB
P0.1dB
IIP3
35
33
33
31
dB
dB
dB
dB
0.1 dB Compression
INPUT THIRD-ORDER INTERCEPT
0.1 GHz to 6.0 GHz, two-tone input power =
14 dBm/tone
VDD = 5 V
VDD = 3.3 V
58
56
dBm
dBm
DIGITAL CONTROL VOLTAGES
Low Voltage
<1 μA typical
VIL
VIH
IDD
VDD = 3.3 V ( 5% VDD)
VDD = 5 V ( 5% VDD)
VDD = 3.3 V ( 5% VDD)
VDD = 5 V ( 5% VDD)
0
0
1.15
1.55
0.85
1.2
3.3
V
V
V
V
High Voltage
5.0
BIAS AND SUPPLY CURRENT
VDD = 3.3 V
VDD = 5 V
0.16 0.20
0.18 0.23
mA
mA
RECOMMENDED OPERATING CONDITIONS
Bias Voltage Range
Control Voltage Range
Case Temperature Range
Maximum RF Input Power
Through Path
VDD
VCTL
TCASE
3.0
0
−40
5.4
VDD
+105
V
V
°C
0.1 GHz to 6.0 GHz
VDD/VCTL = 5 V, TCASE = 105°C
VDD/VCTL = 5 V, TCASE = −40°C to +85°C
VDD/VCTL = 3.3 V, TCASE = 105°C
VDD/VCTL = 3.3 V, TCASE = −40°C to +85°C
30
33
29
32
dBm
dBm
dBm
dBm
Terminated Path
Hot Switching
VDD/VCTL = 3.3 V to 5 V, TCASE = 105°C
VDD/VCTL = 3.3 V to 5 V, TCASE = 85°C
VDD/VCTL = 3.3 V to 5 V, TCASE = 25°C
VDD/VCTL = 3.3 V to 5 V, TCASE = −40°C
VDD/VCTL = 3.3 V to 5 V, TCASE = 105°C
VDD/VCTL = 3.3 V to 5 V, TCASE = −40°C to +85°C
21
24
27
27
24
27
dBm
dBm
dBm
dBm
dBm
dBm
Rev. A | Page 3 of 12
HMC7992
Data Sheet
ABSOLUTE MAXIMUM RATINGS
Table 2.
36
34
32
30
28
26
24
THROUGH AMR
Parameter
Rating
Bias Voltage Range (VDD)
Control Voltage Range (A, B)
−0.3 V to +5.5 V
−0.5 V to VDD + (+0.5 V)
RF Input Power,1 3.3 V to 5 V (see
Figure 2 and Figure 3)
Through Path
34 dBm
Terminated Path
28 dBm
Hot Switching
30 dBm
TERMINATED AMR
Channel Temperature
Storage Temperature Range
Maximum Peak Reflow Temperature
(MSL3)
135°C
−65°C to +150°C
260°C
0.1
1
10
FREQUENCY (GHz)
Thermal Resistance (Channel to
Package Bottom)
Through Path
Terminated Path
ESD Sensitivity
Figure 2. Maximum RF Input Power vs. Frequency
35
33
31
29
27
25
23
21
19
115°C
200°C
THROUGH (AT 85°C)
THROUGH (AT 105°C)
Human Body Model (HBM)
Charged Device Model (CDM)
2 kV (Class 2)
1.25 kV
1 For recommended operating conditions, see Table 1.
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.
TERMINATED (AT 85°C)
TERMINATED (AT 105°C)
0.1
1
10
FREQUENCY (GHz)
Figure 3. Power Derating vs. Frequency
ESD CAUTION
Rev. A | Page 4 of 12
Data Sheet
HMC7992
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
RF4
GND
GND
RF3
1
2
3
4
12 RF1
11 GND
HMC7992
TOP VIEW
10
9
GND
RF2
(Not to Scale)
NOTES
1. THE EXPOSED PAD MUST CONNECT
TO RF/DC GROUND.
Figure 4. Pin Configuration
Table 3. Pin Function Descriptions
Pin No.
Mnemonic
Description
1
RF4
RF Port 4. This pin is dc-coupled and matched to 50 Ω. A dc blocking capacitor is required on this pin.
2, 3, 5, 10, 11, GND
13, 14, 16
Ground. The package bottom has an exposed metal pad that must connect to the printed circuit board (PCB)
RF/dc ground. See Figure 5 for the GND interface schematic.
4
6
7
RF3
VDD
B
RF Port 3. This pin is dc-coupled and matched to 50 Ω. A dc blocking capacitor is required on this pin.
Supply Voltage.
Logic Control Input B. See Figure 6 for the control input interface schematic. See Table 4 and the
recommended input control voltages range in Table 1.
8
A
Logic Control Input A. See Figure 6 for the control input interface schematic. See Table 4 and the
recommended input control voltages range in Table 1.
9
12
15
RF2
RF1
RFC
EPAD
RF Port 2. This pin is dc-coupled and matched to 50 Ω. A dc blocking capacitor is required on this pin.
RF Port 1. This pin is dc-coupled and matched to 50 Ω. A dc blocking capacitor is required on this pin.
RF Common Port. This pin is dc-coupled and matched to 50 Ω. A dc blocking capacitor is required on this pin.
Exposed Pad. The exposed pad must connect to RF/dc ground.
INTERFACE SCHEMATICS
V
DD
A/B
GND
Figure 5. GND Interface Schematic
Figure 6. Logic Control (A/B) Interface Schematic
Rev. A | Page 5 of 12
HMC7992
Data Sheet
TYPICAL PERFORMANCE CHARACTERISTICS
INSERTION LOSS, ISOLATION, AND RETURN LOSS
0
0
–0.5
–1.0
–1.5
–2.0
–2.5
–0.5
–1.0
–1.5
–2.0
+105°C
+85°C
+25°C
–40°C
+105°C
+85°C
+25°C
–40°C
–2.5
0
1
2
3
4
5
6
7
8
0
1
2
3
4
5
6
7
8
FREQUENCY (GHz)
FREQUENCY (GHz)
Figure 7. Insertion Loss vs. Frequency for Various Temperatures, VDD = 5 V
Figure 10. Insertion Loss vs. Frequency for Various Temperatures,
VDD = 3.3 V
0
0
RFC TO RF1
RFC TO RF2
RFC TO RF3
RFC TO RF3
–10
–10
RFC TO RF4
RFC TO RF4
–20
–20
–30
–40
–50
–60
–70
–80
–90
–100
–30
–40
–50
–60
–70
–80
–90
–100
0
1
2
3
4
5
6
0
1
2
3
4
5
6
FREQUENCY (GHz)
FREQUENCY (GHz)
Figure 8. Isolation vs. Frequency, VDD = 3.3 V to 5 V, RFC to RF1 = On
Figure 11. Isolation vs. Frequency, VDD = 3.3 V to 5 V, RFC to RF2 = On
0
0
RFC TO RF1
RFC TO RF1
RFC TO RF2
RFC TO RF2
–10
–10
RFC TO RF4
RFC TO RF3
–20
–30
–40
–50
–60
–70
–80
–90
–100
–20
–30
–40
–50
–60
–70
–80
–90
–100
0
1
2
3
4
5
6
0
1
2
3
4
5
6
FREQUENCY (GHz)
FREQUENCY (GHz)
Figure 9. Isolation vs. Frequency, VDD = 3.3 V to 5 V, RFC to RF3 = On
Figure 12. Isolation vs. Frequency, VDD = 3.3 V to 5 V, RFC to RF4 = On
Rev. A | Page 6 of 12
Data Sheet
HMC7992
0
0
–5
RF1, RF2, RF3, AND RF4 = ON
RF1, RF2, RF3, AND RF4 = OFF
–5
–10
–15
–20
–25
–30
–35
–40
–10
–15
–20
–25
–30
–35
–40
0
1
2
3
4
5
6
0
1
2
3
4
5
6
FREQUENCY (GHz)
FREQUENCY (GHz)
Figure 13. Return Loss for RFC vs. Frequency, VDD = 3.3 V to 5 V
Figure 14. Return Loss for RF1, RF2, RF3, and RF4 vs. Frequency,
DD = 3.3 V to 5 V
V
Rev. A | Page 7 of 12
HMC7992
Data Sheet
INPUT COMPRESSION AND INPUT THIRD-ORDER INTERCEPT (0.1 GHz TO 6.0 GHz)
40
38
36
34
32
30
28
26
40
38
36
34
32
30
28
26
+105°C
+85°C
+25°C
–40°C
+105°C
+85°C
+25°C
–40°C
0
0
0
1
2
3
4
5
6
6
6
0
0
0
1
2
3
4
5
6
6
6
FREQUENCY (GHz)
FREQUENCY (GHz)
Figure 15. Input Compression 1 dB Point vs.
Frequency for Various Temperatures, VDD = 5 V
Figure 18. Input Compression 1 dB Point vs.
Frequency for Various Temperatures, VDD = 3.3 V
40
38
36
34
32
30
28
26
40
38
36
34
32
30
28
26
+105°C
+85°C
+25°C
–40°C
+105°C
+85°C
+25°C
–40°C
1
2
3
4
5
1
2
3
4
5
FREQUENCY (GHz)
FREQUENCY (GHz)
Figure 16. Input Compression 0.1 dB Point vs.
Frequency for Various Temperatures, VDD = 5 V
Figure 19. Input Compression 0.1 dB Point vs.
Frequency for Various Temperatures, VDD = 3.3 V
65
60
55
50
45
65
60
55
50
45
+105°C
+85°C
+25°C
–40°C
+105°C
+85°C
+25°C
–40°C
1
2
3
4
5
1
2
3
4
5
FREQUENCY (GHz)
FREQUENCY (GHz)
Figure 17. Input Third-Order Intercept (IIP3) Point vs.
Frequency for Various Temperatures, VDD = 5 V
Figure 20. Input Third-Order Intercept (IIP3) Point vs.
Frequency for Various Temperatures, VDD = 3.3 V
Rev. A | Page 8 of 12
Data Sheet
HMC7992
INPUT COMPRESSION AND INPUT THIRD-ORDER INTERCEPT (10 kHz TO 1 GHz)
40
35
30
25
20
15
10
65
60
55
50
45
40
35
30
25
P1dB
P0.1dB
0.01
0.1
1
10
10
100
0.01
0.1
1
10
10
100
FREQUENCY IN LOG SCALE (MHz)
FREQUENCY IN LOG SCALE (MHz)
Figure 21. Input Compression (P1dB and P0.1dB Points) vs. Frequency in
Log Scale, VDD = 5 V at 25°C
Figure 22. Input Third-Order Intercept (IIP3) vs. Frequency in Log Scale,
VDD = 5 V at 25°C
Rev. A | Page 9 of 12
HMC7992
Data Sheet
THEORY OF OPERATION
Depending on the logic level applied to the control input pins,
A and B, one RF output port (for example, RF1) is set to on mode,
by which an insertion loss path is provided from the input to
the output. The other RF output ports (for example, RF2, RF3,
and RF4) are then set to off mode, by which the outputs are
isolated from the input. When the RF output ports (RF1, RF2,
RF3, and RF4) are in isolation mode, they are internally
terminated to 50 Ω, and thereby can absorb the applied RF signal.
The HMC7992 requires a single positive supply voltage
applied to the VDD pin. A bypassing capacitor is recommended
on the supply line to minimize RF coupling.
The HMC7992 integrates with an internal 2:4 decoder; the four
RF paths are selected via the two digital control voltages applied
to the A and B control inputs. A small value bypassing capacitor
is recommended on these digital signal lines to improve the RF
signal isolation.
The ideal power-up sequence is as follows:
The HMC7992 is internally matched to 50 Ω at the RF common
port (RFC) and the RF ports (RF1, RF2, RF3, and RF4); therefore,
no external matching components are required. The RF pins are
dc-coupled and dc blocking capacitors are required on the RF
paths. The design is bidirectional; the RF input signals can apply
at the RFC port or the RF1 to RF4 ports. The inputs and outputs
are interchangeable.
1. Power up GND.
2. Power up VDD
.
3. Power up the digital control inputs. The relative order of
the logic control inputs is not important. Powering the
logic control inputs before the VDD supply can inadvertently
forward bias and damage the internal ESD protection
structures.
4. Apply the RF input.
Table 4. Truth Table
Control Input
Signal Path State
A
B
RFC to
RF1
Low
High
Low
High
Low
Low
High
High
RF2
RF3
RF4
Rev. A | Page 10 of 12
Data Sheet
HMC7992
APPLICATIONS INFORMATION
Generate the evaluation PCB with proper RF circuit design
techniques. Signal lines at the RF port must have a 50 ꢀ
impedance, and the package ground leads and backside ground
slug must connect directly to the ground plane, as shown in
Figure 23. The evaluation board shown in Figure 23 is available
from Analog Devices, Inc., upon request.
Table 5. Bill of Materials for the EV1HMC7992LP3D1
Evaluation Board
Reference Designator
Description
J1 to J5
C1 to C5
C8 to C10
C13
R1 to R2
U1
PCB2
PCB mount SMA connectors
100 pF capacitors, 0402 package
100 pF capacitors, 0402 package
0.1 μF capacitor, 0402 package
0 Ω resistors, 0402 package
HMC7992LP3DE SP4T switch
600-01284-00 evaluation PCB
1 Reference this evaluation board number when ordering the complete
evaluation board.
2 Circuit board material: Roger 4350 or Arlon 25FR.
Figure 23. EV1HMC7992LP3D Evaluation Board
Rev. A | Page 11 of 12
HMC7992
Data Sheet
OUTLINE DIMENSIONS
3.10
3.00 SQ
2.90
0.30
0.25
0.20
PIN 1
INDICATOR
PIN 1
INDICATOR
13
16
0.50
BSC
1
4
12
EXPOSED
PAD
1.92
1.70 SQ
1.48
9
8
5
*
0.35
0.30
0.25
0.20 MIN
TOP VIEW
BOTTOM VIEW
0.95
0.85
0.75
FOR PROPER CONNECTION OF
THE EXPOSED PAD, REFER TO
THE PIN CONFIGURATION AND
FUNCTION DESCRIPTIONS
0.05 MAX
0.02 NOM
COPLANARITY
0.08
SECTION OF THIS DATA SHEET.
SEATING
PLANE
0.20 REF
*
COMPLIANT WITH JEDEC STANDARDS MO-220-VEED-4
WITH THE EXCEPTION OF PACKAGE EDGE TO LEAD EDGE.
Figure 24. 16-Lead Lead Frame Chip Scale Package [LFCSP]
3 mm × 3 mm Body and 0.85 mm Package Height
(CP-16-38)
Dimensions shown in millimeters
ORDERING GUIDE
Model1
HMC7992LP3DE
HMC7992LP3DETR
EV1HMC7992LP3D
Temperature Range
–40°C to +105°C
–40°C to +105°C
Package Description
Package Option
CP-16-38
CP-16-38
16-Lead Lead Frame Chip Scale Package [LFCSP]
16-Lead Lead Frame Chip Scale Package [LFCSP]
Evaluation Board
1 The HMC7992LP3DE and HMC7992LP3DETR are RoHS Compliant Parts.
©2016–2019 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D13714-0-8/19(A)
Rev. A | Page 12 of 12
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