HMC862A [ADI]
0.1 GHz to 24 GHz, Low Noise, Programmable Divider;
| 型号： | HMC862A |
| 厂家： | 
ADI |
| 描述： | 0.1 GHz to 24 GHz, Low Noise, Programmable Divider |
| 文件： | 总15页 (文件大小：478K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
0.1 GHz to 24 GHz, Low Noise,
Programmable Divider
HMC862A
Data Sheet
FEATURES
FUNCTIONAL BLOCK DIAGRAM
HMC862A
Low noise floor: −153 dBc/Hz at 100 kHz offset
Programmable frequency divider (N)
N = 1, 2, 4, or 8
Wide bandwidth: 0.1 GHz to 24 GHz
Low current consumption: 81 mA in the N = 8 divide state
HBM ESD sensitivity, Class 2 classification
FICDM ESD sensitivity, Class C3 classification
16-lead, 3 mm × 3 mm LFCSP package: 9 mm2
GND
IN
1
2
3
4
12 GND
11 OUT
÷1,2,4,8
10
9
IN
OUT
GND
GND
APPLICATIONS
Satellite communication systems
Point to point and point to multipoint radios
Military applications
PACKAGE
BASE
GND
Figure 1.
Test equipment
GENERAL DESCRIPTION
The HMC862A is a low noise, programmable frequency divider
in a 3 mm × 3 mm, leadless, surface-mount package. The
frequency divider, N, can be programmed to divide from 1,
2, 4, or 8 in the 0.1 GHz to 24 GHz input frequency range.
The low phase noise, wide frequency range, and flexible division
ratio make this device ideal for high performance and wideband
communication systems.
Rev. A
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Tel: 781.329.4700 ©2017–2019 Analog Devices, Inc. All rights reserved.
Technical Support
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HMC862A
Data Sheet
TABLE OF CONTENTS
Features .............................................................................................. 1
Divide by 2 .....................................................................................8
Divide by 4 .....................................................................................9
Divide by 8 .................................................................................. 10
Current Consumption (ICC) ...................................................... 11
Theory of Operation ...................................................................... 12
Input Interface ............................................................................ 12
Output Interface ......................................................................... 12
Applications Information.............................................................. 13
Evaluation Printed Circuit Board (PCB) ................................ 13
Evaluation Board Overview...................................................... 14
Outline Dimensions....................................................................... 15
Ordering Guide .......................................................................... 15
Applications....................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description......................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
RF Specifications .......................................................................... 3
DC Specifications ......................................................................... 4
Absolute Maximum Ratings............................................................ 5
Thermal Resistance ...................................................................... 5
ESD Caution.................................................................................. 5
Pin Configuration and Function Descriptions............................. 6
Typical Performance Characteristics ............................................. 7
Divide by 1..................................................................................... 7
REVISION HISTORY
4/2019—Rev. 0 to Rev. A
Added Thermal Resistance Section and Table 4 .......................... 5
Changes to Theory of Operation Section.................................... 12
Changes to Ordering Guide .......................................................... 15
10/2017—Revision 0: Initial Version
Rev. A | Page 2 of 15
Data Sheet
HMC862A
SPECIFICATIONS
RF SPECIFICATIONS
VCC = 5 V, TA = −40°C to +85°C, unless otherwise noted.
Table 1.
Parameter
RF INPUT CHARACTERISTICS
RF Input Frequency
Maximum
Test Conditions/Comments
Min
Typ
Max
Unit
Sine wave or square wave input
Square wave input1
N = 1
N = 2, 4, 8
Minimum
18
24
GHz
GHz
GHz
0.1
RF Input Power Range
N = 1, 2
N = 2
0.1 GHz< fIN < 18 GHz, sine or square wave input1 −15
+10
+10
+10
+10
dBm
dBm
dBm
dBm
18 GHz < fIN < 24 GHz, sine or square wave input
0.1 GHz < fIN < 20 GHz, sine or square wave input1
20 GHz < fIN < 24 GHz, sine or square wave input
−5
−15
−5
N = 4, 8
Reverse Leakage
N = 1
N = 2
N = 4, 8
fIN = 6 GHz, input power (PIN) = 0 dBm
fIN = 6 GHz, PIN = 0 dBm
fIN = 6 GHz, PIN = 0 dBm
−10
−55
−70
dBm
dBm
dBm
RF OUTPUT CHARACTERISTICS, N = 1
Output Power, Single-Ended
0.1 GHz < fIN < 10 GHz
10 GHz < fIN < 15 GHz
15 GHz < fIN < 18 GHz
−1
−5
−11
+3
−2
−6
+5
+3
0
dBm
dBm
dBm
Single-Sideband (SSB) Residual Phase Noise fIN = 12 GHz, PIN = 5 dBm
at 100 kHz Offset
−155
dBc/Hz
Second Harmonic
Third Harmonic
fIN = 6 GHz, PIN = 0 dBm
fIN = 6 GHz, PIN = 0 dBm
−27
−6
dBm
dBm
RF OUTPUT CHARACTERISTICS, N = 2
Output Power, Single-Ended
0.1 GHz < fIN < 18 GHz
18 GHz < fIN < 24 GHz
fIN = 12 GHz, PIN = 5 dBm
fIN = 6 GHz, PIN = 0 dBm
fIN = 6 GHz, PIN = 0 dBm
0
−3
3
0
5
+3
dBm
dBm
dBc/Hz
dBm
dBm
SSB Residual Phase Noise at 100 kHz Offset
Second Harmonic (Feedthrough)
Third Harmonic
−153
−28
−7
RF OUTPUT CHARACTERISTICS, N = 4
Output Power, Single-Ended
0.1 GHz < fIN < 18 GHz
18 GHz < fIN < 24 GHz
fIN = 12 GHz, PIN = 5 dBm
fIN = 6 GHz, PIN = 0 dBm
fIN = 6 GHz, PIN = 0 dBm
0
−1
2
+3
−154
−35
−6
4
+6
dBm
dBm
dBc/Hz
dBm
dBm
SSB Residual Phase Noise at 100 kHz Offset
Second Harmonic
Third Harmonic
RF OUTPUT CHARACTERISTICS, N = 8
Output Power, Single-Ended
SSB Residual Phase Noise at 100 kHz Offset
Second Harmonic
0.1 GHz < fIN < 24 GHz
fIN = 12 GHz, PIN = 5 dBm
fIN = 6 GHz, PIN = 0 dBm
fIN = 6 GHz, PIN = 0 dBm
0
2
4
dBm
dBc/Hz
dBm
−155
−45
−7
Third Harmonic
dBm
1 A square wave input is recommended to be below 650 MHz for best phase noise performance. If a sine wave input below 650 MHz is used, it is recommended that the
drive level be >5 dBm for best operation, including phase noise. Refer to the Typical Performance Characteristics section.
Rev. A | Page 3 of 15
HMC862A
Data Sheet
DC SPECIFICATIONS
VCC = 5 V, TA = −40°C to +85°C, unless otherwise noted.
Table 2.
Parameter
Test Conditions/Comments
Analog supply
Min
Typ
Max
Unit
POWER SUPPLIES
VCC
4.75
5
5.25
V
CURRENT CONSUMPTION, ICC
N = 1
N = 2
N = 4
N = 8
55
64
68
71
61
73
78
81
71
84
90
94
mA
mA
mA
mA
DIGITAL INPUT S (S0, S1, S2)
Logic Voltage
Low
High
0
3
0.4
5
V
V
Rev. A | Page 4 of 15
Data Sheet
HMC862A
ABSOLUTE MAXIMUM RATINGS
THERMAL RESISTANCE
Table 3.
Thermal performance is directly linked to printed circuit board
(PCB) design and operating environment. Careful attention to
PCB thermal design is required.
Parameter
Rating
RF Input Power (IN, IN)
13 dBm
Supply Voltage (VCC)
5.5 V
Logic Inputs (S0, S1, S2)
Storage Temperature Range
Reflow Temperature
Operating Temperature Range (TA)
Electrostatic Discharge (ESD) Sensitivity
Human Body Model (HBM), JS-001-2012
−0.5 V to (0.5 V +VCC)
−65°C to +125°C
260°C
Thermal impedance simulated values are based on the use of
the EV1HMC862ALP3 evaluation board with the exposed pad
soldered to GND. VCC = 5 V and Divider Ratio (N) = 8.
−40°C to +85°C
Table 4.
PackageType
Thermal Impedance (θJB)
Unit
Class 2
HCP-16-1
34
°C/W
Field Induced Charged Device Model
(FICDM), JS-002
Class C3
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.
ESD CAUTION
Rev. A | Page 5 of 15
HMC862A
Data Sheet
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
GND
IN
1
2
3
4
12 GND
11 OUT
HMC862A
TOP VIEW
10
9
IN
OUT
GND
(Not to Scale)
GND
PACKAGE
BASE
GND
NOTES
1. EXPOSED PAD. EXPOSED PAD MUST
BE CONNECTED TO RF/DC GROUND.
Figure 2. Pin Configuration
Table 5. Pin Function Descriptions
Pin No.
Mnemonic Description
1, 4, 8, 9,
GND
Ground. The backside of the package has an exposed metal ground slug that must be connected to RF/dc ground.
12, 14, 15
2
3
IN
IN
RF Input. This pin must be dc blocked.
RF Input, 180° Out of Phase with Pin 2 for Differential Operation. This pin must be ac grounded for single-ended
operation. DC block this pin for differential operation.
5, 6, 7
10
S0, S1, S2
OUT
CMOS Compatible Division Ratio Control Bits. See Table 6.
Divider Output, 180° Out of Phase with Pin 11. This RF output must be dc blocked. See Figure 31 for proper termination.
Divided Output. This RF output must be dc blocked. See Figure 31 for proper termination.
Supply Voltage Pins, 5 V. Connect both VCC pins to a 5 V supply. These pins are internally connected.
Exposed Pad. Exposed pad must be connected to RF/dc ground.
11
13, 16
OUT
VCC
EPAD
Rev. A | Page 6 of 15
Data Sheet
HMC862A
TYPICAL PERFORMANCE CHARACTERISTICS
DIVIDE BY 1
6
6
4
4
2
2
0
0
–2
–4
–6
–2
–4
–6
–18
–10
–12
–18
+85°C
+25°C
–40°C
V
V
V
= 5.25V
= 5.0V
= 4.75V
CC
CC
CC
–10
–12
0
2
4
6
8
10
12
14
16
18
20
0
2
4
6
8
10
12
14
16
18
20
SINE WAVE INPUT FREQUENCY (GHz)
SINE WAVE INPUT FREQUENCY (GHz)
Figure 3. Output Power vs. Sine Wave Input Frequency for Various
Temperatures, PIN = 0 dBm
Figure 6. Output Power vs. Sine Wave Input Frequency for Various VCC
Voltages, PIN = 0 dBm
15
0
–10
–20
–30
–40
–50
MAX P
IN
10
5
0
+85°C
+25°C
–40°C
–5
–10
–15
–20
–25
MIN P
IN
SECOND HARMONIC
THIRD HARMONIC
–60
0
2
4
6
8
10
12
14
16
18
20
22
0
2
4
6
8
10
12
14
16
18
SINE WAVE INPUT FREQUENCY (GHz)
OUTPUT FREQUENCY (GHz)
Figure 4. Allowable Range of Input Power vs. Sine Wave Input Frequency
for Various Temperatures
Figure 7. Output Harmonics, PIN = 0 dBm, TA = 25°C
–115
–115
–120
–125
–130
–135
–140
–145
–150
–155
–160
–165
P
P
P
P
P
= +10dBm
= +5dBm
= 0dBm
= –5dBm
= –10dBm
SQUARE 100MHz
IN
IN
IN
IN
IN
–120
SINE 100MHz (5dBm)
SINE 12GHz
SINE 6GHz
–125
–130
–135
–140
–145
–150
–155
–160
–165
100
1k
10k
100k
1M
100
1k
10k
100k
1M
OFFSET FREQUENCY (Hz)
OFFSET FREQUENCY (Hz)
Figure 5. SSB Phase Noise vs. Offset Frequency for Various Input Frequencies,
PIN = 0 dBm, TA = 25°C
Figure 8. SSB Phase Noise vs. Offset Frequency for Various Input Power (PIN
)
Levels, fIN = 12 GHz Sine Wave, TA = 25°C
Rev. A | Page 7 of 15
HMC862A
Data Sheet
DIVIDE BY 2
6
6
4
4
2
2
0
0
–2
–4
–6
–2
–4
–6
V
V
V
= 5.25V
= 5.00V
= 4.75V
CC
CC
CC
+85°C
+25°C
–40°C
0
2
4
6
8
10 12 14 16 18 20 22 24
0
2
4
6
8
10 12 14 16 18 20 22 24
SINE WAVE INPUT FREQUENCY (GHz)
SINE WAVE INPUT FREQUENCY (GHz)
Figure 9. Output Power vs. Sine Wave Input Frequency for Various
Temperatures, PIN = 0 dBm
Figure 12. Output Power vs. Sine Wave Input Frequency for Various VCC
Voltages, PIN = 0 dBm
15
0
–10
–20
–30
–40
–50
MAX P
IN
10
5
+85°C
+25°C
–40°C
0
–5
–10
–15
–20
–25
MIN P
IN
FEEDTHROUGH
THIRD HARMONIC
–60
0
2
4
6
8
10 12 14 16 18 20 22 24
0
2
4
6
8
10
12
SINE WAVE INPUT FREQUENCY (GHz)
OUTPUT FREQUENCY (GHz)
Figure 13. Output Harmonics, PIN = 0 dBm, TA = 25°C
Figure 10. Allowable Range of Input Power vs. Sine Wave Input Frequency
for Various Temperatures
–115
–120
–125
–130
–135
–140
–145
–150
–155
–160
–165
–115
SQUARE 100MHz
P
P
P
P
P
= +10dBm
= +5dBm
= 0dBm
IN
IN
IN
IN
IN
SINE 100MHz (5dBm)
SINE 18GHz
–120
–125
–130
–135
–140
–145
–150
–155
–160
–165
SINE 12GHz
SINE 6GHz
= –5dBm
= –10dBm
100
1k
10k
100k
1M
100
1k
10k
100k
1M
OFFSET FREQUENCY (Hz)
OFFSET FREQUENCY (Hz)
Figure 14. SSB Phase Noise vs. Offset Frequency for Various Input Power (PIN
)
Figure 11. SSB Phase Noise vs. Offset Frequency for Various Input
Frequencies, PIN = 0 dBm, TA = 25°C
Levels, fIN = 12 GHz Sine Wave, TA = 25°C
Rev. A | Page 8 of 15
Data Sheet
HMC862A
DIVIDE BY 4
6
6
5
5
4
3
2
1
0
4
3
2
1
0
V
V
V
= 5.25V
= 5.00V
= 4.75V
CC
CC
CC
+85°C
+25°C
–40°C
–1
–2
–1
–2
0
2
4
6
8
10 12 14 16 18 20 22 24
0
2
4
6
8
10 12 14 16 18 20 22 24
SINE WAVE INPUT FREQUENCY (GHz)
SINE WAVE INPUT FREQUENCY (GHz)
Figure 15. Output Power vs. Sine Wave Input Frequency for Various
Temperatures, PIN = 0 dBm
Figure 18. Output Power vs. Sine Wave Input Frequency for Various VCC
Voltages, PIN = 0 dBm
15
0
–10
–20
–30
MAX P
IN
10
5
+85°C
+25°C
–40°C
0
–5
–10
–15
–20
–25
–40
FEEDTHROUGH
SECOND HARMONIC
THIRD HARMONIC
MIN P
–50
IN
–60
0
2
4
6
8
10 12 14 16 18 20 22 24
0
1
2
3
4
5
6
SINE WAVE INPUT FREQUENCY (GHz)
OUTPUT FREQUENCY (GHz)
Figure 19. Output Harmonics, PIN = 0 dBm, TA = 25°C
Figure 16. Allowable Range of Input Power vs. Sine Wave Input Frequency
for Various Temperatures
–115
–120
–125
–130
–135
–140
–145
–150
–155
–160
–165
–115
SQUARE 100MHz
P
P
P
P
P
= +10dBm
= +5dBm
= 0dBm
IN
IN
IN
IN
IN
SINE 100MHz (5dBm)
SINE 18GHz
–120
–125
–130
–135
–140
–145
–150
–155
–160
–165
SINE 12GHz
SINE 6GHz
= –5dBm
= –10dBm
100
1k
10k
100k
1M
100
1k
10k
100k
1M
OFFSET FREQUENCY (Hz)
OFFSET FREQUENCY (Hz)
Figure 20. SSB Phase Noise vs. Offset Frequency for Various Input Power (PIN
)
Figure 17. SSB Phase Noise vs. Offset Frequency for Various Input
Frequencies, PIN = 0 dBm, TA = 25°C
Levels, fIN = 12 GHz Sine Wave, TA = 25°C
Rev. A | Page 9 of 15
HMC862A
Data Sheet
DIVIDE BY 8
6
6
5
5
4
4
3
3
2
2
1
1
0
0
V
V
V
= 5.25V
= 5.00V
= 4.75V
CC
CC
CC
+85°C
+25°C
–40°C
–1
–2
–1
–2
0
2
4
6
8
10 12 14 16 18 20 22 24
0
2
4
6
8
10 12 14 16 18 20 22 24
SINE WAVE INPUT FREQUENCY (GHz)
SINE WAVE INPUT FREQUENCY (GHz)
Figure 24. Output Power vs. Sine Wave Input Frequency for Various Vcc
Voltages, PIN = 0 dBm
Figure 21. Output Power vs. Sine Wave Input Frequency for Various
Temperatures, PIN = 0 dBm
0
–10
–20
–30
–40
–50
15
MAX P
IN
10
5
+85°C
+25°C
–40°C
0
–5
–10
–15
–20
–25
MIN P
IN
FEEDTHROUGH
SECOND HARMONIC
THIRD HARMONIC
–60
–70
0
0.5
1.0
1.5
2.0
2.5
3.0
0
2
4
6
8
10 12 14 16 18 20 22 24
OUTPUT FREQUENCY (GHz)
SINE WAVE INPUT FREQUENCY (GHz)
Figure 22. Allowable Range of Input Power vs. Sine Wave Input Frequency
for Various Temperatures
Figure 25. Output Harmonics, PIN = 0 dBm, TA = 25°C
–115
–115
–120
–125
–130
–135
–140
–145
–150
–155
–160
–165
SQUARE 100MHz
P
P
P
P
P
= +10dBm
= +5dBm
= 0dBm
= –5dBm
= –10dBm
IN
IN
IN
IN
IN
SINE 100MHz (5dBm)
SINE 18GHz
–120
–125
–130
–135
–140
–145
–150
–155
–160
–165
SINE 12GHz
SINE 6GHz
100
1k
10k
100k
1M
100
1k
10k
100k
1M
OFFSET FREQUENCY (Hz)
OFFSET FREQUENCY (Hz)
Figure 26. SSB Phase Noise vs. Offset Frequency for Various Input Power (PIN
)
Figure 23. SSB Phase Noise vs. Offset Frequency for Various Input
Frequencies, PIN = 0 dBm, TA = 25°C
Levels, fIN = 12 GHz Sine Wave, TA = 25°C
Rev. A | Page 10 of 15
Data Sheet
HMC862A
CURRENT CONSUMPTION (ICC)
100
90
80
70
60
50
40
30
20
10
0
N = 8
N = 4
N = 2
N = 1
0
2
4
6
8
10 12 14 16 18 20 22 24
SINE WAVE INPUT FREQUENCY (GHz)
Figure 27. Input Power vs. Sine Wave Input Frequency
Rev. A | Page 11 of 15
HMC862A
Data Sheet
THEORY OF OPERATION
The HMC862A is a wideband, configurable RF divider with
minimal additive phase noise.
IN
pins as
For differential input signals, ac couple the IN and
shown in Figure 29. Off-chip termination is not required because
IN
the IN and
pins have internal 50 Ω termination resistors.
The divide ratio, N, can be programmed to N = 1, 2, 4, or 8 by
setting the digital input pins—S0, S1, and S2—to the logic high
(1) or logic low (0) states indicated in Table 6.
For single-ended input signals, ac couple the IN input. AC
IN
IN
pin as possible.
ground the
pin as close to the
Table 6. Programming Truth Table for Frequency Division
Ratios1
IN
IN
IN
IN
S0
S1
S2
Divide Ratio (N)
0
1
1
1
0
0
1
1
0
0
0
1
1
2
4
8
Figure 29. Recommended Input Configuration for Single-Ended Operation
(Left) and Differential Operation (Right)
OUTPUT INTERFACE
1 0 means logic low and 1 means logic high.
Figure 30 shows the output interface schematic for the OUT
OUT
and
pins.
The HMC862A does not support any other combination of the S0,
S1, and S2 programming states other than those listed in Table 6.
Using other programming states causes the HMC862A to
generate an unstable output.
50Ω
50Ω
OUT
OUT
Enable the HMC862A by applying a voltage (VCC) to the supply
pins, VCC. These pins are internally connected.
Figure 30. Output Interface Schematic
To provide a differential output or two single-ended outputs, ac
OUT
Note that the VCC voltage must be applied before the logic level
signals (S0, S1, and S2) can be driven to a logic high to prevent
the ESD diodes from turning on.
couple the OUT and
pins. Off-chip termination is not
OUT
required because the OUT and
termination resistors.
pins have internal 50 Ω
The HMC862A toggles on the rising edge of the IN input for all
divide ratios where N = 1, 2, 4, or 8.
If only one output pin is used, connect the unused output pin to
ground through a capacitor and a 50 Ω termination
INPUT INTERFACE
The HMC862A can be driven by differential or single-ended
input signals, and can provide differential or single-ended
output signals.
OUT
OUT
OUT
OUT
Figure 28 shows the input interface schematic for the IN and
IN
pins.
Figure 31. Recommended Output Configuration for Single-Ended Operation
(Left) and Differential Operation (Right)
50Ω
IN
50Ω
IN
Figure 28. Input Interface Schematic
Rev. A | Page 12 of 15
Data Sheet
HMC862A
APPLICATIONS INFORMATION
EVALUATION PRINTED CIRCUIT BOARD (PCB)
600-01663-00-1
FOUT
C3
FIN
C7
+
GND
J7
VCC
J6
C1
C2
J3
J4
J1
J2
C6
C
5
U1
GND
J5
C4
R3
R2
R1
NFIN
NFOUT
S2
S0
S1
Figure 32. Evaluation PCB
J6
J7
+
C7
2.2µF
C6
1nF
NC
U1
HMC862ALP3E
C1
100nF
C3
100nF
GND
1
2
12 GND
11 OUT
J1
J3
IN
K_SRI-NS
K_SRI-NS
÷1,2,4,8
10
9
IN
3
4
OUT
GND
C2
C4
100nF
100nF
J2
J4
GND
C5
100nF
K_SRI-NS
K_SRI-NS
R1
10kΩ
R2
10kΩ
J5
2
4
6
1
3
5
R3
10kΩ
87759-0614
Figure 33. Evaluation PCB Schematic
Rev. A | Page 13 of 15
HMC862A
Data Sheet
It is recommended that the circuit board used in the application
use RF circuit design techniques with a 50 Ω impedance on the
signal lines and with the package ground leads and backside
ground pad connected directly to the ground plane. Use a
sufficient number of via holes to connect the top and bottom
ground planes. The evaluation circuit board shown is available
from Analog Devices, Inc., upon request.
EVALUATION BOARD OVERVIEW
Use the EV1HMC862ALP3 evaluation board to evaluate the
HMC862A.
The HMC862A is enabled by applying 5 V between J6 (VCC
)
and J7 (GND). Note that J6 only provides power to Pin 13 on
the HMC862A; however, because Pin 13 and Pin 16 are
internally connected, both VCC pins receive power.
Table 8. List of Materials for EV1HMC862ALP3
The divide ratio, N, is selected by inserting pin jumpers on
Component J5, as shown in Table 7. When installed, a jumper
pulls the digital input pin to ground and sets a logic low. When
removed, the R1, R2, and R3 pull-up resistors pull the digital
input to VCC and set a logic high.
Item
Description
J1 to J4
J5
PCB-mount K connector
DC connector header, Molex 2 mm
C1 to C5
ATC550L104KTT, 100 nF, 16 V, broadband capacitor,
0402 package
C6
C7
R1 to R3
J6, J7
1000 pF capacitor, 0603 package
2.2 μF capacitor, tantalum, 3216 package
10 kΩ resistor, 0402 package
Mill-Max 0.040 inch diameter PC pin, 3101-2-00-21-00-
00-08-0
HMC862A, programmable divider
Custom heatsink, alumimum
600-01663-00-1 evaluation board
Table 7. Jumper Configuration for EV1HMC862ALP3
Divide Ratio (N)
S0 Jumper
Installed
Open
Open
Open
S1 Jumper
Installed
Installed
Open
S2 Jumper
Installed
Installed
Installed
Open
1
2
4
8
U1
Heatsink
PCB
Open
By default, the evaluation board is set up to accept a single-
ended input and provide a differential output. A differential
input can be used by removing Component C5; a single-ended
output can be generated by terminating J4 with a 50 Ω
termination.
Rev. A | Page 14 of 15
Data Sheet
HMC862A
OUTLINE DIMENSIONS
DETAIL A
(JEDEC 95)
3.10
3.00 SQ
2.90
0.30
0.25
0.20
PIN 1
INDICATOR
PIN 1
TIONS
INDIC ATOR AREA OP
(SEE DETAIL A)
13
16
0.50
BSC
12
1
EXPOSED
PAD
1.95
1.70 SQ
1.50
4
9
8
5
0.45
0.40
0.35
0.20 MIN
TOP VIEW
BOTTOM VIEW
FOR PROPER CONNECTION OF
THE EXPOSED PAD, REFER TO
THE PIN CONFIGURATION AND
FUNCTION DESCRIPTIONS
0.90
0.85
0.80
0.05 MAX
0.02 NOM
COPLANARITY
0.08
SECTION OF THIS DATA SHEET.
SEATING
PLANE
0.20 REF
COMPLIANT WITH JEDEC STANDARDS MO-220-VEED-4.
Figure 34. 16-Lead Lead Frame Chip Scale Package [LFCSP]
3 mm × 3 mm Body and 0.85 mm Package Height
(HCP-16-1)
Dimensions shown in millimeters
ORDERING GUIDE
MSL
Model1
Temperature Range Package Description
Lead Finish
Rating2
Package Option
HCP-16-1
HCP-16-1
HMC862ALP3E
HMC862ALP3ETR
EV1HMC862ALP3
−40°C to +85°C
−40°C to +85°C
16-Lead Lead Frame Chip Scale Package [LFCSP] 100% Matte Sn MSL3
16-Lead Lead Frame Chip Scale Package [LFCSP] 100% Matte Sn MSL3
Evaluation Board
1 The HMC862ALP3E and HMC862ALP3ETR are RoHS compliant.
2 The maximum peak reflow temperature is 260°C. See the Absolute Maximum Ratings section for more information.
©2017–2019 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D13599-0-4/19(A)
Rev. A | Page 15 of 15
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