LT8334 [ADI]
Low IQ Boost/SEPIC/Inverting Converter with 5A, 40V Switch;
| 型号： | LT8334 |
| 厂家： | 
ADI |
| 描述： | Low IQ Boost/SEPIC/Inverting Converter with 5A, 40V Switch |
| 文件： | 总24页 (文件大小：1520K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LT8334
Low I Boost/SEPIC/Inverting
Q
Converter with 5A, 40V Switch
FEATURES
DESCRIPTION
The LT®8334 is a current mode DC/DC converter with a
40V, 5A switch operating from a 2.8V to 40V input. With
a unique single feedback pin architecture, it is capable
of boost, SEPIC or inverting configurations. Burst Mode
operation consumes as low as 9μA quiescent current to
maintain high efficiency at very low output currents, while
keeping typical output ripple below 15mV.
n
Wide Input Voltage Range: 2.8V to 40V
n
Ultralow Quiescent Current and Low Ripple Burst
Mode® Operation: I = 9μA
5A, 40V Power Switch
Q
n
n
Positive or Negative Output Voltage Programming
with a Single Feedback Pin
n
Programmable Frequency (300kHz to 2MHz)
n
Sychronizable to an External Clock
An external compensation pin allows optimization of loop
n
Spread Spectrum Frequency Modulation for Low EMI
Bias Pin for Higher Efficiency
bandwidth over a wide range of input and output volt-
ages and programmable switching frequencies between
300kHz and 2MHz. A SYNC/MODE pin allows synchroni-
zation to an external clock. It can also be used to select
between BURST or PULSE SKIP modes of operation with
spread spectrum frequency modulation for low EMI. For
increased efficiency, a BIAS pin can accept a second input
to supply the INTVCC regulator. Additional features include
frequency foldback and programmable soft-start to con-
trol inductor current during start-up.
n
n
n
n
Programmable Undervoltage Lockout (UVLO)
Overcurrent and Overtemperature Protection
Thermally Enhanced 12-Lead 4mm × 3mm DFN
APPLICATIONS
n
Industrial and Automotive
n
Telecom
n
Medical Diagnostic Equipment
Portable Electronics
The LT8334 is available in a thermally enhanced 12-lead
4mm × 3mm DFN package.
n
All registered trademarks and trademarks are the property of their respective owners.
TYPICAL APPLICATION
V
OUT
Efficiency and Power Loss
2.2µH
24V
820mA AT V = 5V
V
IN
IN
IN
IN
100
90
80
70
60
50
40
30
20
10
0
4.0
3.6
3.2
2.8
2.4
2.0
1.6
1.2
0.8
0.4
0
4V TO 20V
2A
AT V = 12V
2.75A AT V = 16V
10µF
×2
V
SW
IN
10µF
1M
EFFICIENCY
EN/UVLO
FBX
LT8334
BIAS
71.5k
SYNC/MODE
INTV
CC
RT
SS
GND
V
C
V
V
= 5V
= 12V
1µF
IN
IN
POWER LOSS
39k
0.1µF
20.0k
1nF
0
0.2 0.4 0.6 0.8
1
1.2 1.4 1.6 1.8 2.0
LOAD CURRENT (A)
8334 TA01a
8334 TA01b
2MHz
Rev. 0
1
Document Feedback
For more information www.analog.com
LT8334
ABSOLUTE MAXIMUM RATINGS
PIN CONFIGURATION
(Note 1)
TOP VIEW
SW............................................................................40V
NC
1
2
3
4
5
6
12 SW1
V , EN/UVLO............................................................40V
IN
EN/UVLO
11 SW2
BIAS..........................................................................40V
V
IN
10 SYNC/MODE
13
GND
SYNC ..........................................................................6V
INTV
9
8
7
SS
CC
INTV ...............................................................(Note 2)
CC
BIAS
RT
V ................................................................................4V
C
V
FBX
C
FBX ........................................................................... 4V
Operating Junction Temperature Range (Notes 3)
DE PACKAGE
12-LEAD (4mm × 3mm) PLASTIC DFN
LT8334R ........................................... –40°C to 150°C
Storage Temperature Range .................. –65°C to 150°C
Maximum Junction Temperature .........................+150°C
θ
JA
= 43°C/W, θ = 5.5°C/W
JC
EXPOSED PAD (PIN 13) IS PGND AND GND, MUST BE SOLDERED TO PCB
ORDER INFORMATION
LEAD FREE FINISH
TAPE AND REEL
PART MARKING*
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LT8334RDE#PBF
LT8334RDE#TRPBF
8334
12-Lead (4mm × 3mm) Plastic DFN
–40°C to 150°C
Contact the factory for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
Tape and reel specifications. Some packages are available in 500 unit reels through designated sales channels with #TRMPBF suffix.
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 12V, EN/UVLO = 12V unless otherwise noted.
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
l
l
l
V
IN
V
IN
Operating Voltage Range
2.8
40
V
Quiescent Current at Shutdown
V
V
= 0.2V
= 1.5V
1
1
2
15
μA
μA
EN/UVLO
EN/UVLO
2
2
5
25
μA
μA
V
Quiescent Current
IN
Sleep Mode (Not Switching)
SYNC = 0V
SYNC = 0V or INTV , BIAS = 0V
9
9
15
30
μA
μA
l
l
l
Active Mode (Not Switching)
1200
1200
1600
1850
µA
µA
CC
SYNC = 0V or INTV , BIAS = 5V
22
22
40
65
µA
µA
CC
BIAS Threshold
Rising, BIAS Can Supply INTV
4.4
4
4.65
4.25
V
V
CC
Falling, BIAS Cannot Supply INTV
CC
V
Falling Threshold to Supply INTV
BIAS = 12V
BIAS – 2V
V
V
IN
CC
BIAS Falling Threshold to Supply INTV
FBX Regulation
V
= 12V
V
IN
CC
IN
l
l
FBX Regulation Voltage
FBX > 0V
FBX < 0V
1.568
–0.822
1.6
–0.80
1.636
–0.780
V
V
FBX Line Regulation
FBX Pin Current
FBX > 0V, 2.8V < V < 40V
0.005
0.005
0.015
0.015
%/V
%/V
IN
FBX < 0V, 2.8V < V < 40V
IN
l
FBX = 1.6V, –0.8V
–10
10
nA
Rev. 0
2
For more information www.analog.com
LT8334
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 12V, EN/UVLO = 12V unless otherwise noted.
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Oscillator
l
l
l
Switching Frequency (f
)
R = 165k
265
0.9
1.85
300
1
2
327
1.08
2.15
kHz
MHz
MHz
OSC
T
R = 45.3k
T
R = 20k
T
SSFM Maximum Frequency Deviation
Minimum On-Time
(∆f/f ) • 100, R = 20k
14
20
28
%
OSC
T
BURST Mode, V = 24V (Note 6)
70
60
90
85
ns
ns
IN
PULSE SKIP Mode, V = 24V (Note 6)
IN
l
Minimum Off-Time
50
75
ns
l
l
SYNC/Mode, Mode Thresholds (Note 5)
High (Rising)
Low (Falling)
1.3
0.2
1.7
V
V
0.14
l
l
SYNC/Mode, Clock Thresholds (Note 5)
Rising
Falling
1.3
0.8
1.7
V
V
0.4
f
/f
Allowed Ratio
R = 20k
T
0.95
1
1.25
kHz/kHz
SYNC OSC
SYNC Pin Current
SYNC = 2V
SYNC = 0V, Current Out of Pin
10
10
25
25
µA
µA
Switch
l
Maximum Switch Current Limit Threshold
Switch Overcurrent Threshold
5
6.25
9.4
70
7.75
1
A
A
Discharges SS Pin
Switch R
I
= 0.5A
= 40V
mΩ
µA
DS(ON)
SW
Switch Leakage Current
EN/UVLO Logic
V
SW
0.1
l
l
l
EN/UVLO Pin Threshold (Rising)
EN/UVLO Pin Threshold (Falling)
EN/UVLO Pin Current
Start Switching
Stop Switching
1.576
1.545
–75
1.68
1.6
1.90
1.645
75
V
V
V
= 1.6V
nA
EN/UVLO
Soft-Start
Soft-Start Charge Current
Soft-Start Pull-Down Resistance
Error Amplifier
SS = 0.5V
2
µA
Ω
Fault Condition, SS = 0.1V
220
Error Amplifier Transconductance
FBX = 1.6V
FBX = –0.8V
75
60
µA/V
µA/V
Error Amplifier Voltage Gain
FBX = 1.6V
FBX = –0.8V
185
145
V/V
V/V
Error Amplifier Max Source Current
Error Amplifier Max Sink Current
V = 1.1V, Current Out of Pin
7
7
µA
µA
C
V = 1.1V
C
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
conjunction with board layout, the rated package thermal impedance and
other environmental factors.
Note 4: The IC includes overtemperature protection that is intended to protect
the device during overload conditions. Junction temperature will exceed 150°C
when overtemperature protection is active. Continuous operation above the
specified maximum operating junction temperature will reduce lifetime.
Note 2: INTV cannot be externally driven. No additional components or
CC
loading is allowed on this pin.
Note 3: The LT8334R is specified over the –40°C to 150°C operating
junction range. High junction temperatures degrade operating
lifetimes. Note the maximum ambient temperature consistent with
these specifications is determined by specific operating conditions in
Note 5: For SYNC/MODE inputs required to select modes of operation see
the Pin Functions and Applications Information sections.
Note 6: The IC is tested in a Boost converter configuration with the output
voltage programmed for 24V.
Rev. 0
3
For more information www.analog.com
LT8334
TYPICAL PERFORMANCE CHARACTERISTICS
FBX Positive Regulation Voltage
vs Temperature
FBX Negative Regulation Voltage
vs Temperature
EN/UVLO Pin Thresholds
vs Temperature
1.632
1.624
1.616
1.608
1.600
1.592
1.584
1.576
1.568
–0.780
–0.785
–0.790
–0.795
–0.800
–0.805
–0.810
–0.815
–0.820
1.74
1.72
1.70
1.68
1.66
1.64
1.62
1.60
1.58
1.56
1.54
V
= 12V
V
V
= 12V
IN
IN
IN
= 12V
EN/UVLO RISING (TURN-ON)
EN/UVLO FALLING (TURN-OFF)
–50 –25
0
25 50 75 100 125 150 175
–50 –25
0
25 50 75 100 125 150 175
–50 –25
0
25 50 75 100 125 150 175
JUNCTION TEMPERATURE (°C)
JUNCTION TEMPERATURE (°C)
JUNCTION TEMPERATURE (°C)
8334 G01
8334 G02
8334 G03
Switching Frequency
vs Temperature
Normalized Switching Frequency
vs FBX Voltage
Switching Frequency vs VIN
2.10
2.08
2.06
2.04
2.02
2.00
1.98
1.96
1.94
1.92
1.90
2.10
2.08
2.06
2.04
2.02
2.00
1.98
1.96
1.94
1.92
1.90
125
100
75
50
25
0
V = 12V
IN
V
= 12V
IN
–50 –25
0
25 50 75 100 125 150 175
0
5
10 15 20 25 30 35 40
–0.8 –0.4
0.0
0.4
0.8
1.2
1.6
JUNCTION TEMPERATURE (°C)
V
(V)
VOLTAGE (V)
IN
8334 G04
8334 G05
8334 G06
Switch Current Limit
vs Duty Cycle
Switch Minimum On-Time
vs Temperature
Switch Minimum Off-Time
vs Temperature
8.0
7.7
7.4
7.1
6.8
6.5
6.2
5.9
5.6
5.3
5.0
100
90
80
70
60
50
40
30
20
10
0
100
90
80
70
60
50
40
30
20
10
0
V
= 24V
V
= 12V
OUT
V
= 12V
IN
IN
2MHz
300kHz
0
10 20 30 40 50 60 70 80 90 100
–50 –25
0
25 50 75 100 125 150 175
–50 –25
0
25 50 75 100 125 150 175
DUTY CYCLE (%)
JUNCTION TEMPERATURE (°C)
JUNCTION TEMPERATURE (°C)
8334 G07
8334 G08
8334 G09
Rev. 0
4
For more information www.analog.com
LT8334
TYPICAL PERFORMANCE CHARACTERISTICS
VIN Pin Current (Active Mode,
VIN Pin Current (Active Mode, Not
Switching, Bias = 5V)
vs Temperature
VIN Pin Current (Sleep Mode, Not
Switching) vs Temperature
Not Switching, Bias = 0V)
vs Temperature
30
27
24
21
18
15
12
9
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
50
45
40
35
30
25
20
15
10
5
V
V
V
= 12V
BIAS
SYNC_MODE
V
V
V
= 12V
BIAS
SYNC_MODE
V
V
V
= 12V
BIAS
= FLOAT
SYNC_MODE
IN
IN
IN
= 0V
= 0V
= 5V
= 0V
= FLOAT
6
3
0
0
–50 –25
0
25 50 75 100 125 150 175
–50 –25
0
25 50 75 100 125 150 175
–50 –25
0
25 50 75 100 125 150 175
JUNCTION TEMPERATURE (°C)
JUNCTION TEMPERATURE (°C)
JUNCTION TEMPERATURE (°C)
8334 G10
8334 G11
8334 G12
Switching Waveforms
(in CCM)
Switching Waveforms
(in DCM/Light Burst Mode)
Switching Waveforms
(in Deep Burst Mode)
I
L
1A/DIV
I
I
L
L
1A/DIV
1A/DIV
V
SW
V
V
SW
SW
10V/DIV
10V/DIV
10V/DIV
8334 G13
8334 G14
8334 G15
1µs/DIV
1µs/DIV
1µs/DIV
V
V
= 6V
OUT
V
V
= 6V
OUT
V
V
= 6V
IN
= 24V
OUT
IN
IN
= 24V
= 24V
V
OUT Transient Response: Load
VOUT Transient Response: Load
Current Transients from 400mA to
800mA to 400mA
Current Transients from 200mA to
800mA to 200mA
Burst Frequency vs Load Current
2.5
2.0
1.5
1.0
0.5
0
FRONT PAGE APPLICATION
V
V
= 6V
OUT
IN
= 24V
I
OUT
400mA/DIV
I
OUT
400mA/DIV
V
V
OUT
OUT
500mV/DIV
500mV/DIV
8334 G17
8334 G18
100µs/DIV
100µs/DIV
FRONT PAGE APPLICATION
FRONT PAGE APPLICATION
V
= 6V
V
= 6V
IN
IN
0
10 20 30 40 50 60 70 80 90 100
V
= 24V
V
= 24V
OUT
OUT
LOAD CURRENT (mA)
8334 F16
Rev. 0
5
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LT8334
PIN FUNCTIONS
NC (Pin 1): No Internal Connection. Leave this pin open.
RT (Pin 8): A resistor from this pin to the exposed pad
GND copper (near FBX) programs switching frequency.
EN/UVLO (Pin 2): Shutdown and Undervoltage Detect Pin.
The LT8334 is shut down when this pin is low and active
when this pin is high. Below an accurate 1.6V threshold,
the part enters undervoltage lockout and stops switching.
This allows an undervoltage lockout (UVLO) threshold to
be programmed for system input voltage by resistively
dividing down system input voltage to the EN/UVLO pin.
An 80mV pin hysteresis ensures part switching resumes
when the pin exceeds 1.68V. EN/UVLO pin voltage below
0.2V reduces VIN current below 1µA. If shutdown and
UVLO features are not required, the pin can be tied directly
to system input.
SS (Pin 9): Soft-Start Pin. Connect a capacitor from this
pin to GND copper (near FBX) to control the ramp rate
of inductor current during converter start-up. SS pin
charging current is 2μA. An internal 220Ω MOSFET dis-
charges this pin during shutdown or fault conditions.
SYNC/MODE (Pin 10): This pin allows five selectable
modes for optimization of performance.
SYNC/MODE PIN INPUT
(1) GND or <0.14V
CAPABLE MODE(S) OF OPERATION
BURST
(2) External Clock
PULSE SKIP/SYNC
BURST/SSFM
(3) 100k Resistor to GND
(4) Float (Pin Open)
VIN (Pin 3): Input Supply. This pin must be locally
PULSE SKIP
bypassed. Be sure to place the positive terminal of the
(5) INTV or >1.7V
PULSE SKIP/SSFM
CC
input capacitor as close as possible to the V pin, and
IN
the negative terminal as close as possible to the exposed
where the selectable modes of operation are:
pad PGND copper (near EN/UVLO).
BURST = low I , low output ripple operation at light loads
Q
INTVCC (Pin 4): Regulated 3.2V Supply for Internal Loads.
PULSE SKIP = skipped pulse(s) at light load (aligned to clock)
SYNC = switching frequency synchronized to external clock
SSFM = spread spectrum frequency modulation for low EMI
The INTV pin must be bypassed with a 1µF low ESR
CC
ceramic capacitor to GND. No additional components or
loading is allowed on this pin. INTV draws power from
CC
SW1, SW2 (SW) (Pins 11, 12): Output of the Internal
Power Switch. Minimize the metal trace area connected
to these pins to reduce EMI.
the BIAS pin if 4.4V ≤ BIAS ≤ V , otherwise INTV is
IN
CC
powered by the V pin.
IN
BIAS (Pin 5): Second Input Supply for Powering INTV .
CC
PGND, GND (Pin 13): Power Ground and Signal Ground
for the IC. The package has an exposed pad underneath
the IC which is the best path for heat out of the pack-
age. The pin should be soldered to a continuous copper
ground plane under the device to reduce die temperature
and increase the power capability of the LT8334. Connect
power ground components to the exposed pad copper
exiting near the EN/UVLO and SW pins. Connect signal
ground components to the exposed pad copper exiting
Removes the majority of INTV current from the V pin
CC
IN
to improve efficiency when 4.4V ≤ BIAS ≤ V . If unused,
IN
tie the pin to GND.
V (Pin 6): Error Amplifier Output Pin. Tie external com-
C
pensation network to this pin.
FBX (Pin 7): Voltage Regulation Feedback Pin for Positive
or Negative Outputs. Connect this pin to a resistor divider
between the output and the exposed pad GND copper
(near FBX). FBX reduces the switching frequency during
start-up and fault conditions when FBX is close to 0V.
near the V and FBX pins.
C
Rev. 0
6
For more information www.analog.com
LT8334
BLOCK DIAGRAM
L
D
V
IN
V
OUT
R4
OPT
R3
OPT
C
C
IN
OUT
SW2
EN/UVLO
V
IN
SW1
SW2
BIAS
+
+
V
(+)
– 2V(–)
4.4V(+)
4.0V(–)
BIAS
BIAS
–
–
INTERNAL
REFERENCE
UVLO
V
+
–
1.68V(+)
1.6V(–)
UVLO
A6
T > 170°C
J
3.2V REGULATOR
INTV
CC
INTV
CC
UVLO
SYNC/MODE
RT
C
VCC
OSCILLATOR
FREQUENCY
FOLDBACK
R5
SWITCH
LOGIC
ERROR AMP
SELECT
M1
SLOPE
DRIVER
BURST
DETECT
ERROR
AMP
+
–
1.5×
1.6V
–
+
–
+
FBX
A1
R1
MAX
I
V
OUT
LIMIT
A7
A5
R2
PWM
OVER-
ERROR
AMP
COMPARATOR
CURRENT
+
–
–
+
MAX
LIMIT
A2
I
A3
–0.8V
I
SS
2μA
UVLO
OVERCURRENT
+
–
M2
Q1
A4
R
SENSE
SLOPE
PGND/GND
SS
V
C
8334 BD
R
C
C
SS
C
C
Rev. 0
7
For more information www.analog.com
LT8334
OPERATION
The LT8334 uses a fixed frequency, current mode con-
trol scheme to provide excellent line and load regulation.
Operation can be best understood by referring to the Block
Diagram. An oscillator (with frequency programmed by a
resistor at the RT pin) turns on the internal power switch
at the beginning of each clock cycle. Current in the induc-
tor then increases until the current comparator trips and
turns off the power switch. The peak inductor current at
which the switch turns off is controlled by the voltage on
A1 becomes inactive and amplifier A2 performs (nonin-
verting) amplification from FBX to V .
C
If the EN/UVLO pin voltage is below 1.6V, the LT8334
enters undervoltage lockout (UVLO), and stops switching.
When the EN/UVLO pin voltage is above 1.68V (typical),
the LT8334 resumes switching. If the EN/UVLO pin volt-
age is below 0.2V, the LT8334 draws less than 1µA from
V .
IN
For the SYNC/MODE pin tied to ground or <0.14V, the
LT8334 will enter low output ripple Burst Mode opera-
tion for ultralow quiescent current during light loads to
maintain high efficiency. For a 100k resistor from SYNC/
MODE pin to GND, the LT8334 uses Burst Mode operation
for improved efficiency at light loads but seamlessly tran-
sitions to spread-spectrum modulation of switching fre-
quency for low EMI at heavy loads. For the SYNC/ MODE
pin floating (left open), the LT8334 uses pulse-skip-
ping mode, at the expense of hundreds of microamps,
to maintain output voltage regulation at light loads by
skipping switch pulses. For the SYNC/MODE pin tied to
the V pin. The error amplifier servos the V pin by com-
C
C
paring the voltage on the FBX pin with an internal refer-
ence voltage (1.60V or –0.80V, depending on the chosen
topology). When the load current increases it causes a
reduction in the FBX pin voltage relative to the internal
reference. This causes the error amplifier to increase
the V pin voltage until the new load current is satisfied.
C
In this manner, the error amplifier sets the correct peak
switch current level to keep the output in regulation. The
LT8334 has overvoltage protection as an intrinsic feature
of the pulse-skipping and Burst Mode of operation. If VOUT
increases above the regulation voltage, this will increase
the voltage on the FBX pin above the internal reference
INTV or >1.7V, the LT8334 uses pulse-skipping mode
CC
and performs spread-spectrum modulation of switching
frequency. For the SYNC/MODE pin driven by an external
clock, the converter switching frequency is synchronized
to that clock and pulse-skipping mode is also enabled. See
the Pin Functions section for SYNC/MODE pin.
voltage. This causes the error amplifier to decrease the V
C
pin voltage, which will naturally stop the switching as the
part enters a full pulse-skipping or Burst Mode idle state.
The LT8334 can generate either a positive or negative out-
put voltage with a single FBX pin. It can be configured as
a boost or SEPIC converter to generate a positive output
voltage, or as an inverting converter to generate a negative
output voltage. When configured as a boost converter,
as shown in the Block Diagram, the FBX pin is pulled up
to the internal bias voltage of 1.60V by a voltage divider
The LT8334 includes a BIAS pin to improve efficiency
across all loads. The LT8334 intelligently chooses between
the V and BIAS pins to supply the INTV for best effi-
CC
ciencIyN. The INTV supply current can be drawn from
CC
the BIAS pin instead of the V pin for 4.4V ≤ BIAS ≤ V .
IN
IN
(R1 and R2) connected from V
to GND. Amplifier A2
OUT
Protection features ensure the immediate disable of
switching and reset of the SS pin for any of the following
faults: internal reference UVLO, INTVCC UVLO, switch cur-
rent > 1.5× maximum limit, EN/UVLO < 1.6V or junction
temperature > 170°C.
becomes inactive and amplifier A1 performs (inverting)
amplification from FBX to V . When the LT8334 is in an
inverting configuration, theCFBX pin is pulled down to
–0.80V by a voltage divider from V
to GND. Amplifier
OUT
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8
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LT8334
APPLICATIONS INFORMATION
ACHIEVING ULTRALOW QUIESCENT CURRENT
frequency will increase but only up to the fixed frequency
defined by the resistor at the RT pin as shown in Figure 1.
The output load at which the LT8334 reaches the fixed
frequency varies based on input voltage, output voltage,
and inductor choice.
To enhance efficiency at light loads, the LT8334 uses a
low ripple Burst Mode architecture. This keeps the out-
put capacitor charged to the desired output voltage while
minimizing the input quiescent current and output ripple.
In Burst Mode operation, the LT8334 delivers single small
pulses of current to the output capacitor followed by sleep
periods where the output power is supplied by the output
capacitor. While in sleep mode, the LT8334 consumes
only 9µA.
I
L
1A/DIV
V
As the output load decreases, the frequency of single cur-
rent pulses decreases (see Figure 1) and the percentage
of time the LT8334 is in sleep mode increases, resulting
in much higher light load efficiency than for typical con-
verters. To optimize the quiescent current performance
at light loads, the current in the feedback resistor divider
must be minimized as it appears to the output as load
current. In addition, all possible leakage currents from
the output should also be minimized as they all add to the
equivalent output load. The largest contributor to leakage
current can be due to the reverse biased leakage of the
Schottky diode (see Diode Selection in the Applications
Information section).
OUT
5mV/DIV
8334 F02
10µs/DIV
Figure 2. Burst Mode Operation
PROGRAMMING INPUT TURN-ON AND TURN-OFF
THRESHOLDS WITH EN/UVLO PIN
The EN/UVLO pin voltage controls whether the LT8334 is
enabled or is in a shutdown state. A 1.6V reference and
a comparator A6 with built-in hysteresis (typical 80mV)
allow the user to accurately program the system input
voltage at which the IC turns on and off (see the Block
Diagram). The typical input-falling and input-rising thresh-
old voltages can be calculated with Equation 1.
2.5
FRONT PAGE APPLICATION
V
V
= 6V
OUT
IN
= 24V
2.0
1.5
1.0
0.5
0
R3 + R4
V
= 1.60 •
IN(FALLING,UVLO(–))
R4
R3 + R4
R4
(1)
V
= 1.68 •
IN(RISING, UVLO(+))
V current is reduced below 1µA when the EN/UVLO pin
IN
voltage is less than 0.2V. The EN/UVLO pin can be con-
nected directly to the input supply VIN for always-enabled
operation. A logic input can also control the EN/UVLO pin.
0
10 20 30 40 50 60 70 80 90 100
LOAD CURRENT(mA)
8334 F01
When operating in Burst Mode operation for light load
currents, the current through the R3 and R4 network can
easily be greater than the supply current consumed by the
LT8334. Therefore, R3 and R4 should be large enough to
minimize their effect on efficiency at light loads.
Figure 1. Burst Frequency vs Load Current
While in Burst Mode operation, the current limit of the
switch is approximately 1.25A resulting in the output
voltage ripple shown in Figure 2. Increasing the output
capacitance will decrease the output ripple proportionally.
As the output load ramps upward from zero the switching
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LT8334
APPLICATIONS INFORMATION
INTV REGULATOR
SYNCHRONIZATION AND MODE SELECTION
CC
A low dropout (LDO) linear regulator, supplied from V ,
To select low ripple Burst Mode operation, for high effi-
ciency at light loads, tie the SYNC/MODE pin below 0.14V
(this can be ground or a logic low output).
IN
produces a 3.2V supply at the INTVCC pin. A minimum 1µF
low ESR ceramic capacitor must be used to bypass the
INTV pin to ground to supply the high transient currents
requiCrCed by the internal power MOSFET gate driver.
To synchronize the LT8334 oscillator to an external fre-
quency connect a square wave (with 20% to 80% duty
cycle) to the SYNC pin. The square wave amplitude should
have valleys that are below 0.4V and peaks above 1.7V
(up to 6V). The LT8334 will not enter Burst Mode opera-
tion at low output loads while synchronized to an external
clock, but instead will pulse skip to maintain regulation.
The LT8334 may be synchronized over a 300kHz to 2MHz
range. The RT resistor should be chosen to set the LT8334
switching frequency equal to or below the lowest synchro-
nization input. For example, if the synchronization sig-
No additional components or loading is allowed on this
pin. The INTV rising threshold (to allow soft-start and
CC
switching) is typically 2.65V. The INTVCC falling threshold
(to stop switching and reset soft-start) is typically 2.5V.
To improve efficiency across all loads, the major-
ity of INTV current can be drawn from the BIAS pin
CC
(4.4V ≤ BIAS ≤ VIN) instead of the VIN pin. For SEPIC
applications with V often greater than V , the BIAS
IN
OUT
pin can be directly connected to V . If the BIAS pin is
OUT
nal will be 500kHz and higher, the R should be selected
T
connected to a supply other than V , be sure to bypass
OUT
for 500kHz.
the pin with a local ceramic capacitor.
For some applications, it is desirable for the LT8334 to
operate in pulse-skipping mode, offering two major dif-
ferences from Burst Mode operation. Firstly, the clock
stays always awake and all switching cycles are aligned to
the clock. Secondly, the full switching frequency is main-
tained at lower output load than in Burst Mode operation.
These two differences come at the expense of increased
quiescent current. To enable pulse-skipping mode, float
the SYNC pin.
PROGRAMMING SWITCHING FREQUENCY
The LT8334 uses a constant frequency PWM architec-
ture that can be programmed to switch from 300kHz to
2MHz by using a resistor tied from the RT pin to ground.
Table 1 shows the necessary RT value for a desired
switching frequency.
The R resistor required for a desired switching frequency
T
can be calculated with Equation 2.
To improve EMI/EMC, the LT8334 can provide spread
spectrum frequency modulation (SSFM). This feature var-
ies the clock with a triangle frequency modulation of 20%.
For example, if the LT8334’s frequency was programmed
to switch at 2MHz, spread spectrum mode will modulate
the oscillator between 2MHz and 2.4MHz. The 20% mod-
51.2
fOSC
RT =
–5.6
(2)
where R is in kΩ and f
is the desired switching fre-
T
OSC
quency in MHz.
ulation will occur at a frequency: f /256 where f
is
OSC
OSC
Table 1. SW Frequency vs RT Value
(MHz)
the switching frequency programmed using the RT pin.
f
R (kΩ)
T
OSC
The LT8334 can also be configured to operate in
pulse-skipping/SSFM mode by tying the SYNC/MODE pin
above 1.7V. The LT8334 can also be configured for Burst
Mode operation at light loads (for improved efficiency)
and SSFM at heavy loads (for low EMI) by tying a 100k
from the SYNC/MODE pin to GND.
0.3
165
107
63.4
45.3
28.7
20
0.45
0.75
1
1.5
2
Rev. 0
10
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LT8334
APPLICATIONS INFORMATION
DUTY CYCLE CONSIDERATION
Choose the resistor values for a negative output voltage
according to Equation 6.
The LT8334 minimum on-time, minimum off-time and
switching frequency (fOSC) define the allowable minimum
and maximum duty cycles of the converter (see Minimum
On-Time, Minimum Off-Time, and Switching Frequency in
the Electrical Characteristics table and Equation 3).
|V
0.8V
|
⎛
⎜
⎝
⎞
⎠
OUT
R1 = R2 •
–1
⎟
(6)
The locations of R1 and R2 are shown in the Block
Diagram. 1% resistors are recommended to maintain
output voltage accuracy.
Minimum Allowable Duty Cycle =
Minimum On-Time(MAX) • fOSC(MAX)
Higher-value FBX divider resistors result in the lowest
input quiescent current and highest light-load efficiency.
FBX divider resistors R1 and R2 are usually in the range
from 25k to 1M.
(3)
Maximum Allowable Duty Cycle =
1 – Minimum Off-Time(MAX) • fOSC(MAX)
The required switch duty cycle range for a boost converter
operating in continuous conduction mode (CCM) can be
calculated with Equation 4.
SOFT-START
The LT8334 contains several features to limit peak switch
currents and output voltage (VOUT) overshoot during
start-up or recovery from a fault condition. The primary
purpose of these features is to prevent damage to external
components or the load.
V
IN(MAX)
DMIN = 1 –
DMAX = 1 –
VOUT + VD
(4)
V
IN(MIN)
VOUT + VD
High peak switch currents during start-up may occur
where, V is the diode forward voltage drop. If the above
duty cycDle calculations for a given application violate
the minimum and/or maximum allowed duty cycles
for the LT8334, operation in discontinuous conduction
in switching regulators. Since V
is far from its final
value, the feedback loop is satuOraUtTed and the regulator
tries to charge the output capacitor as quickly as possible,
resulting in large peak currents. A large surge current may
cause inductor saturation or power switch failure.
mode (DCM) might provide a solution. For the same V
IN
and V
levels, operation in DCM does not demand as
OUT
low a duty cycle as in CCM. DCM also allows higher duty
cycle operation than CCM. The additional advantage of
DCM is the removal of the limitations to inductor value
and duty cycle required to avoid sub-harmonic oscillations
and the right half plane zero (RHPZ). While DCM provides
these benefits, the trade-off is higher inductor peak cur-
rent, lower available output power and reduced efficiency.
The LT8334 addresses this mechanism with a program-
mable soft-start function. As shown in the Block Diagram,
the soft-start function controls the ramp of the power
switch current by controlling the ramp of V through Q1.
This allows the output capacitor to be chCarged gradu-
ally toward its final value while limiting the start-up peak
currents. Figure 3 shows the output voltage and supply
current for the first page Typical Application. It shows
that both the output voltage and supply current come
up gradually.
SETTING THE OUTPUT VOLTAGE
The output voltage is programmed with a resistor divider
from the output to the FBX pin. Choose the resistor values
for a positive output voltage according to Equation 5
V
1.6V
⎛
⎜
⎝
⎞
⎠
OUT
R1 = R2 •
–1
⎟
(5)
Rev. 0
11
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LT8334
APPLICATIONS INFORMATION
LOOP COMPENSATION
Loop compensation determines the stability and transient
performance. The LT8334 uses current mode control to
regulate the output which simplifies loop compensation.
The optimum values depend on the converter topology, the
component values and the operating conditions (including
the input voltage, load current, etc.). To compensate the
feedback loop of the LT8334, a series resistor-capacitor
I
L
1A/DIV
V
OUT
10V/DIV
8334 F03
500µs/DIV
network is usually connected from the V pin to GND.
C
Figure 3. Soft-Start Waveforms
The Block Diagram shows the typical V compensation
C
network. For most applications, the capacitor should be
in the range of 100pF to 10nF, and the resistor should
be in the range of 5k to 100k. A small capacitor is often
connected in parallel with the RC compensation network
FAULT PROTECTION
An inductor overcurrent fault (> 9.4A) and/or INTVCC
undervoltage (INTVCC < 2.5V) and/or thermal lockout
(TJ > 170°C) will immediately prevent switching, will
reset the SS pin and will pull down V . Once all faults are
removed, the LT8334 will soft-start VC and hence inductor
peak current.
to attenuate the V voltage ripple induced from the out-
C
put voltage ripple through the internal error amplifier. The
parallel capacitor usually ranges in value from 2.2pF to
22pF. A practical approach to designing the compensation
network is to start with one of the circuits in this data
sheet that is like your application and tune the compensa-
tion network to optimize the performance. Stability should
then be checked across all operating conditions, including
load current, input voltage and temperature. Application
Note 76 is a good reference.
C
FREQUENCY FOLDBACK
During start-up or fault conditions in which VOUT is
very low, extremely small duty cycles may be required
to maintain control of inductor peak current. The mini-
mum on-time limitation of the power switch might pre-
vent these low duty cycles from being achievable. In this
scenario inductor current rise will exceed inductor cur-
rent fall during each cycle, causing inductor current to
“walk up” beyond the switch current limit. The LT8334
provides protection from this by folding back switching
frequency whenever FBX or SS pins are close to GND
(low VOUT levels or start-up). This frequency foldback
provides a larger switch-off time, allowing inductor cur-
rent to fall enough each cycle (see Normalized Switching
Frequency vs FBX Voltage in the Typical Performance
Characteristics section).
THERMAL CONSIDERATIONS
Care should be taken in the layout of the PCB to ensure
good heat sinking of the LT8334. Both packages have an
exposed pad underneath the IC which is the best path
for heat out of the package. The exposed pad should be
soldered to a continuous copper ground plane under the
device to reduce die temperature and increase the power
capability of the LT8334. The ground plane should be
connected to large copper layers to spread heat dissi-
pated by the LT8334. Power dissipation within the LT8334
(PDISS_LT8334) can be estimated by subtracting the
inductor and Schottky diode power losses from the total
power losses calculated in an efficiency measurement.
The junction temperature of LT8334 can then be esti-
mated with Equation 7.
THERMAL LOCKOUT
If the LT8334 die temperature reaches 170°C (typical),
the part will stop switching and go into thermal lockout.
When the die temperature has dropped by 5°C (nominal),
the part will resume switching with a soft-started inductor
peak current.
TJ(LT8334) = TA + θJA • PDISS_LT8334
(7)
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APPLICATIONS INFORMATION
APPLICATION CIRCUITS
Due to the current limit of its internal power switch, the
LT8334 should be used in a boost converter whose max-
The LT8334 can be configured for different topologies.
The first topology to be analyzed will be the boost con-
verter, followed by the SEPIC and inverting converters.
imum output current (I
)) is given by Equation 11.
O(MAX
V
IN(MIN)
IO(MAX)
≤
• 5A − 0.5 • ΔI
(
• η
)
(11)
SW
VOUT
Boost Converter: Switch Duty Cycle
Minimum possible inductor value and switching fre-
quency should also be considered since they will increase
The LT8334 can be configured as a boost converter for
the applications where the converter output voltage is
higher than the input voltage. Remember that boost con-
verters are not short-circuit protected. Under a shorted
output condition, the inductor current is limited only by
the input supply capability. For applications requiring a
step-up converter that is short-circuit protected, please
refer to the Applications Information section covering
SEPIC converters.
inductor ripple current ∆I
.
SW
The inductor ripple current ∆I has a direct effect on
SW
the choice of the inductor value and the converter’s max-
imum output current capability. Choosing smaller values
of ∆I increases output current capability but requires
SW
large inductances and reduces the current loop gain (the
converter will approach voltage mode). Accepting larger
values of ∆ISW provides fast transient response and
allows the use of low inductances but results in higher
input current ripple and greater core losses and reduces
output current capability. It is recommended to choose a
The conversion ratio as a function of duty cycles is given
by Equation 8.
VOUT
VIN
1
=
(8)
1 − D
∆I of approximately 1.85A.
SW
Given an operating input voltage range, and having cho-
sen the operating frequency and ripple current in the
inductor, the inductor value of the boost converter can
be determined with Equation 12.
in continuous conduction mode (CCM).
For a boost converter operating in CCM, the duty cycle
of the main switch can be calculated based on the output
voltage (V ) and the input voltage (V ). The maximum
OUT
IN
VIN(MIN)
duty cycle (D
) occurs when the converter has the min-
MAX
L =
• DMAX
(12)
ΔISW • fOSC
imum input voltage (Equation 9).
VOUT − VIN(MIN)
The peak inductor current is the switch current limit (max-
imum 7.8A), and the RMS inductor current is approxi-
DMAX
=
(9)
VOUT
mately equal to I
.
L(MAX)(AVG)
Discontinuous conduction mode (DCM) provides higher
conversion ratios at a given frequency at the cost of
reduced efficiencies, higher switching currents, and lower
available output power.
Choose an inductor that can handle at least 7.8A with-
out saturating and ensure that the inductor has a low
DCR (copper wire resistance) to minimize I2R power
losses. Note that in some applications, the current han-
dling requirements of the inductor can be lower, such as
in the SEPIC topology where each inductor only carries
one-half of the total switch current. For better efficiency,
use similar valued inductors with a larger volume. Many
different sizes and shapes are available from various man-
ufacturers (see Table 2). Choose a core material that has
low losses at the programmed switching frequency, such
as a ferrite core. The final value chosen for the inductor
Boost Converter: Maximum Output Current Capability
and Inductor Selection
For the boost topology, the maximum average inductor
current is given by Equation 10.
1
1
η
IL(MAX)(AVG)= IO(MAX)
•
•
(10)
1 − DMAX
where η (< 1.0) is the converter efficiency.
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13
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LT8334
APPLICATIONS INFORMATION
should not allow peak inductor currents to exceed 5A
in steady state at maximum load. Due to tolerances, be
sure to account for minimum possible inductance value,
switching frequency and converter efficiency.
Boost Converter: Output Capacitor Selection
Low ESR (equivalent series resistance) capacitors should
be used at the output to minimize the output ripple volt-
age. Multilayer ceramic capacitors are an excellent choice,
as they are small and have extremely low ESR. Use X5R or
X7R types. This choice will provide low output ripple and
good transient response. A 4.7µF to 47µF output capacitor
is sufficient for most applications, but systems with very
low output currents may need only a 1µF or 2.2µF out-
put capacitor. Solid tantalum or OS-CON capacitor can be
used, but they will occupy more board area than a ceramic
and will have a higher ESR. Always use a capacitor with a
sufficient voltage rating.
For inductor current operation in CCM and duty cycles
above 50%, the LT8334’s internal slope compensation
prevents subharmonic oscillations provided the inductor
value exceeds a minimum value given by Equation 13.
2 •D– 1
V
(
)
IN
L >
•
(13)
–35 •D2 + 53 •D– 13 • f
1–D
(
)
(
)
OSC
Lower L values are allowed if the inductor current oper-
ates in DCM or duty cycle operation is below 50%.
Contributions of ESR (equivalent series resistance),
ESL (equivalent series inductance) and the bulk capac-
itance must be considered when choosing the correct
output capacitors for a given output ripple voltage. The
effect of these three parameters (ESR, ESL and bulk C)
on the output voltage ripple waveform for a typical boost
converter is illustrated in Figure 4.
Table 2. Inductor Manufacturers
Sumida
TDK
www.sumida.com
www.tdk.com
Murata
Coilcraft
Wurth
www.murata.com
www.coilcraft.com
www.we-online.com
t
t
OFF
ON
ΔV
COUT
Boost Converter: Input Capacitor Selection
V
OUT
(AC)
Bypass the input of the LT8334 circuit with a ceramic
capacitor of X7R or X5R type placed as close as possible
to the VIN and GND pins. Y5V types have poor performance
over temperature and applied voltage and should not be
used. A 4.7µF to 10µF ceramic capacitor is adequate to
bypass the LT8334 and will easily handle the ripple cur-
rent. If the input power source has high impedance, or
there is significant inductance due to long wires or cables,
additional bulk capacitance may be necessary. This can
be provided with a low performance electrolytic capacitor.
RINGING DUE TO
TOTAL INDUCTANCE
(BOARD + CAP)
ΔV
ESR
8334 F04
Figure 4. The Output Ripple Waveform of a Boost Converter
The choice of component(s) begins with the maximum
acceptable ripple voltage (expressed as a percentage of
the output voltage), and how this ripple should be divided
between the ESR step ∆VESR and the charging/discharging
∆V
. For the purpose of simplicity, we will choose 2%
forCtOhUeT maximum output ripple, to be divided equally
A precaution regarding the ceramic input capacitor con-
cerns the maximum input voltage rating of the LT8334.
A ceramic input capacitor combined with trace or cable
inductance forms a high quality (under damped) tank cir-
cuit. If the LT8334 circuit is plugged into a live supply, the
input voltage can ring to twice its nominal value, possibly
exceeding the LT8334’s voltage rating. This situation is
easily avoided (see Application Note 88).
between ∆V
and ∆V
. This percentage ripple will
ESR
COUT
change, depending on the requirements of the application,
and the following equations can easily be modified. For
a 1% contribution to the total ripple voltage, the ESR of
the output capacitor can be determined with Equation 14.
0.01 • VOUT
ID(PEAK)
ESRCOUT
≤
(14)
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LT8334
APPLICATIONS INFORMATION
For the bulk C component, which also contributes 1% to
the total ripple is given by Equation 15.
BOOST CONVERTER: DIODE SELECTION
A Schottky diode is recommended for use with the
LT8334. Low leakage Schottky diodes are necessary when
low quiescent current is desired at low loads. The diode
leakage appears as an equivalent load at the output and
should be minimized. Choose Schottky diodes with suf-
ficient reverse voltage ratings for the target applications.
IO(MAX)
COUT
≥
(15)
0.01 • VOUT • fOSC
The output capacitor in a boost regulator experiences high
RMS ripple currents, as shown in Figure 4. The RMS rip-
ple current rating of the output capacitor can be deter-
mined with Equation 16.
Table 4. Recommended Schottky Diodes
AVERAGE
FORWARD REVERSE REVERSE
CURRENT VOLTAGE CURRENT
DMAX
1 − DMAX
(16)
IRMS(COUT) ≥ ID(MAX)
•
PART NUMBER
DFLS240
(A)
(V)
40
40
30
40
(µA)
MANUFACTURER
Diodes, Inc.
Nexperia
2
20
Multiple capacitors are often paralleled to meet ESR
requirements. Typically, once the ESR requirement is sat-
isfied, the capacitance is adequate for filtering and has the
required RMS current rating. Additional ceramic capaci-
tors in parallel are commonly used to reduce the effect of
parasitic inductance in the output capacitor, which reduces
high frequency switching noise on the converter output.
PMEG4050EP
PMEG3020DEP
PMEG4020EPA
5
60
2
15
Nexperia
2
20
Nexperia
BOOST CONVERTER: LAYOUT HINTS
The high speed operation of the LT8334 demands careful
attention to board layout. Careless layout will result in per-
formance degradation. Figure 5 shows the recommended
component placement for a boost converter. Note the vias
under the exposed pad. These should connect to a local
ground plane for better thermal performance.
CERAMIC CAPACITORS
Ceramic capacitors are small, robust and have very low
ESR. However, ceramic capacitors can cause problems
when used with the LT8334 due to their piezoelectric
nature. When in Burst Mode operation, the LT8334’s
switching frequency depends on the load current, and
at very light loads the LT8334 can excite the ceramic
capacitor at audio frequencies, generating audible noise.
Since the LT8334 operates at a lower current limit during
Burst Mode operation, the noise is typically very quiet to a
casual ear. If this is unacceptable, use a high performance
tantalum or electrolytic capacitor at the output. Low noise
ceramic capacitors are also available.
V
V
IN
OUT
NC
EN
SW2
1
2
12
11
V
IN
SW1
3
4
5
6
10
9
V
SYNC
SS
IN
INTV
BIAS
CC
GND
8
RT
7
V
FBX
C
V
OUT
Table 3. Ceramic Capacitor Manufacturers
Taiyo Yuden
AVX
www.ty-top.com
www.avx.com
Murata
www.murata.com
8334 F05
Figure 5. Suggested Boost Converter Layout
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15
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LT8334
APPLICATIONS INFORMATION
SEPIC CONVERTER APPLICATIONS
Conversely, the minimum duty cycle (DMIN) occurs
when the converter operates at the maximum input volt-
age(Equation 19).
The LT8334 can be configured as a SEPIC (single-ended
primary inductance converter), as shown in Figure 6. This
topology allows for the input to be higher, equal, or lower
than the desired output voltage. The conversion ratio as
a function of duty cycle is given by Equation 17.
VOUT + VD
DMIN
=
(19)
V
+ VOUT + VD
IN(MAX)
Be sure to check that D
and D
obey Equation 20.
MAX
MIN
VOUT + VD
D
1 − D
=
(17)
VIN
DMAX < 1 – Minimum Off-Time(MAX) • fOSC(MAX)
and
(20)
in continuous conduction mode (CCM)
DMIN > Minimum On-Time(MAX) • fOSC(MAX)
In a SEPIC converter, no DC path exists between the input
and output. This is an advantage over the boost converter
for applications requiring the output to be disconnected
from the input source when the circuit is in shutdown.
where Minimum Off-Time, Minimum On-Time and f
are specified in the Electrical Characteristics table.
OSC
SEPIC Converter: The Maximum Output Current
Capability and Inductor Selection
C
DC
L1
D1
V
V
OUT
IN
C
OUT
C
As shown in Figure 6, the SEPIC converter contains two
inductors: L1 and L2. L1 and L2 can be independent,
but can also be wound on the same core, since iden-
tical voltages are applied to L1 and L2 throughout the
switching cycle.
IN
L2
V
SW
IN
LT8334
EN/UVLO
FBX
For the SEPIC topology, the current through L1 is the con-
verter input current. Because, ideally, the output power is
equal to the input power, the maximum average inductor
currents of L1 and L2 are given by Equation 21.
INTV
GND
CC
8334 F06
DMAX
1 − DMAX
IL1(MAX)(AVG) = IIN(MAX)(AVG) = IO(MAX)
•
Figure 6. LT8334 Configured in a SEPIC Topology
(21)
IL2(MAX)(AVG) = IO(MAX)
SEPIC Converter: Switch Duty Cycle and Frequency
For a SEPIC converter operating in CCM, the duty cycle
of the main switch can be calculated based on the output
In a SEPIC converter, the switch current is equal to
+ I when the power switch is on, therefore, the
maximum average switch current is defined defined
with Equation 22.
I
L1
L2
voltage (V ), the input voltage (V ) and the diode for-
OUT
IN
ward voltage (V ).
D
The maximum duty cycle (DMAX) occurs when the converter
operates at the minimum input voltage (Equation 18).
I
SW(MAX)(AVG) = IL1(MAX)(AVG) + IL2(MAX)(AVG)
(22)
1
= IO(MAX)
•
VOUT + VD
DMAX
=
1 − DMAX
(18)
V
+ VOUT + VD
IN(MIN)
Rev. 0
16
For more information www.analog.com
LT8334
APPLICATIONS INFORMATION
and the peak switch current is given by Equation 23.
Given an operating input voltage range, and having cho-
sen ripple current in the inductor, the inductor value
(L1 and L2 are independent) of the SEPIC converter can
be determined with Equation 27.
ꢀ
ꢃ
ꢅ
ꢄ
χ
1
(23)
ISW(PEAK) = 1 +
• IO(MAX) •
ꢂ
ꢁ
2
1 − DMAX
The constant c in the preceding equations rep-
resents the percentage peak-to-peak ripple current in the
switch, relative to ISW(MAX)(AVG), as shown in Figure 7.
V
IN(MIN)
L1 = L2 =
• DMAX
(27)
0.5 • ΔISW • fOSC
Then, the switch ripple current ∆I can be calculated
SW
For most SEPIC applications, the equal inductor values
will fall in the range of 2.2µH to 100µH.
with Equation 24.
∆ISW = χ • ISW(MAX)(AVG)
(24)
By making L1 = L2, and winding them on the same core,
the value of inductance in Equation 27 is replaced by 2 ,
L
The inductor ripple currents ∆IL1 and ∆IL2 are identi-
cal (Equation 25).
due to mutual inductance (Equation 28).
V
IN(MIN)
(25)
∆IL1 = ∆IL2 = 0.5 • ∆ISW
L =
• DMAX
(28)
ΔISW • fOSC
I
SW
I
• I
SW(MAX)(AVG)
SW =
This maintains the same ripple current and energy stor-
age n the inductors. The peak inductor currents are given
by Equation 29.
I
SW(MAX)(AVG)
IL1(PEAK) = IL1(MAX) + 0.5 • ∆IL1
t
DT
S
(29)
T
S
IL2(PEAK) = IL2(MAX) + 0.5 • ∆IL2
8334 07
The maximum RMS inductor currents are approximately
equal to the maximum average inductor currents.
Figure 7. The Switch Current Waveform of the SEPIC Converter
The inductor ripple current has a direct effect on the
choice of the inductor value. Choosing smaller values of
Based on the preceding equations, the user should choose
the inductors having sufficient saturation and RMS cur-
rent ratings.
∆ requires large inductances and reduces the current
IL
loop gain (the converter will approach voltage mode).
Accepting larger values of ∆IL allows the use of low
inductances but results in higher input current ripple and
greater core losses. It is recommended that c falls in the
range of 0.5 to 0.8.
Similar to boost converters, the SEPIC converter also
needs slope compensation to prevent subharmonic
oscillations while operating in CCM. The Equation 9 pre-
sented in the Boost Converter: Switch Duty Cycle section
defines the minimum inductance value to avoid subhar-
monic oscillations when coupled inductors are used. For
uncoupled inductors, the minimum inductance require-
ment is doubled.
Due to the current limit of its internal power switch, the
LT8334 should be used in a SEPIC converter whose max-
imum output current (I ) is given by Equation 26.
O(MAX)
(26)
IO(MAX) < (1 – DMAX) • (5A – 0.5 • ∆ISW) • η
SEPIC Converter: Output Diode Selection
where η (< 1.0) is the converter efficiency. Minimum
possible inductor value and switching frequency should
also be considered since they will increase inductor ripple
To maximize efficiency, a fast switching diode with a low
forward drop and low reverse leakage is desirable. The
average forward current in normal operation is equal to
the output current.
current ∆I
.
SW
Rev. 0
17
For more information www.analog.com
LT8334
APPLICATIONS INFORMATION
It is recommended that the peak repetitive reverse voltage
INVERTING CONVERTER APPLICATIONS
rating V
is higher than V
+ V
by a safety
RRM
IN(MAX)
margin (a 10V safety marginOiUsTusually sufficient). The
The LT8334 can be configured as a dual-inductor invert-
ing topology, as shown in Figure 8. The V
is given by Equation 34.
to V ratio
OUT
IN
power dissipated by the diode is given by Equation 30.
PD = IO(MAX) • VD
(30)
⎜VOUT⎜ − VD
D
=
(34)
V
1 − D
where V is diode’s forward voltage drop, and the diode
IN
D
junction temperature given by Equation 31.
in continuous conduction mode (CCM)
TJ = TA + PD • RθJA
(31)
C
+
DC
L1
L2
–
V
V
OUT
IN
–
The Rθ used in this equation normally includes the Rθ
JA
JC
C
OUT
C
IN
for the device, plus the thermal resistance from the board
to the ambient temperature in the enclosure. T must not
J
SW
D1
exceed the diode maximum junction temperature rating.
LT8334
+
GND
SEPIC Converter: Output and Input Capacitor Selection
8334 F08
The selections of the inductor, output diode and input
capacitor of an inverting converter are like those of the
SEPIC converter. Please refer to the corresponding SEPIC
converter sections.
Figure 8. A Simplified Inverting Converter
For an inverting converter operating in CCM, the duty
cycle of the main switch can be calculated based on the
negative output voltage (VOUT) and the input voltage (VIN).
SEPIC Converter: Selecting the DC Coupling Capacitor
The maximum duty cycle (D
) occurs when the con-
MAX
The DC voltage rating of the DC coupling capacitor (CDC,
as shown in Figure 6) should be larger than the maximum
input voltage (Equation 32).
verter has the minimum input voltage (Equation 35).
⎜VOUT⎜ − VD
DMAX
=
(35)
VCDC > V
⎜VOUT⎜ − VD − V
IN(MIN)
(32)
IN(MAX)
Conversely, the minimum duty cycle (D ) occurs when
CDC has nearly a rectangular current waveform. During
MIN
the converter operates at the maximum input voltage
the switch off-time, the current through CDC is I , while
IN
(Equation 36).
approximately –I flows during the on-time. The RMS rating
of the coupling cOapacitor is determined with Equation 33.
⎜VOUT⎜ + VD
DMIN
=
(36)
⎜VOUT⎜ + VD + V
VOUT + VD
IN(MAX)
IRMS(CDC) > ID(MAX)
•
(33)
V
IN(MIN)
Be sure to check that D
and D
obey Equation 37.
MAX
MIN
A low ESR and ESL, X5R or X7R ceramic capacitor works
well for CDC.
DMAX < 1 – Minimum Off-Time(MAX) • fOSC(MAX)
and
(37)
DMIN > Minimum On-Time(MAX) • fOSC(MAX)
where Minimum Off-Time, Minimum On-Time and f
are specified in the Electrical Characteristics table.
OSC
Rev. 0
18
For more information www.analog.com
LT8334
APPLICATIONS INFORMATION
Inverting Converter: Inductor, Output Diode and Input
Capacitor Selections
The RMS ripple current rating of the output capacitor
needs to be greater than (Equation 39).
IRMS(COUT) > 0.3 • ∆IL2
(39)
The selections of the inductor, output diode and input
capacitor of an inverting converter are similar to those
of the SEPIC converter. Please refer to the corresponding
SEPIC converter sections.
Inverting Converter: Selecting the DC
Coupling Capacitor
The DC voltage rating of the DC coupling capacitor
(CDC, as shown in Figure 8) should be larger than the
maximum input voltage minus the output voltage (nega-
tive voltage), Equation 40.
Inverting Converter: Output Capacitor Selection
The inverting converter requires much smaller output
capacitors than those of the boost, flyback and SEPIC
converters for similar output ripples. Since in the inverting
converters, the inductor L2 is in series with the output,
and the ripple current flowing through the output capaci-
tors are continuous. The output ripple voltage is produced
by the ripple current of L2 flowing through the ESR and
bulk capacitance of the output capacitor (Equation 38).
VCDC > V
+| VOUT|
(40)
IN(MAX)
CDC has nearly a rectangular current waveform.
During the switch off-time, the current through CDC is
I , while approximately –I flows during the on-time.
IN
O
The RMS rating of the coupling capacitor is determined
with Equation 41.
ꢀ
ꢃ
ꢅ
ꢄ
1
ΔVOUT(P–P) = ΔIL2 • ESR
+
(38)
ꢂ
COUT
8 • fOSC • COUT
ꢁ
DMAX
1 − DMAX
IRMS(CDC) >IO(MAX)
•
(41)
After specifying the maximum output ripple, the user can
select the output capacitors according to Equation 38.
A low ESR and ESL, X5R or X7R ceramic capacitor works
well for CDC.
The ESR can be minimized by using high quality X5R or
X7R dielectric ceramic capacitors. In many applications,
ceramic capacitors are sufficient to limit the output volt-
age ripple.
Rev. 0
19
For more information www.analog.com
LT8334
TYPICAL APPLICATIONS
2MHz, 2.8V to 28V Input, 5V SEPIC Converter
C3
4.7µF
L1A
V
OUT
D1
1.3µH
5V
V
IN
2A AT V = 5V
IN
2.8V TO 28V
2.9A AT V = 12V
IN
3.3A AT V = 24V
C1
22µF
C2
IN
V
IN
SW
L1B
1.3µH
22µF
×3
C7
R1
4.7pF
1M
Efficiency
EN/UVLO
100
95
90
85
80
75
70
65
60
55
50
FBX
LT8334
BIAS
V
OUT
R2
464k
SYNC/MODE
INTV
CC
RT
SS
GND
V
C
C6
1µF
R4
C4
R3
20.0k
39k
0.1µF
C5
8334 TA03a
1nF
V
V
= 5V
= 12V
2MHz
IN
IN
D1: NEXPERIA PMEG4050EP
L1A, L1B: WURTH 744878001
0
0.5
1
1.5
2
2.5
3
3.5
LOAD CURRENT (A)
8334 TA03b
2MHz, 2.8V to 26V Input, 12V SEPIC Converter
C3
L1A
V
OUT
4.7µF
2.2µH
D1
12V
1.2A AT V = 5V
V
IN
IN
2.8V TO 26V
2A
AT V = 12V
IN
IN
C2
22µF
×3
2.5A AT V = 24V
C1
V
IN
SW
L1B
22µF
C7
R1
2.2µH
4.7pF
1M
EN/UVLO
FBX
LT8334
BIAS
V
OUT
R2
154k
Efficiency
SYNC/MODE
INTV
CC
100
95
90
85
80
75
70
65
60
55
RT
SS
GND
V
C
C6
R4
22k
C5
1nF
1µF
C4
R3
0.1µF
20.0k
8334 TA04a
2MHz
D1: NEXPERIA PMEG4030ER
L1A, L1B: EATON DRQ74-2R2-R
= 5V
= 12V
V
V
IN
IN
50
0
0.5
1
1.5
2
2.5
LOAD CURRENT (A)
8334 TA04b
Rev. 0
20
For more information www.analog.com
LT8334
TYPICAL APPLICATIONS
2MHz, 2.8V to 26V Input, –12V Inverting Converter
C3
4.7µF
L1B
L1A
V
OUT
2.2µH
2.2µH
–12V
1.2A AT V = 5V
V
IN
IN
IN
IN
2.8V TO 26V
2A
AT V = 12V
C2
22µF
×3
C1
22µF
2.5A AT V = 24V
V
IN
SW
D1
C7
4.7pF
R1
1M
EN/UVLO
FBX
BIAS
INTV
LT8334
R2
71.5k
Efficiency
SYNC/MODE
CC
100
95
90
85
80
75
70
65
60
55
RT
SS
GND
V
C
C6
1µF
R4
51k
C4
R3
0.1µF
8334 TA05a
20.0k
C5
680pF
2MHz
D1: NEXPERIA PMEG4030ER
L1A, L1B: EATON DRQ74-2R2-R
V
= 5V
= 12V
IN
V
IN
50
0
0.5
1
1.5
2
2.5
LOAD CURRENT (A)
8334 TA05a
Rev. 0
21
For more information www.analog.com
LT8334
TYPICAL APPLICATIONS
Low IQ, Low EMI, 2MHz, 12V Output SEPIC Converter with SSFM
C3
4.7µF
L1A
2.2µH
INPUT EMI FILTER
OUTPUT EMI FILTER
V
OUT
D1
FB1
FB2
12V
V
IN
1.2A AT V = 5V
2.8V TO 26V
IN
2A
AT V = 12V
IN
C12
68µF
C1
10µF
C7
2.2µF
C2
22µF
×3
2.5A AT V = 24V
V
IN
SW
IN
L1B
2.2µH
0.1µF
0.1µF
2.2µF
2.2µF
C13
4.7pF
R1
1M
EN/UVLO
FBX
BIAS
LT8334
R2
154k
SYNC/MODE
INTV
CC
RT
SS
GND
V
C
C6
1µF
R4
R5
C4
0.1µF
R3
22k
100k
20.0k
8334 TA06a
C5
1nF
2MHz
D1: NEXPERIA PMEG4030ER
L1A, L1B: EATON DRQ74-2R2-R
FB1, FB2: WURTH 742792515
CISPR25 Conducted Emission Performance Voltage Method
80
CLASS 5 PEAK LIMIT
70
EVAL-LT8334-AZ
AMBIENT
60
50
40
30
20
10
0
–10
–20
0.1
1
10
108
FREQUENCY (MHz)
8334 TA06b
Rev. 0
22
For more information www.analog.com
LT8334
PACKAGE DESCRIPTION
DE/UE Package
12-Lead Plastic DFN (4mm × 3mm)
(Reference LTC DWG # 05-08-1695 Rev D)
0.70 ±0.05
3.30 ±0.05
3.60 ±0.05
2.20 ±0.05
1.70 ±0.05
PACKAGE OUTLINE
0.25 ±0.05
0.50 BSC
2.50 REF
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED
0.40 ±0.10
4.00 ±0.10
(2 SIDES)
R = 0.115
TYP
7
12
R = 0.05
TYP
3.30 ±0.10
3.00 ±0.10
(2 SIDES)
1.70 ±0.10
PIN 1
TOP MARK
(NOTE 6)
PIN 1 NOTCH
R = 0.20 OR
0.35 × 45°
CHAMFER
(UE12/DE12) DFN 0806 REV D
6
1
0.25 ±0.05
0.75 ±0.05
0.200 REF
0.50 BSC
2.50 REF
BOTTOM VIEW—EXPOSED PAD
0.00 – 0.05
NOTE:
1. DRAWING PROPOSED TO BE A VARIATION OF VERSION
(WGED) IN JEDEC PACKAGE OUTLINE M0-229
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION
ON THE TOP AND BOTTOM OF PACKAGE
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog
Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications
23
subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
LT8334
TYPICAL APPLICATION
2MHz, 4V to 20V Input, 24V Output Boost Converter
L1
2.2µH
V
OUT
D1
24V
820mA AT V = 5V
V
IN
IN
IN
IN
4V TO 20V
2A
AT V = 12V
C2
10µF
×2
C1
10µF
2.75A AT V = 16V
V
IN
SW
R1
1M
EN/UVLO
Efficiency
FBX
LT8334
100
95
90
85
80
75
70
65
60
55
50
BIAS
R2
71.5k
SYNC/MODE
INTV
CC
R
SS
GND
V
C
T
C6
1µF
R4
C4
0.1µF
R3
39k
20.0k
C5
8334 TA02a
1nF
2MHz
D1: NEXPERIA PMEG4030ER
L1: COILCRAFT XGL4020-222
V
V
= 5V
IN
IN
= 12V
0.001
0.01
0.1
1
3
LOAD CURRENT (A)
8334 TA02b
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
LT8300
100V Micropower Isolated Flyback
V
IN
= 6V to 100V, Low I Monolithic No-Opto Flyback, 5-Lead TSOT-23.
Q
IN
Converter with 150V/260mA Switch
LT8330
60V, 1A, Low I Boost/SEPIC/Inverting
V
= 3V to 40V, V
= 60V, I = 6µA (Burst Mode Operation), 6-Lead TSOT-23,
Q
IN
OUT(MAX) Q
2MHz Converter
3mm × 2mm DFN Packages.
LT8331
Low I Boost/SEPIC/Flyback/Inverting
V
IN
= 4.5V to 100V, V = 140V, I = 6µA (Burst Mode Operation), MSOP-16(12)E.
OUT(MAX) Q
Q
Converter with 140V/0.5A Switch
LT8335
28V, 2A, Low I Boost/SEPIC/Inverting
V
= 3V to 25V, V
= 25V, I = 6µA (Burst Mode Operation), 3mm × 2mm
OUT(MAX) Q
Q
IN
2MHz Converter
DFN Package.
LT8333
Low I Boost/SEPIC/Inverting
V
= 2.8V to 40V, V
= 40V, I = 9µA (Burst Mode Operation), 3mm × 3mm
Q
Q
IN
OUT(MAX)
OUT(MAX)
Converter with 3A, 40V Switch
DFN Package.
LT8362
Low I Boost/SEPIC/Inverting
V
= 2.8V to 60V, V
= 60V, I = 9µA (Burst Mode Operation), 12-Lead MSE16,
Q
Q
IN
Converter with 2A, 60V Switch
3mm × 3mm DFN Packages.
= 2.8V to 60V, V = 60V, I = 9µA (Burst Mode Operation), 12-Lead MSE16,
OUT(MAX) Q
LT8364
Low I Boost/SEPIC/Inverting
V
Q
IN
Converter with 4A, 60V Switch
4mm × 3mm DFN Packages.
LT8494
70V, 2A Boost/SEPIC 1.5MHz High
Efficiency Step-Up DC/DC Converter
V
SD
= 1V to 60V (2.5V to 32V Start-Up), V
= 70V, I = 3µA (Burst Mode Operation),
OUT(MAX) Q
IN
I
= <1µA, 20-Lead TSSOP.
LT8570/LT8570-1
65V, 500mA/250mA Boost/Inverting
DC/DC Converter
V
= 2.55V, V
= 40V, V = 60V, I = 1.2mA, I = <1mA,
OUT(MAX) Q SD
IN(MIN)
IN(MAX)
3mm × 3mm DFN-8, MSOP-8E.
Rev. 0
10/21
www.analog.com
ANALOG DEVICES, INC. 2021
24
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