LT8640S-2 [ADI]
42V, 6A Synchronous Step-Down Silent Switcher;
| 型号： | LT8640S-2 |
| 厂家： | 
ADI |
| 描述： | 42V, 6A Synchronous Step-Down Silent Switcher |
| 文件： | 总30页 (文件大小：2563K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LT8640S-2/LT8643S-2
42V, 6A Synchronous
Step-Down Silent Switcher with
2.5µA Quiescent Current
DESCRIPTION
FEATURES
Silent Switcher® Architecture
The LT®8640S-2/LT8643S-2 synchronous step-down
regulator features Silent Switcher architecture designed
to minimize EMI emissions while delivering high efficiency
at high switching frequencies. Peak current mode control
with a 30ns minimum on-time allows high step-down
n
n
Ultralow EMI Emissions
n
Optional Spread Spectrum Modulation
n
High Efficiency at High Frequency
n
Up to 96% Efficiency at 1MHz, 12V to 5V
Up to 95% Efficiency at 2MHz, 12V to 5V
IN
IN
OUT
OUT
ratios even at high switching frequencies.The LT8643S-2
has external compensation to enable current sharing and
fast transient response at high switching frequencies.
n
n
n
n
Wide Input Voltage Range: 3.4V to 42V
6A Maximum Continuous, 7A Peak Output
Ultralow Quiescent Current Burst Mode® Operation
Burst Mode operation enables ultralow standby current
consumption, forced continuous mode can control
frequency harmonics across the entire output load range,
or spread spectrum operation can further reduce EMI
emissions.
n
2.5µA I Regulating 12V to 3.3V
(LT8640S-2)
Q
IN
P-P
OUT
n
Output Ripple < 10mV
n
External Compensation: Fast Transient Response
and Current Sharing (LT8643S-2)
n
n
n
n
n
n
Fast Minimum Switch On-Time: 30ns
Low Dropout Under All Conditions: 100mV at 1A
Forced Continuous Mode
Adjustable and Synchronizable: 200kHz to 3MHz
Output Soft-Start and Tracking
Small 24-Lead 4mm × 4mm LQFN Package
SYNC/
INTERNAL
PACKAGE MODE ≠ 0 V COMP H-GRADE CLKOUT CAPS
C
Pulse-
Skipping
LT8640
QFN
Internal
Yes
No
No
LT8640-1
LT8640S
LT8643S
QFN
LQFN
LQFN
FCM
Internal
Internal
External
Internal
External
Yes
No
No
No
Yes
Yes
No
FCM
Yes
Yes
Yes
Yes
FCM
No
LT8640S-2 LQFN
LT8643S-2 LQFN
FCM
Yes
Yes
APPLICATIONS
FCM
No
n
Automotive and Industrial Supplies
General Purpose Step-Down
n
All registered trademarks and trademarks are the property of their respective owners. Protected
by U.S. patents, including 8823345.
TYPICAL APPLICATION
12VIN to 5VOUT Efficiency
5V, 6A Step-Down Converter
ꢀ00
ꢀꢁ
ꢀ0
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ꢀ0
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ꢀ0
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ꢀ0
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ꢀꢁꢂ
ꢀꢁꢂ
ꢀꢁ0
ꢀꢁꢂ
ꢀꢁꢂ
0ꢀꢁ
0ꢀꢁ
0
ꢎ
ꢏꢐ
ꢛꢜꢝꢎ ꢁꢚ ꢄꢇꢎ
ꢓꢐꢔꢕꢎ
ꢎ
ꢎ
ꢏꢐ
ꢄꢜꢝꢘꢗ
ꢏꢐ
ꢀꢁꢁꢂꢃꢂꢀꢄꢃꢅ
ꢊꢘꢗ
ꢊꢘꢗ
ꢑꢐꢒ
ꢑꢐꢒ
ꢍꢅꢁ
ꢀꢁꢂꢃꢄ0ꢅꢆꢇ
0ꢜꢊꢘꢗ ꢟꢜꢟꢘꢠ
ꢊ0ꢞꢗ
ꢎ
ꢛꢎ
ꢃꢉ
ꢚꢕꢁ
ꢅꢌ
ꢀꢁꢂꢃR ꢄꢁꢅꢅ
ꢍꢏꢉꢅ
ꢏꢐꢁꢎ
Rꢁ
ꢖꢖ
ꢊꢙ
ꢀꢁꢂꢃꢄ ꢅ ꢆ ꢇꢈꢇꢉꢂ
ꢀꢁꢂꢃꢄ ꢅ ꢆ ꢀꢇꢀꢈꢂ
ꢀꢁꢂꢃꢄ ꢅ ꢆ ꢇꢈꢂ
ꢊꢘꢗ
ꢊ00ꢘꢗ
ꢗꢍ
ꢄꢊꢜꢇꢡ
ꢑꢐꢒ
ꢇꢄꢟꢡ
0ꢀꢁ
ꢀ
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ꢀ
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ꢀ ꢀꢁꢂ ꢀ ꢀꢁꢂ ꢀ ꢀꢁꢀ ꢀ
ꢀꢁꢂꢃ ꢄꢅRRꢆꢇꢈ ꢉꢂꢊ
ꢀꢁꢂ0ꢃꢄ ꢅꢆ0ꢇꢈ
ꢂꢃꢄ0ꢈꢇ ꢁꢉ0ꢊꢋ
ꢢ
ꢣ ꢊꢙꢠꢤ
ꢅꢌ
Rev 0
1
Document Feedback
For more information www.analog.com
LT8640S-2/LT8643S-2
ABSOLUTE MAXIMUM RATINGS (Note 1)
V , EN/UV, PG..........................................................42V
Operating Junction Temperature Range (Note 2)
IN
BIAS..........................................................................25V
FB, TR/SS . .................................................................4V
SYNC/MODE Voltage . ................................................6V
LT8640S-2E/LT8643S-2E .................. –40°C to 125°C
LT8640S-2I/LT8643S-2I .................... –40°C to 125°C
LT8640S-2H/LT8643S-2H ................. –40°C to 150°C
Storage Temperature Range .................. –65°C to 150°C
Maximum Reflow (Package Body) Temperature.....260°C
PIN CONFIGURATION
LT8640S-2
LT8643S-2
ꢇꢈꢉ ꢊꢋꢌꢍ
ꢇꢈꢉ ꢊꢋꢌꢍ
ꢀꢃ ꢀꢂ ꢀꢀ ꢀꢁ ꢀ0 ꢁꢄ
ꢀꢃ ꢀꢂ ꢀꢀ ꢀꢁ ꢀ0 ꢁꢄ
ꢝꢋꢒꢤ
ꢁ
ꢀ
ꢂ
ꢃ
ꢥ
ꢨ
ꢁꢆ Rꢇ
ꢁꢅ ꢌꢑ
ꢁꢨ ꢕꢑꢗ
ꢁꢥ ꢑꢓ
ꢝꢋꢒꢤ
ꢁ
ꢀ
ꢂ
ꢃ
ꢥ
ꢨ
ꢁꢆ Rꢇ
ꢁꢅ ꢌꢑ
ꢁꢨ ꢕꢑꢗ
ꢁꢥ ꢑꢓ
ꢀꢥ
ꢀꢨ
ꢀꢥ
ꢀꢨ
ꢋꢑꢇꢊ
ꢋꢑꢇꢊ
ꢓꢓ
ꢓꢓ
ꢕꢑꢗ
ꢕꢑꢗ
ꢕꢑꢗ
ꢕꢑꢗ
ꢕꢑꢗ
ꢕꢑꢗ
ꢑꢓ
ꢑꢓ
ꢀꢅ
ꢕꢑꢗ
ꢀꢆ
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ꢀꢅ
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ꢀꢆ
ꢕꢑꢗ
ꢊ
ꢋꢑ
ꢁꢃ
ꢁꢂ
ꢊ
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ꢋꢑ
ꢁꢃ
ꢁꢂ
ꢊ
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ꢋꢑ
ꢋꢑ
ꢋꢑ
ꢋꢑ
ꢊ
ꢊ
ꢋꢑ
ꢋꢑ
ꢅ
ꢆ
ꢄ
ꢁ0 ꢁꢁ ꢁꢀ
ꢅ
ꢆ
ꢄ
ꢁ0 ꢁꢁ ꢁꢀ
ꢎꢏꢐꢑ ꢉꢒꢓꢔꢒꢕꢌ
ꢀꢃꢖꢎꢌꢒꢗ ꢘꢃꢙꢙ × ꢃꢙꢙ × 0ꢚꢄꢃꢙꢙꢛ
ꢎꢏꢐꢑ ꢉꢒꢓꢔꢒꢕꢌ
ꢀꢃꢖꢎꢌꢒꢗ ꢘꢃꢙꢙ × ꢃꢙꢙ × 0ꢚꢄꢃꢙꢙꢛ
ꢜꢌꢗꢌꢓ ꢝꢈꢒRꢗꢞ θ ꢟ ꢂꢆꢠꢓꢡꢍꢢ θ ꢟ ꢅꢠꢓꢡꢍ ꢘꢑꢈꢇꢌ ꢂꢛ
ꢜꢌꢗꢌꢓ ꢝꢈꢒRꢗꢞ θ ꢟ ꢂꢆꢠꢓꢡꢍꢢ θ ꢟ ꢅꢠꢓꢡꢍ ꢘꢑꢈꢇꢌ ꢂꢛ
ꢜꢒ
ꢜꢓꢘꢉꢒꢗꢛ
ꢜꢒ
ꢜꢓꢘꢉꢒꢗꢛ
ꢌꢣꢉꢈꢤꢌꢗ ꢉꢒꢗ ꢘꢉꢋꢑꢤ ꢀꢥ ꢇꢈ ꢀꢆꢛ ꢒRꢌ ꢕꢑꢗꢢ ꢤꢦꢈꢧꢎꢗ ꢝꢌ ꢤꢈꢎꢗꢌRꢌꢗ ꢇꢈ ꢉꢓꢝ
ꢌꢣꢉꢈꢤꢌꢗ ꢉꢒꢗ ꢘꢉꢋꢑꢤ ꢀꢥ ꢇꢈ ꢀꢆꢛ ꢒRꢌ ꢕꢑꢗꢢ ꢤꢦꢈꢧꢎꢗ ꢝꢌ ꢤꢈꢎꢗꢌRꢌꢗ ꢇꢈ ꢉꢓꢝ
ORDER INFORMATION
PACKAGE
TYPE**
MSL
RATING
PART NUMBER
PART MARKING*
FINISH CODE
PAD FINISH
TEMPERATURE RANGE
–40°C to 125°C
–40°C to 125°C
–40°C to 150°C
–40°C to 125°C
–40°C to 125°C
–40°C to 150°C
LT8640SEV-2#PBF
LT8640SIV-2#PBF
LT8640SHV-2#PBF
LT8643SEV-2#PBF
LT8643SIV-2#PBF
LT8643SHV-2#PBF
86402
LQFN (Laminate Package
with QFN Footprint)
e4
Au (RoHS)
3
86432
• Consult Marketing for parts specified with wider operating temperature
ranges. *Device temperature grade is identified by a label on the shipping
container.
• Recommended PCB Assembly and Manufacturing Procedures:
www.analog.com/umodule/pcbassembly
• Package and Tray Drawings: www.analog.com/packaging
• Pad finish code is per IPC/JEDEC J-STD-609.
Parts ending with PBF are RoHS and WEEE compliant. **The LT8640S-2/LT8643S-2 package has the same dimensions as a standard 4mm × 4mm QFN package.
Rev 0
2
For more information www.analog.com
LT8640S-2/LT8643S-2
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C.
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
l
l
l
l
Minimum Input Voltage
3.0
3.4
V
V
Quiescent Current in Shutdown
V
EN/UV
V
EN/UV
V
EN/UV
= 0V
0.75
0.75
3
10
µA
µA
IN
LT8640S-2 V Quiescent Current in Sleep
= 2V, V > 0.97V, V
= 0V
1.7
1.7
4
10
µA
µA
IN
FB
SYNC
SYNC
(Internal Compensation)
LT8643S-2 V Quiescent Current in Sleep
= 2V, V > 0.97V, V
= 0V, V
= 0V
230
230
290
340
µA
µA
IN
FB
BIAS
(External Compensation)
V
V
= 2V, V > 0.97V, V
= 0V, V
= 0V, V
= 5V
= 5V
19
25
µA
µA
EN/UV
FB
SYNC
BIAS
BIAS
LT8643S-2 BIAS Quiescent Current in Sleep
= 2V, V > 0.97V, V
200
260
EN/UV
FB
SYNC
l
l
LT8640S-2 V Current in Regulation
V
OUT
V
OUT
= 0.97V, V = 6V, I
= 100µA, V = 0
SYNC
21
220
60
390
µA
µA
IN
IN
LOAD
LOAD
= 0.97V, V = 6V, I
= 1mA, V
= 0
IN
SYNC
Feedback Reference Voltage
V
V
= 6V
0.964
0.958
0.970
0.970
0.976
0.982
V
V
IN
IN
l
l
= 6V
Feedback Voltage Line Regulation
Feedback Pin Input Current
V
V
= 4.0V to 36V
= 1V
0.004
0.02
20
%/V
nA
IN
–20
FB
LT8643S-2 Error Amp Transconductance
LT8643S-2 Error Amp Gain
V = 1.25V
1.7
260
350
350
5
mS
C
LT8643S-2 V Source Current
V
V
= 0.77V, V = 1.25V
µA
µA
A/V
V
C
FB
C
LT8643S-2 V Sink Current
= 1.17V, V = 1.25V
C
C
FB
LT8643S-2 V Pin to Switch Current Gain
C
LT8643S-2 V Clamp Voltage
2.6
14
C
BIAS Pin Current Consumption
Minimum On-Time
V
BIAS
= 3.3V, f = 2MHz
mA
SW
l
l
I
I
= 1.5A, SYNC = 0V
= 1.5A, SYNC = 2V
30
30
50
45
ns
ns
LOAD
LOAD
Minimum Off-Time
Oscillator Frequency
80
110
ns
l
l
l
R = 221k
180
665
1.8
210
700
1.95
240
735
2.1
kHz
kHz
MHz
T
R = 60.4k
T
R = 18.2k
T
Top Power NMOS On-Resistance
Top Power NMOS Current Limit
Bottom Power NMOS On-Resistance
SW Leakage Current
I
= 1A
66
10
27
mΩ
A
SW
l
l
7.5
12.5
V
V
= 3.4V, I = 1A
mΩ
µA
V
INTVCC
SW
= 42V, V = 0V, 42V
–1.5
0.94
1.5
IN
SW
EN/UV Pin Threshold
EN/UV Rising
1.0
40
1.06
EN/UV Pin Hysteresis
mV
nA
%
EN/UV Pin Current
V
V
V
= 2V
–20
5
20
EN/UV
l
l
PG Upper Threshold Offset from V
Falling
7.5
–8
10.25
–10.75
FB
FB
FB
PG Lower Threshold Offset from V
PG Hysteresis
Rising
–5.25
%
FB
0.2
%
PG Leakage
V
V
= 3.3V
= 0.1V
–40
40
nA
Ω
PG
l
PG Pull-Down Resistance
SYNC/MODE Threshold
700
2000
PG
l
l
l
SYNC/MODE DC and Clock Low Level Voltage
SYNC/MODE Clock High Level Voltage
SYNC/MODE DC High Level Voltage
0.7
2.2
0.9
1.2
2.55
V
V
V
1.4
2.9
Rev 0
3
For more information www.analog.com
LT8640S-2/LT8643S-2
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C.
PARAMETER
CONDITIONS
R = 60.4k, V
MIN
TYP
MAX
UNITS
Spread Spectrum Modulation
Frequency Range
= 3.3V
SYNC
22
%
T
Spread Spectrum Modulation Frequency
TR/SS Source Current
V
= 3.3V
3
kHz
µA
Ω
SYNC
l
1.2
1.9
200
0.6
2.6
TR/SS Pull-Down Resistance
Fault Condition, TR/SS = 0.1V
Output Sink Current in Forced Continuous
Mode
V
FB
= 1.01V, L = 6.8µH, R = 60.4k
0.25
35
1.1
39
A
T
V
IN
to Disable Forced Continuous Mode
V
Rising
37
V
IN
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
temperature (T , in °C) is calculated from the ambient temperature (T in
°C) and power dissipation (PD, in Watts) according to the formula:
J
A
T = T + (PD • θ )
JA
J
A
where θ (in °C/W) is the package thermal impedance.
JA
Note 2: The LT8640-2E/LT8643E is guaranteed to meet performance
specifications from 0°C to 125°C junction temperature. Specifications
over the –40°C to 125°C operating junction temperature range are assured
by design, characterization, and correlation with statistical process
controls. The LT8640-2I/LT8643I is guaranteed over the full –40°C to
125°C operating junction temperature range. The LT8640-2H/LT8643H is
guaranteed over the full –40°C to 150°C operating junction temperature
range. High junction temperatures degrade operating lifetimes. Operating
lifetime is derated at junction temperatures greater than 125°C. The junction
Note 3: θ values determined per JEDEC 51-7, 51-12. See the Applications
Information section for information on improving the thermal resistance
and for actual temperature measurements of a demo board in typical
operating conditions.
Note 4: This IC includes overtemperature protection that is intended to
protect the device during overload conditions. Junction temperature will
exceed 150°C when overtemperature protection is active. Continuous
operation above the specified maximum operating junction temperature
will reduce lifetime.
Rev 0
4
For more information www.analog.com
LT8640S-2/LT8643S-2
TYPICAL PERFORMANCE CHARACTERISTICS
12VIN to 5VOUT Efficiency
vs Frequency
12VIN to 3.3VOUT Efficiency
vs Frequency
Efficiency at 5VOUT
ꢀ00
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ꢀ0
ꢀꢁ
ꢀ0
ꢀꢁꢂ
ꢀꢁꢂ
ꢀꢁꢂ
ꢀꢁ0
ꢀꢁꢂ
ꢀꢁꢂ
0ꢀꢁ
0ꢀꢁ
0
ꢀ00
ꢀꢁ
ꢀ0
ꢀꢁ
ꢀ0
ꢀꢁ
ꢀ0
ꢀꢁ
ꢀ0
ꢀꢁꢂ
ꢀꢁꢂ
ꢀꢁꢂ
ꢀꢁ0
ꢀꢁꢂ
ꢀꢁꢂ
0ꢀꢁ
0ꢀꢁ
0
ꢀ00
ꢀꢁ
ꢀ0
ꢀꢁ
ꢀ0
ꢀꢁ
ꢀ0
ꢀꢁ
ꢀ0
ꢀꢀ
ꢀ0
ꢀꢁ0
ꢀꢁꢂ
ꢀꢁꢂ
ꢀꢁꢂ
ꢀꢁꢂ
ꢀꢁꢂ
ꢀꢁꢂ
0ꢀꢁ
0ꢀꢁ
0ꢀꢁ
0
ꢀꢁꢁꢂꢃꢂꢀꢄꢃꢅ
ꢀꢁꢁꢂꢃꢂꢀꢄꢃꢅ
ꢀꢁꢁꢂꢃꢂꢀꢄꢃꢅ
ꢀꢁꢂꢃR ꢄꢁꢅꢅ
ꢀꢁꢂꢃR ꢄꢁꢅꢅ
ꢀꢁꢂꢃR ꢄꢁꢅꢅ
ꢀ
ꢀ
ꢀ
ꢀ ꢁꢂꢃ
ꢀ ꢁꢂꢃ
ꢀ ꢁꢂꢃ
ꢀꢁ
ꢀꢁ
ꢀꢁ
ꢀ ꢁ ꢂꢃꢄꢀꢅꢆꢇꢈ0ꢉ0
ꢀ ꢁ ꢂꢃꢄꢀꢅꢆꢇꢈ0ꢉ0
ꢀꢁꢂꢃꢄ ꢅ ꢆ ꢇꢈꢇꢉꢂ
ꢀꢁꢂꢃꢄ ꢅ ꢆ ꢀꢇꢀꢈꢂ
ꢀꢁꢂꢃꢄ ꢅ ꢆ ꢇꢈꢂ
ꢀꢁꢂꢃꢄ ꢅ ꢆ ꢇꢈꢇꢉꢂ
ꢀꢁꢂꢃꢄ ꢅ ꢆ ꢇꢈꢂ
ꢀꢁꢂꢃꢄ ꢅ ꢆ ꢇꢈꢂ
ꢀ
ꢀ ꢁꢂꢃꢄ
ꢀꢁ
ꢀ ꢁ ꢂꢃꢀꢄꢅꢆꢅꢆꢇꢈꢉ0ꢊꢋ ꢅꢌꢅꢍꢃ
0ꢀꢁ
ꢀ
ꢀꢁꢂ
ꢀ
ꢀꢁꢂ
ꢀ
ꢀꢁꢂ
ꢀ
ꢀꢁꢂ
ꢀ
ꢀꢁꢀ
ꢀ
0ꢀꢁ
ꢀ
ꢀꢁꢂ
ꢀ
ꢀꢁꢂ
ꢀ ꢀꢁꢂ ꢀ ꢀꢁꢂ ꢀ ꢀꢁꢀ ꢀ
0
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀꢁꢂꢃ ꢄꢅRRꢆꢇꢈ ꢉꢂꢊ
ꢀꢁꢂꢃ ꢄꢅRRꢆꢇꢈ ꢉꢂꢊ
ꢀꢁꢂꢃ ꢄꢅRRꢆꢇꢈ ꢉꢂꢊ
ꢀꢁꢂ0ꢃꢄ ꢅ0ꢆ
ꢀꢁꢂ0ꢃꢄ ꢅ0ꢄ
ꢀꢁꢂ0ꢃꢄ ꢅ0ꢆ
LT8640S-2 Low Load Efficiency
at 5VOUT
LT8643S-2 Low Load Efficiency
at 5VOUT
Efficiency at 3.3VOUT
ꢀ00
ꢀꢁ
ꢀ0
ꢀꢁ
ꢀ0
ꢀꢁ
ꢀ0
ꢀꢁ
ꢀ0
ꢀꢀ
ꢀ0
ꢀꢁ0
ꢀꢁꢂ
ꢀꢁꢂ
ꢀꢁꢂ
ꢀꢁꢂ
ꢀꢁꢂ
ꢀꢁꢂ
0ꢀꢁ
0ꢀꢁ
0ꢀꢁ
0
ꢀ00
ꢀ0
ꢀ0
ꢀ0
ꢀ0
ꢀ0
ꢀ0
ꢀ0
ꢀ0
ꢀ00
ꢀ0
ꢀ0
ꢀ0
ꢀ0
ꢀ0
ꢀ0
ꢀ0
ꢀ0
ꢀ0
ꢀꢁꢁꢂꢃꢂꢀꢄꢃꢅ
ꢀꢁꢂꢃR ꢄꢁꢅꢅ
ꢀ
ꢀ
ꢀ
ꢀ ꢁꢂꢃ
ꢀ
ꢀ
ꢀ
ꢀ ꢁꢂꢃ
ꢀꢁ
ꢀꢁ
ꢀꢁ
ꢀꢁ
ꢀꢁ
ꢀꢁ
ꢀ
ꢀ ꢁꢂꢃ
ꢀ ꢁꢂꢃ
ꢀ ꢁꢂꢃ
ꢀꢁ
ꢀꢁ
ꢀꢁ
ꢀ ꢁꢂꢃ
ꢀ ꢁꢂꢃ
ꢀ
ꢀ ꢁꢂꢃ
ꢀ ꢁꢂꢃ
ꢀ
ꢀ
ꢀ ꢁꢂꢃꢄ
ꢀ
ꢀ ꢁꢂꢃꢄ
ꢀꢁ
ꢀ
ꢀ ꢁꢂꢃꢄ
ꢀꢁ
ꢀꢁ
ꢀ ꢁ ꢂꢃꢀꢄꢅꢆꢅꢆꢇꢈꢉ0ꢊꢋ ꢌꢍꢎꢏꢃ
ꢀ ꢁ ꢂꢃꢀꢄꢅꢆꢅꢆꢇꢈꢉ0ꢊꢋ ꢌꢍꢎꢏꢃ
ꢀ ꢁ ꢂꢃꢀꢄꢅꢆꢅꢆꢇꢈꢉ0ꢊꢋ ꢆꢌꢆꢍꢃ
0
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
0ꢀ0ꢁ
0ꢀꢁ
ꢀ
ꢀ0
ꢀ00
ꢀ000
0ꢀꢁ
ꢀ
ꢀ0
ꢀ00
ꢀ000
ꢀꢁꢂꢃ ꢄꢅRRꢆꢇꢈ ꢉꢂꢊ
ꢀꢁꢂꢃ ꢄꢅRRꢆꢇꢈ ꢉꢊꢂꢋ
ꢀꢁꢂꢃ ꢄꢅRRꢆꢇꢈ ꢉꢊꢂꢋ
ꢀꢁꢂ0ꢃꢄ ꢅ0ꢂ
ꢀꢁꢂ0ꢃꢄ ꢅ0ꢆ
ꢀꢁꢂ0ꢃꢄ ꢅ0ꢁ
LT8640S-2 Low Load Efficiency at
3.3VOUT
LT8643S-2 Low Load Efficiency at
3.3VOUT
Efficiency vs Frequency
ꢀ00
ꢀ0
ꢀ0
ꢀ0
ꢀ0
ꢀ0
ꢀ0
ꢀ0
ꢀ0
ꢀ00
ꢀ0
ꢀ0
ꢀ0
ꢀ0
ꢀ0
ꢀ0
ꢀ0
ꢀ0
ꢀ0
ꢀꢁ
ꢀꢁ
ꢀꢁ
ꢀ0
ꢀꢀ
ꢀꢁ
ꢀꢁ
ꢀꢁ
ꢀ0
ꢀ
ꢀꢁ
ꢀ
ꢀꢁ
ꢀ
ꢀꢁ
ꢀ ꢁꢂꢃ
ꢀ ꢁꢂꢃ
ꢀ ꢁꢂꢃ
ꢀ
ꢀꢁ
ꢀ
ꢀꢁ
ꢀ
ꢀꢁ
ꢀ ꢁꢂꢃ
ꢀ ꢁꢂꢃ
ꢀ ꢁꢂꢃ
ꢀ
ꢀ
ꢀ
ꢃ ꢄꢅꢀ
ꢁꢂ
ꢀꢁꢂ
ꢀ ꢁꢂꢁꢃ
ꢀ
ꢀ ꢁꢂꢃꢄ
ꢀ ꢁꢂ
ꢀ
ꢀ ꢁꢂꢃꢄ
ꢀꢁ
ꢀꢁꢂꢃ
ꢀꢁ
ꢀ ꢁ ꢂꢃꢀꢄꢅꢆꢅꢆꢇꢈꢉ0ꢊꢋ ꢌꢍꢎꢏꢃ
ꢀ ꢁ ꢂꢃꢀꢄꢅꢆꢅꢆꢇꢈꢉ0ꢊꢋ ꢌꢍꢎꢏꢃ
ꢀ ꢁ ꢂꢃꢀꢄꢅꢆꢅꢆꢇꢈꢉ0ꢊꢋ ꢌꢍꢎꢏꢃ
0ꢀ0ꢁ
0ꢀꢁ
ꢀ
ꢀ0
ꢀ00
ꢀ000
0ꢀꢁ
ꢀ
ꢀ0
ꢀ00
ꢀ000
0
0ꢀꢁ
ꢀ
ꢀꢁꢂ
ꢀ
ꢀꢁꢂ
ꢀ
ꢀꢁꢂꢃ ꢄꢅRRꢆꢇꢈ ꢉꢊꢂꢋ
ꢀꢁꢂꢃ ꢄꢅRRꢆꢇꢈ ꢉꢊꢂꢋ
ꢀꢁꢂꢃꢄꢅꢂꢆꢇ ꢈRꢉꢊꢋꢉꢆꢄꢌ ꢍꢎꢅꢏꢐ
ꢀꢁꢂ0ꢃꢄ ꢅ0ꢆ
ꢀꢁꢂ0ꢃꢄ ꢅ0ꢀ
ꢀꢁꢂ0ꢃꢄ ꢅ0ꢆ
Rev 0
5
For more information www.analog.com
LT8640S-2/LT8643S-2
TYPICAL PERFORMANCE CHARACTERISTICS
Burst Mode Operation Efficiency
vs Inductor Value (LT8640S-2)
Reference Voltage
EN Pin Thresholds
ꢀ00
ꢀꢁ
ꢀ0
ꢀꢁ
ꢀ0
ꢀꢁ
ꢀ0
ꢀꢁ
ꢀꢁꢀ
ꢀꢁꢁ
ꢀꢁꢂ
ꢀꢁꢂ
ꢀꢁꢂ
ꢀꢁꢀ
ꢀꢁꢂ
ꢀꢁꢂ
ꢀꢁꢂ
ꢀꢁꢂ
ꢀꢁ0ꢂ
ꢀꢁ0ꢂ
ꢀꢁ0ꢀ
ꢀꢁ00
0ꢀꢁꢁ
0ꢀꢁꢂ
0ꢀꢁꢂ
0ꢀꢁꢂ
0ꢀꢁꢂ
ꢀ
ꢀ ꢁꢂꢃ
ꢀꢁ
ꢀꢁ Rꢂꢃꢂꢁꢄ
ꢀ
ꢀ ꢁꢂꢃ
ꢀꢁ
ꢀꢁ ꢂꢃꢄꢄꢅꢁꢆ
ꢀ
ꢀꢁꢂꢃ
ꢀ ꢁ ꢂꢃꢀꢄꢅꢆꢅꢆꢇꢈꢉ0ꢊ
ꢀ ꢁꢂ
ꢀꢁꢂ
ꢀ
ꢀ ꢁ0ꢂꢃ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀꢁ0 ꢀꢁꢂ
0
ꢀꢁ
ꢀ0
ꢀꢁ ꢀ00 ꢀꢁꢂ
ꢀꢁ0 ꢀꢁꢂ
0
ꢀꢁ
ꢀ0
ꢀꢁ ꢀ00 ꢀꢁꢂ
ꢀꢁꢂꢃꢄꢅꢆR ꢇꢈꢉꢃꢊ ꢋꢌꢍꢎ
ꢀꢁꢂꢃꢁRꢄꢀꢅRꢁ ꢆꢇꢈꢉ
ꢀꢁꢂꢃꢁRꢄꢀꢅRꢁ ꢆꢇꢈꢉ
ꢀꢁꢂ0ꢃꢄ ꢅꢆ0
ꢀꢁꢂ0ꢃꢄ ꢅꢆꢆ
ꢀꢁꢂ0ꢃꢄ ꢅꢆꢄ
LT8640S-2 Load Regulation
LT8643S-2 Load Regulation
LT8640S-2 Line Regulation
0ꢀꢁꢂ
0ꢀꢁ0
0ꢀ0ꢁ
0
0ꢀꢁ0
0ꢀꢁ0
0ꢀꢁꢂ
0ꢀꢁ0
0ꢀ0ꢁ
0ꢀꢁ0
0ꢀ0ꢁ
0ꢀꢁ0
0ꢀ0ꢁ
0ꢀ00
0ꢀ0ꢁ
0ꢀ00
ꢀ0ꢁꢂ0
ꢀ0ꢁꢂ0
ꢀ0ꢁꢂ0
ꢀ0ꢁꢂ0
0ꢀ0ꢁ
ꢀ0ꢁꢂ0
ꢀ0ꢁꢂꢃ
ꢀ0ꢁ0ꢂ
ꢀ0ꢁ0ꢂ
ꢀ0ꢁ0ꢂ
ꢀ0ꢁ0ꢂ
ꢀ
ꢀ ꢁꢂ
ꢀ
ꢀ
ꢀ
ꢀ ꢁꢂ
ꢀꢁꢂ
ꢀꢁ
ꢀꢁꢂ
ꢀ
ꢀ ꢁꢂꢃ
ꢀ ꢁꢂꢃ
ꢀ
ꢀꢁꢂꢃ
ꢀ ꢁꢂ
ꢀꢁ
ꢀꢁꢂꢃ
ꢀꢁꢂ
ꢀ
ꢀ 0ꢁ
ꢀ 0ꢁ
ꢀ
ꢀ ꢁꢂ
ꢀꢁꢂꢃ
0
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
0
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ0 ꢀꢁ ꢀ0 ꢀꢁ ꢀ0 ꢀꢁ ꢀ0 ꢀꢁ
ꢀꢁꢂꢃ ꢄꢅRRꢆꢇꢈ ꢉꢂꢊ
ꢀꢁꢂꢃ ꢄꢅRRꢆꢇꢈ ꢉꢂꢊ
ꢀꢁꢂꢃꢄ ꢅꢆꢇꢄꢈꢉꢊ ꢋꢅꢌ
ꢀꢁꢂ0ꢃꢄ ꢅꢆꢇ
ꢀꢁꢂ0ꢃꢄ ꢅꢆꢂ
ꢀꢁꢂ0ꢃꢄ ꢅꢆꢇ
LT8640S-2 No-Load Supply
Current
LT8643S-2 No-Load Supply
Current
LT8643S-2 Line Regulation
0ꢀꢁꢂ
0ꢀꢁꢂ
0ꢀ0ꢁ
0ꢀ0ꢁ
0ꢀ0ꢁ
0
ꢀꢁ0
ꢀꢁꢂ
ꢀꢁ0
ꢀꢁꢂ
ꢀꢁ0
ꢀꢁꢂ
ꢀꢁ0
ꢀꢀꢁ
ꢀ00
ꢀꢁꢂ
ꢀꢁ0
ꢀꢁꢂ
ꢀ00
ꢀꢁ
ꢀ
ꢀ ꢁꢂ
ꢀꢁꢂ
ꢀ ꢁ ꢂꢃꢄꢅꢆ
ꢀꢁ Rꢂꢃꢄꢅꢆꢇꢀꢈꢁ
ꢀ0ꢁ0ꢂ
ꢀ0ꢁ0ꢂ
ꢀ0ꢁ0ꢂ
ꢀ0ꢁꢂꢃ
ꢀ0ꢁꢂꢃ
ꢀ
ꢀ ꢁꢂꢁꢃ
ꢀꢁꢂ
ꢀ0
ꢀ
ꢀꢁꢂꢃ
ꢀ ꢁꢂ
ꢀ ꢁꢂ
ꢀꢁꢂ
ꢀ ꢁ ꢂꢃꢄꢅꢆ
ꢀ
ꢀꢁ Rꢂꢃꢄꢅꢆꢇꢀꢈꢁ
ꢀꢁ
ꢀ
ꢀ0 ꢀꢁ ꢀ0 ꢀꢁ ꢀ0 ꢀꢁ ꢀ0 ꢀꢁ
0
ꢀ
ꢀ0 ꢀꢁ ꢀ0 ꢀꢁ ꢀ0 ꢀꢁ ꢀ0 ꢀꢁ
ꢀ
ꢀ0 ꢀꢁ ꢀ0 ꢀꢁ ꢀ0 ꢀꢁ ꢀ0 ꢀꢁ
ꢀꢁꢂꢃꢄ ꢅꢆꢇꢄꢈꢉꢊ ꢋꢅꢌ
ꢀꢁꢂꢃꢄ ꢅꢆꢇꢄꢈꢉꢊ ꢋꢅꢌ
ꢀꢁꢂꢃꢄ ꢅꢆꢇꢄꢈꢉꢊ ꢋꢅꢌ
ꢀꢁꢂ0ꢃꢄ ꢅꢆꢁ
ꢀꢁꢂ0ꢃꢄ ꢅꢆꢇ
ꢀꢁꢂ0ꢃꢄ ꢅꢆꢀ
Rev 0
6
For more information www.analog.com
LT8640S-2/LT8643S-2
TYPICAL PERFORMANCE CHARACTERISTICS
Top FET Current Limit vs Duty Cycle
Top FET Current Limit
Switch Drop vs Temperature
ꢀꢁ
ꢀꢀ
ꢀ0
ꢀ
ꢀꢀꢁ0
ꢀ0ꢁꢂ
ꢀ0ꢁ0
ꢀꢁꢂ
ꢀꢁ0
ꢀꢁꢂꢃꢄꢅ ꢄꢆRRꢇꢈꢃ ꢉ ꢊꢋ
ꢀꢁꢂ
ꢀ00
ꢀꢁ0
ꢀꢁꢂ ꢃꢄꢅꢀꢆꢇ
ꢀꢁꢂ
ꢀꢁ
ꢀꢁ ꢂꢃ
ꢀꢁ0
ꢀ0
ꢀꢁꢂ
ꢀꢁ0
ꢀꢁ
ꢀꢁꢂꢂꢁꢃ ꢄꢅꢆꢂꢇꢈ
ꢀꢁꢂ
ꢀ
ꢀꢁ0
0
ꢀꢁ0 ꢀꢁꢂ
0
ꢀꢁ
ꢀ0
ꢀꢁ ꢀ00 ꢀꢁꢂ
0ꢀꢁ
0ꢀꢁ
0ꢀꢁ
0ꢀꢁ
0ꢀꢁ
ꢀꢁ0 ꢀꢁꢂ
0
ꢀꢁ
ꢀ0
ꢀꢁ ꢀ00 ꢀꢁꢂ
ꢀꢁꢂꢃꢁRꢄꢀꢅRꢁ ꢆꢇꢈꢉ
ꢀꢁꢂꢃ ꢄꢃꢄꢅꢆ
ꢀꢁꢂꢃꢁRꢄꢀꢅRꢁ ꢆꢇꢈꢉ
ꢀꢁꢂ0ꢃꢄ ꢅꢄ0
ꢀꢁꢂ0ꢃꢄ ꢅꢆꢇ
ꢀꢁꢂ0ꢃꢄ ꢅꢄꢆ
Dropout Voltage
Switch Drop vs Switch Current
Minimum On-Time
ꢀꢀ
ꢀ0
ꢀꢁ
ꢀꢁ
ꢀꢁ
ꢀꢁ
ꢀ0
ꢀ00
ꢀꢁ0
ꢀ00
ꢀꢁ0
ꢀ00
ꢀꢁ0
ꢀ00
ꢀꢁ0
ꢀ00
ꢀ0
ꢀ00
ꢀ
ꢀ ꢁꢂ
ꢀꢁꢂ
ꢀꢁ
ꢀꢁꢂꢃꢄ ꢅꢆꢇe ꢈꢉꢊRꢋꢌꢍꢈꢎ
ꢀꢁRꢂꢃꢄ ꢂꢁꢅꢆꢇꢅꢈꢁꢈꢉ ꢊꢁꢄꢃ
ꢀ
ꢀꢁꢂ ꢂꢃ Rꢁꢄꢅꢆꢇꢂꢁ ꢇꢂ ꢈꢉ
ꢀ00 ꢀ ꢁ ꢂꢃꢀꢄꢅꢆꢅꢆꢇꢈꢉ0ꢊꢋ ꢊꢌꢃ
ꢀ00
ꢀ00
ꢀ00
ꢀ00
0
ꢀꢁꢂ ꢃꢄꢅꢀꢆꢇ
ꢀ
ꢀ ꢁꢂ
ꢀꢁꢂꢃ
ꢀꢁꢂ
ꢀ
ꢀ 0ꢁꢂꢃꢄ
ꢀ
ꢃ ꢄꢅꢆꢇ
ꢀꢁꢂꢂꢁꢃ ꢄꢅꢆꢂꢇꢈ
ꢁꢂ
0
ꢀꢁ0 ꢀꢁꢂ
0
ꢀꢁ
ꢀ0
ꢀꢁ ꢀ00 ꢀꢁꢂ
0
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
0
0ꢀꢁ
ꢀ
ꢀꢁꢂ
ꢀ
ꢀꢁꢂ
ꢀ
ꢀꢁꢂ
ꢀ
ꢀꢁꢂ
ꢀ
ꢀꢁꢂꢃꢁRꢄꢀꢅRꢁ ꢆꢇꢈꢉ
ꢀꢁꢂꢃꢄꢅ ꢄꢆRRꢇꢈꢃ ꢉꢊꢋ
ꢀꢁꢂꢃ ꢄꢅRRꢆꢇꢈ ꢉꢂꢊ
ꢀꢁꢂ0ꢃꢄ ꢅꢄꢂ
ꢀꢁꢂ0ꢃꢄ ꢅꢄꢄ
ꢀꢁꢂ0ꢃꢄ ꢅꢄꢆ
Switching Frequency
Burst Frequency
LT8640S-2 Soft-Start Tracking
ꢀꢁ0
ꢀꢁ0
ꢀꢁ0
ꢀꢁ0
ꢀ00
ꢀꢁ0
ꢀꢁ0
ꢀꢁ0
ꢀꢀ0
ꢀꢁ00
ꢀ000
ꢀ00
ꢀ00
ꢀ00
ꢀ00
0
R
ꢀ
ꢀ ꢁ0ꢂꢃꢄ
0
0
0
0
0
ꢀRꢁꢂꢃ ꢄꢅꢆꢇ ꢅꢄꢄꢈꢉꢊꢅꢃꢉꢁꢂ
ꢀ
ꢀꢁꢂ
ꢀ ꢁꢂꢃ
ꢀ ꢁꢂ
ꢀꢁ
ꢀ
0
ꢀꢁ0 ꢀꢁꢂ
0
ꢀꢁ
ꢀ0
ꢀꢁ ꢀ00 ꢀꢁꢂ
0
0
ꢀ00
ꢀ00
ꢀ00
ꢀ00
ꢀ00
ꢀ00
0
0
0
0
0
ꢀꢁꢂꢃꢁRꢄꢀꢅRꢁ ꢆꢇꢈꢉ
ꢀꢁꢂꢃ ꢄꢅRRꢆꢇꢈ ꢉꢊꢂꢋ
R
ꢀꢁꢂ0ꢃꢄ ꢅꢄꢆ
ꢀꢁꢂ0ꢃꢄ ꢅꢄꢁ
0
Rev 0
7
For more information www.analog.com
LT8640S-2/LT8643S-2
TYPICAL PERFORMANCE CHARACTERISTICS
LT8643S-2 Error Amp Output
Current
LT8643S-2 Soft-Start Tracking
Soft-Start Current
ꢀꢁꢀ
ꢀꢁꢂ
ꢀꢁ0
ꢀꢁꢂ
ꢀꢁꢂ
ꢀꢁꢂ
ꢀꢁꢂ
ꢀꢁꢂ
ꢀꢁꢂ
ꢀꢁꢂ
ꢀꢁ0
0ꢀꢁ
0ꢀꢁ
0ꢀꢁ
0ꢀꢁ
0
ꢀ00
ꢀꢁꢂ
ꢀ
ꢀ 0ꢁꢂꢃ
ꢀꢀ
ꢀꢁ0
ꢀꢁꢂ
0
ꢀꢁꢂꢃ
ꢀꢁꢂ0
ꢀꢁꢂꢃ
ꢀꢁ00
ꢀ
ꢀ ꢁꢂꢃꢄꢅ
ꢀ
ꢀꢁ0 ꢀꢁꢂ
0
ꢀꢁ
ꢀ0
ꢀꢁ ꢀ00 ꢀꢁꢂ
0
0ꢀꢁ 0ꢀꢁ 0ꢀꢁ 0ꢀꢁ
ꢀ
ꢀꢁꢂ ꢀꢁꢂ ꢀꢁꢂ
ꢀꢁ00
ꢀꢁ00
0
ꢀ00
ꢀ00
ꢀꢁꢂꢃꢁRꢄꢀꢅRꢁ ꢆꢇꢈꢉ
ꢀRꢁꢂꢂ ꢃꢄꢅꢀꢆꢇꢈ ꢉꢃꢊ
ꢀꢁ ꢂꢃꢄ ꢅRRꢆR ꢇꢆꢈꢉꢊꢋꢅ ꢌꢍꢇꢎ
ꢀꢁꢂ0ꢃꢄ ꢅꢄꢆ
ꢀꢁꢂ0ꢃꢄ ꢅꢄꢀ
ꢀꢁꢂ0ꢃꢄ ꢅꢆ0
RT Programmed Switching
Frequency
PG High Thresholds
PG Low Thresholds
ꢀꢁꢂ0
ꢀꢁꢂꢃ
ꢀꢁꢂ0
ꢀꢁꢂꢃ
ꢀꢁꢂ0
ꢀꢁꢂꢃ
ꢀꢁꢂ0
ꢀꢁꢂꢃ
ꢀꢁ0ꢂ0
250
225
200
175
150
125
100
75
ꢀ0ꢁ0
ꢀꢁꢂ
ꢀꢁ0
ꢀꢁꢂ
ꢀꢁ0
ꢀꢁꢂ
ꢀꢁ0
ꢀꢁꢂ
ꢀꢁ0
ꢀꢁ Rꢂꢃꢂꢄꢅ
ꢀꢁ Rꢂꢃꢂꢄꢅ
ꢀꢁ ꢀꢂꢃꢃꢄꢅꢆ
ꢀꢁ ꢀꢂꢃꢃꢄꢅꢆ
50
25
0
0.6
1
1.4
1.8
2.2 2.6
3
ꢀꢁ0 ꢀꢁꢂ
0
ꢀꢁ
ꢀ0
ꢀꢁ ꢀ00 ꢀꢁꢂ
0.2
ꢀꢁ0 ꢀꢁꢂ
0
ꢀꢁ
ꢀ0
ꢀꢁ ꢀ00 ꢀꢁꢂ
ꢀꢁꢂꢃꢁRꢄꢀꢅRꢁ ꢆꢇꢈꢉ
ꢀꢁꢂꢃꢁRꢄꢀꢅRꢁ ꢆꢇꢈꢉ
SWITCHING FREQUENCY (MHz)
ꢀꢁꢂ0ꢃꢄ ꢅꢆꢄ
ꢀꢁꢂ0ꢃꢄ ꢅꢆꢇ
8640s2 G33
Bias Pin Current
Minimum Input Voltage
Bias Pin Current
ꢀꢁꢂ
ꢀꢁꢂ
ꢀꢁꢂ
ꢀꢁ0
ꢀꢁꢂ
ꢀꢁꢂ
ꢀꢁꢂ
ꢀꢁ
ꢀ0
ꢀꢁ
ꢀ0
ꢀ
ꢀꢁꢂ
ꢀꢁ0
ꢀꢁꢂ
ꢀꢁ0
ꢀꢁꢂ
ꢀꢁ0
ꢀꢁꢀ
ꢀ
ꢀ
ꢀ
ꢀ ꢁꢂ
ꢀꢁꢂꢃ
ꢀꢁꢂ
ꢀꢁ
ꢀ ꢁꢂ
ꢀ ꢁꢂꢃ
ꢀ ꢁꢂ
ꢀ
ꢀꢁꢂꢃ
ꢀ
ꢀ ꢁꢂ
ꢀꢁꢂꢃ
ꢀꢁꢂ
ꢀ
ꢀ ꢁꢂ
ꢀ
ꢀ
ꢀ ꢁꢂ
ꢀ ꢁꢂꢃꢄ
ꢀꢁꢂꢃ
ꢀꢁ
0
ꢀꢁ0 ꢀꢁꢂ
0
ꢀꢁ
ꢀ0
ꢀꢁ ꢀ00 ꢀꢁꢂ
0ꢀꢁ 0ꢀꢁ
ꢀ
ꢀꢁꢂ ꢀꢁꢂ ꢀꢁꢀ ꢀꢁꢂ ꢀꢁ0
ꢀ
ꢀ0 ꢀꢁ ꢀ0 ꢀꢁ ꢀ0 ꢀꢁ ꢀ0 ꢀꢁ
ꢀꢁꢂꢃꢁRꢄꢀꢅRꢁ ꢆꢇꢈꢉ
ꢀꢁꢂꢃꢄꢅꢂꢆꢇ ꢈRꢉꢊꢋꢉꢆꢄꢌ ꢍꢎꢅꢏꢐ
ꢀꢁꢂꢃꢄ ꢅꢆꢇꢄꢈꢉꢊ ꢋꢅꢌ
ꢀꢁꢂ0ꢃꢄ ꢅꢆꢂ
ꢀꢁꢂ0ꢃꢄ ꢅꢆꢁ
ꢀꢁꢂ0ꢃꢄ ꢅꢆꢇ
Rev 0
8
For more information www.analog.com
LT8640S-2/LT8643S-2
TYPICAL PERFORMANCE CHARACTERISTICS
Case Temperature Rise vs 7A
Pulsed Load
Switching Rising Edge
Case Temperature Rise
ꢀ0
ꢀ0
ꢀ0
ꢀ0
ꢀ0
ꢀ0
ꢀ0
ꢀ0
0
ꢀ0
ꢀ0
ꢀ0
ꢀ0
ꢀ0
ꢀ0
ꢀ0
ꢀ0
ꢀ0
0
ꢀꢁꢂꢃꢄ0ꢅ ꢀꢆꢇꢈ ꢉꢈꢅRꢀ
ꢀꢁꢂꢃꢄ0ꢅ ꢀꢆꢇꢈ ꢉꢈꢅRꢀ
ꢀ
ꢀ
ꢀ
ꢀ ꢁꢂꢃ
ꢀꢁ
ꢀꢁꢂ
ꢀꢁ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ ꢁꢂ ꢄ ꢅ ꢀ ꢁꢂꢃꢄ
ꢀꢁ
ꢀꢁ
ꢀꢁ
ꢀꢁ
ꢀꢁ
ꢀ ꢁꢂ
ꢀ ꢁꢂ ꢄ ꢅ ꢀ ꢁꢂꢃꢄ
ꢀꢁ
ꢀ ꢁꢂꢃꢄ
ꢀ ꢁꢂ ꢄ ꢅ ꢀ ꢁꢂꢃꢄ
ꢀꢁ
ꢀꢁꢂꢃꢄꢅꢆ ꢇꢈꢂꢄ ꢉ 0ꢊꢋꢌꢂ
ꢀ ꢁꢂ ꢄ ꢅ ꢀ ꢁꢂꢃꢄ
ꢀꢁ
ꢀ
ꢀꢁꢂꢃ ꢄꢅꢆꢇꢈꢉ ꢆꢊꢋꢉ ꢌ ꢍꢋ
ꢀꢁ
ꢀꢁꢂꢃꢄꢁ
ꢀꢁꢂ0ꢃꢄ ꢅꢆꢇ
ꢀꢁꢂꢃꢄꢅꢆ
ꢀ
ꢀꢁꢂꢃ
ꢀ ꢁꢂꢃ
ꢀꢁ
ꢀ
ꢀ ꢁꢂ
0
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
0
0ꢀꢁ
0ꢀꢁ
0ꢀꢁ
0ꢀꢁ
ꢀ
ꢀꢁꢂꢃ ꢄꢅRRꢆꢇꢈ ꢉꢂꢊ
ꢀꢁꢂꢃ ꢄꢃꢄꢅꢆ ꢇꢈ ꢉꢊ ꢅꢇꢊꢀ
ꢀꢁꢂ0ꢃꢄ ꢅꢆꢇ
ꢀꢁꢂ0ꢃꢄ ꢅꢆꢀ
Switching Waveforms, Full
Frequency Continuous Operation
Switching Waveforms, Burst
Mode Operation
Switching Waveforms
ꢀ
ꢀ
ꢀ
ꢀ
ꢀꢁꢂꢃꢄꢅ
ꢀ
ꢀ
ꢀꢁꢂꢃꢄꢅ
ꢀ00ꢁꢂꢃꢄꢅꢆ
ꢀ
ꢀꢁ
ꢀ
ꢀꢁ
ꢀꢁꢂꢃꢄꢁ
ꢀ
ꢀꢁ
ꢀꢁꢂꢃꢄꢁ
ꢀ0ꢁꢂꢃꢄꢁ
ꢀꢁꢂ0ꢃꢄ ꢅꢂ0
ꢀꢁꢂ0ꢃꢄ ꢅꢂꢆ
ꢀꢁꢂ0ꢃꢄ ꢅꢂꢄ
ꢀ00ꢁꢂꢃꢄꢅꢆ
ꢀꢁꢂꢃꢄꢅꢆ
ꢀ00ꢁꢂꢃꢄꢅꢆ
ꢀRꢁꢂꢃ ꢄꢅꢆꢇ ꢅꢄꢄꢈꢉꢊꢅꢃꢉꢁꢂ
ꢀRꢁꢂꢃ ꢄꢅꢆꢇ ꢅꢄꢄꢈꢉꢊꢅꢃꢉꢁꢂ
ꢀRꢁꢂꢃ ꢄꢅꢆꢇ ꢅꢄꢄꢈꢉꢊꢅꢃꢉꢁꢂ
ꢀꢁꢂ ꢀꢁ ꢂꢃ
ꢀꢁ ꢂꢀ
ꢀꢁꢂ ꢀꢁ ꢂꢃ
ꢀꢁꢂꢃ
ꢀꢁ ꢂ0ꢃꢀ
ꢀꢁ
ꢀꢁꢂ
ꢀꢁꢂ ꢀꢁ ꢂꢃ
ꢀꢁ ꢂꢀ
ꢀꢁ
ꢀꢁꢂ
ꢀꢁ
ꢀꢁꢂ
ꢀ
ꢀ 0ꢁ
LT8643S-2 Transient Response;
External Compensation
LT8640S-2 Transient Response;
Internal Compensation
ꢀ
ꢀ
ꢀꢁꢂꢃ
ꢀꢁꢂꢃ
ꢀꢁꢂꢃꢄꢅ
ꢀꢁꢂꢃꢄꢅ
ꢀ
ꢀ
ꢀꢁꢂ
ꢀꢁꢂ
ꢀ00ꢁꢂꢃꢄꢅꢂ
ꢀ00ꢁꢂꢃꢄꢅꢂ
ꢀꢁꢂ0ꢃꢄ ꢅꢂꢆ
ꢀꢁꢂ0ꢃꢄ ꢅꢂꢂ
ꢀ0ꢁꢂꢃꢄꢅꢆ
ꢀ0ꢁꢂꢃꢄꢅꢆ
ꢀRꢁꢂꢃ ꢄꢅꢆꢇ ꢅꢄꢄꢈꢉꢊꢅꢃꢉꢁꢂ
ꢀRꢁꢂꢃ ꢄꢅꢆꢇ ꢅꢄꢄꢈꢉꢊꢅꢃꢉꢁꢂ
ꢀꢁ ꢂꢃ ꢄꢁ ꢂRꢁꢅꢆꢇꢈꢅꢂ
ꢀꢁ ꢂꢃ ꢄꢁ ꢂRꢁꢅꢆꢇꢈꢅꢂ
ꢀꢁꢂ ꢀ ꢁꢂ
ꢀꢁꢂ ꢀ ꢁꢂ
ꢀꢁ
ꢀꢁꢂ
ꢀꢁ
ꢀꢁꢂ
ꢀ
ꢀ ꢁꢂꢃꢄ
ꢀ
ꢀ ꢁꢂꢃꢄ
ꢀꢁ
ꢀꢁ
ꢀ
ꢀ ꢁ00ꢂ ꢄ ꢅ
ꢀ ꢁ0ꢂꢃ
ꢀ
ꢀ
ꢀ ꢁꢁ0ꢂ ꢄ R ꢀ ꢁꢂꢃꢄꢅ
ꢀ
ꢀꢁꢂ
ꢀꢁꢂꢃ
ꢀ
ꢀꢁꢂ
ꢀ ꢁ00ꢂ ꢄ ꢅ
ꢀ ꢁꢂꢃꢄꢅ
ꢀꢁꢂꢃ
Rev 0
9
For more information www.analog.com
LT8640S-2/LT8643S-2
TYPICAL PERFORMANCE CHARACTERISTICS
LT8640S-2 Transient Response;
100mA to 1.1A Transient
LT8643S-2 Transient Response;
100mA to 1.1A Transient
ꢀ
ꢀ
ꢀꢁꢂꢃ
ꢀꢁꢂꢃ
ꢀꢁꢂꢃꢄꢅ
ꢀꢁꢂꢃꢄꢅ
ꢀꢁꢂꢃꢄ ꢅꢆꢇe ꢈꢉꢊRꢋꢌꢍꢈꢎ
ꢀꢁꢂꢃꢄ ꢅꢆꢇe ꢈꢉꢊRꢋꢌꢍꢈꢎ
ꢀ
ꢀꢁꢂ
ꢀ
ꢀꢁꢂ
ꢀ00ꢁꢂꢃꢄꢅꢂ
ꢀ00ꢁꢂꢃꢄꢅꢂ
ꢀꢁꢂ
ꢀꢁꢂ
ꢀꢁꢂ0ꢃꢄ ꢅꢂꢆ
ꢀꢁꢂ0ꢃꢄ ꢅꢂꢁ
ꢀ0ꢁꢂꢃꢄꢅꢆ
ꢀ0ꢁꢂꢃꢄꢅꢆ
ꢀRꢁꢂꢃ ꢄꢅꢆꢇ ꢅꢄꢄꢈꢉꢊꢅꢃꢉꢁꢂ
ꢀRꢁꢂꢃ ꢄꢅꢆꢇ ꢅꢄꢄꢈꢉꢊꢅꢃꢉꢁꢂ
ꢀ
ꢀ ꢁꢁ0ꢂ ꢄ R ꢀ ꢁꢂꢃꢄꢅꢆ ꢇ
ꢀ ꢁꢂꢃꢄꢅ
ꢀ00ꢁꢂ ꢃꢄ ꢀꢅꢀꢂ ꢃRꢂꢆꢇꢈꢉꢆꢃ
ꢀ
ꢀ
ꢀꢁꢂꢃ
ꢀ00ꢁꢂ ꢃꢄ ꢀꢅꢀꢂ ꢃRꢂꢆꢇꢈꢉꢆꢃ
ꢀꢁꢂ ꢀ ꢁꢂ ꢀ ꢁ ꢀ ꢁꢂꢃꢄ
ꢀꢁ
ꢀꢁꢂ
ꢀꢁꢂ ꢀꢁ
ꢀ ꢁ00ꢂꢃ
ꢀꢁꢂ ꢀ ꢁꢂ ꢀ ꢁ ꢀ ꢁꢂꢃꢄ
ꢀ
ꢀꢁ
ꢀꢁꢂ ꢀꢁ
ꢀ ꢁ00ꢂꢃ
ꢀ
ꢀꢁꢂ
Start-Up Dropout Performance
Start-Up Dropout Performance
V
V
IN
IN
V
V
IN
IN
2V/DIV
2V/DIV
V
V
OUT
OUT
V
V
OUT
2V/DIV
OUT
2V/DIV
8640s2 G47
8640s2 G48
100ms/DIV
100ms/DIV
2.5Ω LOAD
(2A IN REGULATION)
20Ω LOAD
(250mA IN REGULATION)
Rev 0
10
For more information www.analog.com
LT8640S-2/LT8643S-2
TYPICAL PERFORMANCE CHARACTERISTICS
Conducted EMI Performance
ꢀ0
ꢀ0
ꢀ0
ꢀ0
ꢀ0
ꢀ0
0
ꢀꢁ0
ꢀꢁ0
ꢀꢁRꢂꢃꢄ ꢀꢁꢂꢅꢆRꢇꢈ ꢈꢉꢄꢂ
ꢀꢁꢂꢃꢄ ꢀRꢃꢅꢆꢃꢇꢈꢉ ꢊꢋꢄꢃ
ꢀꢁ0
ꢀꢁ0
0
ꢀ
ꢀ
ꢀ
ꢀꢁ
ꢀꢁ
ꢀꢁ
ꢀꢁ ꢀꢁ ꢀꢁ
ꢀ0
ꢀRꢁꢂꢃꢁꢄꢅꢆ ꢇꢈꢉꢊꢋ
ꢀꢁꢂ0ꢃꢄ ꢅꢂꢆ
ꢀꢁꢂꢃꢄ0ꢅ ꢀꢆꢇꢈ ꢉꢈꢅRꢀ ꢊꢋꢌꢍꢎ ꢏꢐꢑꢒꢓ0ꢋ
ꢀꢁꢂꢃꢄ ꢅꢆꢂ ꢇꢂꢈꢃꢅR ꢂꢉꢊꢃꢋꢈꢈꢅꢌꢍ
ꢀꢁꢂ ꢃꢄꢅꢆꢇ ꢇꢈ ꢉꢂ ꢈꢆꢇꢅꢆꢇ ꢊꢇ ꢁꢊꢋ ꢌ ꢀ ꢁꢂꢃꢄ
ꢀꢁ
Radiated EMI Performance
(CISPR25 Radiated Emission Test with Class 5 Peak Limits)
ꢀ0
ꢀꢁRꢂꢃꢄꢅꢆ ꢇꢈꢆꢅRꢃꢉꢅꢂꢃꢈꢊ
ꢀꢁꢂꢃ ꢄꢁꢅꢁꢆꢅꢇR
ꢀꢁ
ꢀ0
ꢀꢁ
ꢀ0
ꢀꢁ
ꢀ0
ꢀꢁ
ꢀ0
ꢀ
0
ꢀꢁꢂꢃꢃ ꢄ ꢅꢆꢂꢇ ꢁꢈꢉꢈꢊ
ꢀꢁRꢂꢃꢄ ꢀꢁꢂꢅꢆRꢇꢈ ꢈꢉꢄꢂ
ꢀꢁꢂꢃꢄ ꢀRꢃꢅꢆꢃꢇꢈꢉ ꢊꢋꢄꢃ
ꢀꢁ
0
ꢀ00
ꢀ00
ꢀ00
ꢀ00
ꢀ00
ꢀ00
ꢀ00
ꢀ00
ꢀ00 ꢀ000
ꢀRꢁꢂꢃꢁꢄꢅꢆ ꢇꢈꢉꢊꢋ
ꢀꢁꢂ0ꢃꢄ ꢅꢆ0ꢇ
ꢀ0
ꢀꢁ
ꢀ0
ꢀꢁ
ꢀ0
ꢀꢁ
ꢀ0
ꢀꢁ
ꢀ0
ꢀ
ꢀꢁRꢂꢃꢁꢄꢅꢆꢇ ꢈꢁꢇꢆRꢂꢃꢆꢅꢂꢁꢄ
ꢀꢁꢂꢃ ꢄꢁꢅꢁꢆꢅꢇR
ꢀꢁꢂꢃꢃ ꢄ ꢅꢆꢂꢇ ꢁꢈꢉꢈꢊ
ꢀꢁRꢂꢃꢄ ꢀꢁꢂꢅꢆRꢇꢈ ꢈꢉꢄꢂ
ꢀꢁꢂꢃꢄ ꢀRꢃꢅꢆꢃꢇꢈꢉ ꢊꢋꢄꢃ
0
ꢀꢁ
0
ꢀ00
ꢀ00
ꢀ00
ꢀ00
ꢀ00
ꢀ00
ꢀ00
ꢀ00
ꢀ00 ꢀ000
ꢀRꢁꢂꢃꢁꢄꢅꢆ ꢇꢈꢉꢊꢋ
ꢀꢁꢂ0ꢃꢄ ꢅꢆ0ꢇ
ꢀꢁꢂꢃꢄ0ꢅ ꢀꢆꢇꢈ ꢉꢈꢅRꢀ ꢊꢋꢌꢍꢎ ꢏꢐꢑꢒꢓ0ꢋ
ꢀꢁꢂꢃꢄ ꢅꢆꢂ ꢇꢂꢈꢃꢅR ꢂꢉꢊꢃꢋꢈꢈꢅꢌꢍ
ꢀꢁꢂ ꢃꢄꢅꢆꢇ ꢇꢈ ꢉꢂ ꢈꢆꢇꢅꢆꢇ ꢊꢇ ꢁꢊꢋ ꢌ ꢀ ꢁꢂꢃꢄ
ꢀꢁ
Rev 0
11
For more information www.analog.com
LT8640S-2/LT8643S-2
PIN FUNCTIONS
BIAS (Pin 1): The internal regulator will draw current from
BST (Pin 7): This pin is used to provide a drive voltage,
higher than the input voltage, to the topside power switch.
Place a 0.1µF boost capacitor as close as possible to
the IC.
BIAS instead of V when BIAS is tied to a voltage higher
IN
than 3.1V. For output voltages of 3.3V to 25V this pin
should be tied to V . If this pin is tied to a supply other
OUT
than V
use a 1µF local bypass capacitor on this pin.
OUT
SW (Pins 8–12): The SW pins are the outputs of the inter-
nal power switches. Tie these pins together and connect
them to the inductor. This node should be kept small on
the PCB for good performance and low EMI.
If no supply is available, tie to GND. However, especially
for high input or high frequency applications, BIAS should
be tied to output or an external supply of 3.3V or above.
INTV (Pin 2): Internal 3.4V Regulator Bypass Pin. The
CC
EN/UV (Pin 17): The LT8640S-2/LT8643S-2 is shut down
when this pin is low and active when this pin is high. The
hysteretic threshold voltage is 1.00V going up and 0.96V
going down. Tie to VIN if the shutdown feature is not
internal power drivers and control circuits are powered
from this voltage. INTVCC maximum output current is
20mA. Do not load the INTV pin with external circuitry.
CC
INTV current will be supplied from BIAS if BIAS > 3.1V,
CC
used. An external resistor divider from V can be used
IN
otherwise current will be drawn from VIN. Voltage on
INTVCC will vary between 2.8V and 3.4V when BIAS is
between 3.0V and 3.6V. Place a low ESR ceramic capaci-
tor of at least 1µF from this pin to ground close to the IC.
to program a V threshold below which the LT8640S-2/
IN
LT8643S-2 will shut down.
RT (Pin 18): A resistor is tied between RT and ground to
set the switching frequency.
GND (Pins 3, 16, Exposed Pad Pins 25–28): Ground.
Place the negative terminal of the input capacitor as close
to the GND pins as possible. The exposed pads should
be soldered to the PCB for good thermal performance. If
necessary due to manufacturing limitations Pins 25 to 28
may be left disconnected, however thermal performance
will be degraded.
CLKOUT (Pin 19): In forced continuous mode, spread
spectrum, and synchronization modes, the CLKOUT pin
will provide a ~200ns wide pulse at the switch frequency.
The low and high levels of the CLKOUT pin are ground and
INTVCC respectively, and the drive strength of the CLKOUT
pin is several hundred ohms. In Burst Mode operation,
the CLKOUT pin will be low. Float this pin if the CLKOUT
function is not used.
NC (Pins 4, 15): No Connect. This pin is not connected
to internal circuitry and can be tied anywhere on the PCB,
typically ground.
SYNC/MODE (Pin 20): For the LT8640S-2/LT8643S-2,
this pin programs four different operating modes: 1)
Burst Mode operation. Tie this pin to ground for Burst
Mode operation at low output loads—this will result in
ultralow quiescent current. 2) Forced Continuous mode
(FCM). This mode offers fast transient response and
full frequency operation over a wide load range. Float
this pin for FCM. When floating, pin leakage currents
should be <1µA. See Block Diagram for internal pull-up
and pull-down resistance. 3) Spread spectrum mode.
Tie this pin high to INTV (~3.4V) or an external supply
of 3V to 4V for forced CcContinuous mode with spread-
spectrum modulation. 4) Synchronization mode. Drive
this pin with a clock source to synchronize to an external
frequency. During synchronization the part will operate
in forced continuous mode.
V
(Pins 5, 6, 13, 14): The V pins supply current to
IN
IN
the LT8640S-2/LT8643S-2 internal circuitry and to the
internal topside power switch. The LT8640S-2/LT8643S-2
requires the use of multiple V bypass capacitors. Two
IN
small 1µF capacitors should be placed as close as pos-
sible to the LT8640S-2/LT8643S-2, one capacitor on each
side of the device (C , C ). A third capacitor with a
IN1 IN2
larger value, 2.2µF or higher, should be placed near C
IN1
or C . See Applications Information section for sample
IN2
layout.
Rev 0
12
For more information www.analog.com
LT8640S-2/LT8643S-2
PIN FUNCTIONS
TR/SS (Pin 21): Output Tracking and Soft-Start Pin. This
pin allows user control of output voltage ramp rate during
start-up. For the LT8640S-2, a TR/SS voltage below 0.97V
forces it to regulate the FB pin to equal the TR/SS pin volt-
age. When TR/SS is above 0.97V, the tracking function is
disabled and the internal reference resumes control of the
error amplifier. For the LT8643S-2, a TR/SS voltage below
1.6V forces it to regulate the FB pin to a function of the
TR/SS pin voltage. See plot in the Typical Performance
Characteristics section. When TR/SS is above 1.6V, the
tracking function is disabled and the internal reference
resumes control of the error amplifier. An internal 1.9µA
pull-up current from INTVCC on this pin allows a capacitor
to program output voltage slew rate. This pin is pulled to
ground with an internal 200Ω MOSFET during shutdown
and fault conditions; use a series resistor if driving from
a low impedance output. This pin may be left floating if
the tracking function is not needed.
GND (Pin 22, LT8640S-2 Only): Ground. Connect this pin
to system ground and to the ground plane.
V (Pin 22, LT8643S-2 Only): The V pin is the output of
C
C
the internal error amplifier. The voltage on this pin con-
trols the peak switch current. Tie an RC network from this
pin to ground to compensate the control loop.
PG (Pin 23): The PG pin is the open-drain output of an
internal comparator. PG remains low until the FB pin is
within 8% of the final regulation voltage, and there are
no fault conditions. PG is also pulled low when EN/UV is
below 1V, INTV has fallen too low, V is too low, or
CC
IN
thermal shutdown. PG is valid when V is above 3.4V.
IN
FB (Pin 24): The LT8640S-2/LT8643S-2 regulates the FB
pin to 0.970V. Connect the feedback resistor divider tap
to this pin. Also, connect a phase lead capacitor between
FB and V . Typically, this capacitor is 4.7pF to 22pF.
OUT
Corner Pins: These pins are for mechanical support only
and can be tied anywhere on the PCB, typically ground.
Rev 0
13
For more information www.analog.com
LT8640S-2/LT8643S-2
BLOCK DIAGRAM
ꢗ
ꢐꢑ
ꢟꢜꢤ ꢟꢂ
ꢗ
ꢥꢤ ꢁ
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ꢒꢚRꢋꢝꢞꢚ
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ꢗ
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ꢎꢎ
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ꢗ
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ꢐꢑ
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Rꢒ
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ꢄꢟ
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R
ꢒ
ꢐꢑꢒꢗ
ꢎꢎ
ꢞꢑꢆ
ꢊꢒꢀꢁꢂ0ꢉꢡꢄ
ꢋꢑꢊꢧ
ꢄꢄ
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ꢄ0
ꢁ00ꢙ
ꢀꢁꢂ0ꢃꢄ ꢅꢆ
Rev 0
14
For more information www.analog.com
LT8640S-2/LT8643S-2
OPERATION
The LT8640S-2/LT8643S-2 is a monolithic, constant fre-
quency, current mode step-down DC/DC converter. An
oscillator, with frequency set using a resistor on the RT
pin, turns on the internal top power switch at the begin-
ning of each clock cycle. Current in the inductor then
increases until the top switch current comparator trips
and turns off the top power switch. The peak inductor
current at which the top switch turns off is controlled
by the voltage on the internal VC node. The error ampli-
fier servos the VC node by comparing the voltage on the
the oscillator operates continuously and positive SW tran-
sitions are aligned to the clock. Negative inductor current
is allowed. The LT8640S-2/LT8643S-2 can sink current
from the output and return this charge to the input in this
mode, improving load step transient response.
To improve EMI, the LT8640S-2/LT8643S-2 can operate
in spread spectrum mode. This feature varies the clock
with a triangular frequency modulation of +20%. For
example, if the LT8640S-2/LT8643S-2’s frequency is pro-
grammed to switch at 2MHz, spread spectrum mode will
modulate the oscillator between 2MHz and 2.4MHz. The
V
pin with an internal 0.97V reference. When the load
FB
current increases it causes a reduction in the feedback
voltage relative to the reference leading the error amplifier
to raise the VC voltage until the average inductor current
matches the new load current. When the top power switch
turns off, the synchronous power switch turns on until the
next clock cycle begins or inductor current falls to zero.
If overload conditions result in more than 10A flowing
through the bottom switch, the next clock cycle will be
delayed until switch current returns to a safe level.
SYNC/MODE pin should be tied high to INTV (~3.4V) or
CC
an external supply of 3V to 4V to enable spread spectrum
modulation with forced continuous mode.
To improve efficiency across all loads, supply current
to internal circuitry can be sourced from the BIAS pin
when biased at 3.3V or above. Else, the internal circuitry
will draw current from V . The BIAS pin should be con-
IN
nected to VOUT if the LT8640S-2/LT8643S-2 output is
programmed at 3.3V to 25V.
If the EN/UV pin is low, the LT8640S-2/LT8643S-2 is shut
down and draws 1µA from the input. When the EN/UV pin
is above 1V, the switching regulator will become active.
The VC pin optimizes the loop compensation of the
switching regulator based on the programmed switch-
ing frequency, allowing for a fast transient response. The
VC pin also enables current sharing and a CLKOUT pin
enables synchronizing other regulators to the LT8643S-2.
To optimize efficiency at light loads, the LT8640S-2/
LT8643S-2 operates in Burst Mode operation in light
load situations. Between bursts, all circuitry associated
with controlling the output switch is shut down, reducing
the input supply current to 1.7µA (LT8640S-2) or 230µA
(LT8643S-2 with BIAS = 0). In a typical application, 2.5µA
Comparators monitoring the FB pin voltage will pull the PG
pin low if the output voltage varies more than 8% (typi-
cal) from the set point, or if a fault condition is present.
(LT8640S-2) or 120µA (LT8643S-2 with BIAS = 5V
)
OUT
The oscillator reduces the LT8640S-2/LT8643S-2’s oper-
ating frequency when the voltage at the FB pin is low. This
frequency foldback helps to control the inductor current
when the output voltage is lower than the programmed
value which occurs during start-up or overcurrent condi-
tions. When a clock is applied to the SYNC/MODE pin, the
SYNC/MODE pin is floated, or held DC high, the frequency
foldback is disabled and the switching frequency will slow
down only during overcurrent conditions.
will be consumed from the input supply when regulat-
ing with no load. The SYNC/MODE pin is tied low to use
Burst Mode operation and can be floated to use forced
continuous mode (FCM). If a clock is applied to the SYNC/
MODE pin, the part will synchronize to an external clock
frequency and operate in FCM.
The LT8640S-2/LT8643S-2 can operate in forced con-
tinuous mode (FCM) for fast transient response and full
frequency operation over a wide load range. When in FCM
Rev 0
15
For more information www.analog.com
LT8640S-2/LT8643S-2
APPLICATIONS INFORMATION
Low EMI PCB Layout
Note that large, switched currents flow in the LT8640S-2/
LT8643S-2 V and GND pins and the input capacitors.
IN
The LT8640S-2/LT8643S-2 is specifically designed to
minimize EMI emissions and also to maximize efficiency
when switching at high frequencies. For optimal perfor-
mance the LT8640S-2/LT8643S-2 requires the use of
The loops formed by the input capacitors should be as
small as possible by placing the capacitors adjacent to the
V and GND pins. Capacitors with small case size such
IN
as 0603 are optimal due to lowest parasitic inductance.
multiple V bypass capacitors.
IN
The input capacitors, along with the inductor and out-
put capacitors, should be placed on the same side of the
circuit board, and their connections should be made on
that layer. Place a local, unbroken ground plane under the
application circuit on the layer closest to the surface layer.
The SW and BOOST nodes should be as small as possible.
Finally, keep the FB and RT nodes small so that the ground
traces will shield them from the SW and BOOST nodes.
Two small 1µF capacitors should be placed as close as
possible to the LT8640S-2/LT8643S-2, one capacitor on
each side of the device (C , C ). A third capacitor with
IN1 IN2
a larger value, 2.2µF or higher, should be placed near CIN1
or C
.
IN2
See Figure 1 for a recommended PCB layouts.
For more detail and PCB design files refer to the Demo
Board guide for the LT8640S-2/LT8643S-2.
ꢕ
ꢕ
Rꢑ
Rꢑ
ꢕ
ꢒ
R
ꢕ
ꢕ
ꢕ
ꢋꢋ
ꢋꢋ
ꢕꢓ
ꢕꢓ
Rꢓ
R
R
ꢈ
ꢈ
Rꢓ
ꢕ
ꢅꢕꢕ
ꢕ
ꢅꢕꢕ
ꢕ
ꢆꢃꢖ
ꢕ
ꢆꢃꢖ
ꢕ
ꢕ
ꢆꢃꢑ
ꢆꢃꢓ
ꢕ
ꢕ
ꢆꢃꢑ
ꢆꢃꢓ
ꢕ
ꢗꢋꢈ
ꢕ
ꢗꢋꢈ
ꢕ
ꢁꢂꢈ
ꢕ
ꢁꢂꢈ
ꢌ
ꢌ
ꢍꢎꢏ0ꢐꢑ ꢒ0ꢓꢔ
ꢍꢎꢏ0ꢐꢑ ꢒ0ꢓꢔ
ꢀRꢁꢂꢃꢄ ꢅꢆꢇ
ꢅ
ꢆꢃ
ꢅꢆꢇ
ꢅ
ꢁꢂꢈ
ꢅꢆꢇ
ꢁꢈꢉꢊR ꢋꢆꢀꢃꢇꢌ ꢅꢆꢇꢋ
ꢀRꢁꢂꢃꢄ ꢅꢆꢇ
ꢅ
ꢆꢃ
ꢅꢆꢇ
ꢅ ꢅꢆꢇ
ꢁꢂꢈ
ꢁꢈꢉꢊR ꢋꢆꢀꢃꢇꢌ ꢅꢆꢇꢋ
(a) LT8640S-2
(b) LT8643S-2
Figure 1. Recommended PCB Layouts for the LT8640S-2 and LT8643S-2
Rev 0
16
For more information www.analog.com
LT8640S-2/LT8643S-2
APPLICATIONS INFORMATION
The exposed pads on the bottom of the package should be
soldered to the PCB to reduce thermal resistance to ambi-
ent. To keep thermal resistance low, extend the ground
plane from GND as much as possible, and add thermal
vias to additional ground planes within the circuit board
and on the bottom side.
feedback resistor divider must be minimized as it appears
to the output as load current.
In order to achieve higher light load efficiency, more
energy must be delivered to the output during the sin-
gle small pulses in Burst Mode operation such that the
LT8640S-2/LT8643S-2 can stay in sleep mode longer
between each pulse. This can be achieved by using
a larger value inductor (i.e., 4.7µH), and should be
considered independent of switching frequency when
choosing an inductor. For example, while a lower induc-
tor value would typically be used for a high switching
frequency application, if high light load efficiency is
desired, a higher inductor value should be chosen. See
curve in Typical Performance Characteristics.
Burst Mode Operation
To enhance efficiency at light loads, the LT8640S-2/
LT8643S-2 operates in low ripple Burst Mode operation,
which keeps the output capacitor charged to the desired
output voltage while minimizing the input quiescent cur-
rent and minimizing output voltage ripple. In Burst Mode
operation the LT8640S-2/LT8643S-2 delivers single small
pulses of current to the output capacitor followed by sleep
periods where the output power is supplied by the output
capacitor. While in sleep mode the LT8640S-2 consumes
1.7µA and the LT8643S-2 consumes 230µA.
While in Burst Mode operation the current limit of the top
switch is approximately 900mA (as shown in Figure 3),
resulting in low output voltage ripple. Increasing the out-
put capacitance will decrease output ripple proportionally.
As load ramps upward from zero the switching frequency
will increase but only up to the switching frequency
programmed by the resistor at the RT pin as shown in
Figure 2.
As the output load decreases, the frequency of single
current pulses decreases (see Figure 2) and the per-
centage of time the LT8640S-2/LT8643S-2 is in sleep
mode increases, resulting in much higher light load effi-
ciency than for typical converters. By maximizing the
time between pulses, the LT8640S-2’s quiescent current
approaches 2.5µA for a typical application when there
is no output load. Therefore, to optimize the quiescent
current performance at light loads, the current in the
The output load at which the LT8640S-2/LT8643S-2
reaches the programmed frequency varies based on input
voltage, output voltage and inductor choice. To select
low ripple Burst Mode operation, tie the SYNC/MODE pin
below 0.4V (this can be ground or a logic low output).
ꢀꢁ00
ꢀ000
ꢀ00
ꢀ
ꢀ
ꢀ00ꢁꢂꢃꢄꢅꢆ
ꢀ00
ꢀ00
ꢀ
ꢀꢁ
ꢀꢁꢂꢃꢄꢁ
ꢀRꢁꢂꢃ ꢄꢅꢆꢇ ꢅꢄꢄꢈꢉꢊꢅꢃꢉꢁꢂ
ꢀ00
ꢀ
ꢀ ꢁꢂꢃ
ꢀꢁ
ꢀ
ꢀ ꢁꢂ
ꢀꢁꢂ
ꢀꢁꢂ0ꢃꢄ ꢅ0ꢆ
0
ꢀꢁꢂꢃꢄꢅꢆ
0
ꢀ00
ꢀ00
ꢀ00
ꢀ00
ꢀ00
ꢀ00
ꢀRꢁꢂꢃ ꢄꢅꢆꢇ ꢅꢄꢄꢈꢉꢊꢅꢃꢉꢁꢂ
ꢀꢁꢂꢃ ꢄꢅRRꢆꢇꢈ ꢉꢊꢂꢋ
ꢀꢁꢂ ꢀꢁ ꢂꢃ
ꢀꢁꢂꢃ
ꢀꢁ ꢂ0ꢃꢀ
ꢀꢁ
ꢀꢁꢂ
ꢀꢁꢂ0ꢃꢄ ꢅ0ꢄ
ꢀ
ꢀ 0ꢁ
Figure 2. SW Frequency vs Load Information
in Burst Mode Operation
Figure 3. Burst Mode Operation
Rev 0
17
For more information www.analog.com
LT8640S-2/LT8643S-2
APPLICATIONS INFORMATION
Forced Continuous Mode
For robust operation over a wide V and V
range, use
OUT
IN
:
an inductor value greater than L
MIN
The LT8640S-2/LT8643S-2 can operate in forced con-
tinuous mode (FCM) for fast transient response and
full frequency operation over a wide load range. When
in FCM, the oscillator operates continuously and posi-
tive SW transitions are aligned to the clock. Negative
inductor current is allowed at light loads or under large
transient conditions. The LT8640S-2/LT8643S-2 can
sink current from the output and return this charge to
the input in this mode, improving load step transient
response (see Figure 4). At light loads, FCM operation
is less efficient than Burst Mode operation, but may
be desirable in applications where it is necessary to
keep switching harmonics out of the signal band. FCM
must be used if the output is required to sink current.
To enable FCM, float the SYNC/MODE pin. Leakage cur-
rent on this pin should be <1µA. See Block Diagram for
internal pull-up and pull-down resistance.
⎛
⎞
VOUT
2 • fSW
VOUT
V
IN,MAX
LMIN
=
• 1–
⎜
⎟
⎝
⎠
Spread Spectrum Mode
The LT8640S-2/LT8643S-2 features spread spectrum
operation to further reduce EMI emissions. To enable
spread spectrum operation, the SYNC/MODE pin should
be tied high to INTV (~3.4V)or an external supply of 3V
CC
to 4V. In this mode, triangular frequency modulation is
used to vary the switching frequency between the value
programmed by RT to approximately 20% higher than
that value. The modulation frequency is approximately
3kHz. For example, when the LT8640S-2/LT8643S-2 is
programmed to 2MHz, the frequency will vary from 2MHz
to 2.4MHz at a 3kHz rate. When spread spectrum opera-
tion is selected, Burst Mode operation is disabled, and the
part will run in forced continuous mode.
FCM is disabled if the VIN pin is held above 37V or if
the FB pin is held greater than 8% above the feedback
reference voltage. FCM is also disabled during soft-start
until the soft-start capacitor is fully charged. When FCM
is disabled in these ways, negative inductor current is
not allowed and the LT8640S-2/LT8643S-2 operates in
pulse-skipping mode.
Synchronization
To synchronize the LT8640S-2/LT8643S-2 oscillator to an
external frequency, connect a square wave to the SYNC/
MODE pin. The square wave amplitude should have val-
leys that are below 0.4V and peaks above 1.5V (up to 6V)
with a minimum on-time and off-time of 50ns.
ꢀ
ꢀꢁꢂꢃ
The LT8640S-2/LT8643S-2 will not enter Burst Mode
operation at low output loads while synchronized to an
external clock, but instead will run forced continuous
mode to maintain regulation. The LT8640S-2/LT8643S-2
may be synchronized over a 200kHz to 3MHz range. The
RT resistor should be chosen to set the LT8640S-2/
LT8643S-2 switching frequency equal to or below the
lowest synchronization input. For example, if the synchro-
nization signal will be 500kHz and higher, the RT should
be selected for 500kHz. The slope compensation is set
by the RT value, while the minimum slope compensation
required to avoid subharmonic oscillations is established
by the inductor size, input voltage and output voltage.
Since the synchronization frequency will not change the
slopes of the inductor current waveform, if the inductor
ꢀꢁꢂꢃꢄꢅ
ꢀꢁꢂꢃꢄ ꢅꢆꢇe ꢈꢉꢊRꢋꢌꢍꢈꢎ
ꢀ
ꢀꢁꢂ
ꢀ00ꢁꢂꢃꢄꢅꢂ
ꢀꢁꢂ
ꢀꢁꢂ0ꢃꢄ ꢅ0ꢂ
ꢀ0ꢁꢂꢃꢄꢅꢆ
ꢀRꢁꢂꢃ ꢄꢅꢆꢇ ꢅꢄꢄꢈꢉꢊꢅꢃꢉꢁꢂ
ꢀ00ꢁꢂ ꢃꢄ ꢀꢅꢀꢂ ꢃRꢂꢆꢇꢈꢉꢆꢃ
ꢀꢁꢂ ꢅ ꢆꢂ ꢅ ꢊ ꢍ ꢀꢎꢏꢐ
ꢃꢄ
ꢀꢁꢂ
ꢇꢈꢉ ꢋꢌ
ꢀ ꢁ00ꢂꢃ
ꢀ
Figure 4. LT8640S-2 Load Step Transient Response
with and without Forced Continuous Mode
Rev 0
18
For more information www.analog.com
LT8640S-2/LT8643S-2
APPLICATIONS INFORMATION
is large enough to avoid subharmonic oscillations at the
frequency set by RT, then the slope compensation will be
sufficient for all synchronization frequencies.
The R resistor required for a desired switching frequency
T
can be calculated using:
46.5
RT =
–5.2
(3)
fSW
FB Resistor Network
The output voltage is programmed with a resistor divider
between the output and the FB pin. Choose the resistor
values according to:
where R is in kΩ and f is the desired switching fre-
quency in MHz.
T
SW
Table 1. SW Frequency vs R Value
T
VOUT
0.970V
⎛
⎜
⎝
⎞
⎠
(1)
f
(MHz)
0.2
0.3
0.4
0.5
0.6
0.7
0.8
1.0
1.2
1.4
1.6
1.8
2.0
2.2
3.0
R (kΩ)
SW
T
R1=R2
–1
⎟
232
150
Reference designators refer to the Block Diagram. 1%
resistors are recommended to maintain output voltage
accuracy.
110
88.7
71.5
60.4
52.3
41.2
33.2
28.0
23.7
20.5
17.8
15.8
10.7
For the LT8640S-2, if low input quiescent current and
good light-load efficiency are desired, use large resistor
values for the FB resistor divider. The current flowing in
the divider acts as a load current, and will increase the no-
load input current to the converter, which is approximately:
⎛
⎞
VOUT
R1+R2
VOUT
1
⎝ ⎠
n
⎛
⎜
⎝
⎞
⎟
⎠
⎛ ⎞
I =1.7µA+
(2)
⎜ ⎟
Q
⎜
⎟
V
⎝
⎠
IN
where 1.7µA is the quiescent current of the LT8640S-2
and the second term is the current in the feedback divider
reflected to the input of the buck operating at its light load
efficiency n. For a 3.3V application with R1 = 1M and R2
Operating Frequency Selection and Trade-Offs
Selection of the operating frequency is a trade-off between
efficiency, component size, and input voltage range. The
advantage of high frequency operation is that smaller
inductor and capacitor values may be used. The disad-
vantages are lower efficiency and a smaller input voltage
range.
= 412k, the feedback divider draws 2.3µA. With VIN
=
12V and n = 80%, this adds 0.8µA to the 1.7µA quiescent
current resulting in 2.5µA no-load current from the 12V
supply. Note that this equation implies that the no-load
current is a function of V ; this is plotted in the Typical
Performance Characteristics section.
IN
The highest switching frequency (f
) for a given
When using large FB resistors, a 4.7pF to 22pF phase-lead
SW(MAX)
application can be calculated as follows:
capacitor should be connected from V
to FB.
OUT
V
OUT + VSW(BOT)
Setting the Switching Frequency
(4)
fSW(MAX)
=
tON(MIN) V – VSW(TOP) + VSW(BOT)
IN
The LT8640S-2/LT8643S-2 uses a constant frequency
PWM architecture that can be programmed to switch from
200kHz to 3MHz by using a resistor tied from the RT pin
to ground. A table showing the necessary R value for a
desired switching frequency is in Table 1.
where V is the typical input voltage, V
drops (~0S.4WV(,TO~P0).15V, rSeWsp(BeOcTti)vely at maximum load)
is the output
OUT
voltage,INV
and V
are the internal switch
T
Rev 0
19
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LT8640S-2/LT8643S-2
APPLICATIONS INFORMATION
A good first choice for the inductor value is:
and t
is the minimum top switch on-time (see the
ON(MIN)
Electrical Characteristics). This equation shows that a
VOUT + VSW(BOT)
⎛
⎜
⎞
⎟
slower switching frequency is necessary to accommodate
a high V /V
L =
• 0.7
(6)
fSW
⎝
⎠
ratio.
IN OUT
For transient operation, V may go as high as the abso-
where fSW is the switching frequency in MHz, VOUT is
IN
lute maximum rating of 42V regardless of the R value,
the output voltage, V
is the bottom switch drop
T
SW(BOT)
however the LT8640S-2/LT8643S-2 will reduce switching
frequency as necessary to maintain control of inductor
current to assure safe operation.
(~0.15V) and L is the inductor value in µH.
To avoid overheating and poor efficiency, an inductor must
be chosen with an RMS current rating that is greater than
the maximum expected output load of the application.
The LT8640S-2/LT8643S-2 is capable of a maximum duty
cycle of approximately 99%, and the V -to-V
dropout
In addition, the saturation current (typically labeled I
)
IN
OUT
SAT
is limited by the R
of the top switch. In this mode
rating of the inductor must be higher than the load current
plus 1/2 of in inductor ripple current:
DS(ON)
the LT8640S-2/LT8643S-2 skips switch cycles, resulting
in a lower switching frequency than programmed by RT.
1
2
I
L(PEAK) =ILOAD(MAX) + ΔIL
(7)
For applications that cannot allow deviation from the pro-
grammed switching frequency at low V /V
ratios use
IN OUT
where ∆I is the inductor ripple current as calculated in
L
the following formula to set switching frequency:
Equation 9 and I
for a given application.
is the maximum output load
LOAD(MAX)
V
OUT + VSW(BOT)
(5)
V
=
– VSW(BOT) + VSW(TOP)
IN(MIN)
1– fSW •tOFF(MIN)
As a quick example, an application requiring 3A output
should use an inductor with an RMS rating of greater than
where VIN(MIN) is the minimum input voltage without
skipped cycles, V
SW(BOT)
is the output voltage, V
and
3A and an I
of greater than 4A. During long duration
SW(TOP)
V
are theOinUtTernal switch drops (~0.4V, ~0.15V,
overload orSsAhTort-circuit conditions, the inductor RMS
rating requirement is greater to avoid overheating of the
inductor. To keep the efficiency high, the series resistance
(DCR) should be less than 0.02Ω, and the core material
should be intended for high frequency applications.
respectively at maximum load), fSW is the switching
frequency (set by RT), and tOFF(MIN) is the minimum
switch off-time. Note that higher switching frequency will
increase the minimum input voltage below which cycles
will be dropped to achieve higher duty cycle.
The LT8640S-2/LT8643S-2 limits the peak switch cur-
rent in order to protect the switches and the system from
Inductor Selection and Maximum Output Current
overload faults. The top switch current limit (I ) is 10A
LIM
The LT8640S-2/LT8643S-2 is designed to minimize solu-
tion size by allowing the inductor to be chosen based on
the output load requirements of the application. During
overload or short-circuit conditions the LT8640S-2/
LT8643S-2 safely tolerates operation with a saturated
inductor through the use of a high speed peak-current
mode architecture.
at low duty cycles and decreases linearly to 7A at DC =
0.8. The inductor value must then be sufficient to supply
the desired maximum output current (I
), which
is a function of the switch current limOitUT(I(LMIMAX)) and the
ripple current.
ΔIL
2
IOUT(MAX) =ILIM
–
(8)
Rev 0
20
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LT8640S-2/LT8643S-2
APPLICATIONS INFORMATION
The peak-to-peak ripple current in the inductor can be
calculated as follows:
For more information about maximum output current and
discontinuous operation, see Analog Devices Application
Note 44.
⎛
⎞
VOUT
L•fSW
VOUT
V
IN(MAX)
ΔIL =
• 1–
(9)
For duty cycles greater than 50% (VOUT/VIN > 0.5), a
minimum inductance is required to avoid sub-harmonic
oscillation. See Application Note 19.
⎜
⎟
⎝
⎠
where f is the switching frequency of the LT8640S-2/
SW
LT8643S-2, and L is the value of the inductor. Therefore,
the maximum output current that the LT8640S-2/
LT8643S-2 will deliver depends on the switch current
limit, the inductor value, and the input and output volt-
ages. The inductor value may have to be increased if the
inductor ripple current does not allow sufficient maxi-
Input Capacitors
The VIN of the LT8640S-2/LT8643S-2 should be bypassed
with at least three ceramic capacitors for best perfor-
mance. Two small ceramic capacitors of 1µF should be
placed close to the part; one on each side of the device
(C , C ). These capacitors should be 0402 or 0603 in
IN1 IN2
mum output current (I
) given the switching fre-
OUT(MAX)
size. For automotive applications requiring 2 series input
quency, and maximum input voltage used in the desired
application.
capacitors, two small 0402 or 0603 may be placed at
each side of the LT8640S-2/LT8643S-2 near the V and
IN
In order to achieve higher light load efficiency, more
energy must be delivered to the output during the sin-
gle small pulses in Burst Mode operation such that the
LT8640S-2/LT8643S-2 can stay in sleep mode longer
between each pulse. This can be achieved by using a
larger value inductor (i.e., 4.7µH), and should be consid-
ered independent of switching frequency when choosing
an inductor. For example, while a lower inductor value
would typically be used for a high switching frequency
application, if high light load efficiency is desired, a higher
inductor value should be chosen. See curve in Typical
Performance Characteristics.
GND pins.
A third, larger ceramic capacitor of 2.2µF or larger should
be placed close to CIN1 or CIN2. See layout section for
more detail. X7R or X5R capacitors are recommended for
best performance across temperature and input voltage
variations.
Note that larger input capacitance is required when a lower
switching frequency is used. If the input power source has
high impedance, or there is significant inductance due to
long wires or cables, additional bulk capacitance may be
necessary. This can be provided with a low performance
electrolytic capacitor.
The optimum inductor for a given application may differ
from the one indicated by this design guide. A larger value
inductor provides a higher maximum load current and
reduces the output voltage ripple. For applications requir-
ing smaller load currents, the value of the inductor may
be lower and the LT8640S-2/LT8643S-2 may operate
with higher ripple current. This allows use of a physically
smaller inductor, or one with a lower DCR resulting in
higher efficiency. Be aware that low inductance may result
in discontinuous mode operation, which further reduces
maximum load current.
A ceramic input capacitor combined with trace or cable
inductance forms a high quality (under damped) tank cir-
cuit. If the LT8640S-2/LT8643S-2 circuit is plugged into a
live supply, the input voltage can ring to twice its nominal
value, possibly exceeding the LT8640S-2/LT8643S-2’s
voltage rating. This situation is easily avoided (see Analog
Devices Application Note 88).
Rev 0
21
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LT8640S-2/LT8643S-2
APPLICATIONS INFORMATION
Output Capacitor and Output Ripple
A final precaution regarding ceramic capacitors concerns
the maximum input voltage rating of the LT8640S-2/
LT8643S-2. As previously mentioned, a ceramic input
capacitor combined with trace or cable inductance
forms a high quality (underdamped) tank circuit. If the
LT8640S-2/LT8643S-2 circuit is plugged into a live sup-
ply, the input voltage can ring to twice its nominal value,
possibly exceeding the LT8640S-2/LT8643S-2’s rat-
ing. This situation is easily avoided (see Analog Devices
Technology Application Note 88).
The output capacitor has two essential functions. Along
with the inductor, it filters the square wave generated by
the LT8640S-2/LT8643S-2 to produce the DC output. In
this role it determines the output ripple, thus low imped-
ance at the switching frequency is important. The second
function is to store energy in order to satisfy transient
loads and stabilize the LT8640S-2/LT8643S-2’s control
loop. Ceramic capacitors have very low equivalent series
resistance (ESR) and provide the best ripple performance.
For good starting values, see the Typical Applications
section.
Enable Pin
The LT8640S-2/LT8643S-2 is in shutdown when the EN
pin is low and active when the pin is high. The rising
threshold of the EN comparator is 1.0V, with 40mV of
hysteresis. The EN pin can be tied to V if the shutdown
feature is not used, or tied to a logicIlNevel if shutdown
control is required.
Use X5R or X7R types. This choice will provide low out-
put ripple and good transient response. Transient perfor-
mance can be improved with a higher value output capaci-
tor and the addition of a feedforward capacitor placed
between V
and FB. Increasing the output capacitance
OUT
will also decrease the output voltage ripple. A lower value
of output capacitor can be used to save space and cost
but transient performance will suffer and may cause loop
instability. See the Typical Applications in this data sheet
for suggested capacitor values.
Adding a resistor divider from V to EN programs the
IN
LT8640S-2/LT8643S-2 to regulate the output only when
V
is above a desired voltage (see the Block Diagram).
IN
Typically, this threshold, VIN(EN), is used in situations
where the input supply is current limited, or has a rel-
atively high source resistance. A switching regulator
draws constant power from the source, so source cur-
rent increases as source voltage drops. This looks like
a negative resistance load to the source and can cause
the source to current limit or latch low under low source
voltage conditions. The VIN(EN) threshold prevents the
regulator from operating at source voltages where the
problems might occur. This threshold can be adjusted by
setting the values R3 and R4 such that they satisfy the
following equation:
When choosing a capacitor, special attention should be
given to the data sheet to calculate the effective capaci-
tance under the relevant operating conditions of voltage
bias and temperature. A physically larger capacitor or one
with a higher voltage rating may be required.
Ceramic Capacitors
Ceramic capacitors are small, robust and have very low
ESR. However, ceramic capacitors can cause problems
when used with the LT8640S-2/LT8643S-2 due to their
piezoelectric nature. When in Burst Mode operation, the
LT8640S-2/LT8643S-2’s switching frequency depends on
the load current, and at very light loads the LT8640S-2/
LT8643S-2 can excite the ceramic capacitor at audio fre-
quencies, generating audible noise. Since the LT8640S-2/
LT8643S-2 operates at a lower current limit during Burst
Mode operation, the noise is typically very quiet to a
casual ear. If this is unacceptable, use a high performance
tantalum or electrolytic capacitor at the output. Low noise
ceramic capacitors are also available.
R3
R4
⎛
⎞
⎠
(10)
V
=
+1 •1.0V
⎟
⎜
⎝
IN(EN)
where the LT8640S-2/LT8643S-2 will remain off until
V is above V . Due to the comparator’s hysteresis,
IN
IN(EN)
switching will not stop until the input falls slightly below
V
.
IN(EN)
When operating in Burst Mode operation for light load
currents, the current through the VIN(EN) resistor network
can easily be greater than the supply current consumed
by the LT8640S-2/LT8643S-2. Therefore, the VIN(EN)
Rev 0
22
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LT8640S-2/LT8643S-2
APPLICATIONS INFORMATION
resistors should be large to minimize their effect on effi-
ciency at low loads.
is modeled as a transconductance amplifier generating an
output current proportional to the voltage at the V pin.
C
Note that the output capacitor integrates this current, and
that the capacitor on the V pin (C ) integrates the error
INTV Regulator
CC
C
C
amplifier output current, resulting in two poles in the loop.
An internal low dropout (LDO) regulator produces the
3.4V supply from VIN that powers the drivers and the
internal bias circuitry. The INTVCC can supply enough cur-
rent for the LT8640S-2/LT8643S-2’s circuitry and must
be bypassed to ground with a minimum of 1µF ceramic
capacitor. Good bypassing is necessary to supply the high
transient currents required by the power MOSFET gate
drivers. To improve efficiency the internal LDO can also
draw current from the BIAS pin when the BIAS pin is
at 3.1V or higher. Typically the BIAS pin can be tied to
the output of the LT8640S-2/LT8643S-2, or can be tied
to an external supply of 3.3V or above. If BIAS is con-
A zero is required and comes from a resistor R in series
C
with C . This simple model works well as long as the value
of theCinductor is not too high and the loop crossover
frequency is much lower than the switching frequency. A
phase lead capacitor (C ) across the feedback divider can
be used to improve thePtrLansient response and is required
to cancel the parasitic pole caused by the feedback node
to ground capacitance.
ꢕꢍꢖꢗꢘꢙꢆꢚꢛ
ꢁꢊRRꢋꢌꢍ ꢎꢏꢐꢋ
ꢑꢏꢒꢋR ꢆꢍꢓꢔꢋ
nected to a supply other than V , be sure to bypass
OUT
ꢎꢇ
with a local ceramic capacitor. If the BIAS pin is below
ꢏꢊꢍꢑꢊꢍ
3.0V, the internal LDO will consume current from V .
ꢎꢛ
IN
Applications with high input voltage and high switching
ꢁ
ꢑꢕ
Rꢇ
Rꢛ
ꢂ
ꢄ ꢅꢆ
ꢃ
frequency where the internal LDO pulls current from V
ꢂ
ꢄ ꢇꢈꢉꢃꢆ
IN
ꢃ
ꢞꢟ
will increase die temperature because of the higher power
ꢁꢇ
ꢀ
ꢁ
ꢢ
dissipation across the LDO. Do not connect an external
ꢡ
0ꢈꢝꢉꢀ
R
ꢁ
ꢇꢅ0ꢜ
load to the INTV pin.
CC
ꢁ
ꢞ
ꢁ
ꢁ
Frequency Compensation (LT8643S-2 Only)
ꢖꢗꢘ0ꢠꢛ ꢞ0ꢅ
Loop compensation determines the stability and transient
performance, and is provided by the components tied to
Figure 5. Model for Loop Response
the V pin. Generally, a capacitor (C ) and a resistor (R )
C
C
C
Output Voltage Tracking and Soft-Start
he LT8640S-2/LT8643S-2 allows the user to program
its output voltage ramp rate by means of the TR/SS pin.
An internal 1.9µA pulls up the TR/SS pin to INTVCC.
Putting an external capacitor on TR/SS enables soft
starting the output to prevent current surge on the input
supply. During the soft-start ramp the output voltage will
proportionally track the TR/SS pin voltage.
in series to ground are used. Designing the compensation
network is a bit complicated and the best values depend
on the application. A practical approach is to start with
one of the circuits in this data sheet that is similar to your
application and tune the compensation network to opti-
mize the performance. LTspice® simulations can help in
this process. Stability should then be checked across all
operating conditions, including load current, input voltage
and temperature. The LT1375 data sheet contains a more
thorough discussion of loop compensation and describes
how to test the stability using a transient load.
T
For output tracking applications, TR/ SS can be externally
driven by another voltage source. For the LT8640S-2, from
0V to 0.97V, the TR/SS voltage will override the internal
0.97V reference input to the error amplifier, thus regulat-
ing the FB pin voltage to that of TR/SS pin. When TR/SS
is above 0.97V, tracking is disabled and the feedback
Figure 5 shows an equivalent circuit for the LT8643S-2
control loop. The error amplifier is a transconductance
amplifier with finite output impedance. The power section,
consisting of the modulator, power switches, and inductor,
voltage will regulate to the internal reference voltage. For
Rev 0
23
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LT8640S-2/LT8643S-2
APPLICATIONS INFORMATION
the LT8643S-2, from 0V to 1.6V, the TR/SS voltage will
override the internal 0.97V reference input to the error
amplifier, thus regulating the FB pin voltage to a func-
tion of the TR/SS pin. See plot in the Typical Performance
Characteristics section. When TR/SS is above 1.6V, track-
ing is disabled and the feedback voltage will regulate to
the internal reference voltage. The TR/SS pin may be left
floating if the function is not needed.
Output Power Good
When the LT8640S-2/LT8643S-2’s output voltage is
within the 8% window of the regulation point, the out-
put voltage is considered good and the open-drain PG pin
goes high impedance and is typically pulled high with an
external resistor. Otherwise, the internal pull-down device
will pull the PG pin low. To prevent glitching both the
upper and lower thresholds include 0.2% of hysteresis.
PG is valid when V is above 3.4V.
An active pull-down circuit is connected to the TR/SS pin
which will discharge the external soft-start capacitor in
the case of fault conditions and restart the ramp when the
faults are cleared. Fault conditions that clear the soft-start
IN
The PG pin is also actively pulled low during several fault
conditions: EN/UV pin is below 1V, INTV has fallen too
CC
low, V is too low, or thermal shutdown.
IN
capacitor are the EN/UV pin transitioning low, V voltage
IN
falling too low, or thermal shutdown.
Shorted and Reversed Input Protection
The LT8640S-2/LT8643S-2 will tolerate a shorted output.
Several features are used for protection during output
short-circuit and brownout conditions. The first is the
switching frequency will be folded back while the output
is lower than the set point to maintain inductor current
control. Second, the bottom switch current is monitored
such that if inductor current is beyond safe levels switch-
ing of the top switch will be delayed until such time as the
inductor current falls to safe levels.
Paralleling (LT8643S-2 Only)
To increase the possible output current, two LT8643S-2s
can be connected in parallel to the same output. To do
this, the V and FB pins are connected together, and each
C
LT8643S-2’s SW node is connected to the common out-
put through its own inductor. The CLKOUT pin of one
LT8643S-2 should be connected to the SYNC/MODE pin
of the second LT8643S-2 to have both devices operate
in the same mode. During FCM, spread spectrum, and
synchronization modes, both devices will operate at the
same frequency. Figure 6 shows an application where two
LT8643S-2 are paralleled to get one output capable of up
to 12A.
Frequency foldback behavior depends on the state of the
SYNC pin: If the SYNC pin is low the switching frequency
will slow while the output voltage is lower than the pro-
grammed level. If the SYNC pin is connected to a clock
source, floated or tied high, the LT8640S-2/LT8643S-2
will stay at the programmed frequency without foldback
and only slow switching if the inductor current exceeds
safe levels.
ꢂꢋꢄꢅꢆꢎꢏꢐꢃ
ꢂꢁ
ꢌ
ꢉꢊꢋ
ꢌ
ꢀ
ꢏꢑ
ꢁꢃꢍ
There is another situation to consider in systems where
the output will be held high when the input to the
LT8640S-2/LT8643S-2 is absent. This may occur in bat-
tery charging applications or in battery-backup systems
where a battery or some other supply is diode ORed
ꢀꢁ
ꢀ
ꢉꢊꢋ
Rꢁ
Rꢃ
ꢀꢂꢓꢉꢊꢋ
ꢈꢒ
R
ꢀ
ꢂꢋꢄꢅꢆꢎꢏꢐꢃ
ꢏꢔꢕꢀꢖꢗꢉꢘꢙ
ꢀ
ꢀ
with the LT8640S-2/LT8643S-2’s output. If the V pin
IN
ꢈꢒ
is allowed to float and the EN pin is held high (either
by a logic signal or because it is tied to VIN), then the
LT8640S-2/LT8643S-2’s internal circuitry will pull its qui-
escent current through its SW pin. This is acceptable if
the system can tolerate several µA in this state. If the EN
ꢂꢃ
ꢌ
ꢀ
ꢏꢑ
ꢄꢅꢆ0ꢇꢃ ꢈ0ꢅ
Figure 6. Paralleling Two LT8643S-2s
pin is grounded the SW pin current will drop to near 1µA.
Rev 0
24
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LT8640S-2/LT8643S-2
APPLICATIONS INFORMATION
load current can be decreased to reduce the temperature
to an acceptable level. Figure 8 shows examples of how
However, if the VIN pin is grounded while the output is held
high, regardless of EN, parasitic body diodes inside the
LT8640S-2/LT8643S-2 can pull current from the output
case temperature rise can be managed by reducing V ,
IN
switching frequency, or load.
through the SW pin and the VIN pin, which may dam
-
age the IC. Figure 7 shows a connection of the V and
EN/UV pins that will allow the LT8640S-2/LT86I4N3S-2
to run only when the input voltage is present and that
protects against a shorted or reversed input.
ꢃꢄ
The LT8640S-2/LT8643S-2’s internal power switches
are capable of safely delivering up to 7A of peak out-
put current. However, due to thermal limits, the package
can only handle 7A loads for short periods of time. This
time is determined by how quickly the case temperature
approaches the maximum junction rating. Figure 9 shows
an example of how case temperature rise changes with
the duty cycle of a 1kHz pulsed 7A load.
ꢀ
ꢁꢂ
ꢀ
ꢁꢂ
ꢅꢆꢇꢈꢉ0ꢊꢋꢌ
ꢅꢆꢇꢈꢉꢍꢊꢋꢌ
ꢎꢂꢏꢐꢀ
ꢔꢂꢃ
The LT8640S-2/LT8643S-2’s top switch current limit
decreases with higher duty cycle operation for slope com-
pensation. This also limits the peak output current the
LT8640S-2/LT8643S-2 can deliver for a given application.
See curve in Typical Performance Characteristics.
ꢇꢈꢉ0ꢑꢌ ꢒ0ꢓ
Figure 7. Reverse VIN Protection
Thermal Considerations and Peak Output Current
ꢀ0
For higher ambient temperatures, care should be taken in
the layout of the PCB to ensure good heat sinking of the
LT8640S-2/LT8643S-2. The ground pins on the bottom
of the package should be soldered to a ground plane.
This ground should be tied to large copper layers below
with thermal vias; these layers will spread heat dissipated
by the LT8640S-2/LT8643S-2. Placing additional vias
can reduce thermal resistance further. The maximum load
current should be derated as the ambient temperature
approaches the maximum junction rating. Power dissipa-
tion within the LT8640S-2/LT8643S-2 can be estimated
by calculating the total power loss from an efficiency
measurement and subtracting the inductor loss. The die
temperature is calculated by multiplying the LT8640S-2/
LT8643S-2 power dissipation by the thermal resistance
from junction to ambient.
ꢀꢁꢂꢃꢄ0ꢅ ꢀꢆꢇꢈ ꢉꢈꢅRꢀ
ꢀ0
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ ꢁꢂ ꢄ ꢅ ꢀ ꢁꢂꢃꢄ
ꢀꢁ
ꢀꢁ
ꢀꢁ
ꢀꢁ
ꢀꢁ
ꢀ ꢁꢂ ꢄ ꢅ ꢀ ꢁꢂꢃꢄ
ꢀꢁ
ꢀ0
ꢀ0
ꢀ0
ꢀ0
ꢀ0
ꢀ0
0
ꢀ ꢁꢂ ꢄ ꢅ ꢀ ꢁꢂꢃꢄ
ꢀꢁ
ꢀ ꢁꢂ ꢄ ꢅ ꢀ ꢁꢂꢃꢄ
ꢀꢁ
0
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀꢁꢂꢃ ꢄꢅRRꢆꢇꢈ ꢉꢂꢊ
ꢀꢁꢂ0ꢃꢄ ꢅ0ꢀ
Figure 8. Case Temperature Rise
ꢀ0
ꢀ0
ꢀ0
ꢀ0
ꢀ0
ꢀ0
ꢀ0
ꢀ0
ꢀ0
0
ꢀꢁꢂꢃꢄ0ꢅ ꢀꢆꢇꢈ ꢉꢈꢅRꢀ
ꢀ
ꢀ ꢁꢂꢃ
ꢀꢁꢂ
ꢀ ꢁꢂꢃꢄ
ꢀꢁ
ꢀ
ꢀ ꢁꢂ
ꢀ
ꢀꢁ
The internal overtemperature protection monitors the
junction temperature of the LT8640S-2/LT8643S-2. If
the junction temperature reaches approximately 180°C,
the LT8640S-2/LT8643S-2 will stop switching and indi-
cate a fault condition until the temperature drops about
10°C cooler.
ꢀꢁꢂꢃꢄꢅꢆ ꢇꢈꢂꢄ ꢉ 0ꢊꢋꢌꢂ
ꢀꢁꢂꢃ ꢄꢅꢆꢇꢈꢉ ꢆꢊꢋꢉ ꢌ ꢍꢋ
Temperature rise of the LT8640S-2/LT8643S-2 is worst
0
0ꢀꢁ
0ꢀꢁ
0ꢀꢁ
0ꢀꢁ
ꢀ
when operating at high load, high V , and high switch-
IN
ꢀꢁꢂꢃ ꢄꢃꢄꢅꢆ ꢇꢈ ꢉꢊ ꢅꢇꢊꢀ
ꢀꢁꢂ0ꢃꢄ ꢅ0ꢆ
ing frequency. If the case temperature is too high for a
given application, then either VIN, switching frequency, or
Figure 9. Case Temperature Rise vs 7A Pulsed Load
Rev 0
25
For more information www.analog.com
LT8640S-2/LT8643S-2
TYPICAL APPLICATIONS
ꢀ
ꢁꢂ
ꢥꢞꢠꢀ ꢊꢉ ꢍꢐꢀ
ꢍꢞꢠꢟꢓ
ꢃꢂꢄꢅꢀ
ꢀ
ꢀ
ꢁꢂ
ꢁꢂ
ꢔꢟꢓ
0ꢌ0ꢑ
ꢔꢟꢓ
0ꢌ0ꢑ
ꢛꢂꢘ
ꢛꢂꢘ
ꢇꢊꢋꢌꢍ0ꢎꢏꢐ
ꢇꢊꢋꢌꢍꢑꢎꢏꢐ
ꢆꢇꢈꢉꢅꢊ
ꢕꢎꢊ
ꢑꢞꢑꢟꢨ
0ꢞꢔꢟꢓ
ꢔ00ꢦ
ꢀ
ꢥꢀ
ꢌꢝ
ꢉꢅꢊ
ꢎꢖꢂꢆꢄꢗꢉꢘꢃ
ꢎꢜ
ꢚꢛ
ꢌꢞꢍꢩꢦ
ꢀ ꢙ
ꢆ
ꢔ0ꢧꢓ
ꢑꢑ0ꢡꢓ
ꢊRꢄꢎꢎ
ꢕꢁꢝꢎ
ꢍꢞꢠꢡꢓ ꢢꢇꢊꢋꢌꢍꢑꢎꢏꢐꢣ
ꢔ0ꢡꢓ ꢢꢇꢊꢋꢌꢍ0ꢎꢏꢐꢣ
ꢔꢟꢓ
ꢔꢗ
ꢔ00ꢟꢓ
ꢔꢐꢔ0
ꢤꢥRꢄꢤꢠR
ꢁꢂꢊꢀ
Rꢊ
ꢓꢕ
ꢆꢆ
ꢍꢔꢞꢐꢦ
ꢐꢍꢑꢦ
ꢛꢂꢘ
ꢋꢌꢍ0ꢒꢐ ꢓꢔ0
ꢪ
ꢫ ꢔꢗꢨꢬ
ꢎꢜ
ꢇꢭ ꢤꢃꢇꢌ0ꢑ0
Figure 10. 5V, 6A Step-Down Converter with Soft-Start and Power Good
ꢀ
ꢁꢂ
ꢍꢀ ꢊꢉ ꢍꢐꢀ
ꢍꢞꢠꢟꢓ
ꢃꢂꢄꢅꢀ
ꢀ
ꢀ
ꢁꢂ
ꢁꢂ
ꢔꢟꢓ
0ꢌ0ꢑ
ꢔꢟꢓ
0ꢌ0ꢑ
ꢛꢂꢘ
ꢛꢂꢘ
ꢇꢊꢋꢌꢍ0ꢎꢏꢐ
ꢇꢊꢋꢌꢍꢑꢎꢏꢐ
ꢆꢇꢈꢉꢅꢊ
ꢕꢎꢊ
ꢐꢞꢐꢟꢨ
0ꢞꢔꢟꢓ
ꢔ00ꢦ
ꢀ
ꢑꢞꢑꢀ
ꢌꢝ
ꢉꢅꢊ
ꢎꢖꢂꢆꢄꢗꢉꢘꢃ
ꢎꢜ
ꢚꢛ
ꢋꢞꢍꢥꢦ
ꢀ ꢙ
ꢆ
ꢔ0ꢧꢓ
ꢑꢑ0ꢡꢓ
ꢊRꢄꢎꢎ
ꢕꢁꢝꢎ
ꢍꢞꢠꢡꢓ ꢢꢇꢊꢋꢌꢍꢑꢎꢏꢐꢣ
ꢔ0ꢡꢓ ꢢꢇꢊꢋꢌꢍ0ꢎꢏꢐꢣ
ꢔꢟꢓ
ꢔꢗ
ꢔ00ꢟꢓ
ꢔꢐꢔ0
ꢤꢥRꢄꢤꢠR
ꢁꢂꢊꢀ
Rꢊ
ꢓꢕ
ꢆꢆ
ꢍꢔꢞꢐꢦ
ꢍꢔꢐꢦ
ꢛꢂꢘ
ꢋꢌꢍ0ꢒꢐ ꢓꢔꢔ
ꢩ
ꢪ ꢔꢗꢨꢫ
ꢎꢜ
ꢇꢬ ꢤꢃꢇꢌ0ꢑ0
Figure 11. 3.3V, 6A Step-Down Converter with Soft-Start and Power Good
* V pin and components only apply to LT8643S-2.
C
Rev 0
26
For more information www.analog.com
LT8640S-2/LT8643S-2
TYPICAL APPLICATIONS
ꢀꢁꢂ
ꢀꢁꢂꢃ
ꢀ
ꢀꢁ
ꢀꢁꢂꢃ ꢄꢅ ꢆꢇꢃ
ꢀ0ꢁꢂ
ꢀꢁꢀ0
ꢀ0ꢁꢂ
ꢀꢁꢀ0
ꢀ0ꢁꢂ
ꢀꢁꢀ0
ꢀꢁꢂꢃꢄ
ꢀ
ꢀ
ꢀꢁ
ꢀꢁ
ꢀꢁꢂ
0ꢀ0ꢁ
ꢀꢁꢂ
0ꢀ0ꢁ
ꢀꢁꢂ
ꢀꢁꢂ
ꢀꢁꢂꢃ ꢂꢄꢅ ꢆꢃꢇꢈ ꢁꢂ
ꢅꢉꢁꢃ ꢊꢁRꢊꢆꢁꢅꢋ
ꢀꢁꢂꢃꢄ0ꢅꢆꢇ
ꢀꢁꢂꢃꢄꢈꢅꢆꢇ
ꢀꢁꢂ
0ꢀꢁꢂꢃ
ꢀꢁꢂꢃꢄ ꢆ ꢇꢈꢆ ꢅRꢉꢊꢊ
ꢀꢁꢂ
ꢀꢁꢂꢃꢄ
ꢀ
ꢀꢁꢂ
ꢀꢁꢂꢃ
ꢀꢁ
ꢀꢁ
ꢀꢀ
ꢀꢁ
ꢀꢁꢂꢃꢄꢅꢆꢇꢈ
ꢀꢁꢂꢃ
ꢀꢁꢂꢃꢄ
ꢀꢁꢂꢃꢄ ꢅꢆꢇꢈꢉꢀꢊꢋꢌꢍꢎ
ꢏ0ꢃꢄ ꢅꢆꢇꢈꢉꢀ0ꢋꢌꢍꢎ
ꢀꢁ
ꢀ ꢂ
ꢁ
ꢀ00ꢁꢂ
ꢀꢁꢀ0
ꢀꢁRꢂꢀꢃR
Rꢀ
ꢀꢁ
ꢀꢀ0ꢁꢂ
ꢀꢁꢂ
ꢀꢁꢂꢃꢄ
ꢀꢁꢂꢃ
ꢀ
ꢀ ꢁꢂꢃꢄ
ꢀꢁ
L: XEL6030
FB1 BEAD: WE-MPSB 100Ω 8A 1812
ꢀꢁꢂ0ꢃꢄ ꢅꢆꢄ
Figure 12. Ultralow EMI 5V, 6A Step-Down Converter with Spread Spectrum
ꢀ
ꢁꢂ
ꢣꢜꢞꢀ ꢇꢖ ꢊꢍꢀ
ꢊꢜꢞꢝꢐ
ꢃꢂꢄꢅꢀ
ꢀ
ꢀ
ꢁꢂ
ꢁꢂ
ꢑꢝꢐ
ꢑꢝꢐ
0ꢉ0ꢎ
0ꢉ0ꢎ
ꢛꢂꢗ
ꢛꢂꢗ
ꢆꢇꢈꢉꢊ0ꢋꢌꢍ
ꢆꢇꢈꢉꢊꢎꢋꢌꢍ
ꢒꢋꢇ
ꢋꢙ
ꢈꢜꢊꢣꢤ
ꢑꢜꢣꢝꢥ
0ꢜꢑꢝꢐ
ꢀ
ꢖꢅꢇ
ꢀ ꢘ
ꢔ
ꢀꢁꢂꢃ ꢂꢄꢅ ꢆꢃꢇꢈ ꢁꢂ
ꢅꢉꢁꢃ ꢊꢁRꢊꢆꢁꢅꢋ
ꢣꢀ
ꢉꢚ
ꢋꢓꢂꢔꢄꢕꢖꢗꢃ
ꢎꢎ0ꢟꢐ
ꢀꢁꢂꢃꢄ ꢆ ꢇꢈꢆ ꢅRꢉꢊꢊ
ꢒꢁꢚꢋ
ꢊꢜꢞꢟꢐ ꢠꢆꢇꢈꢉꢊꢎꢋꢌꢍꢡ
ꢑ0ꢟꢐ ꢠꢆꢇꢈꢉꢊ0ꢋꢌꢍꢡ
ꢑꢝꢐ
ꢑꢕ
ꢑ00ꢝꢐ
ꢑꢍꢑ0
ꢢꢣRꢄꢢꢞR
ꢁꢂꢇꢀ
Rꢇ
ꢐꢒ
ꢔꢔ
ꢑꢞꢜꢈꢤ
ꢍꢊꢎꢤ
ꢛꢂꢗ
ꢈꢉꢊ0ꢏꢍ ꢐꢑꢎ
ꢦ
ꢧ ꢍꢕꢥꢨ
ꢋꢙ
ꢆꢩ ꢢꢃꢆꢉ0ꢎ0
Figure 13. 2MHz 5V, 6A Step-Down Converter with Spread Spectrum
* V pin and components only apply to LT8643S-2.
C
Rev 0
27
For more information www.analog.com
LT8640S-2/LT8643S-2
TYPICAL APPLICATIONS
ꢀ
ꢁꢂ
ꢊꢀ ꢇꢖ ꢊꢍꢀ
ꢊꢜꢞꢝꢐ
ꢃꢂꢄꢅꢀ
ꢀ
ꢀ
ꢁꢂ
ꢁꢂ
ꢑꢝꢐ
ꢑꢝꢐ
0ꢉ0ꢎ
0ꢉ0ꢎ
ꢛꢂꢗ
ꢛꢂꢗ
ꢆꢇꢈꢉꢊ0ꢋꢌꢍ
ꢆꢇꢈꢉꢊꢎꢋꢌꢍ
ꢒꢋꢇ
ꢋꢙ
ꢑꢉꢜꢍꢤ
ꢑꢝꢥ
0ꢜꢑꢝꢐ
ꢀ
ꢎꢜꢎꢀ
ꢉꢚ
ꢖꢅꢇ
ꢀ ꢘ
ꢔ
ꢀꢁꢂꢃ ꢂꢄꢅ ꢆꢃꢇꢈ ꢁꢂ
ꢅꢉꢁꢃ ꢊꢁRꢊꢆꢁꢅꢋ
ꢋꢓꢂꢔꢄꢕꢖꢗꢃ
ꢍꢍ0ꢟꢐ
ꢒꢁꢚꢋ
ꢀꢁꢂꢃꢄ ꢆ ꢇꢈꢆ ꢅRꢉꢊꢊ
ꢊꢜꢞꢟꢐ ꢠꢆꢇꢈꢉꢊꢎꢋꢌꢍꢡ
ꢑ0ꢟꢐ ꢠꢆꢇꢈꢉꢊ0ꢋꢌꢍꢡ
ꢑꢝꢐ
ꢑꢕ
ꢑ00ꢝꢐ
ꢑꢍꢑ0
ꢢꢣRꢄꢢꢞR
ꢁꢂꢇꢀ
Rꢇ
ꢐꢒ
ꢔꢔ
ꢑꢞꢜꢈꢤ
ꢊꢑꢍꢤ
ꢛꢂꢗ
ꢈꢉꢊ0ꢏꢍ ꢐꢑꢊ
ꢦ
ꢧ ꢍꢕꢥꢨ
ꢋꢙ
ꢆꢩ ꢢꢃꢆꢉ0ꢎ0
Figure 14. 2MHz 3.3V, 6A Step-Down Converter with Spread Spectrum
ꢀ
ꢁꢂ
ꢄꢃꢠꢢꢀ ꢉꢔ ꢌꢃꢀ
ꢌꢠꢢꢡꢐ
ꢄꢡꢐ
0ꢋ0ꢦ
ꢅꢂꢆꢇꢀ
ꢀ
ꢀ
ꢁꢂꢃ
ꢁꢂꢄ
ꢄꢡꢐ
0ꢋ0ꢦ
ꢛꢂꢕꢄ
ꢛꢂꢕꢃ
ꢒꢍꢉ
ꢈꢉꢊꢋꢌ0ꢍꢎꢃ
ꢌꢠꢢꢡꢖ
0ꢠꢄꢡꢐ
ꢌꢠꢢꢣꢐ
ꢀ
ꢄꢃꢀ
ꢋꢟ
ꢔꢇꢉ
ꢍꢞ
ꢄ0ꢥꢐ
ꢒꢁꢟꢍ
ꢉRꢆꢍꢍ
ꢄꢡꢐ
ꢄꢝ
ꢌꢢꢡꢐ
ꢄꢃꢄ0
ꢁꢂꢉꢀ
Rꢉ
ꢐꢒ
ꢗꢗ
ꢌꢄꢠꢃꢧ
ꢤꢑRꢆꢤꢢR
ꢊꢊꢠꢢꢧ
ꢛꢂꢕ
ꢊꢋꢌ0ꢏꢃ ꢐꢄꢑ
ꢨ
ꢩ ꢄꢝꢖꢪ
ꢍꢞ
ꢈꢘ ꢤꢅꢈꢋ0ꢋ0
ꢓꢁꢂꢍ ꢂꢔꢉ ꢇꢍꢅꢕ ꢁꢂ ꢉꢖꢁꢍ ꢗꢁRꢗꢇꢁꢉꢘ
ꢗꢈꢙꢔꢇ ꢚ ꢓꢛꢚ ꢍꢜꢂꢗꢆꢝꢔꢕꢅ
Figure 15. 12V, 6A Step-Down Converter
* V pin and components only apply to LT8643S-2.
C
Rev 0
28
For more information www.analog.com
LT8640S-2/LT8643S-2
PACKAGE DESCRIPTION
ꢜ
ꢝ
ꢟ
ꢣ ꢄ ꢄ ꢄ
ꢮ ꢮ ꢮ
ꢟ
ꢟ
× ꢠ ꢡ
ꢟ
ꢪ ꢪ ꢢ ꢢ ꢢ
ꢟ
ꢏ ꢦ ꢠ ꢌ 0 0
0 ꢦ ꢨ ꢌ 0 0
0 ꢦ ꢠ ꢌ 0 0
0 ꢦ 0 0 0 0
0 ꢦ ꢠ ꢌ 0 0
0 ꢦ ꢨ ꢌ 0 0
ꢏ ꢦ ꢠ ꢌ 0 0
ꢞ ꢞ ꢞ
ꢟ
× ꢠ
Rev 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog
Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications
29
subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
LT8640S-2/LT8643S-2
TYPICAL APPLICATIONS
2MHz 1.8V, 6A Step-Down Converter
ꢀ
ꢁꢂ
ꢤꢟꢌꢀ ꢉꢓ ꢃꢃꢀ
ꢩꢌꢃꢀ ꢉRꢐꢂꢍꢁꢅꢂꢉꢪ
ꢌꢟꢦꢠꢞ
ꢅꢂꢆꢇꢀ
ꢀ
ꢀ
ꢁꢂꢃ
ꢁꢂꢄ
ꢄꢠꢞ
0ꢋ0ꢤ
ꢄꢠꢞ
0ꢋ0ꢤ
ꢚꢂꢔꢄ
ꢚꢂꢔꢃ
ꢑꢍꢉ
ꢄꢠꢕ
0ꢟꢄꢠꢞ
ꢄꢠꢞ
ꢀ
ꢄꢟꢊꢀ
ꢋꢐ
ꢈꢉꢊꢋꢌ0ꢍꢎꢃ
ꢓꢇꢉ
ꢍꢝ
ꢄ0ꢧꢞ
ꢅꢢꢉꢅRꢂꢐꢈ
ꢍꢓꢇRꢖꢅ ꢣꢤꢟꢄꢀ
ꢓR ꢚꢂꢔ
ꢑꢁꢐꢍ
ꢉRꢆꢍꢍ
ꢄ0ꢡꢞ
ꢊꢋꢋꢨ
ꢄꢜ
ꢄꢠꢞ
ꢄ00ꢠꢞ
ꢄꢃꢄ0
ꢢꢥRꢆꢢꢦR
ꢁꢂꢉꢀ
Rꢉ
ꢞꢑ
ꢖꢖ
ꢄꢦꢟꢊꢨ
ꢚꢂꢔ
ꢊꢋꢌ0ꢏꢃ ꢉꢐ0ꢃ
ꢫ
ꢬ ꢃꢜꢕꢭ
ꢍꢝ
ꢈꢗ ꢢꢅꢈꢋ0ꢤ0
ꢒꢁꢂꢍ ꢂꢓꢉ ꢇꢍꢅꢔ ꢁꢂ ꢉꢕꢁꢍ ꢖꢁRꢖꢇꢁꢉꢗ
ꢖꢈꢘꢓꢇ ꢙ ꢒꢚꢙ ꢍꢛꢂꢖꢆꢜꢓꢔꢅ
RELATED PARTS
PART
DESCRIPTION
COMMENTS
= 3.4V, V
LT8640S/
LT8643S
42V, 6A Synchronous Step-Down Silent Switcher 2 with I = 2.5μA
V
I
= 42V, V
= 0.97V, I = 2.5µA,
Q
Q
IN(MIN)
IN(MAX)
OUT(MIN)
OUT(MIN)
OUT(MIN)
< 1µA, 4mm × 4mm LQFN-24
SD
LT8640/
LT8640-1
42V, 5A, 96% Efficiency, 3MHz Synchronous MicroPower Step-Down
V
SD
= 3.4V, V
= 42V, V
= 0.97V, I = 2.5µA,
Q
IN(MIN)
IN(MAX)
DC/DC Converter with I = 2.5μA
I
< 1µA, 3mm × 4mm QFN-18
Q
LT8645S
65V, 8A, Synchronous Step-Down Silent Switcher 2 with I = 2.5μA
V
SD
= 3.4V, V
= 65V, V
= 0.97V, I = 2.5µA,
Q
Q
IN(MIN)
IN(MAX)
I
< 1µA, 4mm × 6mm LQFN-32
LT8641
65V, 3.5A, 95% Efficiency, 3MHz Synchronous MicroPower Step-Down
V
SD
= 3V, V
= 65V, V
= 0.81V, I = 2.5µA,
Q
IN(MIN)
IN(MAX)
OUT(MIN)
DC/DC Converter with I = 2.5μA
I
< 1µA, 3mm × 4mm QFN-18
Q
LT8609/
LT8609A
42V, 2A, 94% Efficiency, 2.2MHz Synchronous MicroPower Step-Down
V
SD
= 3V, V
= 42V, V
= 0.8V, I = 2.5µA,
Q
IN(MIN)
IN(MAX)
OUT(MIN)
DC/DC Converter with I = 2.5µA
I
< 1µA, MSOP-10E
Q
LT8610A/
LT8610AB
42V, 3.5A, 96% Efficiency, 2.2MHz Synchronous MicroPower Step-
V
SD
= 3.4V, V
= 42V, V = 0.97V, I = 2.5µA,
OUT(MIN) Q
IN(MIN)
IN(MAX)
Down DC/DC Converter with I = 2.5µA
I
< 1µA, MSOP-16E
Q
LT8610AC
LT8610
LT8616
LT8620
LT8614
LT8612
LT8602
42V, 3.5A, 96% Efficiency, 2.2MHz Synchronous MicroPower Step-
V
SD
= 3V, V
= 42V, V
= 0.8V, I = 2.5µA,
IN(MIN)
IN(MAX)
OUT(MIN) Q
Down DC/DC Converter with I = 2.5µA
I
< 1µA, MSOP-16E
Q
42V, 2.5A, 96% Efficiency, 2.2MHz Synchronous MicroPower Step-
V
= 3.4V, V
< 1µA, MSOP-16E
= 42V, V
= 0.97V, I = 2.5µA,
Q
IN(MIN)
IN(MAX)
OUT(MIN)
OUT(MIN)
Down DC/DC Converter with I = 2.5µA
I
SD
Q
42V, Dual 2.5A + 1.5A, 95% Efficiency, 2.2MHz Synchronous
V
= 3.4V, V
= 42V, V
= 0.8V, I = 5µA,
Q
IN(MIN)
IN(MAX)
MicroPower Step-Down DC/DC Converter with I = 5µA
I
SD
< 1µA, TSSOP-28E, 3mm × 6mm QFN-28
Q
65V, 2.5A, 94% Efficiency, 2.2MHz Synchronous MicroPower Step-
V
= 3.4V, V
= 65V, V
= 0.97V, I = 2.5µA,
OUT(MIN) Q
IN(MIN)
IN(MAX)
Down DC/DC Converter with I = 2.5µA
I
SD
< 1µA, MSOP-16E, 3mm × 5mm QFN-24
Q
42V, 4A, 96% Efficiency, 2.2MHz Synchronous Silent Switcher Step-
V
= 3.4V, V
< 1µA, 3mm × 4mm QFN18
= 42V, V
= 0.97V, I = 2.5µA,
Q
IN(MIN)
IN(MAX)
OUT(MIN)
Down DC/DC Converter with I = 2.5µA
I
SD
Q
42V, 6A, 96% Efficiency, 2.2MHz Synchronous MicroPower Step-Down
V
= 3.4V, V
< 1µA, 3mm × 6mm QFN-28
= 42V, V
= 0.97V, I = 3.0µA,
Q
IN(MIN)
IN(MAX)
OUT(MIN)
DC/DC Converter with I = 2.5µA
I
SD
Q
42V, Quad Output (2.5A + 1.5A + 1.5A + 1.5A) 95% Efficiency, 2.2MHz
V
= 3V, V
< 1µA, 6mm × 6mm QFN-40
= 42V, V
= 0.8V, I = 2.5µA,
OUT(MIN) Q
IN(MIN)
IN(MAX)
Synchronous MicroPower Step-Down DC/DC Converter with I = 25µA
I
SD
Q
Rev 0
D17009-0-10/18(0)
www.analog.com
30
ANALOG DEVICES, INC. 2018
相关型号：
LT8643SEV#PBF
LT8643S - 42V, 6A Synchronous Step-Down Silent Switcher 2 with 2.5µA Quiescent Current; Package: LQFN; Pins: 24; Temperature Range: -40°C to 85°C
Linear
LT8650S
5V 3A Output, 42V Input USB Charger with Cable Drop Compensation and Dataline Protection
ADI
LT8652S
5V 3A Output, 42V Input USB Charger with Cable Drop Compensation and Dataline Protection
ADI
LT8653S
5V 3A Output, 42V Input USB Charger with Cable Drop Compensation and Dataline Protection
ADI
LT8672HMS#PBF
LT8672 - Active Rectifier Controller with Reverse Protection; Package: MSOP; Pins: 10; Temperature Range: -40°C to 125°C
Linear
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