LTC2862A-1_技术文档

LTC2862A

±±60V FaulVꢀPolecledV30VloV5.50V

RS485/RS422VTPFnsceivePV

wilhVLeveuV4VIECVESD

FeaTures

DescripTion

TheLTC^®2862Aisalowpower,20Mbpsor250kbpsRS485/

RS422 transceiver operating on 3V to 5.5V supplies with

60V overvoltage fault protection on the interface pins

during all modes of operation, including power-down.

Improvements were made to the LTC2862 for greater ro-

bustness and signal integrity: 40kV HBM and Level 4 IEC

ESD protection on the interface pins; increased resistance

toelectricaloverstress;increasedreceivernoiseimmunity;

additional receiver noise filtering on the LTC2862A-2; and

an improved failsafe function optimized for high speed in

the LTC2862A-1 and noise rejection in the LTC2862A-2.

Low EMI slew rate limited data transmission is available

inthe250kbpsLTC2862A-2option,whiletheLTC2862A-1

operates to 20Mbps.

n

Protected from Overvoltage Line Faults to ±±6V

3V to 5.5V Supply Voltage

n

26Mbps or Low EMI 256kbps Data Rate

±46kV ꢀHM ESD Interface Pinsꢁ ±ꢂ5kV Other Pins

Enhanced Receiver and Failsafe Noise Immunity

IEC Level 4 ESD and EFT on Interface Pins

Extended Common Mode Range: ±25V

Guaranteed Failsafe Receiver Operation

High Input Impedance Supports 224 Nodes

MP-Grade Option Available (–55°C to 125°C)

Fully Balanced Differential Receiver Thresholds for

Low Duty Cycle Distortion

n

Current Limited Drivers and Thermal Shutdown

Compliant with TIA/EIA-485-A

Pin Compatible with LTC2862 and LT^®1785

Available in DFN and Leaded Packages

Extended 25V input common mode range and full fail-

safe operation improve data communication reliability in

electrically noisy environments and in the presence of

large ground loop voltages.

applicaTions

n

Supervisory Control and Data Acquisition (SCADA)

n

proDucT selecTion GuiDe

Industrial Control and Instrumentation Networks

n

Automotive and Transportation Electronics

MAX DATA

n

PART NUMHER

LTC2862A-1

LTC2862A-2

DUPLEX

HALF

ENAHLES

YES

RATE (bps)

Building Automation, Security Systems and HVAC

n

20M

Medical Equipment

Lighting and Sound System Control

n

HALF

YES

250k

L, LT, LTC, LTM, Linear Technology the Linear logo and µModule are registered trademarks of

Analog Devices, Inc.. All other trademarks are the property of their respective owners.

Typical applicaTion

LTC28±2A-ꢂ Receiving ꢂ6Mbps ±266mV Differential

Signal with ꢂMꢀz ±25V Common Mode Sweep

RS485 Link With Large Ground Loop Voltage

LTC2862A

A,B

50V/DIV

V

CC2

CC1

RO1

RE1

DE1

R

RO2

RE2

DE2

A–B

0.5V/DIV

DI1

D

DI2

RO

V GROUND LOOP

≤25V PEAK

RO

5V/DIV

2862A TA01a

GND1

GND2

2862A TA01b

100ns/DIV

2862af

1

For more information www.linear.com/LTC2862A

LTC2862A

absoluTe MaxiMuM raTinGs

(Note ꢂ)

Supply Voltages

Operating Ambient Temperature Range (Note 4)

V ............................................................. –0.3 to 6V

LTC2862AC.............................................. 0°C to 70°C

LTC2862AI...........................................–40°C to 85°C

LTC2862AH ....................................... –40°C to 125°C

LTC2862AMP..................................... –55°C to 125°C

Storage Temperature Range .................. –65°C to 150°C

CC

Logic Input Voltages (RE, DE, DI) .................. –0.3 to 6V

Interface I/O: A, B .....................................–60V to +60V

Receiver Output (RO)......................–0.3V to (V +0.3V)

CC

pin conFiGuraTion

LTC2862A-1, LTC2862A-2

TOP VIEW

RO

RE

DE

DI

1

2

3

4

8

7

6

5

V

B

A

CC

RO

RE

DE

DI

1

2

3

4

8

7

6

5

V

B

A

CC

9

GND

S8 PACKAGE

8-LEAD (150mil) PLASTIC SO

= 150°C, θ = 120°C/W, θ = 39°C/W

DD PACKAGE

T

JMAX

JA

JC

8-LEAD (3mm × 3mm) PLASTIC DFN

EXPOSED PAD (PIN 9) CONNECT TO PCB GND

T

= 150°C, θ = 43°C/W, θ = 5.5°C/W

JMAX

JA JC

orDer inForMaTion

http://www.linear.com/product/LTC28±2A#orderinfo

LEAD FREE FINISꢀ

TAPE AND REEL

PART MARKING*

2862A1

2862A2

LGYK

PACKAGE DESCRIPTION

TEMPERATURE RANGE

0°C to 70°C

LTC2862ACS8-1#PBF

LTC2862AIS8-1#PBF

LTC2862AHS8-1#PBF

LTC2862AMPS8-1#PBF

LTC2862ACS8-2#PBF

LTC2862AIS8-2#PBF

LTC2862AHS8-2#PBF

LTC2862AMPS8-2#PBF

LTC2862ACDD-1#PBF

LTC2862AIDD-1#PBF

LTC2862AHDD-1#PBF

LTC2862ACDD-2#PBF

LTC2862AIDD-2#PBF

LTC2862AHDD-2#PBF

LTC2862ACS8-1#TRPBF

LTC2862AIS8-1#TRPBF

LTC2862AHS8-1#TRPBF

LTC2862AMPS8-1#TRPBF

LTC2862ACS8-2#TRPBF

LTC2862AIS8-2#TRPBF

LTC2862AHS8-2#TRPBF

LTC2862AMPS8-2#TRPBF

LTC2862ACDD-1#TRPBF

LTC2862AIDD-1#TRPBF

LTC2862AHDD-1#TRPBF

LTC2862ACDD-2#TRPBF

LTC2862AIDD-2#TRPBF

LTC2862AHDD-2#TRPBF

8-Lead (150mil) Plastic SO

–40°C to 85°C

–40°C to 125°C

–55°C to 125°C

0°C to 70°C

8-Lead (150mil) Plastic SO

8-Lead (150mm) Plastic SO

8-Lead (150mil) Plastic SO

–40°C to 85°C

–40°C to 125°C

–55°C to 125°C

0°C to 70°C

8-Lead (150mil) Plastic SO

8-Lead (150mm) Plastic SO

8-Lead (3mm × 3mm) Plastic DFN

LGYK

–40°C to 85°C

–40°C to 125°C

0°C to 70°C

LGYK

LGYM

–40°C to 85°C

–40°C to 125°C

LGYM

Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.

Consult LTC Marketing for information on non-standard lead based finish parts.

For more information on lead free part marking, go to: http://www.linear.com/leadfree/

For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/

2862af

2

For more information www.linear.com/LTC2862A

LTC2862A

elecTrical characTerisTics ^Thel denotes the specifications which apply over the full operating

temperature rangeꢁ otherwise specifications are at T_A= 25°C. V_CC= 3.3V unless otherwise noted. (Note 2)

SYMHOL PARAMETER

Supplies

CONDITIONS

MIN

TYP

MAX

UNITS

l

V

Primary Power Supply

3

5.5

10

V

CC

I

Supply Current in Shutdown Mode

(C-, I-Grade)

DE = 0V, RE = V

0

µA

CCS

CC

l

Supply Current in Shutdown Mode

(H-, MP-Grade)

0

40

1.6

1.4

8

µA

mA

CC

I

Supply Current with Both Driver and

Receiver Enabled (LTC2862A-1)

No Load, DE = V , RE = 0V

1.1

1.0

3.5

1.3

CCTR

CCR

CC

Supply Current with Receiver Enabled

(LTC2862A-1)

No Load, DE = RE = 0V

Supply Current with Both Driver and

Receiver Enabled (LTC2862A-2)

No Load, DE = V , RE = 0V

CCTRS

CCRS

CC

Supply Current with Receiver Enabled

(LTC2862A-2)

No Load, DE = RE = 0V

1.8

Driver

l

|V

|

Differential Driver Output Voltage

R = ∞ (Figure 1)

1.5

2

3

2

V

OD

CC

R = 27Ω (Figure 1)

R = 50Ω (Figure 1)

5

2.3

0

V

CC

Δ|V

|

Change in Magnitude of Driver Differential R = 27Ω or 50Ω (Figure 1)

Output Voltage

0.2

OD

l

V

Driver Common-Mode Output Voltage

R = 27Ω or 50Ω (Figure 1)

2

0

3

V

OC

Δ|V

|

Change in Magnitude of Driver

Common-Mode Output Voltage

0.2

OC

l

I

Maximum Driver Short-Circuit Current

Receiver Input Current (A, B)

Receiver Input Resistance

–60V ≤ (A or B) ≤ 60V (Figure 2)

150

250

143

mA

OSD

Receiver

l

I

V

= 0V or 3.3V, V = 12V (Figure 3)

µA

IN

CC

IN

= 0V or 3.3V, V = –7V (Figure 3)

–100

–25

µA

kΩ

V

CC

IN

R

0 ≤ V ≤ 5.5V, V = –25V or 25V (Figure 3)

CC IN

112

IN

l

V

Receiver Common Mode Input Voltage

(A + B)/2

25

CM

+

Positive Differential Input Signal Threshold –25V ≤ V ≤ 25V

Voltage (A – B)

125

–125

250

200

mV

TH

CM

–

Negative Differential Input Signal Threshold –25V ≤ V ≤ 25V

Voltage (A – B)

–200

CM

ΔV

Differential Input Signal Hysteresis

V

= 0V

CM

TH

+

–

(V

TH

– V

)

TH

l

V

Differential Input Failsafe Threshold Voltage –25V ≤ V ≤ 25V

–75

50

–10

mV

TFS

CM

ΔV

Differential Input Failsafe Hysteresis

V

CM

= 0V

TFS

–

(V – V

TFS

)

TH

l

V

Receiver Output High Voltage

Receiver Output Low Voltage

I(RO) = –3mA (Sourcing)

I(RO) = 3mA (Sinking)

V

CC

–0.4V

V –0.2V

CC

V

OH

0.2

0.4

5

OL

I

Receiver Three-State (High Impedance)

Output Current on RO

RE = High, V = 5V, RO = 0V or V

CC

–32

µA

OZR

CC

l

I

Receiver Short-Circuit Current

Input Capacitance (A and B)

RE = Low, RO = 0V or V

20

mA

pF

OSR

CC

C

(Note 5)

50

IN

2862af

3

For more information www.linear.com/LTC2862A

LTC2862A

elecTrical characTerisTics ^Thel denotes the specifications which apply over the full operating

temperature rangeꢁ otherwise specifications are at T_A= 25°C. V_CC= 3.3V unless otherwise noted. (Note 2)

SYMHOL PARAMETER

Logic

CONDITIONS

MIN

TYP

MAX

UNITS

l

V

Input Threshold Voltage (DE, DI, RE)

Logic Input Current (DE, DI, RE)

3.0 ≤ V ≤ 5.5V

0.33 • V

0.67 • V

CC

V

TH

CC

I

0 ≤ V ≤ V

CC

0

5

µA

INL

IN

ESD (Note 5)

ESD Protection Level of Interface Pins

Human Body Model, A or B to GND,

V , B or A, 1μF Between V and GND

CC

40kV

8kV

kV

(A,B), Powered or Unpowered

CC

IEC 61000-4-2 ESD Level 4, Contact, 1μF

Between V and GND

CC

ESD Protection Level of All Other Pins

Human Body Model

15kV

(RO, RE, DE, DI, V , GND)

CC

swiTchinG characTerisTics ^Thel denotes the specifications which apply over the full operating

temperature rangeꢁ otherwise specifications are at T_A= 25°C. V_CC= 3.3V unless otherwise noted. (Note 2)

SYMHOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

Driver – ꢀigh Speed (LTC28±2A-ꢂ)

l

f

t

Maximum Data Rate

(Note 3)

20

Mbps

ns

MAX

, t

Driver Input to Output

R

DIFF

= 54Ω, C = 100pF (Figure 4)

25

2

50

5

PLHD PHLD

L

Δt

Driver Input to Output Difference

R

= 54Ω, C = 100pF (Figure 4)

ns

PD

L

|t

– t

PHLD

|

PLHD

l

t

Driver Output A to Output B

Driver Rise or Fall Time

Driver Enable Time

R

= 54Ω, C = 100pF (Figure 4)

10

15

50

ns

SKEWD

DIFF

L

, t

RD FD

= 54Ω, C = 100pF (Figure 4)

4

DIFF

L

, t

R = 27Ω, C = 100pF,

25

ZLD ZHD

L

RE = 0V (Figure 5)

l

t

, t

Driver Disable Time

R = 27Ω, C = 100pF,

45

5

75

10

90

ns

µs

ns

LZD HZD

L

RE = 0V (Figure 5)

, t

Driver Enable from Shutdown

Time to Shutdown

R = 27Ω, C = 100pF,

ZHSD ZLSD

L

RE = High (Figure 5)

R = 27Ω, C = 100pF,

50

SHDND

L

RE = High (Figure 5)

Driver – Slew Rate Limited (LTC28±2A-2)

l

f

Maximum Data Rate

(Note 3)

250

500

kbps

ns

MAXS

t

, t

Driver Input to Output

R

= 54Ω, C = 100pF (Figure 4)

850

10

1500

150

PLHDS PHLDS

DIFF

L

Δt

Driver Input to Output Difference

R

= 54Ω, C = 100pF (Figure 4)

ns

PDS

L

|t

– t

|

PHLDS

PLHDS

l

t

Driver Output A to Output B

Driver Rise or Fall Time

Driver Enable Time

R

= 54Ω, C = 100pF (Figure 4)

500

1200

800

ns

SKEWDS

DIFF

L

, t

= 54Ω, C =100pF (Figure 4)

800

400

RDS FDS

DIFF

L

, t

R = 27Ω, C = 100pF,

L L

RE = 0V (Figure 5)

ZLDS ZHDS

l

t

, t

Driver Disable Time

R = 27Ω, C = 100pF,

45

6

75

11

ns

µs

LZDS HZDS

L

RE = 0V (Figure 5)

t

, t

Driver Enable from Shutdown

R = 27Ω, C = 100pF,

L L

RE = High (Figure 5)

ZHSDS ZLSDS

2862af

4

For more information www.linear.com/LTC2862A

LTC2862A

swiTchinG characTerisTics ^Thel denotes the specifications which apply over the full operating

temperature rangeꢁ otherwise specifications are at T_A= 25°C. V_CC= 3.3V unless otherwise noted. (Note 2)

SYMHOL

PARAMETER

CONDITIONS

R = 27Ω, C = 100pF,

MIN

TYP

MAX

UNITS

l

t

Time to Shutdown

50

90

ns

SHDNDS

L

RE = High (Figure 5)

Receiver

l

t

, t

Receiver Input to Output (LTC2862A-1)

Receiver Input to Output (LTC2862A-2)

Differential Receiver Skew

C

R

= 15pF, V = 0V, |V | = 1.5V,

50

400

1

65

700

5

ns

µs

ns

µs

PLHR PHLR

L

CM

AB

t and t < 4ns (Figure 6)

F

, t

C = 15pF, V = 0V, |V | = 1.5V,

L CM AB

PLHRS PHLRS

t and t < 4ns (Figure 6)

R

F

C = 15pF (Figure 6)

L

SKEWR

SKEWRS

PFSN

|t

– t

| (LTC2862A-1)

PLHR

PHLR

Differential Receiver Skew

|t – t | (LTC2862A-2)

C = 15pF (Figure 6)

L

5

30

PLHRS

PHLRS

Failsafe Enter Delay (LTC2862A-1)

Failsafe Enter Delay (LTC2862A-2)

Failsafe Exit Delay (LTC2862A-1)

Failsafe Exit Delay (LTC2862A-2)

C = 15pF, V = 0V, |V | = 1.5V,

80

1.5

45

0.7

110

2.3

60

L

CM

AB

t and t < 4ns (Figure 8)

R

F

C = 15pF, V = 0V, |V | = 1.5V,

PFSNS

PFSX

L

CM

AB

t and t < 4ns (Figure 8)

R

F

C = 15pF, V = 0V, |V | = 1.5V,

L

CM

AB

t and t < 4ns (Figure 8)

R

F

C = 15pF, V = 0V, |V | = 1.5V,

1.3

PFSXS

L

CM

AB

t and t < 4ns (Figure 8)

R

F

l

t

, t

Receiver Output Rise or Fall Time

Receiver Enable Time

C = 15pF (Figure 6)

3

6

ns

RR FR

L

, t

R

L

= 500Ω, C = 15pF, DE = High

18

30

ZLR ZHR

L

(Figure 7)

l

t

, t

Receiver Disable Time

Receiver Enable from Shutdown

Time to Shutdown

R

= 500Ω, C = 15pF, DE = High

29

5

40

10

40

ns

µs

ns

LZR HZR

L

(Figure 7)

, t

R

L

(Figure 7)

= 500Ω, C = 15pF, DE = High

ZHSR ZLSR

L

R

L

= 500Ω, C = 15pF, DE = High

24

SHDNR

L

(Figure 7)

Note ꢂ: Stresses beyond those listed under Absolute Maximum Ratings

may cause permanent damage to the device. Exposure to any Absolute

Maximum Rating condition for extended periods may affect device

reliability and lifetime.

Note 2: All currents into device pins are positive; all currents out of device

pins are negative. All voltages are referenced to device ground unless

otherwise specified.

Note 3: Maximum data rate is guaranteed by other measured parameters

and is not tested directly.

Note 4: This IC includes overtemperature protection that is intended

to protect the device during momentary overload conditions. Junction

temperature will exceed 150ºC when overtemperature protection is active.

Continuous operation above the specified maximum operating temperature

may result in device degradation or failure.

Note 5: Not tested in production.

2862af

5

For more information www.linear.com/LTC2862A

LTC2862A

T_A= 25°Cꢁ V_CC= 3.3Vꢁ unless otherwise noted.

Typical perForMance characTerisTics

Supply Current vs V_CC

Supply Current vs Temperature

Supply Current vs Data Rate

10000

1000

100

10

4.5

4.0

3.5

3.0

2.5

2.0

1.5

1.0

0.5

0

20

250

200

150

100

50

I

R

C

= 54Ω

CCTRS

DIFF

L

= 100pF

I

CCTRS

16

12

8

I

CCTR

SLEW LIMITED

NON SLEW LIMITED

I

4

CCTR

1

I

CCS

0

0.1

3.0

4.0

V

4.5

(V)

5.0

5.5

30

35

45

50

55

60

3.5

40

–50

0

50

100

150

SUPPLY CURRENT (mA)

CC

TEMPERATURE (°C)

2862A G01

2862A G03

2862A G02

Driver Output Short-Circuit

Current vs Voltage

Driver Propagation Delay vs

Temperature

Driver Skew vs Temperature

1.5

1.0

120

35

30

25

20

1000

900

200

150

100

50

R

L

= 54Ω

R

L

= 54Ω

DIFF

= 100pF

C

= 100pF

100

80

OUTPUT LOW

NON SLEW LIMITED

SLEW LIMITED

0.5

0.0

60

0

–50

40

800

–0.5

–1.0

SLEW LIMITED

–100

–150

–200

OUTPUT HIGH

20

NON SLEW LIMITED

–1.5

0

700

–50

50

100

150

–50

50

100

150

0

–60

–20

0

20

40

60

–40

TEMPERATURE (°C)

OUTPUT VOLTAGE (V)

2862A G04

2862A G05

2862A G06

Receiver Output Voltage vs

Output Current (Source and Sink)

Driver Output Low/ꢀigh Voltage

vs Output Current

Driver Differential Output Voltage

vs Temperature

3.5

3.0

2.5

2.3

2.1

1.9

1.7

6.0

5.0

4.0

3.0

2.0

1.0

0.0

V

CC

= 5.5V

R

DIFF

= 100Ω

V

OH

2.5

2.0

1.5

1.0

0.5

0.0

V

CC

= 3.3V

R

DIFF

= 54Ω

V

OL

V

CC

= 3V TO 5.5V

2.0

1.5

0

20

30

40

50

–50

50

100

150

10

0

0.0

4.0

6.0

8.0

OUTPUT CURRENT (mA)

TEMPERATURE (°C)

OUTPUT CURRENT (ABSOLUTE VALUE) (mA)

2862A G07

2862A G08

2862A G09

2862af

6

For more information www.linear.com/LTC2862A

LTC2862A

T_A= 25°C, V_CC= 3.3V, unless otherwise noted.

Typical perForMance characTerisTics

Transmitter Propagation Delay

vs Temperature (LTC2862A-1)

Transmitter Propagation Delay

vs Temperature (LTC2862A-2)

Failsafe Enter and Exit Delay

vs Temperature (LTC2862A-1)

100

740

720

700

680

660

640

620

600

34

32

30

28

26

24

22

90

t

PFSN

t

PHLDS

80

70

60

50

40

t

PHLD

t

PLHDS

t

PLHD

t

PFSX

–50 –25

0

25

50

75 100 125

–50 –25

0

25

50

75 100 125

–50 –25

0

25

50

75 100 125

TEMPERATURE (°C)

2862A G11

2862A G12

2862A G10

Failsafe Enter and Exit Delay

vs Temperature (LTC2862A-2)

Receiver Propagation Delay

vs Temperature (LTC2862A-1)

Receiver Propagation Delay

vs Temperature (LTC2862A-2)

1.6

1.4

1.2

1.0

0.8

0.6

475

450

425

400

375

350

325

300

44

43

42

41

40

t

PFSNS

t

PLHR

t

PHLRS

t

PLHRS

t

PHLR

t

PFSXS

–50 –25

0

25

50

75 100 125

–50 –25

0

25

50

75 100 125

–50 –25

0

25

50

75 100 125

TEMPERATURE (°C)

2862A G13

2862A G15

2862A G14

2862af

7

For more information www.linear.com/LTC2862A

LTC2862A

pin FuncTions

PIN NAME

PIN NUMBER

DESCRIPTION

RO

1

Receiver Output. If the receiver output is enabled (RE low) and A–B > 200mV, then RO will be high.

If A–B < –200mV, then RO will be low. If the receiver inputs are open, shorted, or terminated without a

signal, RO will be high. Integrated 250kΩ pull-up to V

.

CC

RE

DE

DI

2

3

4

Receiver Enable. A low input enables the receiver. A high input forces the receiver output into a high

impedance state. If RE is high with DE low, the part will enter a low power shutdown state.

Driver Enable. A high input on DE enables the driver. A low input will force the driver outputs into a high

impedance state. If DE is low with RE high, the part will enter a low power shutdown state.

Driver Input. If the driver outputs are enabled (DE high), then a low on DI forces the driver noninverting

output A low and inverting output B high. A high on DI, with the driver outputs enabled, forces the

driver noninverting output A high and inverting output B low.

GND

5

9

7

Ground.

Exposed Pad

B

Connect the exposed pad on the DFN packages to GND.

Inverting Receiver Input and Inverting Driver Output.

Impedance is ~112kΩ in receive mode or unpowered.

A

6

8

Noninverting Receiver Input and Noninverting Driver Output.

Impedance is ~112kΩ in receive mode or unpowered.

V

Power Supply. 3V < V < 5.5V. Bypass with 1µF ceramic capacitor to GND for best ESD performance.

CC

FuncTion Table

LTC2862A

LOGIC INPUTS

MODE

A, B

RO

DE

0

RE

0

Receive

Shutdown

Transceive

Transmit

R

Active

High-Z*

Active

IN

0

1

IN

1

0

Active

1

High-Z*

* 250kΩ pull-up to V

.

CC

2862af

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LTC2862A

block DiaGraM

LTC2862A

V

CC

V

CC

250k

RO

RECEIVER

A*

B*

RE

MODE CONTROL

LOGIC

DE

DI

DRIVER

GND

2862A BD

* 40kV ESD

ALL OTHER PINS 15kV

TesT circuiTs

A

B

A

R

I

OSD

+

GND

OR

CC

GND

V

DI

DRIVER

DI

DRIVER

OD

OR

–

V

CC

+

V

OC

–

B

2862A FO2

2862A FO1

Figure 1. Driver DC Characteristics

Figure 2. Driver Output Short-Circuit Current

I

IN

A OR B

B OR A

RECEIVER

+

V

IN

–

2862A FO3

V

I

IN

R

IN

=

Figure 3. Receiver Input Current and Input Resistance

2862af

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LTC2862A

TesT circuiTs

V

CC

DI

t

A

B

PLHD

PHLD

0V

t

C

SKEWD

L

DI

1/2 V

R

O

DIFF

DRIVER

V

A, B

O

L

90%

2862A FO4

(A–B)

0

10%

t

RD

t

FD

2862A F04b

Figure 4. Driver Timing Measurement

V

R

CC

L

A

B

t

,

LZD

1/2 V

DE

1/2 V

CC

SHDN

t

,

ZLD

0V

C

L

V

t

ZLSD

CC

1/2 V

CC

DI

DRIVER

DE

OR

375mV

GND

A OR B

L

V

OL

V

OH

B OR A

1/2 V

CC

2862A F05b

t

,

t

,

ZHD

HZD

SHDN

2862A FO5

ZHSD

Figure 5. Driver Enable and Disable Timing Measurements

2862af

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LTC2862A

TesT circuiTs

t

= |t

– t

|

SKEWR

PLHR PHLR

V

AB

V

/2

AB

A

B

A–B

–V

0

RO

AB

V

RECEIVER

CM

V

t

PLHR

PHLR

V

CC

C

90%

10%

90%

10%

L

1/2 V

RO

AB

CC

0

2862A F06b

t

FR

RR

2862A FO6a

Figure 6. Receiver Propagation Delay Measurements

V

CC

t

,

ZLR

ZLSR

RE

1/2 V

CC

A

B

0V OR V

CC

0V

R

L

RO

t

LZR

1/2 V

RECEIVER

CC

1/2 V

CC

1/4 V

3/4 V

RO

V

C

V

OR 0V

CC

L

CC

1/4 V

3/4 V

CC

OL

OH

RE

DI = 0V OR V

CC

V

RO

1/2 V

CC

2862A F07b

t

,

t

,

HZR

2862A FO7a

ZHR

t

ZHSR

SHDNR

Figure 7. Receiver Enable/Disable Time Measurements

0

V

/2

AB

A

A–B

–V

–200mV

, t

RO

AB

CC

V

t

, t

RECEIVER

CM

PFSN PFSNS

PFSX PFSXS

V

B

C

L

1/2 V

CC

RO

CC

V

AB

0

2862A F08b

2862A FO8a

Figure 8. Failsafe Delay Measurements

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±6ꢀ0 Fault Protection

±250 Eꢁtended Common Mode Range

The LTC2862A is an improved overvoltage fault-tolerant

RS485/RS422 transceiver that operates from 3V to 5.5V

power supplies. Industrial installations may encounter

common mode voltages between nodes far greater than

the –7V to 12V range specified by the RS485 standards.

StandardRS485transceiverscanbedamagedbyvoltages

above their typical absolute maximum ratings of –8V to

12.5V.ThelimitedovervoltagetoleranceofstandardRS485

transceivers makes implementation of effective external

protectionnetworksdifficultwithoutinterferingwithproper

data network performance within the –7V to 12V region of

RS485operation. ReplacingstandardRS485transceivers

with the rugged LTC2862A devices may eliminate field

failures due to overvoltage faults without using costly

external protection devices.

To further increase the reliability of operation and extend

functionality in environments with high common mode

voltages due to electrical noise or local ground potential

differences due to ground loops, the LTC2862A features

an extended common mode operating range of –25V

to 25V. This extended common mode range allows the

LTC2862A to transmit and receive under conditions that

would cause data errors and possible device damage in

competing products.

±4ꢀꢂ0 ESD Protection

The LTC2862A features exceptionally robust ESD

protection. The transceiver interface pins (A,B) feature

protection to 40kV HBM with respect to GND, V (with a

CC

1µF capacitor to GND), A or B without latchup or damage,

during all modes of operation or while unpowered. All

the other pins are protected to 15kV HBM to make this

a component capable of reliable operation under severe

environmental conditions.

The 60V fault protection of the LTC2862A is achieved by

usingahigh-voltageBiCMOSintegratedcircuittechnology.

The naturally high breakdown voltage of this technology

provides protection in powered-off and high-impedance

conditions. The driver outputs use a progressive foldback

current limit design to protect against overvoltage faults

while still allowing high current output drive.

Level 4 IEC ESD and EFT Protection

The improved ESD protection of the LTC2862A provides a

high level of protection in the IEC ESD and EFT (Electrical

Fast Transient) tests. The IEC ESD stress exceeds that of

the HBM test in peak current, amplitude, and rise time,

while the EFT test provides a prolonged repetitive stress.

Combined with the HBM test, the IEC tests help ensure

that the LTC2862A is robust under a wide range of real

world hazards. The LTC2862A passes the following tests

on the A, B pins:

The LTC2862A is protected from 60V faults even with

the loss of GND or V (GND open faults not tested in

CC

production). Additional precautions must be taken in the

case of V present and GND open. The LTC2862A chip

CC

willprotectitselffromdamage,butthechipgroundcurrent

may flow out through the ESD diodes on the logic I/O pins

and into associated circuitry. The system designer should

examine the susceptibility of the associated circuitry to

damage if the condition of a GND open fault with V

present is anticipated.

•

IEC 61000-4-2 Edition 2.0 2008-12 ESD Level 4: 8kV

contact (A or B to GND, direct discharge to bus pins

with transceiver and protection circuit mounted on a

test card with alow impedance grounddischarge path

from board GND to ESD gun return lead, per Figure 4

of the standard)

CC

The high voltage rating of the LTC2862A makes it simple

to extend the overvoltage protection to higher levels using

external protection components. Compared to lower

voltage RS485 transceivers, external protection devices

with higher breakdown voltages can be used, so as not to

interfere with data transmission in the presence of large

common mode voltages. The Typical Applications section

shows a protection network against faults up to 360V

peak, while still maintaining the extended 25V common

mode range on the signal lines.

•

IEC 61000-4-4 Second Edition 2004-07 EFT Level 4:

5kV (line to GND, 5kHz repetition rate, 15ms burst

duration, 60 second test duration, discharge coupled

to bus pins through 100pF capacitor per paragraph

7.3.2 of the standard)

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Enhanced EOS Protection

All devices also feature thermal shutdown protection that

disablesthedriverandreceiverincaseofexcessivepower

dissipation (see Note 4). (Thermal shutdown is not tested

during production.)

The improved ESD protection of the LTC2862A also pro-

vides superior resistance to electrical overstress (EOS)

damageinthepresenceoflargefaultvoltagesappliedfrom

low impedance faults. The LTC2862A employs thyristor

typeESDprotectionontheA, Bpins. Whilethyristorshave

the low on-state impedance and high robustness needed

to achieve the very high levels of ESD protection of the

LTC2862A, they have the disadvantage of snapping back

to a low voltage conduction state after they have been

triggered by an initial voltage that exceeds ~ 80V. In the

presence of a high voltage, high current fault source, the

large resulting currents will blow the bond wires inside

the LTC2862A package, resulting in a failed chip.

Full Failsafe Operation

Whentheabsolutevalueofthedifferentialvoltagebetween

the A and B pins is greater than 200mV with the receiver

enabled, the state of RO will reflect the polarity of (A–B).

These parts have a failsafe feature that guarantees the

receiveroutputwillbeinalogic1state(theidlestate)when

the inputs are shorted, left open, or terminated but not

driven. The delay allows normal data signals to transition

through the threshold region without being interpreted as

a failsafe condition. This failsafe feature is guaranteed to

work for inputs spanning the entire common mode range

of –25V to 25V.

TheLTC2862Amitigatestheprobabilityofthistypeoffailure

by establishing a very high trigger current in addition to a

higher trigger voltage. In order to trigger the ESD cell, the

fault must not only exceed the ~ 80V trigger voltage, but

must be able to source ~ 500mA at that voltage to initiate

the snapback of the ESD cell. This makes the LTC2862A

muchlesssusceptibletosnapbackinducedfailurescreated

by high voltage noise spikes or voltage transients caused

by inductive overshoot when the A,B pins are shorted to a

fault voltage source. (The snapback characteristics of the

ESD protection are not tested during production.)

Most competing devices achieve the failsafe function by a

simple negative offset of the input threshold voltage. This

causes the receiver to interpret a zero differential voltage

as a logic 1 state. The disadvantage of this approach is

the input offset can introduce duty cycle asymmetry at the

receiver output that becomes increasingly worse with low

input signal levels and slow input edge rates.

Other competing devices use internal biasing resistors to

create a positive bias at the receiver inputs in the absence

of an external signal. This type of failsafe biasing is

ineffectiveifthenetworklinesareshorted,orifthenetwork

is terminated but not driven by an active transmitter.

Driver

ThedriverprovidesfullRS485/RS422compatibility.When

enabled, if DI is high, A–B is positive. When the driver is

disabled, both transmitter outputs are high impedance,

and the impedance is dominated by the receiver input

resistance, R .

IN

A, B

200mV/DIV

Driver Overvoltage and Overcurrent Protection

A–B

The driver outputs are protected from short circuits to any

voltage within the Absolute Maximum range of –60V to

60V. Themaximumcurrentinafaultconditionis 250mA.

Thedriverincludesaprogressivefoldbackcurrentlimiting

circuit that continuously reduces the driver current limit

with increasing output fault voltage. The fault current is

less than 15mA for fault voltages over 40V.

200mV/DIV

RO

1.6V/DIV

286A F08

40ns/DIV

Figure 9. Duty Cycle of Balanced Receiver with ±2ꢀꢀm0

1ꢀMbps Input Signal

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The LTC2862A uses fully symmetric positive and negative

a hysteresis of 250mV (typical) at the receiver inputs for

any valid data signal. (An invalid data condition such as

a DC sweep of the receiver inputs will produce a different

observed hysteresis due to the activation of the failsafe

circuit.) Competing devices that employ a negative offset

of the input threshold voltage generally have a much

smaller hysteresis and subsequently have lower receiver

noise immunity.

–

+

receiver thresholds V

and V

(typically 125mV) to

TH

maintaingooddutycyclesymmetryatlowsignallevels.The

failsafe operation is performed with a window comparator

todeterminewhenthedifferentialinputvoltagefallsabove

the V

failsafe threshold (typically –75mV) but below

threshold. If this condition persists for more

TFS

+

the V

TH

than about 40ns for the LTC2862A-1 or 1.2µs for the

LTC2862A-2 the failsafe condition is asserted and the RO

pin is forced to the logic 1 state. This circuit provides full

failsafe operation and a large dynamic signal hysteresis of

The LTC2862A-2 provides additional noise immunity

by adding low-pass filtering to the differential signal in

its receiver. Commensurate with its maximum data rate

of 250kbps, the LTC2862A-2 receiver attenuates high

frequency signals above approximately 660kHz. This low-

pass filter removes high frequency noise transients that

might otherwise be interpreted as data. (High frequency

noisefilteringisnottestedinproduction,buttheunderlying

–

+

~250mV between V

and V

with no negative impact

TH

to receiver duty cycle symmetry, as shown in Figure 9.

The input signal in Figure 9 was obtained by driving a

10Mbps RS485 signal through 1000 feet of cable, thereby

attenuating it to a 200mV signal with slow rise and fall

times.GooddutycyclesymmetryisobservedatROdespite

the degraded input signal.

filtering is reflected in the t

, t

, and t

PLHR PHLR PLHRS PHLRS

measurements).

The failsafe circuit has been enhanced with noise filtering

to exit the failsafe state. In the absence of noise filtering, a

RS485 Networꢂ Biasing

noisetransientthatmomentarilyforcestheA-Bdifferential

RS485networksareusuallybiasedwitharesistivedivider

to generate a differential voltage of ≥200mV on the data

lines, which establishes a logic 1 state (the idle state)

when all the transmitters on the network are disabled. The

values of the biasing resistors are not fixed, but depend

on the number and type of transceivers on the line and

the number and value of terminating resistors. Therefore,

the values of the biasing resistors must be customized

to each specific network installation, and may change if

nodes are added to or removed from the network.

–

voltage below the V

receiver threshold will cause the

TH

RO output to go low, which may be interpreted as a false

start character by the microcontroller. The LTC2862A

receiver reduces these false signals by low pass filtering

the signal to exit the failsafe state. The noise filtering in the

failsafe circuit of the LTC2862A-2 is much greater than in

the LTC2862A-1, commensurate with its lower data rate.

For example, the LTC2862A-1 exits the failsafe state when

a –1V differential pulse of about 3ns duration is applied,

whiletheLTC2862A-2requiresa–1Vpulseofabout400ns

duration to exit the failsafe state. (The minimum pulse

widths to enter or exit the failsafe state are not tested in

production, but the underlying filtering is reflected in the

TheinternalfailsafefeatureoftheLTC2862Aeliminatesthe

need for external network biasing resistors provided they

are used in a network of transceivers with similar internal

failsafe features. The LTC2862A transceivers will operate

correctly on biased, unbiased, or under-biased networks.

t

, t , t

FSN FSX FSNS

, and t

measurements).

FSXS

Enhanced Receiver Noise Immunity

Hi-Z State

An additional benefit of the fully symmetric receiver

thresholds is enhanced receiver noise immunity. The

differential input signal must go above the positive

threshold to register as a logic 1 and go below the

negative threshold to register as a logic 0. This provides

The receiver output is internally driven high (to V ) or

CC

low (to GND) with no external pull-up needed. When the

receiver is disabled the RO pin becomes Hi-Z with a 250k

pull-up resistor to V .

CC

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High Receiver Input Resistance

will result in the RO line being clamped to approximately

0.6V above V . The impedance of the logic inputs and the

CC

The bus receiver input load from A or B to GND is less than

one-seventh unit load, permitting a total of 224 receivers

per system without exceeding the RS485 receiver loading

specification.Theinputloadofthereceiverisunaffectedby

enabling/disablingthereceiverorbypowering/unpowering

the part.

RO output are not tested with the LTC2862A unpowered.

Shutdown Mode Delay

The LTC2862A features a low power shutdown mode

that is entered when both the driver and the receiver

are simultaneously disabled (pin DE low and RE high).

A shutdown mode delay of approximately 250ns (not

testedinproduction)isimposedafterthisstateisreceived

before the chip enters shutdown. If either DE goes high

or RE goes low during this delay, the delay timer is reset

and the chip does not enter shutdown. This reduces the

chance of accidentally entering shutdown if DE and RE are

driven in parallel by a slowly changing signal or if DE and

RE are driven by two independent signals with a timing

skew between them.

Supply Current

The unloaded static supply currents in these devices

are low — typically 1.1mA for non slew limited devices

and 3.5mA for slew limited devices. In applications

with resistively terminated cables, the supply current is

dominatedbythedriverload.Forexample,whenusingtwo

120Ω terminators with a differential driver output voltage

of 2V, the DC load current is 33mA, which is sourced by

thepositivevoltagesupply.Powersupplycurrentincreases

with toggling data due to capacitive loading and this term

can increase significantly at high data rates. A plot of

the supply current vs data rate is shown in the Typical

Performance Characteristics of this data sheet.

This shutdown mode delay does not affect the outputs of

the transmitter and receiver, which start to switch to the

high impedance state upon the reception of their respec-

tive disable signals as defined by the parameters t

SHDND

and t

. The shutdown mode delay affects only the

SHDNR

During fault conditions with a positive voltage larger than

thesupplyvoltageappliedtothetransmitterpins,orduring

transmitter operation with a high positive common mode

voltage, positive current of up to 80mA may flow from the

time when all the internal circuits that draw DC power

from V are turned off.

CC

High Speed Considerations

transmitter pins back to V . If the system power supply

CC

Agroundplanelayoutwitha0.1µFbypasscapacitorplaced

or loading cannot sink this excess current, a 5.6V 1W

less than 7mm away from the V pin is recommended.

1N4734 Zener diode may be placed between V and GND

CC

The PC board traces connected to signals A/B should be

symmetrical and as short as possible to maintain good

differentialsignalintegrity. Tominimizecapacitiveeffects,

the differential signals should be separated by more than

the width of a trace and should not be routed on top of

each other if they are on different signal planes.

to prevent an overvoltage condition on V .

CC

The LTC2862A contains a supply undervoltage lockout

circuit that enables the transmitter and receiver outputs

when V exceeds ~2.7V and disables the transmitter and

CC

receiver outputs when V falls below ~2.5V.

CC

When the LTC2862A is unpowered, the logic inputs (DE,

DI, RE) are high impedance for voltages > 0V. Each input

has a diode clamp to GND that will conduct if a negative

voltage sufficient to forward bias the diode (~ –0.6V at

25°C)isappliedtothepad.TheROoutputcontainsaCMOS

Care should be taken to route outputs away from any

sensitive inputs to reduce feedback effects that might

cause noise, jitter, or even oscillations.

The logic inputs have a typical hysteresis of 100mV to

provide noise immunity. Fast edges on the outputs can

causeglitchesinthegroundandpowersupplieswhichare

exacerbated by capacitive loading. If a logic input is held

driver with parasitic diodes to GND and V . The diode to

CC

GND will conduct if forward biased by a negative voltage

below GND, while the diode to V will conduct if forward

CC

near its threshold (typically V /2), a noise glitch from a

biased by a positive voltage above V . If V is low, this

CC

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driver transition may exceed the hysteresis levels on the

logic and data input pins, causing an unintended state

change. This can be avoided by maintaining normal logic

levels on the pins and by slewing inputs faster than 1V/μs.

Good supply decoupling and proper driver termination

also reduce glitches caused by driver transitions.

The boundary at 20Mbps in Figure 10 represents the

guaranteed maximum operating rate of the LTC2862A-1.

Thedashedverticallineat10Mbps representsthespecified

maximumdatarateintheRS485standard. Thisboundary

is not a limit, but reflects the maximum data rate that the

specification was written for.

It should be emphasized that the plot in Figure 10 shows

a typical relation between maximum data rate and cable

length. ResultswiththeLTC2862Awillvary, dependingon

cable properties such as conductor gauge, characteristic

impedance, insulation material, and solid versus stranded

conductors.

RS485 Cable Length vs Data Rate

Many factors contribute to the maximum cable length

that can be used for RS485 or RS422 communication,

including driver transition times, receiver threshold, duty

cycle distortion, cable properties and data rate. A typical

curve of cable length versus maximum data rate is shown

in Figure 10. Various regions of this curve reflect different

performance limiting factors in data transmission.

Low EMI 25ꢀꢂbps Data Rate

The LTC2862A-2 features slew rate limited transmitters

for low electromagnetic interference (EMI) in sensitive

applications. The slew rate limit circuit maintains

consistentcontroloftransmitterslewratesacrossvoltage

and temperature to ensure low EMI under all operating

conditions. Figure 11 demonstrates the reduction in

high frequency content achieved by the 250kbps mode

compared to the 20Mbps mode.

Atfrequenciesbelow100kbps,themaximumcablelengthis

determined by DC resistance in the cable. In this example,

a cable longer than 4000ft will attenuate the signal at the

far end to less than what can be reliably detected by the

receiver.

For data rates above 100kbps the capacitive and inductive

propertiesofthecablebegintodominatethisrelationship.

The attenuation of the cable is frequency and length

dependent, resulting in increased rise and fall times at

the far end of the cable. At high data rates or long cable

lengths, these transition times become a significant part

of the signal bit time. Jitter and intersymbol interference

aggravate this so that the time window for capturing valid

data at the receiver becomes impossibly small.

The 250kbps mode has the added advantage of reducing

signal reflections in an unterminated network, and there-

by increasing the length of a network that can be used

without termination. Using the rule of thumb that the rise

time of the transmitter should be greater than four times

the one-way delay of the signal, networks of up to 140

feet can be driven without termination.

20

80

10k

0

60

NON SLEW LIMITED

–20

–40

40

1k

20

LOW EMI

MODE

–60

0

LTC2862A-2

100

–80

–20

–40

–60

RS485

STANDARD

SPEC

–100

–120

SLEW LIMITED

10

0

4

6

8

12

2

10k

100k

1M

10M

100M

FREQUENCY (MHz)

DATA RATE (bps)

2862A F11

2862A F10

Figure 1ꢀ. Cable Length vs Data Rate (RS485/RS422 Standard

Shown in 0ertical Dashed Line)

Figure 11. High Frequency EMI Reduction of Slew Limited

25ꢀꢂbps Mode Compared to Non Slew Limited 2ꢀMbps Mode

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PROFIBUS Compatible Interface

4. The LTC2862A transceiver should be powered by a

5% tolerance 5V supply (4.75V to 5.25V) to ensure

PROFIBUS is an RS485-based field bus. In addition

to the specifications of TIA/EIA-485-A, the PROFIBUS

specification contains additional requirements for cables,

interconnects, line termination, and signal levels. The

followingdiscussionappliestothePROFIBUSTypeAcables

with associated connectors and termination. The Type A

cable is a twisted pair shielded cable with a characteristic

impedance of 135Ω to 165Ω and a loop resistance of

< 110Ω/km.

that the PROFIBUS V tolerances are met.

OD

Auꢁiliary Protection for 5ꢂ0 Surge, 5ꢂ0 EFT, and 3ꢀꢂ0

IEC ESD

An interface transceiver used in an industrial setting may

beexposedtoextremelyhighlevelsofelectricaloverstress

due to phenomena such as lightning surge, electrical fast

transient(EFT)fromswitchinghighcurrentinductiveloads,

and electrostatic discharge (ESD) from the discharge of

electricallychargedpersonnelorequipment.Testmethods

to evaluate immunity of electronic equipment to these

phenomena are defined in the IEC standards 61000-4-2,

61000-4-4, and 61000-4-5, which address ESD, EFT, and

surge,respectively.ThetransientsproducedbytheEFTand

particularlythesurgetestscontainmuchmoreenergythan

the ESD transients. The LTC2862A is designed for high

robustness against ESD, but the on-chip protection is not

able to absorb the energy associated with the 61000-4-5

surge transients. Therefore, a properly designed external

protection network is necessary to achieve a high level of

surge protection, and can also extend the ESD and EFT

performance of the LTC2862A to extremely high levels.

The LTC2862A RS485 transceiver may be used in

PROFIBUS compatible equipment if the following

considerations are implemented. (Please refer to the

schematic of the PROFIBUS Compatible Interface in the

Typical Applications Section.)

1. The polarity of the PROFIBUS signal is opposite to the

polarity convention used in this data sheet. The PRO-

FIBUS B wire is driven by a non-inverted signal, while

the A wire is driven by an inverted signal. Therefore,

it is necessary to swap the output connections from

the transceiver. Pin A is connected to the PROFIBUS

B wire, and Pin B is connected to the PROFIBUS A

wire.

2. Each end of the PROFIBUS line is terminated with

a 220Ω resistor between B and A, a 390Ω pull-up

In addition to providing surge, EFT and ESD protection,

an external network should preserve or extend the ability

of the LTC2862A to withstand overvoltage faults, operate

over a wide common mode, and communicate at high

frequencies. In order to meet the first two requirements,

protection components with suitably high conduction

voltagesmustbechosen.Ameanstolimitcurrentmustbe

providedtopreventdamageincaseasecondaryprotection

deviceortheESDcellontheLTC2862Afiresandconducts.

The capacitance of these components must be kept low

in order to permit high frequency communication over a

network with multiple nodes. Meeting the requirements

for conducting very high energy electrical transients while

maintaining high hold-off voltages and low capacitance is

a considerable challenge.

resistor between B and V , and a 390Ω pull-down

CC

resistor between A and GND. This provides suitable

termination for the 150Ω twisted pair transmission

cable.

3. The peak to peak differential voltage V received at

OD

the end of a 100m cable with the cable and termina-

tions described above must be greater than 4V and

less than 7V. The LTC2862A produces signal levels

in excess of 7V when driving this network directly.

8.2Ω resistors may be inserted between the A and

B pins of the transceiver and the B and A pins of the

PROFIBUS cable to attenuate the transmitted signal

to meet the PROFIBUS upper limit of 7V while still

providing enough drive strength to meet the lower

limit of 4V.

2862af

17

For more information www.linear.com/LTC2862A

LTC2862A

applicaTions inForMaTion

A protection network shown in the Typical Applications

section (Network for IEC Level 4 Protection Against 5kV

Surge,5kVEFTand30kVIECESDPlus 360VOvervoltage

Protection) meets this challenge. The network provides

the following protection:

The gas discharge tubes (GDTs) provide the primary

protection against electrical surges. These devices

provide a very low impedance and high current carrying

capability when they fire, safely discharging the surge

current to GND. The transient blocking units (TBUs) are

solid state devices that switch from a low impedance pass

through state to a high impedance current limiting state

when a specified current level is reached. These devices

limit the current and power that can pass through to the

secondary protection. The secondary protection consists

of a bidirectional thyristor, which triggers above 35V to

protectthebuspinsoftheLTC2862Atransceiver.Thehigh

trigger voltage of the secondary protection maintains the

full 25V common mode range of the receivers. The final

component of the network is the metal oxide varistors

(MOVs) which are used to clamp the voltage across the

TBUs to protect them against fast ESD and EFT transients

which exceed the turn-on time of the GDT.

•

IEC 61000-4-2 ESD Level 4: 30kV contact, 30kV

air (line to GND, direct discharge to bus pins with

transceiverandprotectioncircuitmountedonaground

referenced test card per Figure 4 of the standard)

IEC 61000-4-4 EFT Level 4: 5kV (line to GND, 5kHz

repetition rate, 15ms burst duration, 60 second test

duration,dischargecoupledtobuspinsthrough100pF

capacitor per paragraph 7.3.2 of the standard)

IEC61000-4-5SurgeLevel4: 5kV(linetoGND,lineto

line, 8/20µs waveform, each line coupled to generator

through 80Ω resistor per Figure 14 of the standard)

This protection circuit adds only ~8pF of capacitance per

line(linetoGND),therebyprovidinganextremelyhighlevel

ofprotectionwithoutsignificantimpacttotheperformance

of the LTC2862A transceivers at high data rates.

The high performance of this network is attributable to

the low capacitance of the GDT and thyristor primary

and secondary protection devices. The high capacitance

MOV floats on the line and is shunted by the TBU, so it

contributes no appreciable capacitive load on the signal.

2862af

18

For more information www.linear.com/LTC2862A

LTC2862A

Typical applicaTions

PROFIBUS Compatible Line Interface

V

CC

(4.75V TO 5.25V)

V

CC

LTC2862A

390Ω

RO

8.2Ω

R

A*

B*

B WIRE

A WIRE

B WIRE

100m

RE

V

220Ω

390Ω

220Ω

390Ω

OD

DI

5.5Ω/WIRE

D

A WIRE

DE

GND

4V ≤ V ≤ 7V UP TO 1500kbps

P-P

OD

P-P

* THE POLARITY OF A AND B IN THIS DATA SHEET IS OPPOSITE THE POLARITY DEFINED BY PROFIBUS.

2862A TA02

±6ꢀ0 2ꢀMbps Level Shifter/Isolator

C

LTC2862A-1

V

CC

R1

A

B

A

B

DI

RO

GND

D

R

DATA IN 1

DATA OUT 1

R2

R1

C

V

CC2

CC1

GND

6ꢀV

2862A TAꢀ3

R1 = 2ꢀꢀk 1%. PLACE R1 RESISTORS NEAR A AND B PINS OF RECEIVER.

R2 = 1ꢀk

C = 47pF, 5%, 5ꢀ WVDC. MAY BE OMITTED FOR DATA RATES < 1ꢀꢀkbps.

Failsafe O Application (Idle State = Logic O)

5V

LTC2862A

V

CC

RO

DE

DI

RO

DE

DI

I1

R

B

“A”

“B”

A

I2

D

GND

2862A TA04

2862af

19

For more information www.linear.com/LTC2862A

LTC2862A

packaGe DescripTion

Please refer to http://www.linear.com/product/LTC2862A#pacꢂaging for the most recent pacꢂage drawings.

DD Pacꢂage

8-Lead Plastic DFN (3mm × 3mm)

(Reference LTC DWG # 05-08-1698 Rev C)

0.70 ±0.05

3.5 ±0.05

2.10 ±0.05 (2 SIDES)

1.65 ±0.05

PACKAGE

OUTLINE

0.25 ± 0.05

0.50

BSC

2.38 ±0.05

RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS

APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED

R = 0.125

0.40 ± 0.10

TYP

5

8

3.00 ±0.10

(4 SIDES)

1.65 ± 0.10

(2 SIDES)

PIN 1

TOP MARK

(NOTE 6)

(DD8) DFN 0509 REV C

4

1

0.25 ± 0.05

0.75 ±0.05

0.200 REF

0.50 BSC

2.38 ±0.10

BOTTOM VIEW—EXPOSED PAD

0.00 – 0.05

NOTE:

1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-1)

2. DRAWING NOT TO SCALE

3. ALL DIMENSIONS ARE IN MILLIMETERS

4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE

MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE

5. EXPOSED PAD SHALL BE SOLDER PLATED

6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION

ON TOP AND BOTTOM OF PACKAGE

2862af

20

For more information www.linear.com/LTC2862A

LTC2862A

packaGe DescripTion

Please refer to http://www.linear.com/product/LTC2862A#pacꢂaging for the most recent pacꢂage drawings.

S8 Pacꢂage

8-Lead Plastic Small Outline (Narrow .15ꢀ Inch)

(Reference LTC DWG # 05-08-1610 Rev G)

.189 – .197

(4.801 – 5.004)

.045 ±.005

NOTE 3

.050 BSC

7

5

8

6

.245

MIN

.160 ±.005

.150 – .157

(3.810 – 3.988)

NOTE 3

.228 – .244

(5.791 – 6.197)

.030 ±.005

TYP

1

3

4

2

RECOMMENDED SOLDER PAD LAYOUT

.010 – .020

(0.254 – 0.508)

× 45°

.053 – .069

(1.346 – 1.752)

.004 – .010

(0.101 – 0.254)

.008 – .010

(0.203 – 0.254)

0°– 8° TYP

.016 – .050

(0.406 – 1.270)

.050

(1.270)

BSC

.014 – .019

(0.355 – 0.483)

TYP

NOTE:

INCHES

1. DIMENSIONS IN

(MILLIMETERS)

2. DRAWING NOT TO SCALE

3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.

MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm)

4. PIN 1 CAN BE BEVEL EDGE OR A DIMPLE

SO8 REV G 0212

2862af

Information furnished by Linear Technology Corporation is believed to be accurate and reliable.

However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-

21

For more information www.linear.com/LTC2862A

tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.

LTC2862A

Typical applicaTion

Networꢂ for IEC Level 4 Protection Against 5ꢂ0 Surge, 5ꢂ0 EFT

and 3ꢀꢂ0 IEC ESD Plus ±36ꢀ0 Overvoltage Protection

MOV

RS485 A

(EXTERNAL)

LTC2862A-1

V

CC

DE

A

TBU

RO

DI

R

GDT

SCR

GND

D

B

RE

TBU

GND

RS485 B

(EXTERNAL)

2862A TA05

MOV

GDT: BOURNS 2031-42T-SM; 420V GAS DISCHARGE TUBE

TBU: BOURNS TBU-CA085-300-WH; 850V TRANSIENT BLOCKING UNIT

MOV: BOURNS MOV-7D391K; 390V 25J METAL OXIDE VARISTOR

SCR: BOURNS TISP4P035L1NR-S; 35V BIDIRECTIONAL THYRISTOR

relaTeD parTs

PART NUMBER

DESCRIPTION

60V Fault Protected RS485/RS422 Transceivers

COMMENTS

LT1785, LT1791

60V Tolerant, 15kV ESD, 250kbps

LTC2863/LTC2864/ 60V Fault Protected 3V to 5.5V RS485/RS422 Transceivers

LTC2865

60V Tolerant, 15kV ESD, 20Mbps or 250kbps

LTC2877

LTM^®2885

60V Rugged PROFIBUS RS485 Transceivers

6500V

Isolated RS485/RS422 μModule^®Transceiver + Power

PROFIBUS IEC 61158-2 Compliant, 52kV ESD

6500V

for 1 Minute, Isolated Power: 5V at 150mA

RMS

LTC2850/LTC2851/ 3.3V 20Mbps 15kV RS485 Transceivers

LTC2852

Up to 256 Transceivers Per Bus

LTC2854, LTC2855 3.3V 20Mbps RS485 Transceivers with Integrated Switchable Termination

LTC2856-1 Family 5V 20Mbps and Slew Rate Limited RS485 Transceivers

25kV ESD (LTC2854), 15kV ESD (LTC2855)

15kV ESD

LTC2859, LTC2861 5V 20Mbps RS485 Transceivers with Integrated Switchable Termination

LTC1535

LTM2881

Isolated RS485 Transceiver

2500V

Isolation, Requires External Transceiver

RMS

Complete 3.3V Isolated RS485/RS422 μModule Transceiver + Power

Isolation with Integrated Isolated DC/DC

Converter, 1W Power, Low EMI, 15kV ESD, 30kV/µs

Common Mode Transient Immunity

RMS

2862af

LT 0617 • PRINTED IN USA

www.linear.com/LTC2862A

22

 LINEAR TECHNOLOGY CORPORATION 2017

For more information www.linear.com/LTC2862A


型号：	LTC2862A-1
厂家：	ADI
描述：	Â±60V Fault Protected 3V to 5.5V RS485/RS422 Transceiver with Level 4 IEC ESD
文件：	总22页 (文件大小：478K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

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