OP200_04 [ADI]

Dual Low Offset, Low Power Operational Amplifier; 双低失调,低功耗运算放大器
OP200_04
型号: OP200_04
厂家: ADI    ADI
描述:

Dual Low Offset, Low Power Operational Amplifier
双低失调,低功耗运算放大器

运算放大器
文件: 总12页 (文件大小:394K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
Dual Low Offset, Low Power  
Operational Amplifier  
a
OP200  
PIN CONNECTIONS  
FEATURES  
Low Input Offset Voltage: 75 V Max  
Low Offset Voltage Drift, Over –55C TA +125C:  
0.5 V/C Max  
Low Supply Current (Per Amplifier): 725 A Max  
High Open-Loop Gain: 5000 V/mV Min  
Low Input Bias Current: 2 nA Max  
Low Noise Voltage Density: 11 nV/Hz at 1 kHz  
Stable with Large Capacitive Loads: 10 nF Typ  
Pin Compatible to OP221, MC1458, and LT1013 with  
Improved Performance  
16-Lead SOIC (S-Suffix)  
<
<
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
–IN A  
+IN A  
NC  
OUT A  
NC  
NC  
V–  
V+  
NC  
NC  
+IN B  
–IN B  
NC  
NC  
OUT B  
NC  
Available in Die Form  
NC = NO CONNECT  
GENERALDESCRIPTION  
The OP200 is the first monolithic dual operational amplifier to  
offer OP77 type precision performance. Available in the industry-  
standard 8-lead pinout, the OP200 combines precision performance  
with the space and cost savings offered by a dual amplifier.  
8-Lead PDI  
P
(P-Suffix)  
8-Lead CERDIP (Z-Suffix)  
The OP200 features an extremely low input offset voltage of less  
than 75 µV with a drift below 0.5 µV/°C, guaranteed over the full  
military temperature range. Open-loop gain of the OP200 exceeds  
5,000,000 into a 10 kload; input bias current is under 2 nA;  
CMR is over 120 dB and PSRR below 1.8 µV/V. On-chip  
Zener zap trimming is used to achieve the extremely low input  
offset voltage of the OP200 and eliminates the need for offset  
pulling.  
V+  
1
2
3
4
8
7
6
5
OUT A  
–IN A  
+IN A  
V–  
A
OUT B  
–IN B  
+IN B  
+
B
+
Power consumption of the OP200 is very low, with each amplifier  
drawing less than 725 µA of supply current. The total current  
drawn by the dual OP200 is less than one-half that of a single  
OP07, yet the OP200 offers significant improvements over this  
industry-standard op amp. The voltage noise density of the OP200,  
11 nV/Hz at 1 kHz, is half that of most competitive devices.  
The OP200 is pin compatible with the OP221, LM158,  
MC1458/1558, and LT1013.  
The OP200 is an ideal choice for applications requiring multiple  
precision op amps and where low power consumption is critical.  
For a quad precision op amp, see the OP400.  
V+  
BIAS  
OUT  
VOLTAGE  
LIMITING  
NETWORK  
+IN  
–IN  
V–  
Figure 1. Simplified Schematic (One of two amplifiers is shown.)  
REV. B  
Information furnished by Analog Devices is believed to be accurate and  
reliable. However, no responsibility is assumed by Analog Devices for its  
use, norforanyinfringementsofpatentsorotherrightsofthirdpartiesthat  
may result from its use. No license is granted by implication or otherwise  
under any patent or patent rights of Analog Devices. Trademarks and  
registered trademarks are the property of their respective owners.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781/329-4700  
Fax: 781/326-8703  
www.analog.com  
© 2004 Analog Devices, Inc. All rights reserved.  
OP200–SPECIFICATIONS  
ELECTRICAL CHARACTERISTICS  
(VS = 15 V, TA = 25C, unless otherwise noted.)  
OP200A/E  
OP200G  
Typ  
Parameter  
Symbol  
Conditions  
Min  
Typ  
Max  
Min  
Max  
Unit  
Input Offset Voltage  
VOS  
25  
75  
80  
200  
µV  
Long-Term Input  
Voltage Stability  
0.1  
0.05  
0.1  
0.5  
0.1  
0.05  
0.1  
0.5  
µV/mo  
nA  
Input Offset Current  
Input Bias Current  
Input Noise Voltage  
IOS  
IB  
VCM = 0 V  
1.0  
2.0  
3.5  
5.0  
VCM = 0 V  
nA  
en p-p  
en  
0.1 Hz to 10 Hz  
µVp-p  
nV/Hz  
Input Noise  
Voltage Density*  
fO = 10 Hz  
fO = 1000 Hz  
22  
11  
36  
18  
22  
11  
Input Noise Current  
in p-p  
in  
0.1 Hz to 10 Hz  
fO = 10 Hz  
15  
15  
pAp-p  
pA/Hz  
MΩ  
Input Noise  
Current Density  
0.4  
10  
0.4  
10  
Input Resistance  
Differential Mode  
RIN  
Input Resistance  
Common Mode  
RINCM  
AVO  
125  
125  
GΩ  
Large Signal  
Voltage Gain  
VO – 10 V  
RL = 10 kΩ  
RL = 2 kΩ  
5000  
2000  
12000  
3700  
3000  
1500  
7000  
3200  
M/mV  
*Sample tested.  
Specifications subject to change without notice.  
–2–  
REV. B  
OP200  
(VS = 15 V, –55C TA +125C for OP200A, unless otherwise noted.)  
ELECTRICAL CHARACTERISTICS  
OP200A  
Parameter  
Symbol  
VOS  
Conditions  
Min  
Typ  
Max  
125  
0.5  
Unit  
Input Offset Voltage  
Average Input Offset Voltage Drift  
Input Offset Current  
Input Bias Current  
45  
µV  
TCVOS  
IOS  
0.2  
µV/°C  
nA  
VCM = 0 V  
VCM = 0 V  
0.15  
0.9  
2.5  
IB  
5.0  
nA  
Large Signal Voltage Gain  
AVO  
VO = 10 V  
RL = 10 Ω  
RL = 2 kΩ  
3000  
1000  
9000  
2700  
V/mV  
V/mV  
Input Voltage Range*  
IVR  
12  
12.5  
130  
V
Common-Mode Rejection  
Power Supply Rejection Ratio  
Output Voltage Swing  
CMR  
PSRR  
VO  
VCM  
=
12 V  
115  
dB  
VS = +3 V to +18 V  
0.2  
3.2  
µV/V  
RL = 10 kΩ  
RL = 2 kΩ  
12  
11  
12.4  
12  
V
V
Supply Current Per Amplifier  
Capacitive Load Stability  
ISY  
No Load  
AV = 1  
600  
8
775  
µA  
nF  
*Guaranteed by CMR test.  
Specifications subject to change without notice.  
(V = 15 V, T = 25C, unless otherwise noted.)  
ELECTRICAL CHARACTERISTICS  
S
A
OP200A/E  
Typ  
OP200G  
Typ  
Parameter  
Symbol  
Conditions  
Min  
Max  
Min  
Max  
Unit  
Input Voltage Range1  
IVR  
12  
13  
135  
0.4  
12  
13  
130  
0.6  
V
Common-Mode  
Rejection  
CMR  
VCM  
=
12 V  
120  
110  
dB  
Power Supply  
Rejection Ratio  
VS = 3 V  
to 18 V  
PSRR  
VO  
1.8  
5.6  
µV/V  
Output Voltage  
Swing  
RL= 10 kΩ  
RL = 2 kΩ  
12  
11  
12.6  
12.2  
12  
11  
12.6  
12.2  
V
V
Supply Current  
Per Amplifier  
ISY  
SR  
No Load  
570  
725  
570  
725  
µA  
Slew Rate  
0.1  
0.15  
0.1  
0.15  
V/µS  
Gain Bandwidth  
Product  
GBWP  
AV = 1  
500  
500  
kHz  
Channel Separation2  
VO = 20 V p-p  
fO = 10 Hz  
CS  
123  
145  
3.2  
123  
145  
3.2  
dB  
pF  
Input Capacitance  
CIN  
Capacitive Load  
Stability  
AV = 1  
No Oscillations  
10  
10  
nF  
NOTES  
1Guaranteed by CMR test.  
2Guaranteed but not 100% tested.  
Specifications subject to change without notice.  
–3–  
REV. B  
OP200–SPECIFICATIONS  
ELECTRICAL CHARACTERISTICS (VS = 15 V, –40C TA +85C, unless otherwise noted.)  
OP200E  
Typ  
OP200G  
Parameter  
Symbol  
Conditions  
Min  
Max  
Min  
Typ  
Max  
Unit  
Input Offset Voltage  
VOS  
35  
100  
110  
300  
µV  
Average Input Offset  
Voltage Drift  
TCVOS  
IOS  
0.2  
0.5  
2.5  
5.0  
0.6  
0.1  
0.5  
2.0  
µV/°C  
nA  
Input Offset Current  
Input Bias Current  
VCM = 0 V  
VCM = 0 V  
0.08  
0 3  
6.0  
IB  
10.0  
nA  
Large-Signal  
Voltage Gain  
VO = 10 V  
RL= 10 kΩ  
RL = 2 kΩ  
AVO  
IVR  
3000  
1500  
10000  
3200  
2000  
1000  
5000  
2500  
V/mV  
V/mV  
Input Voltage  
Range*  
12  
12.5  
12  
12.5  
V
Common-Mode  
Rejection  
CMR  
PSRR  
VCM  
=
12 V  
115  
130  
105  
130  
0.3  
dB  
Power Supply  
Rejection Ratio  
VS = 3 V  
to 18 V  
0.15  
3.2  
10.0  
775  
µV/V  
Output Voltage  
Swing  
VO  
RL = 10 kΩ  
RL = 2 kΩ  
12  
11  
12.4  
12  
12  
11  
12.4  
12.2  
V
V
Supply Current  
Per Amplifier  
ISY  
No Load  
600  
775  
600  
µA  
Capacitive Load  
Stability  
AV = 1  
No Oscillations  
10  
10  
10  
10  
nF  
nF  
*Guaranteed by CMR test.  
Specifications subject to change without notice.  
–4–  
REV. B  
OP200  
1/2  
20Vp-p @ 10Hz  
V
V
100ꢄ  
10kꢄ  
1
OP200  
50kꢄ  
50ꢄ  
1/2  
OP200  
TO SPECTRUM  
ANALYZER  
e
OUT  
1/2  
OP200  
1/2  
OP200  
2
e
(nV/ Hz) = 2 e  
(nV/ Hz) 101  
V
OUT  
OUT  
1
CHANNEL SEPARATION = 20 LOG  
V /1000  
2
Figure 2. Channel Separation Test Circuit  
Figure 3. Noise Test Schematic  
ABSOLUTE MAXIMUM RATINGS1  
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . .  
ORDERING GUIDE  
Package  
20 V  
30 V  
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . Supply Voltage  
Output Short-Circuit Duration . . . . . . . . . . . . . . Continuous  
Storage Temperature Range  
TA = 25C  
VOS Max  
(V)  
Operating  
Temperature  
Range  
CERDIP  
8-Lead  
Plastic  
P, S, Z-Package . . . . . . . . . . . . . . . . . . . . . –65°C to +150°C  
Lead Temperature Range (Soldering, 60 sec) . . . . . . . 300°C  
Junction Temperature (TJ) . . . . . . . . . . . . . –65°C to +150°C  
Operating Temperature Range  
OP200A . . . . . . . . . . . . . . . . . . . . . . . . . . . –55°C to +125°C  
OP200E . . . . . . . . . . . . . . . . . . . . . . . . . . . –40°C to +85°C  
OP200G . . . . . . . . . . . . . . . . . . . . . . . . . . . –40°C to +85°C  
75  
75  
200  
200  
200  
OP200AZ  
OP200EZ  
MIL  
XIND  
XIND  
XIND  
OP200GP  
OP200GS  
OP200GS-REEL XIND  
For military processed devices, please refer to the Standard  
Microcircuit Drawing (SMD) available at  
www.dscc.dla.mil/programs/milspec/default.asp  
2
Package Type  
JA  
JC  
Unit  
8-Lead CERDIP (Z)  
8-Lead Plastic DIP (P)  
16-Lead SOIC (S)  
148  
96  
92  
16  
37  
27  
°C/W  
°C/W  
°C/W  
SMD Part Number  
ADI Equivalent  
NOTES  
1Absolute maximum ratings apply to both DICE and packaged parts, unless  
5962-8859301M2A  
5962-8859301MPA  
OP200ARCMDA  
OP200AZMDA  
otherwise noted.  
2
JA is specified for worst-case mounting conditions, i.e., JA is specified for  
device in socket for CERDIP and PDIP packages; JA is specified for device  
soldered to printed circuit board for SOIC package.  
CAUTION  
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily  
accumulate on the human body and test equipment and can discharge without detection. Although  
the OP200 features proprietary ESD protection circuitry, permanent damage may occur on devices  
subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are  
recommended to avoid performance degradation or loss of functionality.  
REV. B  
–5–  
–Typical Performance Characteristics  
OP200  
60  
3
2
T
A
= 25C  
= 15V  
V
= 15V  
V
= 15V  
S
S
V
S
50  
40  
30  
20  
2
1
0
1
–1  
–2  
–3  
10  
0
5
0
–75 –50 –25  
0
25  
50  
75 100 125  
1
2
3
4
5
–75 –50 –25  
0
25  
50  
75 100 125  
TIME – Minutes  
TEMPERATURE – C  
TEMPERATURE – C  
TPC 1. Warm-Up Drift  
TPC 2. Input Offset Voltage  
vs. Temperature  
TPC 3. Input Bias Current vs.  
Temperature  
300  
250  
200  
150  
100  
50  
140  
120  
100  
1.0  
0.8  
0.6  
T
V
= 25C  
= 15V  
V
= 15V  
A
S
T
V
= 25C  
= 15V  
A
S
S
80  
60  
0.4  
0.2  
0
40  
20  
0
0
–75 –50 –25  
0
25  
50  
75 100 125  
1
10  
100  
1k  
10k  
100k  
–15  
–10  
–5  
0
5
10  
15  
TEMPERATURE – C  
FREQUENCY – Hz  
COMON-MODE VOLTAGE – V  
TPC 4. Input Offset Current vs.  
Temperature  
TPC 5. Input Bias Current vs.  
Common-Mode Voltage  
TPC 6. Common-Mode Rejection  
vs. Frequency  
100  
1000  
T
V
= 25C  
= 15V  
T
V
= 25C  
= 15V  
A
A
S
S
100  
10  
1
10  
100  
1k  
1
10  
100  
1k  
FREQUENCY – Hz  
FREQUENCY – Hz  
TPC 7. Voltage Noise Density  
vs. Frequency  
TPC 8. Current Noise Density  
vs. Frequency  
TPC 9. 0.1 to 10 Hz Noise  
–6–  
REV. B  
OP200  
1.18  
1.16  
1.14  
1.12  
1.10  
1.08  
1.06  
1.16  
1.15  
1.14  
1.13  
140  
120  
100  
80  
TWO AMPLIFIERS  
= 25C  
NEGATIVE  
SUPPLY  
TWO AMPLIFIERS  
= 15V  
T
A
V
S
POSITIVE  
SUPPLY  
60  
40  
1.12  
1.11  
20  
0
T
= 25C  
A
–75 –50 –25  
0
25  
50  
75 100 125  
1
10  
100  
1k  
10k  
100k  
0.1  
2  
6  
10  
14  
16  
FREQUENCY – Hz  
TEMPERATURE – C  
SUPPLY VOLTAGE – V  
TPC 11. Total Supply Current  
vs. Temperature  
TPC 10. Total Supply Current  
vs. Supply Voltage  
TPC 12. Power Supply Rejection  
vs. Frequency  
6000  
0.7  
0.6  
0.5  
0.4  
0.3  
140  
120  
100  
80  
V
R
= 15V  
= 2kꢃ  
T
V
= 25C  
= 15V  
S
A
L
S
5000  
4000  
3000  
2000  
60  
0
PHASE  
90  
135  
40  
GAIN  
10k  
20  
1000  
0
0.2  
0.1  
180  
0
–20  
10  
–75 –50 –25  
0
25  
50  
75 100 125  
–75 –50 –25  
0
25  
50  
75 100 125  
1M  
100  
1k  
100k  
TEMPERATURE – C  
TEMPERATURE – C  
FREQUENCY – Hz  
TPC 14. Open-Loop Gain vs.  
Temperature  
TPC 13. Power Supply Rejection  
vs. Temperature  
TPC 15. Open-Loop Gain and  
Phase Shift vs. Frequency  
140  
30  
1
A
A
A
= 100  
= 10  
= 1  
V
T
V
= 25C  
= 15V  
T
V
= 25C  
= 15V  
A
A
120  
100  
S
S
25  
20  
15  
10  
5
V
V
A
= 1000  
V
0.1  
80  
60  
40  
A
= 100  
= 10  
= 1  
V
A
V
0.01  
T
V
V
= 25C  
= 15V  
A
A
V
S
20  
0
= 10V p-p  
OUT  
= 2kꢃ  
R
L
0
10  
0.001  
100  
1k  
10k  
100  
1k  
FREQUENCY – Hz  
10k  
100k  
10  
100  
1k  
10k  
100k  
1M  
FREQUENCY – Hz  
FREQUENCY – Hz  
TPC 17. Maximum Output Swing  
vs. Frequency  
TPC 16. Closed-Loop Gain  
vs. Frequency  
TPC 18. Total Harmonic Distortion  
vs. Frequency  
–7–  
REV. B  
OP200  
50  
29  
28  
27  
26  
25  
24  
23  
22  
150  
140  
130  
120  
T
A
= 25C  
= 15V  
T
V
= 25C  
= 15V  
45  
V
A
S
S
40  
FALLING  
RISING  
35  
30  
25  
20  
15  
10  
SINKING  
110  
100  
90  
SOURCING  
1
5
0
0
0.5  
1.0  
1.5  
1.0  
1.5  
3.0  
0
2
3
4
5
10  
100  
1k  
10k  
100k  
CAPACITIVE LOAD – nF  
TIME – Minutes  
FREQUENCY – Hz  
TPC 19. Overshoot vs.  
Capacitive Load  
TPC 20. Short-Circuit  
Current vs. Time  
TPC 21. Channel Separation  
vs. Frequency  
TPC 22. Large Signal  
Transient Response  
TPC 23. Small Signal  
Transient Response  
TPC 24. Small Signal Transient  
Response CLOAD = 1 nF  
APPLICATIONS INFORMATION  
+15V  
The OP200 is inherently stable at all gains and is capable of  
driving large capacitive loads without oscillating. Nonetheless,  
good supply decoupling is highly recommended. Proper supply  
decoupling reduces problems caused by supply line noise and  
improves the capacitive load driving capability of the OP200.  
3
2
8
1/2  
OP200AZ  
V
1
IN  
V
OUT  
5
6
7
1/2  
4
OP200AZ  
–15V  
20kꢃ  
APPLICATIONS  
20kꢃ  
5kꢃ  
5kꢃ  
V
Dual Low-Power Instrumentation Amplifier  
REF  
A dual instrumentation amplifier that consumes less than 33 mW  
of power per channel is shown in Figure 4. The linearity of the  
instrumentation amplifier exceeds 16 bits in gains of 5 to 200  
and is better than 14 bits in gains from 200 to 1000. CMRR is  
above 115 dB (gain = 1000). Offset voltage drift is typically  
0.2 µV/°C over the military temperature range, which is compa-  
rable to the best monolithic instrumentation amplifiers. The  
bandwidth of the low power instrumentation amplifier is a func-  
tion of gain and is shown below:  
R
G
40000  
V
=
5 +  
V
+ V  
OUT  
IN REF  
R
G
Figure 4. Dual Low Power Instrumentation Amplifier  
The output signal is specified with respect to the reference  
input, which is normally connected to analog ground. The  
reference input can be used to offset the output from –10 V  
to +10 V if required.  
Gain  
Bandwidth  
5
10  
100  
1000  
150 kHz  
67 kHz  
7.5 kHz  
500 Hz  
–8–  
REV. B  
OP200  
Precision Absolute Value Amplifier  
Precision Current Pump  
The circuit in Figure 5 is a precision absolute value amplifier  
with an input impedance of 10 M. The high gain and low  
TCVOS of the OP200 ensure accurate operation with microvolt  
input signals. In this circuit, the input always appears as a  
common-mode signal to the op amps. The CMR of the OP200  
exceeds 120 dB, yielding an error of less than 2 ppm.  
Maximum output current of the precision current pump shown  
in Figure 6 is 10 mA. Voltage compliance is 10 V with 15 V  
supplies. Output impedance of the current transmitter exceeds  
3 Mwith linearity better than 16 bits.  
R3  
R1  
10kꢃ  
10kꢃ  
2
3
R5  
+15  
C2  
100ꢃ  
1/2  
OP200EZ  
1
I
V
R2  
10kꢃ  
OUT  
0.1pF  
IN  
+15  
8
R1  
1kꢃ  
R3  
1kꢃ  
5
6
R4  
1kꢃ  
7
1/2  
OP200EZ  
6
C1  
30pF  
D1  
1N4148  
1/2  
OP200AZ  
7
3
8
V
OUT  
4
1/2  
1
5
0V < V  
< 10V  
OUT  
OP200AZ  
V
V
IN  
100ꢃ  
IN  
D1  
1N4148  
2
I
=
=
= 10mA/V  
V
OUT  
IN  
RS  
C2  
4
–15  
R2  
2kꢃ  
0.1pF  
Figure 6. Precision Current Pump  
Dual 12-Bit Voltage Output DAC  
–15  
The dual output DAC shown in Figure 7 is capable of providing  
untrimmed 12-bit accurate operation over the entire military  
temperature range. Offset voltage, bias current, and gain errors  
of the OP200 contribute less than 1/10 of an LSB error at 12  
bits over the military temperature range.  
Figure 5. Precision Absolute Value Amplifier  
5V  
21  
V
DD  
R
A
8
FB  
3
2
DAC-8222EW  
10V  
REFERENCE  
VOLTAGE  
DAC A  
1/2  
I
A
V
A
OUT  
4
REF  
2
DAC8212AV  
1/2  
1
4
OUTA  
–15V  
OP200AZ  
3
DAC DATA BUS  
PINS 6(MSB) – 17(LSB)  
23  
24  
1
R
B
FB  
DAC B  
1/2  
I
B
V
B
OUT  
6
5
22 REF  
DAC8212AV  
1/2  
7
OUTB  
OP200AZ  
AGND  
18  
DAC A/DAC B  
19  
20  
DAC  
CONTROL  
CS  
WR  
DGND  
5
Figure 7. Dual 12-Bit Voltage Output DAC  
REV. B  
–9–  
OP200  
Dual Precision Voltage Reference  
+5V  
–2.5V  
A dual OP200 and a REF43, a 2.5 V reference, can be used to  
build a 2.5 V precision voltage reference. Maximum output  
current from each reference is 10 mA with load regulation  
under 25 µV/mA. Line regulation is better than 15 µV/V and  
output voltage drift is under 20 µV/°C. Output voltage noise  
from 0.1 Hz to 10 Hz is typically 75 µV p-p. R1 and D1 ensure  
correct start-up.  
R2  
10kꢃ  
R1  
22kꢃ  
2
3
8
D1  
1N914  
1/2  
OP200AZ  
2
4
Programmable High Resolution Window Comparator  
The programmable window comparator shown in Figure 9 is  
easily capable of 12-bit accuracy over the full military tempera-  
ture range. A dual CMOS 12-bit DAC, the DAC8212, is used  
in the voltage switching mode to set the upper and lower thresh-  
olds (DAC A and DAC B, respectively).  
R4  
5kꢃ  
R3  
10kꢃ  
6
6
REF43A  
–5V  
1/2  
OP200AZ  
7
4
5
–2.5V  
Figure 8. Dual Precision Voltage Reference  
15V  
V
IN  
21  
V
DD  
8
DAC A  
1/2  
DAC8212AV  
I
A
R
A
4
10V  
REFERENCE  
2
OUT  
REF  
3
2
+
1/2  
1
5V  
R1  
10kꢃ  
OP200AZ  
D1  
1N4148  
R3  
10kꢃ  
TTL OUT  
DAC DATA BUS  
PINS 6(MSB) – 17(LSB)  
–15V  
Q1  
2N2222  
R4  
D2  
1N4148  
4
5
10kꢃ  
+
R2  
10kꢃ  
1/2  
7
OUTB  
OP200AZ  
DAC B  
1/2  
DAC8212AV  
R
B
I
B
REF 22  
24  
OUT  
18  
19  
20  
DAC A/DAC B  
DAC  
CONTROL  
SIGNALS  
CS  
WR  
DGND AGND  
5
1
Figure 9. Programmable High Resolution Window Comparator  
–10–  
REV. B  
OP200  
OUTLINE DIMENSIONS  
8-Lead Ceramic Dual In-Line Package [CERDIP]  
8-Lead Plastic Dual In-Line Package [PDIP]  
(Q-8)  
Z-Suffix  
(N-8)  
P-Suffix  
Dimensions shown in inches and (millimeters)  
Dimensions shown in inches and (millimeters)  
0.005 (0.13) 0.055 (1.40)  
0.375 (9.53)  
0.365 (9.27)  
0.355 (9.02)  
MIN  
MAX  
8
5
8
1
5
0.310 (7.87)  
0.220 (5.59)  
0.295 (7.49)  
0.285 (7.24)  
0.275 (6.98)  
PIN 1  
1
4
4
0.325 (8.26)  
0.310 (7.87)  
0.300 (7.62)  
0.100 (2.54) BSC  
0.405 (10.29) MAX  
0.100 (2.54)  
BSC  
0.320 (8.13)  
0.290 (7.37)  
0.150 (3.81)  
0.135 (3.43)  
0.120 (3.05)  
0.060 (1.52)  
0.015 (0.38)  
0.015  
(0.38)  
MIN  
0.180  
(4.57)  
MAX  
0.200 (5.08)  
MAX  
0.150 (3.81)  
0.200 (5.08)  
0.125 (3.18)  
0.015 (0.38)  
0.010 (0.25)  
0.008 (0.20)  
MIN  
0.150 (3.81)  
0.130 (3.30)  
0.110 (2.79)  
0.022 (0.56)  
0.018 (0.46)  
0.014 (0.36)  
SEATING  
PLANE  
0.015 (0.38)  
0.008 (0.20)  
0.023 (0.58)  
0.014 (0.36)  
SEATING  
PLANE  
15  
0
0.070 (1.78)  
0.030 (0.76)  
0.060 (1.52)  
0.050 (1.27)  
0.045 (1.14)  
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETERS DIMENSIONS  
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR  
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN  
COMPLIANT TO JEDEC STANDARDS MO-095AA  
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS  
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR  
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN  
16-Lead Standard Small Outline Package [SOIC]  
Wide Body  
(RW-16)  
S-Suffix  
Dimensions shown in millimeters and (inches)  
10.50 (0.4134)  
10.10 (0.3976)  
16  
1
9
8
7.60 (0.2992)  
7.40 (0.2913)  
10.65 (0.4193)  
10.00 (0.3937)  
1.27 (0.0500)  
0.75 (0.0295)  
0.25 (0.0098)  
2.65 (0.1043)  
2.35 (0.0925)  
BSC  
45ꢁ  
0.30 (0.0118)  
0.10 (0.0039)  
8ꢁ  
0ꢁ  
0.51 (0.0201)  
0.31 (0.0122)  
SEATING  
PLANE  
1.27 (0.0500)  
0.40 (0.0157)  
0.33 (0.0130)  
0.20 (0.0079)  
COPLANARITY  
0.10  
COMPLIANT TO JEDEC STANDARDS MS-013AA  
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS  
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR  
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN  
REV. B  
–11–  
OP200  
Revision History  
Location  
Page  
2/04—Data Sheet changed from REV. A to REV. B.  
OP200F deleted . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Universal  
Changes to ORDERING GUIDE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5  
Changes to Figure 4 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8  
Updated OUTLINE DIMENSIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11  
4/02—Data Sheet changed from REV. 0 to REV. A.  
Edits to FEATURES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1  
Edits to GENERAL DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1  
Edits to ORDERING INFORMATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1  
Edits to PIN CONNECTIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1  
Edits to ABSOLUTE MAXIMUM RATINGS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2  
Edits to PACKAGE TYPE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2  
–12–  
REV. B  

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