OP297GSZ-REEL [ADI]
Dual Low Bias Current Precision Operational Amplifier; 双通道，低偏置电流精密运算放大器
| 型号： | OP297GSZ-REEL |
| 厂家： | 
ADI |
| 描述： | Dual Low Bias Current Precision Operational Amplifier |
| 文件： | 总16页 (文件大小：327K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Dual Low Bias Current
Precision Operational Amplifier
OP297
FEATURES
PIN CONFIGURATION
Low offset voltage: 50 μV maximum
1
2
3
4
8
7
6
5
V+
OUTA
–INA
+INA
V–
Low offset voltage drift: 0.6 μV/°C maximum
Very low bias current: 100 pA maximum
Very high open-loop gain: 2000 V/mV minimum
Low supply current (per amplifier): 625 μA maximum
Operates from 2 V to 20 V supplies
OUTB
–INB
+INB
A
B
Figure 1.
High common-mode rejection: 120 dB minimum
60
40
V
V
= ±15V
S
APPLICATIONS
= 0V
CM
Strain gage and bridge amplifiers
High stability thermocouple amplifiers
Instrumentation amplifiers
Photocurrent monitors
High gain linearity amplifiers
Long-term integrators/filters
Sample-and-hold amplifiers
Peak detectors
20
I
–
B
0
I
+
B
–20
–40
–60
I
OS
Logarithmic amplifiers
Battery-powered systems
–75
–50
–25
0
25
50
75
100
125
TEMPERATURE (°C)
GENERAL DESCRIPTION
Figure 2. Low Bias Current over Temperature
The OP297 is the first dual op amp to pack precision perform-
ance into the space saving, industry-standard 8-lead SOIC
package. The combination of precision with low power and
extremely low input bias current makes the dual OP297 useful
in a wide variety of applications.
400
300
200
100
0
1200 UNITS
T
V
V
= 25°C
= ±15V
A
S
= 0V
CM
Precision performance of the OP297 includes very low offset,
under 50 μV, and low drift, below 0.6 μV/°C. Open-loop gain
exceeds 2000 V/mV, ensuring high linearity in every application.
Errors due to common-mode signals are eliminated by the
common-mode rejection of over 120 dB, which minimizes
offset voltage changes experienced in battery-powered systems.
The supply current of the OP297 is under 625 μA.
–100 –80 –60 –40 –20
0
20
40
60
80 100
INPUT OFFSET VOLTAGE (µV)
The OP297 uses a super-beta input stage with bias current
cancellation to maintain picoamp bias currents at all tempera-
tures. This is in contrast to FET input op amps whose bias
currents start in the picoamp range at 25°C, but double for
every 10°C rise in temperature, to reach the nanoamp range
above 85°C. Input bias current of the OP297 is under 100 pA at
25°C and is under 450 pA over the military temperature range
per amplifier. This part can operate with supply voltages as low
as 2 V.
Figure 3. Very Low Offset
Combining precision, low power, and low bias current, the
OP297 is ideal for a number of applications, including instru-
mentation amplifiers, log amplifiers, photodiode preamplifiers,
and long term integrators. For a single device, see the OP97; for
a quad device, see the OP497.
Rev. F
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registeredtrademarks arethe property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
www.analog.com
©2006 Analog Devices, Inc. All rights reserved.
OP297
TABLE OF CONTENTS
Features .............................................................................................. 1
AC Performance ............................................................................9
Guarding and Shielding................................................................9
Open-Loop Gain Linearity ....................................................... 10
Applications..................................................................................... 11
Precision Absolute Value Amplifier......................................... 11
Precision Current Pump............................................................ 11
Precision Positive Peak Detector.............................................. 11
Simple Bridge Conditioning Amplifier................................... 11
Nonlinear Circuits...................................................................... 12
Outline Dimensions....................................................................... 13
Ordering Guide .......................................................................... 14
Applications....................................................................................... 1
General Description......................................................................... 1
Pin Configuration............................................................................. 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Electrical Characteristics............................................................. 3
Absolute Maximum Ratings............................................................ 4
Thermal Resistance ...................................................................... 4
ESD Caution.................................................................................. 4
Typical Performance Characteristics ............................................. 5
Applications Information ................................................................ 9
REVISION HISTORY
2/06—Rev. E to Rev. F
10/02—Rev. C to Rev. D
Updated Format..................................................................Universal
Changes to Features.......................................................................... 1
Deleted OP297 Spice Macro Model Section ................................. 9
Updated Outline Dimensions....................................................... 13
Changes to Ordering Guide .......................................................... 14
Edits to Figure 16...............................................................................6
10/02—Rev. B to Rev. C
Edits to Specifications.......................................................................2
Deleted Wafer Test Limits ................................................................3
Deleted Dice Characteristics............................................................3
Deleted Absolute Maximum Ratings..............................................4
Edits to Ordering Guide ...................................................................4
Updated Outline Dimensions....................................................... 12
7/03—Rev. D to Rev. E
Changes to TPCs 13 and 16 ............................................................ 4
Edits to Figures 12 and 14 ............................................................... 8
Changes to Nonlinear Circuits Section ......................................... 8
Rev. F | Page 2 of 16
OP297
SPECIFICATIONS
ELECTRICAL CHARACTERISTICS
@ VS = 15 V, TA = 25°C, unless otherwise noted.
Table 1.
OP297E
OP297F
OP297G
Parameter
Symbol
Conditions
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Unit
Input Offset Voltage
VOS
25
50
50
100
80
200
μV
Long-Term Input
Voltage Stability
0.1
20
20
0.5
20
17
20
0.1
35
35
0.5
20
17
20
0.1
50
50
0.5
20
17
20
μV/mo
pA
Input Offset Current
Input Bias Current
IOS
VCM = 0 V
100
100
150
150
200
IB
VCM = 0 V
200
pA
Input Noise Voltage
Input Noise Voltage Density
en p-p
en
0.1 Hz to 10 Hz
fO = 10 Hz
ꢀV p-p
nV/√Hz
nV/√Hz
fA/√Hz
fO = 1000 Hz
fO = 10 Hz
Input Noise Current Density
Input Resistance
in
Differential Mode
RIN
30
30
30
MΩ
GΩ
Input Resistance
Common-Mode
RINCM
500
500
500
Large Signal
VO = 10 V
RL = 2 kΩ
Voltage Gain
AVO
2000
13
4000
14
1500
13
3200
14
1200
13
3200
14
V/mV
V
Input Voltage Range1
Common-Mode Rejection
Power Supply Rejection
Output Voltage Swing
VCM
CMRR
PSRR
VO
VCM
=
13 V
120
120
13
140
130
14
114
114
13
135
125
14
114
114
13
135
125
14
dB
dB
V
VS = 2 V to 20 V
RL = 10 kΩ
RL = 2 kΩ
13
13.7
525
13
13.7
525
13
13.7
525
V
Supply Current per Amplifier
Supply Voltage
ISY
No Load
625
20
625
20
625
μA
V
VS
Operating Range
2
2
2
20
Slew Rate
SR
0.05
0.15
500
150
0.05
0.15
500
150
0.05
0.15
500
150
V/μs
kHz
dB
Gain Bandwidth Product
Channel Separation
GBWP
CS
AV = +1
VO = 20 V p-p
fO = 10 Hz
Input Capacitance
CIN
3
3
3
pF
1 Guaranteed by CMR test.
@ VS = 5 V, –40°C ≤ TA ≤ +85°C for OP297E/OP297F/OP297G, unless otherwise noted.
Table 2.
OP297E
OP297F
OP297G
Parameter
Symbol
Conditions
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Unit
Input Offset Voltage
VOS
35
100
80
300
110
400
ꢀV
Average Input Offset
Voltage Drift
TCVOS
IOS
0.2
50
50
0.6
0.5
80
80
2.0
0.6
80
80
2.0
ꢀV/°C
pA
Input Offset Current
Input Bias Current
Large Signal Voltage Gain
VCM = 0 V
VCM = 0 V
VO = 10 V
RL = 2 kΩ
450
450
750
750
750
750
IB
pA
AVO
1200
13
3200
13.5
130
1000
13
2500
13.5
130
800
13
2500
13.5
130
V/mV
V
Input Voltage Range1
VCM
Common-Mode Rejection
Power Supply Rejection
CMRR
PSRR
VCM
=
13
114
108
108
dB
VS = 2.5 V
to 20 V
114
13
0.15
13.4
550
108
13
0.15
13.4
550
108
13
0.3
dB
V
Output Voltage Swing
Supply Current per Amplifier
Supply Voltage
VO
ISY
VS
RL = 10 kΩ
No Load
13.4
550
750
20
750
20
750
20
ꢀA
V
Operating Range
2.5
2.5
2.5
1 Guaranteed by CMR test.
Rev. F | Page 3 of 16
OP297
ABSOLUTE MAXIMUM RATINGS
Table 3.
Parameter
Rating
20 V
20 V
40 V
Indefinite
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Supply Voltage
Input Voltage1
Differential Input Voltage1
Output Short-Circuit Duration
Storage Temperature Range
Z Package
−65°C to +175°C
−65°C to +150°C
P, S Packages
THERMAL RESISTANCE
Operating Temperature Range
OP297E (Z)
OP297F, OP297G (P, S)
Junction Temperature
Z Package
P, S Packages
Lead Temperature
(Soldering, 60 sec)
−40°C to +85°C
−40°C to +85°C
θJA is specified for worst-case mounting conditions, that is, θJA
is specified for device in socket for CERDIP and PDIP pack-
ages; θJA is specified for device soldered to printed circuit board
for the SOIC package.
−65°C to +175°C
−65°C to +150°C
300°C
Table 4. Thermal Resistance
Package Type
θJA
134
96
θJC
12
37
41
Unit
°C/W
°C/W
°C/W
8-Lead CERDIP (Z-Suffix)
8-Lead PDIP (P-Suffix)
8-Lead SOIC (S-Suffix)
1 For supply voltages less than 20 V, the absolute maximum input voltage is
equal to the supply voltage.
150
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
–
1/2
V
20V p-p @ 10Hz
1
OP297
+
2kΩ
50kΩ
50Ω
–
1/2
OP297
+
V
2
V
1
CHANNEL SEPARATION = 20 log
V /10000
2
Figure 4. Channel Separation Test Circuit
Rev. F | Page 4 of 16
OP297
TYPICAL PERFORMANCE CHARACTERISTICS
400
60
40
V
V
= ±15V
1200 UNITS
T
V
V
= 25°C
= ±15V
S
A
= 0V
CM
S
= 0V
CM
300
200
20
I
–
B
0
I
+
B
–20
–40
–60
I
100
0
OS
–100 –80 –60 –40 –20
0
20
40
60
80 100
–75
–50
–25
0
25
50
75
100
125
INPUT OFFSET VOLTAGE (pA)
TEMPERATURE (°C)
Figure 5. Typical Distribution of Input Offset Voltage
Figure 8. Input Bias, Offset Current vs. Temperature
250
200
60
40
20
0
1200 UNITS
T
V
V
= 25°C
= ±15V
V
= ±15V
= 0V
A
S
V
S
CM
= 0V
CM
I
I
–
+
B
150
100
50
B
I
OS
–20
–40
0
–100 –80 –60 –40 –20
0
20
40
60
80 100
–15
–10
–5
0
5
10
15
INPUT OFFSET VOLTAGE (pA)
COMMON-MODE VOLTAGE (V)
Figure 6. Typical Distribution of Input Bias Current
Figure 9. Input Bias, Offset Current vs. Common-Mode Voltage
400
±3
T
V
V
= 25°C
= ±15V
A
T
V
V
= 25°C
= ±15V
1200 UNITS
A
S
S
= 0V
CM
= 0V
CM
300
200
100
0
±2
±1
0
–100 –80 –60 –40 –20
0
20
40
60
80 100
0
1
2
3
4
5
INPUT OFFSET VOLTAGE (pA)
TIME AFTER POWER APPLIED (Minutes)
Figure 7. Typical Distribution of Input Offset Current
Figure 10. Input Offset Voltage Warm-Up Drift
Rev. F | Page 5 of 16
OP297
10000
1300
1200
1100
1000
900
BALANCED OR UNBALANCED
NO LOAD
V
= ±15V
S
V
= 0V
CM
T
= +125°C
A
1000
100
T
= +25°C
= –55°C
A
T
A
–55°C ≤ T ≤ +125°C
A
T
= +25°C
100
A
800
10
10
0
±5
±10
SUPPLY VOLTAGE (V)
±15
±20
1k
10k
100k
1M
10M
100M
4
SOURCE RESISTANCE (Ω)
Figure 14. Total Supply Current vs. Supply Voltage
Figure 11. Effective Offset Voltage vs. Source Resistance
100
160
140
120
100
BALANCED OR UNBALANCED
V
V
T
V
= 25°C
= ±15V
A
= ±15V
S
S
= 0V
CM
10
1
80
60
40
0.1
100
1k
10k
100k
1M
10M
1
10
100
1k
10k
100k
1M
FREQUENCY (Hz)
SOURCE RESISTANCE (Ω)
Figure 15. Common-Mode Rejection Frequency
Figure 12. Effective TCVOS vs. Source Resistance
160
140
120
100
35
30
25
20
15
10
T
= 25°C
= ±15V
A
T
= –55°C
A
V
S
ΔV = 10V p-p
S
T
= +25°C
A
T
= +125°C
A
V
= ±15V
S
5
0
OUTPUT SHORTED
TO GROUND
–5
–10
–15
80
60
40
T
= +125°C
= +25°C
A
–20
–25
T
A
T
= –55°C
A
–30
–35
0.1
1
10
100
1k
10k
100k
1M
0
1
2
3
FREQUENCY (Hz)
TIME FROM OUTPUT SHORT (Minutes)
Figure 16. Power Supply Rejection vs. Frequency
Figure 13. Short-Circuit Current vs. Time, Temperature
Rev. F | Page 6 of 16
OP297
1000
100
1000
100
R
V
= 10kΩ
= ±15V
= 0V
T
V
= 25°C
= ±2V TO ±15V
L
A
S
S
V
CM
T
= +125°C
A
CURRENT
NOISE
T
= +25°C
= –55°C
A
0
T
A
VOLTAGE
NOISE
10
10
1
1000
1
–15
–10
–5
0
5
10
15
1
10
100
FREQUENCY (Hz)
OUTPUT VOLTAGE (V)
Figure 17. Voltage Noise Density and Current Noise Density vs. Frequency
Figure 20. Differential Input Voltage vs. Output Voltage
10
35
30
25
T
V
= 25°C
= ±2V TO ±20V
T
= 25°C
V = ±15V
S
A
A
S
A
= +1
VCL
1% THD
fO = 1kHz
1
10Hz
1kHz
20
15
10
5
0.1
1kHz
10Hz
0.01
10
0
10
2
3
4
5
6
7
10
100
1k
10k
10
10
10
10
LOAD RESISTANCE (Ω)
SOURCE RESISTANCE (Ω)
Figure 21. Output Swing vs. Load Resistance
Figure 18. Total Noise Density vs. Source Resistance
10000
35
30
25
20
15
10
5
V
V
= ±15V
= ±10V
S
T
V
A
= 25°C
= ±15V
T
= –55°C
A
A
O
S
T
= +25°C
A
= +1
VCL
1% THD
fO = 1kHz
R
= 10kΩ
L
T
= +125°C
A
1000
0
100
100
1k
10k
FREQUENCY (Hz)
100k
1
2
3
4
5
6
7
8
9 10
20
LOAD RESISTANCE (kΩ)
Figure 22. Maximum Output Swing vs. Frequency
Figure 19. Open-Loop Gain vs. Load Resistance
Rev. F | Page 7 of 16
OP297
1000
100
100
T
A
= 25°C
= ±15V
V
C
R
= ±15V
= 30pF
= 1MΩ
S
V
S
L
L
80
GAIN
60
10
1
PHASE
40
20
0
T
= –55°C
A
0.1
0.01
0.001
–20
–40
T
= +125°C
1M
A
10
100
1k
10k
100k
1M
100
1k
10k
100k
10M
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 23. Open-Loop Gain, Phase vs. Frequency
Figure 25. Open-Loop Output Impedance vs. Frequency
70
60
T
V
A
V
= 25°C
= ±15V
A
S
= +1
VCL
OUT
= 100mV p-p
–EDGE
50
40
+EDGE
30
20
10
0
0
100
1000
10000
LOAD CAPACITANCE (pF)
Figure 24. Small Signal Overshoot vs. Load Capacitance
Rev. F | Page 8 of 16
OP297
APPLICATIONS INFORMATION
Extremely low bias current over a wide temperature range
makes the OP297 attractive for use in sample-and-hold
amplifiers, peak detectors, and log amplifiers that must operate
over a wide temperature range. Balancing input resistances is
unnecessary with the OP297. Offset voltage and TCVOS are
degraded only minimally by high source resistance, even
when unbalanced.
100
90
The input pins of the OP297 are protected against large differen-
tial voltage by back-to-back diodes and current-limiting resistors.
Common-mode voltages at the inputs are not restricted and can
vary over the full range of the supply voltages used.
10
0%
20mV
5µs
Figure 28. Large Signal Transient Response (AVCL = 1)
The OP297 requires very little operating headroom about the
supply rails and is specified for operation with supplies as low as
2 V. Typically, the common-mode range extends to within 1 V
of either rail. The output typically swings to within 1 V of the
rails when using a 10 kΩ load.
UNITY-GAIN FOLLOWER
NONINVERTING AMPLIFIER
–
–
AC PERFORMANCE
1/2
1/2
OP297
+
OP297
+
The ac characteristics of the OP297 are highly stable over its full
operating temperature range. Unity gain small signal response is
shown in Figure 26. Extremely tolerant of capacitive loading on
the output, the OP297 displays excellent response with 1000 pF
loads (see Figure 27).
MINI-DIP
BOTTOM VIEW
INVERTING AMPLIFIER
8
1
100
90
A
–
1/2
B
OP297
+
Figure 29. Guard Ring Layout and Considerations
10
0%
GUARDING AND SHIELDING
20mV
5µs
To maintain the extremely high input impedances of the
OP297, care is taken in circuit board layout and manufacturing.
Board surfaces must be kept scrupulously clean and free of
moisture. Conformal coating is recommended to provide a
humidity barrier. Even a clean PC board can have 100 pA of
leakage currents between adjacent traces, so guard rings should
be used around the inputs. Guard traces operate at a voltage
close to that on the inputs, as shown in Figure 29, to minimize
leakage currents. In noninverting applications, the guard ring
should be connected to the common-mode voltage at the
inverting input. In inverting applications, both inputs remain at
ground, so the guard trace should be grounded. Guard traces
should be placed on both sides of the circuit board.
Figure 26. Small Signal Transient Response (CLOAD = 100 pF, AVCL = 1)
100
90
10
0%
20mV
5µs
Figure 27. Small Signal Transient Response (CLOAD = 1000 pF, AVCL = 1)
Rev. F | Page 9 of 16
OP297
R
= 10kΩ
= ±15V
= 0V
L
S
OPEN-LOOP GAIN LINEARITY
V
V
The OP297 has both an extremely high gain of 2000 V/mV
minimum and constant gain linearity. This enhances the
precision of the OP297 and provides for very high accuracy in
high closed-loop gain applications. Figure 30 illustrates the
typical open-loop gain linearity of the OP297 over the military
temperature range.
CM
T
= +125°C
A
T
= +25°C
= –55°C
A
0
T
A
–15
–10
–5
0
5
10
15
OUTPUT VOLTAGE (V)
Figure 30. Open-Loop Linearity of the OP297
Rev. F | Page 10 of 16
OP297
APPLICATIONS
PRECISION ABSOLUTE VALUE AMPLIFIER
PRECISION POSITIVE PEAK DETECTOR
The circuit in Figure 31 is a precision absolute value amplifier
with an input impedance of 30 Mꢀ. The high gain and low
TCVOS of the OP297 ensure accurate operation with microvolt
input signals. In this circuit, the input always appears as a
common-mode signal to the op amps. The CMR of the OP297
exceeds 120 dB, yielding an error of less than 2 ppm.
In Figure 33, the CH must be of polystyrene, Teflon®, or
polyethylene to minimize dielectric absorption and leakage.
The droop rate is determined by the size of CH and the bias
current of the OP297.
1kΩ
+15V
+15V
C2
1N4148
0.1µF
2
3
0.1µF
–
1/2
1
6
5
–
R1
1kΩ
R3
1kΩ
OP297
+
1/2
7
1kΩ
V
V
OUT
IN
OP297
+
1kΩ
0.1µF
C
H
C1
5
D1
RESET
–
30pF
1kΩ
1N4148
7
1/2
OP297
+
8
2N930
2
3
–
–15V
1/2
OP297
+
0V < V
< 10V
1
6
OUT
D2
1N4148
Figure 33. Precision Positive Peak Detector
V
IN
R2
2kΩ
C3
0.1µF
4
SIMPLE BRIDGE CONDITIONING AMPLIFIER
Figure 34 shows a simple bridge conditioning amplifier using
the OP297. The transfer function is
–15V
Figure 31. Precision Absolute Value Amplifier
R
R
ΔR
R + ΔR
⎛
⎜
⎝
⎞
⎟
⎠
F
VOUT =VREF
PRECISION CURRENT PUMP
Maximum output current of the precision current pump shown
in Figure 32 is 10 mA. Voltage compliance is 10 V with
15 V supplies. Output impedance of the current transmitter
exceeds 3 MΩ with linearity better than 16 bits.
The REF43 provides an accurate and stable reference voltage for
the bridge. To maintain the highest circuit accuracy, RF should
be 0.1% or better with a low temperature coefficient.
15V
R3
10kΩ
R
F
V
REF
R1
10kΩ
REF43
4
2
3
R6
10kΩ
–
2
3
1/2
I
OUT
10mA
1
–
R2
10kΩ
V
IN
OP297
+
1/2
1
V
OUT
R + ΔR
OP297
+
+15V
8
5
6
+
R4
10kΩ
7
1/2
OP297
8
6
–
R
–
ΔR
R + ΔR
F
1/2
OP297
7
V
= V
REF
OUT
R
5
+
4
V
V
IN
IN
I
=
=
= 10mA/V
OUT
R5
100Ω
–15V
Figure 34. A Simple Bridge Condition Amplifier Using the OP297
Figure 32. Precision Current Pump
Rev. F | Page 11 of 16
OP297
R2
33kΩ
NONLINEAR CIRCUITS
C2
100pF
Due to its low input bias currents, the OP297 is an ideal log
amplifier in nonlinear circuits such as the square and square
root circuits shown in Figure 35 and Figure 36. Using the
squaring circuit of Figure 35 as an example, the analysis begins
by writing a voltage loop equation across Transistor Q1,
Transistor Q2, Transistor Q3, and Transistor Q4.
6
–
1/2
OP297
+
7
V
OUT
I
O
5
I
REF
MAT04E
1
3
Q1
6
⎛
⎜
⎜
⎝
⎞
⎟
⎟
⎠
⎛
⎜
⎜
⎝
⎞
⎟
⎟
⎠
⎛
⎜
⎜
⎝
⎞
⎟
⎟
⎠
⎛
⎜
⎜
⎝
⎞
⎟
⎟
⎠
IIN
IS1
IIN
IS2
IO
IS3
IREF
IS4
14
Q4
12
13
C1
100pF
VT1ln
+VT2ln
=VT3ln
+VT 4ln
7
8
Q3
10
9
Q2
V+
All the transistors of the MAT04 are precisely matched and at
the same temperature, so the IS and VT terms cancel, where
5
R1
33kΩ
8
2
R3
50kΩ
V
–
IN
1/2
1
2 ln IIN = ln IO + ln IREF = ln (IO × IREF
)
OP297
+
R4
50kΩ
3
4
Exponentiating both sides of the equation leads to
–15V
V–
2
(
IIN
IREF
)
Figure 36. Square Root Amplifier
IO
=
In these circuits, IREF is a function of the negative power supply.
To maintain accuracy, the negative supply should be well regu-
lated. For applications where very high accuracy is required, a
Op Amp A2 forms a current-to-voltage converter, which gives
VOUT = R2 × IO. Substituting (VIN/R1) for IIN and the above
equation for IO yields
voltage reference can be used to set IREF
.
2
⎛
⎜
⎜
⎝
⎞
⎛
⎟
⎜
⎟
⎝
⎠
V
R1
An important consideration for the squaring circuit is that a
sufficiently large input voltage can force the output beyond the
operating range of the output op amp. Resistor R4 can be
changed to scale IREF or R1; R2 can be varied to keep the output
voltage within the usable range.
R2
IREF
⎞
⎟
⎠
IN
VOUT
=
A similar analysis made for the square root circuit of Figure 36
leads to its transfer function
(
VIN )(IREF
)
Unadjusted accuracy of the square root circuit is better than
0.1% over an input voltage range of 100 mV to 10 V. For a
similar input voltage range, the accuracy of the squaring circuit
is better than 0.5%.
VOUT = R2
R1
C2
100pF
R2
33kΩ
6
–
1/2
OP297
+
7
V
OUT
I
O
5
1
Q1
2
7
Q2
3
6
5
MAT04E
14
13
8
I
Q4
12
REF
9
C1
100pF
Q3
10
V+
R1
33kΩ
8
2
R3
50kΩ
–
V
IN
1/2
OP297
1
R4
50kΩ
3
+
4
–15V
V–
Figure 35. Squaring Amplifier
Rev. F | Page 12 of 16
OP297
OUTLINE DIMENSIONS
0.400 (10.16)
0.365 (9.27)
0.355 (9.02)
8
1
5
4
0.280 (7.11)
0.250 (6.35)
0.240 (6.10)
0.005 (0.13)
MIN
0.055 (1.40)
MAX
0.325 (8.26)
0.310 (7.87)
0.300 (7.62)
8
5
PIN 1
0.100 (2.54)
0.310 (7.87)
0.220 (5.59)
BSC
0.060 (1.52)
MAX
0.195 (4.95)
0.130 (3.30)
0.115 (2.92)
0.210
(5.33)
MAX
1
4
0.015
(0.38)
MIN
0.150 (3.81)
0.100 (2.54) BSC
0.405 (10.29) MAX
0.015 (0.38)
GAUGE
0.130 (3.30)
0.115 (2.92)
0.014 (0.36)
0.010 (0.25)
0.008 (0.20)
PLANE
0.320 (8.13)
0.290 (7.37)
SEATING
PLANE
0.022 (0.56)
0.060 (1.52)
0.015 (0.38)
0.200 (5.08)
MAX
0.430 (10.92)
MAX
0.005 (0.13)
MIN
0.018 (0.46)
0.014 (0.36)
0.150 (3.81)
MIN
0.200 (5.08)
0.125 (3.18)
0.070 (1.78)
0.060 (1.52)
0.045 (1.14)
0.015 (0.38)
0.008 (0.20)
SEATING
PLANE
0.023 (0.58)
0.014 (0.36)
15°
0°
0.070 (1.78)
0.030 (0.76)
COMPLIANT TO JEDEC STANDARDS MS-001-BA
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
CORNER LEADS MAY BE CONFIGURED AS WHOLE OR HALF LEADS.
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
Figure 37. 8-Lead Plastic Dual In-Line Package [PDIP]
P-Suffix (N-8)
Figure 38. 8-Lead Ceramic Dual In-Line Package [CERDIP]
Z-Suffix (Q-8)
Dimensions shown in inches and (millimeters)
Dimensions shown in inches and (millimeters)
5.00 (0.1968)
4.80 (0.1890)
8
1
5
4
6.20 (0.2440)
5.80 (0.2284)
4.00 (0.1574)
3.80 (0.1497)
1.27 (0.0500)
BSC
0.50 (0.0196)
× 45°
1.75 (0.0688)
1.35 (0.0532)
0.25 (0.0099)
0.25 (0.0098)
0.10 (0.0040)
8°
0.51 (0.0201)
0.31 (0.0122)
0° 1.27 (0.0500)
COPLANARITY
0.10
0.25 (0.0098)
0.17 (0.0067)
SEATING
PLANE
0.40 (0.0157)
COMPLIANT TO JEDEC STANDARDS MS-012-AA
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
Figure 39. 8-Lead Standard Small Outline Package (SOIC)
Narrow Body
S-Suffix (R-8)
Dimensions shown in millimeters and (inches)
Rev. F | Page 13 of 16
OP297
ORDERING GUIDE
Model
Temperature Range
Package Description
Package Options
OP297EZ
−40°C to +85°C
8-Lead CERDIP
Q-8
OP297FP
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
8-Lead PDIP
8-Lead PDIP
8-Lead SOIC
8-Lead SOIC
8-Lead SOIC
8-Lead SOIC
8-Lead SOIC
8-Lead SOIC
8-Lead PDIP
8-Lead PDIP
8-Lead SOIC
8-Lead SOIC
8-Lead SOIC
N-8
N-8
R-8
R-8
R-8
R-8
R-8
R-8
N-8
N-8
R-8
R-8
R-8
OP297FPZ1
OP297FS
OP297FS-REEL
OP297FS-REEL7
OP297FSZ1
OP297FSZ-REEL1
OP297FSZ-REEL71
OP297GP
OP297GPZ1
OP297GS
OP297GS-REEL
OP297GS-REEL7
OP297GSZ1
OP297GSZ-REEL1
OP297GSZ-REEL71
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
8-Lead SOIC
8-Lead SOIC
8-Lead SOIC
R-8
R-8
R-8
1 Z = PB-free part.
Rev. F | Page 14 of 16
OP297
NOTES
Rev. F | Page 15 of 16
OP297
NOTES
©2006 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
C00300-0-2/06(F)
Rev. F | Page 16 of 16
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