OP297RC [ADI]
IC DUAL OP-AMP, 25 uV OFFSET-MAX, CQCC20, Operational Amplifier;
| 型号： | OP297RC |
| 厂家： | 
ADI |
| 描述： | IC DUAL OP-AMP, 25 uV OFFSET-MAX, CQCC20, Operational Amplifier 放大器 |
| 文件： | 总16页 (文件大小：261K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Dual Low Bias Current
Precision Operational Amplifier
OP297
FEATURES
PIN CONFIGURATION
Low offset voltage: 50 μV maximum
1
2
3
4
8
7
6
5
V+
OUTA
–INA
+INA
V–
Low offset voltage drift: 0.6 μV/°C maximum
Very low bias current: 100 pA maximum
Very high open-loop gain: 2000 V/mV minimum
Low supply current (per amplifier): 625 μA maximum
Operates from 2 V to 20 V supplies
OUTB
–INB
+INB
A
B
Figure 1.
High common-mode rejection: 120 dB minimum
60
40
APPLICATIONS
V
V
= ±15V
S
= 0V
CM
Strain gage and bridge amplifiers
High stability thermocouple amplifiers
Instrumentation amplifiers
Photocurrent monitors
20
I
–
B
High gain linearity amplifiers
Long-term integrators/filters
Sample-and-hold amplifiers
Peak detectors
Logarithmic amplifiers
Battery-powered systems
0
I
+
B
–20
–40
–60
I
OS
GENERAL DESCRIPTION
–75
–50
–25
0
25
50
75
100
125
TEMPERATURE (°C)
The OP297 is the first dual op amp to pack precision perform-
ance into the space saving, industry-standard 8-lead SOIC
package. The combination of precision with low power and
extremely low input bias current makes the dual OP297 useful
in a wide variety of applications.
Figure 2. Low Bias Current over Temperature
400
300
200
100
0
1200 UNITS
T
V
V
= 25°C
A
= ±15V
= 0V
S
Precision performance of the OP297 includes very low offset
(less than 50 μV) and low drift (less than 0.6 μV/°C). Open-
loop gain exceeds 2000 V/mV, ensuring high linearity in every
application.
CM
Errors due to common-mode signals are eliminated by the
common-mode rejection of over 120 dB, which minimizes
offset voltage changes experienced in battery-powered systems.
The supply current of the OP297 is under 625 μA.
The OP297 uses a super-beta input stage with bias current
cancellation to maintain picoamp bias currents at all tempera-
tures. This is in contrast to FET input op amps whose bias
currents start in the picoamp range at 25°C, but double for
every 10°C rise in temperature, to reach the nanoamp range
above 85°C. Input bias current of the OP297 is under 100 pA at
25°C and is under 450 pA over the military temperature range
per amplifier. This part can operate with supply voltages as low
as 2 V.
–100 –80 –60 –40 –20
0
20
40
60
80 100
INPUT OFFSET VOLTAGE (µV)
Figure 3. Very Low Offset
Combining precision, low power, and low bias current, the
OP297 is ideal for a number of applications, including instru-
mentation amplifiers, log amplifiers, photodiode preamplifiers,
and long term integrators. For a single device, see the OP97; for
a quad device, see the OP497.
Rev. G
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registeredtrademarks arethe property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
www.analog.com
©2008 Analog Devices, Inc. All rights reserved.
OP297
TABLE OF CONTENTS
Features .............................................................................................. 1
AC Performance ............................................................................9
Guarding and Shielding................................................................9
Open-Loop Gain Linearity ....................................................... 10
Application Circuits ....................................................................... 11
Precision Absolute Value Amplifier......................................... 11
Precision Current Pump............................................................ 11
Precision Positive Peak Detector.............................................. 11
Simple Bridge Conditioning Amplifier................................... 11
Nonlinear Circuits...................................................................... 12
Outline Dimensions....................................................................... 13
Ordering Guide .......................................................................... 14
Applications....................................................................................... 1
General Description......................................................................... 1
Pin Configuration............................................................................. 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Electrical Characteristics............................................................. 3
Absolute Maximum Ratings............................................................ 4
Thermal Resistance ...................................................................... 4
ESD Caution.................................................................................. 4
Typical Performance Characteristics ............................................. 5
Applications Information ................................................................ 9
REVISION HISTORY
4/08—Rev. F to Rev. G
10/02—Rev. C to Rev. D
Changes to Table 2 Conditions....................................................... 3
Changes to Table 2 Power Supply Rejection Parameter .............. 3
Changes to Figure 5, Figure 6, Figure 7 ......................................... 5
Changes to Figure 16........................................................................ 6
Updated Outline Dimensions....................................................... 13
Changes to Ordering Guide .......................................................... 14
Edits to Figure 16...............................................................................6
10/02—Rev. B to Rev. C
Edits to Specifications.......................................................................2
Deleted Wafer Test Limits ................................................................3
Deleted Dice Characteristics............................................................3
Deleted Absolute Maximum Ratings..............................................4
Edits to Ordering Guide ...................................................................4
Updated Outline Dimensions....................................................... 12
2/06—Rev. E to Rev. F
Updated Format..................................................................Universal
Changes to Features.......................................................................... 1
Deleted OP297 Spice Macro Model Section ................................. 9
Updated Outline Dimensions....................................................... 13
Changes to Ordering Guide .......................................................... 14
7/03—Rev. D to Rev. E
Changes to TPCs 13 and 16 ............................................................ 4
Edits to Figures 12 and 14 ............................................................... 8
Changes to Nonlinear Circuits Section ......................................... 8
Rev. G | Page 2 of 16
OP297
SPECIFICATIONS
ELECTRICAL CHARACTERISTICS
@ VS = 15 V, TA = 25°C, unless otherwise noted.
Table 1.
OP297E
Typ
OP297F
Typ
OP297G
Typ
Parameter
Symbol Conditions
Min
Max
Min
Max
Min
Max
Unit
Input Offset Voltage
VOS
25
50
50
100
80
200
μV
Long-Term Input Voltage
Stability
0.1
0.1
0.1
μV/month
Input Offset Current
Input Bias Current
Input Noise Voltage
IOS
IB
en p-p
VCM = 0 V
VCM = 0 V
0.1 Hz to 10 Hz
fOUT = 10 Hz
fOUT = 1000 Hz
fOUT = 10 Hz
20
100
100
35
150
150
50
200
200 pA
pA
+20
0.5
20
17
20
+35
0.5
20
17
20
+50
0.5
20
17
20
ꢀV p-p
nV/√Hz
nV/√Hz
fA/√Hz
Input Noise Voltage Density en
Input Noise Current Density in
Input Resistance
Differential Mode
Common-Mode
Large Signal Voltage Gain
RIN
RINCM
AVO
30
500
4000
30
500
1500 3200
30
500
1200 3200
MΩ
GΩ
V/mV
VOUT
=
10 Vꢁ
2000
RL = 2 kΩ
Input Voltage Range1
VCM
13
120
120
14
140
130
13
114
114
14
135
125
13
114
114
14
135
125
V
dB
dB
Common-Mode Rejection
Power Supply Rejection
CMRR
PSRR
VCM
VS = 2 V to
20 V
=
13 V
Output Voltage Swing
VOUT
RL = 10 kΩ
RL = 2 kΩ
No load
13
13
14
13.7
525
13
13
14
13.7
525
13
13
14
13.7
525
V
V
μA
V
Supply Current per Amplifier
Supply Voltage
ISY
VS
625
20
625
20
625
20
Operating range
2
2
2
Slew Rate
Gain Bandwidth Product
Channel Separation
SR
GBWP
CS
0.05
0.15
500
150
0.05
0.15
500
150
0.05
0.15
500
150
V/μs
kHz
dB
AV = +1
VOUT = 20 V p-pꢁ
fOUT = 10 Hz
Input Capacitance
CIN
3
3
3
pF
1 Guaranteed by CMR test.
@ VS = 15 V, −40°C ≤ TA ≤ +85°C, unless otherwise noted.
Table 2.
OP297E
Typ
35
0.2
50
OP297F
Typ
80
0.5
80
OP297G
Min Typ
Parameter
Symbol Conditions
Min
Max
Min
Max
Max
Unit
Input Offset Voltage
Average Input Offset Voltage Drift TCVOS
Input Offset Current
Input Bias Current
Large Signal Voltage Gain
VOS
100
0.6
450
300
2.0
750
110
0.6
80
400
2.0
750
ꢀV
ꢀV/°C
pA
IOS
IB
AVO
VCM = 0 V
VCM = 0 V
+50
1200 3200
450
+80
1000 2500
750
+80
2500
750 pA
VOUT
=
10 Vꢁ
800
V/mV
RL = 2 kΩ
Input Voltage Range1
VCM
13
114
114
13.5
130
13
108
108
13.5
130
13
108
108
13.5
130
V
dB
dB
Common-Mode Rejection
Power Supply Rejection
CMRR
PSRR
VCM
=
13
VS = 2.5 V to
20 V
Output Voltage Swing
Supply Current per Amplifier
Supply Voltage
VOUT
ISY
VS
RL = 10 kΩ
No load
Operating range
13
13.4
550
13
13.4
550
13
13.4
550
V
ꢀA
V
750
20
750
20
750
20
2.5
2.5
2.5
1 Guaranteed by CMR test.
Rev. G | Page 3 of 16
OP297
ABSOLUTE MAXIMUM RATINGS
THERMAL RESISTANCE
Table 3.
θJA is specified for worst-case mounting conditions, that is, θJA
is specified for device in socket for CERDIP and PDIP pack-
ages; θJA is specified for device soldered to printed circuit board
for the SOIC package.
Parameter
Rating
Supply Voltage
Input Voltage1
Differential Input Voltage1
Output Short-Circuit Duration
Storage Temperature Range
Z-Suffix
P-Suffixꢁ S-Suffix
Operating Temperature Range
OP297E (Z-Suffix)
OP297Fꢁ OP297G (P-Suffixꢁ S-Suffix)
Junction Temperature
Z-Suffix
20 V
20 V
40 V
Indefinite
Table 4. Thermal Resistance
Package Type
θJA
134
96
θJC
12
37
41
Unit
°C/W
°C/W
°C/W
−65°C to +175°C
−65°C to +150°C
8-Lead CERDIP (Z-Suffix)
8-Lead PDIP (P-Suffix)
8-Lead SOIC (S-Suffix)
150
−40°C to +85°C
−40°C to +85°C
ESD CAUTION
−65°C to +175°C
−65°C to +150°C
300°C
P-Suffixꢁ S-Suffix
Lead Temperature (Solderingꢁ 60 sec)
1 For supply voltages less than 20 Vꢁ the absolute maximum input voltage is
equal to the supply voltage.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
–
1/2
V
20V p-p @ 10Hz
1
OP297
+
2kΩ
50kΩ
50Ω
–
1/2
OP297
+
V
2
V
1
CHANNEL SEPARATION = 20 log
V /10000
2
Figure 4. Channel Separation Test Circuit
Rev. G | Page 4 of 16
OP297
TYPICAL PERFORMANCE CHARACTERISTICS
400
60
40
V
V
= ±15V
1200 UNITS
T
V
V
= 25°C
= ±15V
S
A
= 0V
CM
S
= 0V
CM
300
200
20
I
–
B
0
I
+
B
–20
–40
–60
I
100
0
OS
–100 –80 –60 –40 –20
0
20
40
60
80 100
–75
–50
–25
0
25
50
75
100
125
INPUT OFFSET VOLTAGE (µV)
TEMPERATURE (°C)
Figure 5. Typical Distribution of Input Offset Voltage
Figure 8. Input Bias, Offset Current vs. Temperature
250
200
60
40
20
0
1200 UNITS
T
V
V
= 25°C
= ±15V
V
= ±15V
= 0V
A
S
V
S
CM
= 0V
CM
I
I
–
+
B
150
100
50
B
I
OS
–20
–40
0
–100 –80 –60 –40 –20
0
20
40
60
80 100
–15
–10
–5
0
5
10
15
INPUT BIAS CURRENT (pA)
COMMON-MODE VOLTAGE (V)
Figure 6. Typical Distribution of Input Bias Current
Figure 9. Input Bias, Offset Current vs. Common-Mode Voltage
400
±3
T
V
V
= 25°C
= ±15V
A
T
V
V
= 25°C
= ±15V
1200 UNITS
A
S
S
= 0V
CM
= 0V
CM
300
200
100
0
±2
±1
0
–100 –80 –60 –40 –20
0
20
40
60
80 100
0
1
2
3
4
5
INPUT OFFSET CURRENT (pA)
TIME AFTER POWER APPLIED (Minutes)
Figure 7. Typical Distribution of Input Offset Current
Figure 10. Input Offset Voltage Warm-Up Drift
Rev. G | Page 5 of 16
OP297
10k
1300
1200
1100
1000
900
BALANCED OR UNBALANCED
NO LOAD
V
= ±15V
S
V
= 0V
CM
T
= +125°C
A
1k
T
T
= +25°C
= –55°C
A
100
–55°C ≤ T ≤ +125°C
A
A
T
= +25°C
100
A
10
10
800
1k
10k
100k
1M
10M
100M
4
0
±5
±10
SUPPLY VOLTAGE (V)
±15
±20
SOURCE RESISTANCE (Ω)
Figure 14. Total Supply Current vs. Supply Voltage
Figure 11. Effective Offset Voltage vs. Source Resistance
100
160
140
120
100
BALANCED OR UNBALANCED
V
V
T
V
= 25°C
= ±15V
A
= ±15V
S
S
= 0V
CM
10
1
80
60
40
0.1
100
1k
10k
100k
1M
10M
1
10
100
1k
10k
100k
1M
FREQUENCY (Hz)
SOURCE RESISTANCE (Ω)
Figure 15. Common-Mode Rejection vs. Frequency
Figure 12. Effective TCVOS vs. Source Resistance
160
140
120
100
80
35
30
25
20
15
10
T
= 25°C
= ±15V
A
T
= –55°C
A
V
S
ΔV = 10V p-p
S
T
= +25°C
A
T
= +125°C
A
V
= ±15V
S
5
0
OUTPUT SHORTED
TO GROUND
–5
–10
–15
T
= +125°C
= +25°C
60
A
–20
–25
T
A
40
T
= –55°C
A
–30
–35
20
0.1
1
10
100
1k
10k
100k
1M
0
1
2
3
FREQUENCY (Hz)
TIME FROM OUTPUT SHORT (Minutes)
Figure 16. Power Supply Rejection vs. Frequency
Figure 13. Short-Circuit Current vs. Time, Temperature
Rev. G | Page 6 of 16
OP297
1k
1k
R
V
= 10kΩ
= ±15V
T
V
= 25°C
= ±2V TO ±15V
L
A
S
S
V
= 0V
CM
T
= +125°C
A
100
100
CURRENT
NOISE
T
= +25°C
= –55°C
A
0
T
A
VOLTAGE
NOISE
10
10
1
1k
1
–15
–10
–5
0
5
10
15
1
10
100
FREQUENCY (Hz)
OUTPUT VOLTAGE (V)
Figure 17. Voltage Noise Density and Current Noise Density vs. Frequency
Figure 20. Differential Input Voltage vs. Output Voltage
35
30
25
10
T
V
A
= 25°C
= ±15V
A
T
V
= 25°C
= ±2V TO ±20V
A
S
S
= +1
VCL
1% THD
fOUT = 1kHz
1
10Hz
1kHz
20
15
10
5
0.1
1kHz
10Hz
0
0.01
100
10
100
1k
10k
1k
10k
100k
1M
10M
LOAD RESISTANCE (Ω)
SOURCE RESISTANCE (Ω)
Figure 21. Output Swing vs. Load Resistance
Figure 18. Total Noise Density vs. Source Resistance
35
30
25
20
15
10
5
10k
T
V
A
= 25°C
= ±15V
= +1
A
V
V
= ±15V
S
T
= –55°C
A
S
= ±10V
OUT
T
= +25°C
A
VCL
1% THD
fOUT = 1kHz
= 10kΩ
R
L
T
= +125°C
A
1k
0
100
100
1k
10k
FREQUENCY (Hz)
100k
1
2
3
4
5
6
7
8
9 10
20
LOAD RESISTANCE (kΩ)
Figure 22. Maximum Output Swing vs. Frequency
Figure 19. Open-Loop Gain vs. Load Resistance
Rev. G | Page 7 of 16
OP297
1k
100
T
V
= 25°C
= ±15V
S
A
V
C
R
= ±15V
= 30pF
= 1MΩ
S
L
L
80
100
GAIN
60
10
1
PHASE
40
20
0
90
T
= –55°C
A
135
180
0.1
0.01
0.001
–20
–40
225
270
T
= +125°C
1M
A
10
100
1k
10k
100k
1M
100
1k
10k
100k
10M
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 23. Open-Loop Gain, Phase vs. Frequency
Figure 25. Open-Loop Output Impedance vs. Frequency
70
60
T
V
A
V
= 25°C
= ±15V
A
S
= +1
VCL
OUT
= 100mV p-p
–EDGE
50
40
+EDGE
30
20
10
0
10
100
1k
10k
LOAD CAPACITANCE (pF)
Figure 24. Small Signal Overshoot vs. Load Capacitance
Rev. G | Page 8 of 16
OP297
APPLICATIONS INFORMATION
Extremely low bias current over a wide temperature range
makes the OP297 attractive for use in sample-and-hold
amplifiers, peak detectors, and log amplifiers that must operate
over a wide temperature range. Balancing input resistances is
unnecessary with the OP297. Offset voltage and TCVOS are
degraded only minimally by high source resistance, even
when unbalanced.
100
90
The input pins of the OP297 are protected against large differen-
tial voltage by back-to-back diodes and current-limiting resistors.
Common-mode voltages at the inputs are not restricted and can
vary over the full range of the supply voltages used.
10
0%
20mV
5µs
The OP297 requires very little operating headroom about the
supply rails and is specified for operation with supplies as low as
2 V. Typically, the common-mode range extends to within 1 V
of either rail. The output typically swings to within 1 V of the
rails when using a 10 kΩ load.
Figure 28. Large Signal Transient Response (AVCL = +1)
GUARDING AND SHIELDING
To maintain the extremely high input impedances of the OP297,
care is taken in circuit board layout and manufacturing. Board
surfaces must be kept scrupulously clean and free of moisture.
Conformal coating is recommended to provide a humidity
barrier. Even a clean PCB can have 100 pA of leakage currents
between adjacent traces, therefore guard rings should be used
around the inputs. Guard traces operate at a voltage close to that
on the inputs, as shown in Figure 29, to minimize leakage
currents. In noninverting applications, the guard ring should be
connected to the common-mode voltage at the inverting input.
In inverting applications, both inputs remain at ground, so the
guard trace should be grounded. Guard traces should be placed
on both sides of the circuit board.
AC PERFORMANCE
The ac characteristics of the OP297 are highly stable over its full
operating temperature range. Unity gain small signal response is
shown in Figure 26. Extremely tolerant of capacitive loading on
the output, the OP297 displays excellent response with 1000 pF
loads (see Figure 27).
100
90
UNITY-GAIN FOLLOWER
NONINVERTING AMPLIFIER
10
–
–
1/2
1/2
0%
OP297
+
OP297
+
20mV
5µs
Figure 26. Small Signal Transient Response (CL = 100 pF, AVCL = +1)
MINI-DIP
BOTTOM VIEW
INVERTING AMPLIFIER
8
1
100
90
A
–
1/2
B
OP297
+
Figure 29. Guard Ring Layout and Considerations
10
0%
20mV
5µs
Figure 27. Small Signal Transient Response (CL = 1000 pF, AVCL = +1)
Rev. G | Page 9 of 16
OP297
OPEN-LOOP GAIN LINEARITY
R
= 10kΩ
= ±15V
= 0V
L
V
V
S
The OP297 has both an extremely high gain of 2000 V/mV
minimum and constant gain linearity. This enhances the
precision of the OP297 and provides for very high accuracy in
high closed-loop gain applications. Figure 30 illustrates the
typical open-loop gain linearity of the OP297 over the military
temperature range.
CM
T
= +125°C
A
T
= +25°C
= –55°C
A
0
T
A
–15
–10
–5
0
5
10
15
OUTPUT VOLTAGE (V)
Figure 30. Open-Loop Linearity of the OP297
Rev. G | Page 10 of 16
OP297
APPLICATION CIRCUITS
PRECISION ABSOLUTE VALUE AMPLIFIER
PRECISION POSITIVE PEAK DETECTOR
The circuit in Figure 31 is a precision absolute value amplifier
with an input impedance of 30 Mꢀ. The high gain and low
TCVOS of the OP297 ensure accurate operation with microvolt
input signals. In this circuit, the input always appears as a
common-mode signal to the op amps. The CMR of the OP297
exceeds 120 dB, yielding an error of less than 2 ppm.
In Figure 33, the CH must be of polystyrene, Teflon®, or
polyethylene to minimize dielectric absorption and leakage.
The droop rate is determined by the size of CH and the bias
current of the OP297.
1kΩ
+15V
+15V
1N4148
0.1µF
C2
0.1µF
2
3
–
1/2
1
6
5
–
R1
1kΩ
R3
1kΩ
OP297
+
1/2
7
1kΩ
V
V
OUT
IN
OP297
+
1kΩ
0.1µF
C
H
C1
30pF
5
D1
1N4148
RESET
–
1kΩ
7
1/2
8
2N930
2
3
–
–15V
OP297
+
1/2
OP297
+
0V < V
< 10V
1
6
OUT
D2
1N4148
Figure 33. Precision Positive Peak Detector
V
IN
R2
2kΩ
C3
0.1µF
SIMPLE BRIDGE CONDITIONING AMPLIFIER
4
Figure 34 shows a simple bridge conditioning amplifier using
the OP297. The transfer function is
–15V
Figure 31. Precision Absolute Value Amplifier
R
ΔR
⎛
⎜
⎝
⎞
⎟
⎠
F
VOUT =VREF
PRECISION CURRENT PUMP
R + ΔR
R
Maximum output current of the precision current pump shown
in Figure 32 is 10 mA. Voltage compliance is 10 V with
15 V supplies. Output impedance of the current transmitter
exceeds 3 MΩ with linearity better than 16 bits. R1 through R4
should be matched resistors.
The REF43 provides an accurate and stable reference voltage for
the bridge. To maintain the highest circuit accuracy, RF should
be 0.1% or better with a low temperature coefficient.
15V
R
F
R3
10kΩ
V
REF
REF43
4
2
3
R1
–
1/2
10kΩ
1
2
3
R5
100kΩ
V
–
OUT
R + ΔR
OP297
+
1/2
I
1
OUT
10mA MAX
R2
10kΩ
V
IN
OP297
+
+15V
8
V
V
IN
IN
100Ω
8
I
=
=
= 10mA/V
6
OUT
5
6
+
R5
–
R
R4
10kΩ
ΔR
R + ΔR
F
1/2
OP297
7
V
= V
REF
OUT
R
7
1/2
5
OP297
–
+
4
Figure 34. Simple Bridge Condition Amplifier Using the OP297
–15V
Figure 32. Precision Current Pump
Rev. G | Page 11 of 16
OP297
R2
33kΩ
NONLINEAR CIRCUITS
C2
100pF
Due to its low input bias currents, the OP297 is an ideal log
amplifier in nonlinear circuits such as the square and square
root circuits shown in Figure 35 and Figure 36. Using the
squaring circuit of Figure 35 as an example, the analysis begins
by writing a voltage loop equation across Transistor Q1,
Transistor Q2, Transistor Q3, and Transistor Q4.
6
–
1/2
OP297
+
7
V
OUT
I
OUT
5
I
REF
MAT04E
1
3
Q1
6
⎛
⎜
⎜
⎝
⎞
⎟
⎟
⎠
⎛
⎜
⎜
⎝
⎞
⎟
⎟
⎠
⎛
⎜
⎜
⎝
⎞
⎟
⎟
⎠
⎛
⎜
⎜
⎝
⎞
⎟
⎟
⎠
IOUT
IS3
IIN
IS1
IIN
IS2
IREF
IS4
14
Q4
12
VT1 ln
+VT2 ln
= VT3 ln
+VT4 ln
13
C1
100pF
7
8
Q3
10
9
Q2
All the transistors of the MAT04 are precisely matched and at
the same temperature, so the IS and VT terms cancel, where
V+
5
R1
33kΩ
8
2
R3
50kΩ
V
–
IN
1/2
2lnIIN = lnIOUT + lnIREF = ln(IOUT × IREF
)
1
OP297
+
R4
50kΩ
3
Exponentiating both sides of the equation leads to
4
2
–15V
(
IIN
)
V–
IOUT
=
Figure 36. Square Root Amplifier
IREF
Op Amp A2 forms a current-to-voltage converter, which gives
OUT = R2 × IOUT. Substituting (VIN/R1) for IIN and the previous
In these circuits, IREF is a function of the negative power supply.
To maintain accuracy, the negative supply should be well regu-
lated. For applications where very high accuracy is required, a
V
equation for IOUT yields
voltage reference can be used to set IREF
.
2
⎛
⎜
⎜
⎝
⎞
⎛
⎟
⎜
⎟
⎝
⎠
V
R1
R2
IREF
⎞
⎟
⎠
IN
An important consideration for the squaring circuit is that a
sufficiently large input voltage can force the output beyond the
operating range of the output op amp. Resistor R4 can be
changed to scale IREF or R1; R2 can be varied to keep the output
voltage within the usable range.
VOUT
=
A similar analysis made for the square root circuit of Figure 36
leads to its transfer function
(
VIN )(IREF
)
VOUT = R2
Unadjusted accuracy of the square root circuit is better than
0.1% over an input voltage range of 100 mV to 10 V. For a
similar input voltage range, the accuracy of the squaring circuit
is better than 0.5%.
R1
C2
100pF
R2
33kΩ
6
–
1/2
OP297
+
7
V
OUT
I
OUT
5
1
Q1
2
7
Q2
3
6
5
MAT04E
14
13
8
I
Q4
12
REF
9
C1
100pF
Q3
10
V+
R1
33kΩ
8
2
R3
50kΩ
–
V
IN
1/2
OP297
1
R4
50kΩ
3
+
4
–15V
V–
Figure 35. Squaring Amplifier
Rev. G | Page 12 of 16
OP297
OUTLINE DIMENSIONS
0.400 (10.16)
0.365 (9.27)
0.355 (9.02)
8
1
5
4
0.280 (7.11)
0.250 (6.35)
0.240 (6.10)
0.325 (8.26)
0.310 (7.87)
0.300 (7.62)
0.100 (2.54)
BSC
0.060 (1.52)
MAX
0.195 (4.95)
0.130 (3.30)
0.115 (2.92)
0.210 (5.33)
MAX
0.015
(0.38)
MIN
0.150 (3.81)
0.130 (3.30)
0.115 (2.92)
0.015 (0.38)
GAUGE
0.014 (0.36)
0.010 (0.25)
0.008 (0.20)
PLANE
SEATING
PLANE
0.022 (0.56)
0.018 (0.46)
0.014 (0.36)
0.430 (10.92)
MAX
0.005 (0.13)
MIN
0.070 (1.78)
0.060 (1.52)
0.045 (1.14)
COMPLIANT TO JEDEC STANDARDS MS-001
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
CORNER LEADS MAY BE CONFIGURED AS WHOLE OR HALF LEADS.
Figure 37. 8-Lead Plastic Dual In-Line Package [PDIP]
P-Suffix (N-8)
Dimensions shown in inches and (millimeters)
0.005 (0.13)
MIN
0.055 (1.40)
MAX
8
5
0.310 (7.87)
0.220 (5.59)
1
4
0.100 (2.54) BSC
0.405 (10.29) MAX
0.320 (8.13)
0.290 (7.37)
0.060 (1.52)
0.015 (0.38)
0.200 (5.08)
MAX
0.150 (3.81)
MIN
0.200 (5.08)
0.125 (3.18)
0.015 (0.38)
0.008 (0.20)
SEATING
PLANE
0.023 (0.58)
0.014 (0.36)
15°
0°
0.070 (1.78)
0.030 (0.76)
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
Figure 38. 8-Lead Ceramic Dual In-Line Package [CERDIP]
Z-Suffix (Q-8)
Dimensions shown in inches and (millimeters)
Rev. G | Page 13 of 16
OP297
5.00 (0.1968)
4.80 (0.1890)
8
1
5
4
6.20 (0.2441)
5.80 (0.2284)
4.00 (0.1574)
3.80 (0.1497)
0.50 (0.0196)
0.25 (0.0099)
1.27 (0.0500)
BSC
45°
1.75 (0.0688)
1.35 (0.0532)
0.25 (0.0098)
0.10 (0.0040)
8°
0°
0.51 (0.0201)
0.31 (0.0122)
COPLANARITY
0.10
1.27 (0.0500)
0.40 (0.0157)
0.25 (0.0098)
0.17 (0.0067)
SEATING
PLANE
COMPLIANT TO JEDEC STANDARDS MS-012-AA
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
Figure 39. 8-Lead Standard Small Outline Package [SOIC_N]
Narrow Body
S-Suffix (R-8)
Dimensions shown in millimeters and (inches)
ORDERING GUIDE
Model
OP297EZ
OP297FP
OP297FPZ1
Temperature Range
Package Description
8-Lead CERDIP
8-Lead PDIP
Package Options
Q-8 (Z-Suffix)
N-8 (P-Suffix)
N-8 (P-Suffix)
R-8 (S-Suffix)
R-8 (S-Suffix)
R-8 (S-Suffix)
R-8 (S-Suffix)
R-8 (S-Suffix)
R-8 (S-Suffix)
N-8 (P-Suffix)
N-8 (P-Suffix)
R-8 (S-Suffix)
R-8 (S-Suffix)
R-8 (S-Suffix)
R-8 (S-Suffix)
R-8 (S-Suffix)
R-8 (S-Suffix)
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
8-Lead PDIP
OP297FS
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead PDIP
OP297FS-REEL
OP297FS-REEL7
OP297FSZ1
OP297FSZ-REEL1
OP297FSZ-REEL71
OP297GP
OP297GPZ1
OP297GS
OP297GS-REEL
OP297GS-REEL7
OP297GSZ1
OP297GSZ-REEL1
OP297GSZ-REEL71
8-Lead PDIP
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N
1 Z = RoHS Compliant Part.
Rev. G | Page 14 of 16
OP297
NOTES
Rev. G | Page 15 of 16
OP297
NOTES
©2008 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D00300-0-4/08(G)
Rev. G | Page 16 of 16
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