OP470GS-REEL [ADI]
QUAD OP-AMP, 1500uV OFFSET-MAX, 6MHz BAND WIDTH, PDSO16, PLASTIC, SOIC-16;
| 型号： | OP470GS-REEL |
| 厂家： | 
ADI |
| 描述： | QUAD OP-AMP, 1500uV OFFSET-MAX, 6MHz BAND WIDTH, PDSO16, PLASTIC, SOIC-16 运算放大器 |
| 文件： | 总16页 (文件大小：921K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Very Low Noise Quad
Operational Amplifier
a
OP470
FEATURES
PIN CONNECTIONS
Very Low-Noise, 5 nV/÷Hz @ 1 kHz Max
Excellent Input Offset Voltage, 0.4 mV Max
Low Offset Voltage Drift, 2 ꢀV/ꢁC Max
Very High Gain, 1000 V/mV Min
Outstanding CMR, 110 dB Min
Slew Rate, 2 V/ꢀs Typ
Gain-Bandwidth Product, 6 MHz Typ
Industry Standard Quad Pinouts
Available in Die Form
14-Lead Hermetic DIP
16-Lead SOIC Package
(S-Suffix)
(Y-Suffix)
14-Lead Plastic DIP
(P-Suffix)
1
2
3
4
5
6
7
8
16
15
14
13
12
11
OUT A
–IN A
+IN A
V+
OUT D
–IN D
+IN D
V–
1
2
3
4
5
6
7
14 OUT D
13 –IN D
12 +IN D
11 V–
OUT A
–IN A
+IN A
V+
OP470
+IN B
–IN B
OUT B
NC
+IN C
–IN C
GENERAL DESCRIPTION
OP470
10 OUT C
NC
The OP470 is a high-performance monolithic quad operational
amplifier with exceptionally low voltage noise, 5 nV/÷Hz at
1 kHz max, offering comparable performance to ADI’s industry
standard OP27.
+IN B
–IN B
OUT B
10 +IN C
9
9
8
–IN C
OUT C
NC = NO CONNECT
The OP470 features an input offset voltage below 0.4 mV,
excellent for a quad op amp, and an offset drift under 2 mV/∞C,
guaranteed over the full military temperature range. Open loop
gain of the OP470 is over 1,000,000 into a 10 kW load ensuring
excellent gain accuracy and linearity, even in high gain applica-
tions. Input bias current is under 25 nA, which reduces errors
due to signal source resistance. The OP470’s CMR of over 110
dB and PSRR of less than 1.8 mV/V significantly reduce errors
due to ground noise and power supply fluctuations. Power
consumption of the quad OP470 is half that of four OP27s, a
significant advantage for power conscious applications. The
OP470 is unity-gain stable with a gain bandwidth product of
6 MHz and a slew rate of 2 V/ms.
The OP470 offers excellent amplifier matching which is impor-
tant for applications such as multiple gain blocks, low noise
instrumentation amplifiers, quad buffers, and low noise active
filters.
The OP470 conforms to the industry standard 14-lead DIP
pinout. It is pin compatible with the LM148/149, HA4741,
HA5104, and RM4156 quad op amps and can be used to up-
grade systems using these devices.
For higher speed applications, the OP471, with a slew rate of 8
V/ms, is recommended.
SIMPLIFIED SCHEMATIC
V+
BIAS
+IN
–IN
V–
REV. B
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, norforanyinfringementsofpatentsorotherrightsofthirdpartiesthat
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
Fax: 781/326-8703
www.analog.com
© Analog Devices, Inc., 2002
OP470–SPECIFICATIONS
(at V = ꢂ15 V, T = 25ꢁC, unless otherwise noted.)
ELECTRICAL CHARACTERISTICS
S
A
OP470A/E
OP470F
OP470G
Parameter
Symbol Conditions
Min Typ Max
Min Typ Max
Min Typ Max
Unit
INPUT OFFSET
VOLTAGE
VOS
0.1 0.4
0.2 0.8
0.4 1.0
mV
INPUT OFFSET
CURRENT
IOS
IB
VCM = 0 V
VCM = 0 V
3
10
6
20
12
25
80
30
nA
INPUT BIAS
CURRENT
6
25
15
80
50
60
nA
INPUT NOISE
VOLTAGE
enp-p
0.1 Hz to 10 Hz
(Note 1)
80
200
200
200
nV p-p
INPUT NOISE
Voltage Density
fO = 10 Hz
fO = 100 Hz
fO = 1 kHz
(Note 2)
3.8 6.5
3.3 5.5
3.2 5.0
3.8 6.5
3.3 5.5
3.2 5.0
3.8 6.5
3.3 5.5
3.2 5.0
en
nV÷Hz
INPUT NOISE
Current Density
fO = 10 Hz
fO = 100 Hz
fO = 1 kHz
1.7
0.7
0.4
1.7
0.7
0.4
1.7
0 7
0.4
in
pA÷Hz
LARGE-SIGNAL
Voltage Gain
V = ±10 V
RL = 10 kW
RL = 2 kW
AVO
1000 2300
800 1700
800 1700
V/mV
500 1200
±11 ±12
±12 ±13
110 125
400 900
±11 ±12
±12 ±13
100 120
400 900
±11 ±12
±12 ±13
100 120
INPUT VOLTAGE
RANGE
IVR
VO
(Note 3)
V
OUTPUT VOLTAGE
SWING
RL ≥ 2 kW
V
COMMON-MODE
REJECTION
CMR
VCM = ±11 V
VS = ±4.5 V to ±18 V
dB
POWER SUPPLY
REJECTION RATIO
PSRR
SR
0.56 1.8
1.0 5.6
1.0 5.6
mV/V
V/ms
SLEW RATE
1.4
2
1.4
2
1.4
2
SUPPLY CURRENT
(All Amplifiers)
ISY
No Load
AV = 10
9
11
9
11
9
11
mA
MHz
dB
GAIN BANDWIDTH
PRODUCT
GBW
CS
6
6
6
CHANNEL
SEPARATION
VO = 20 V p-p
125 155
125 155
125 155
fO = 10 Hz (Note 1)
INPUT
CAPACITANCE
CIN
2
2
2
pF
INPUT RESISTANCE RIN
Differential-Mode
0.4
0.4
0.4
MW
INPUT RESISTANCE
Common-Mode
RINCM
tS
11
11
11
GW
ms
AV = 1
to 0.1%
to 0.01 %
SETTLING TIME
5.5
6.0
5.5
6.0
5.5
6.0
NOTES
1Guaranteed but not 100% tested
2Sample tested
3Guaranteed by CMR test
–2–
REV. B
OP470
(at VS = ꢂ15 V, –55ꢁC £ TA £ 125ꢁC for OP470A, unless otherwise noted.)
ELECTRICAL CHARACTERISTICS
OP470A
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
INPUT OFFSET VOLTAGE
VOS
0.14
0.6
mV
AVERAGE INPUT
Offset Voltage Drift
TCVOS
IOS
0.4
5
2
mV/∞C
nA
INPUT OFFSET CURRENT
INPUT BIAS CURRENT
VCM = 0 V
VCM = 0 V
20
20
IB
15
nA
LARGE-SIGNAL
Voltage Gain
VO = ±10 V
RL = 10 kW
RL = 2 kW
AVO
750
400
1600
800
V/mV
*
INPUT VOLTAGE RANGE
IVR
VO
±11
±12
±12
±13
V
V
OUTPUT VOLTAGE SWING
RL ≥ 2 kW
COMMON-MODE
REJECTION
CMR
PSRR
ISY
VCM = ±11 V
VS = ±4.5 V to ±18 V
No Load
100
120
1.0
9.2
dB
POWER SUPPLY
REJECTION RATIO
5.6
11
mV/V
mA
SUPPLY CURRENT
(All Amplifiers)
—
*
Guaranteed by CMR test
(at VS = ꢂ15 V, –25ꢁC £ TA £ 85ꢁC for OP470E/OP470EF, –40ꢁC £ TA £ 85ꢁC for OP470G,
ELECTRICAL CHARACTERISTICS
unless otherwise noted.)
OP470E
OP470F
OP470G
Parameter
Symbol Conditions
Min Typ Max
Min Typ Max
Min Typ Max
Unit
INPUT OFFSET
VOLTAGE
VOS
0.12 0.5
0.24 1.0
0.5 1.5
2
mV
AVERAGE INPUT
Offset Voltage Drift
TCVOS
0.4
4
2
0.6
7
4
mV/∞C
nA
INPUT OFFSET
CURRENT
IOS
IB
VCM = 0 V
VCM = 0 V
20
50
40
70
20
40
50
75
INPUT BIAS
CURRENT
11
20
nA
LARGE-SIGNAL
Voltage Gain
VO = ±10 V
RL = 10 kW
RL = 2 kW
AVO
800 1800
400 900
600 1400
300 700
600 1500
300 800
V/mV
INPUT VOLTAGE
*
RANGE
IVR
VO
±11 ±12
±12 ±13
100 120
±11 ±12
±12 ±13
±11 ±12
±12 ±13
V
OUTPUT VOLTAGE
SWING
RL ≥ 2 kW
V
COMMON-MODE
REJECTION
CMR
PSRR
ISY
VCM = ±11 V
VS = ±4.5 V to ±18 V
No Load
90
115
90
110
dB
mV/V
mA
POWER SUPPLY
REJECTION RATIO
0.7 5.6
9.2 11
1.8 10
9.2 11
1.8 10
9.3 11
SUPPLY CURRENT
(All Amplifiers)
—
—
—
*
Guaranteed by CMR test
–3–
REV. B
OP470–SPECIFICATIONS
WAFER TEST LIMITS (at VS = ꢂ15 V, 25ꢁC, unless otherwise noted.)
OP470GBC
Limit
Parameter
Symbol
Conditions
Unit
INPUT OFFSET VOLTAGE
VOS
0.8
20
50
mV Max
INPUT OFFSET CURRENT
INPUT BIAS CURRENT
IOS
IB
VCM = 0 V
VCM = 0 V
nA Max
nA Min
LARGE-SIGNAL
Voltage Gain
VO = ±10 V
RL = 10 kW
RL = 2 kW
AVO
800
400
V/mV Min
INPUT VOLTAGE RANGE
*
IVR
VO
±11
±12
V Min
V Min
OUTPUT VOLTAGE SWING
RL ≥ 2 kW
COMMON-MODE
REJECTION
CMR
PSRR
ISY
VCM = ±11 V
VS = ±4.5 V to ±18 V
No Load
100
5.6
11
dB
POWER SUPPLY
REJECTION RATIO
mV/V Max
mA Max
SUPPLY CURRENT
(All Amplifiers)
NOTE
*
Guaranteed by CMR test
Electrical tests are performed at wafer probe to the limits shown. Due to variations in assembly methods and normal yield loss, yield after packaging is not guaran-
teed for standard product dice. Consult factory to negotiate specifications based on dice lot qualification through sample lot assembly and testing.
–4–
REV. B
OP470
ABSOLUTE MAXIMUM RATINGS1
3
Package Type
ꢄJA
ꢄJC
10
33
23
Unit
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±18 V
Differential Input Voltage2 . . . . . . . . . . . . . . . . . . . . . . ±1.0 V
Differential Input Current2 . . . . . . . . . . . . . . . . . . . . ±25 mA
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . Supply Voltage
Output Short-Circuit Duration . . . . . . . . . . . . . . .Continuous
Storage Temperature Range
P, Y Package . . . . . . . . . . . . . . . . . . . . . . –65∞C to +150∞C
Lead Temperature Range (Soldering 60 sec) . . . . . . . . . 300∞C
Junction Temperature (Tj) . . . . . . . . . . . . . –65∞C to +150∞C
Operating Temperature Range
14-Lead Hermetic DIP(Y) 94
∞C/W
∞C/W
∞C/W
14-Lead Plastic DIP(P)
76
88
16-Lead SOIC (S)
NOTES
1Absolute Maximum Ratings apply to both DICE and packaged parts, unless
otherwise noted.
2The OP470’s inputs are protected by back-to-back diodes. Current limiting
resistors are not used in order to achieve low noise performance. If differential
voltage exceeds ±1.0 V, the input current should be limited to ±25 mA.
3ꢀJA is specified for worst case mounting conditions, i.e., ꢀJA is specified for device
in socket for TO, CerDIP, PDIP, packages; ꢀJA is specified for device soldered to
printed circuit board for SOIC packages.
OP470A . . . . . . . . . . . . . . . . . . . . . . . . . –55∞C to +125∞C
OP470E, OP470F . . . . . . . . . . . . . . . . . . . –25∞C to +85∞C
OP470G . . . . . . . . . . . . . . . . . . . . . . . . . . –40∞C to +85∞C
+IN B
V+
+IN A
ORDERING GUIDE
Package Options
–IN A
–IN B
T
A = 25∞C
Operating
Temperature
Range
VOS max
(ꢀV)
Cerdip
14-Pin
OUT A
Plastic
OUT B
400
MIL
400
400
800
OP470AY*
OP470EY
OP470FY*
MIL
IND
IND
OUT D
–IN D
OUT C
1000
1000
OP470GP
OP470GS
XIND
XIND
*Not for new design; obsolete April 2002.
For military processed devices, please refer to the standard
Microcircuit Drawing (SMD) available at
www.dscc.dla.mil/programs/milspec/default.asp
–IN C
+IN C
V–
+IN D
DIE SIZE 0.163 ꢃ 0.106 INCH, 17,278 SQ. mm
(4.14 ꢃ 2.69 mm, 11.14 SQ. mm)
Figure 1. Dice Characteristics
SMD Part Number
ADI Equivalent
59628856501CA
596288565012A
OP470AYMDA
OP470ARCMDA
OP470ATCMDA
596288565013A
*
*
Not for new designs; obsolete April 2002.
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the OP470 features proprietary ESD protection circuitry, permanent damage may occur on devices
subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are
recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
REV. B
–5–
OP470–Typical Performance Characteristics
10
9
5
4
3
2
1
T
= 25ꢁC
T
= 25ꢁC
= ꢂ15V
A
A
S
8
1s
5mV
V
7
6
5
AT 10Hz
AT 1kHz
100
90
4
3
2
10
0%
I/F CORNER = 5Hz
T
= 25ꢁC
= ꢂ15V
A
S
V
0
2
4
6
8
10
1
TIME – Secs
0
ꢂ5
ꢂ10
ꢂ15
ꢂ20
1
10
100
1k
SUPPLYVOLTAGE –V
FREQUENCY – Hz
TPC 1. Voltage Noise Density vs.
Frequency
TPC 2. Voltage Noise Density vs.
Supply Voltage
TPC 3. 0.1 Hz to 10 Hz Noise
10.0
140
10
9
8
7
6
5
4
3
2
1
0
T
= 25ꢁC
A
S
V
= ꢂ15V
T
= 25ꢁC
S
A
S
V
= ꢂ15V
V
= ꢂ15V
120
100
80
60
40
20
0
1.0
I/F CORNER = 200Hz
100
0.1
–75 –50 –25
0
25
50 75 100 125
10
1k
10k
0
1
2
3
4
5
TEMPERATURE – ꢁC
TIME – Mins
FREQUENCY – Hz
TPC 4. Current Noise Density vs.
Frequency
TPC 5. Input Offset Voltage vs.
Temperature
TPC 6. Warm-Up Offset Voltage Drift
20
10
9
V
V
= ꢂ15V
CM
T
= 25ꢁC
V
V
= ꢂ15V
CM
S
A
S
S
9
8
= 0V
V
= ꢂ15V
= 0V
8
7
6
5
15
10
7
6
5
4
3
2
1
0
5
0
4
–75 –50 –25
0
25 50
75 100 125
–75 –50 –25
0
25
50 75 100 125
TEMPERATURE – ꢁC
–12.5
–7.5
–2.5
2.5
7.5
12.5
TEMPERSTURE – ꢁC
COMMON-MODEVOLTAGE –V
TPC 8. Input Offset Current vs.
Temperature
TPC 7. Input Bias Current vs.
Temperature
TPC 9. Input Bias Current vs.
Common-Mode Voltage
–6–
REV. B
OP470
130
120
110
100
90
10
8
10
9
T
= 25ꢁC
= ꢂ15V
A
S
V = ꢂ15V
S
T
= +25ꢁC
V
A
8
T
= +125ꢁC
A
7
80
70
60
50
40
30
20
10
T
= –55ꢁC
A
6
6
5
4
4
3
2
2
0
ꢂ5
ꢂ10
ꢂ15
ꢂ20
–75 –50 –25
0
25 50
75 100 125
1
10
100
1k
10k 100k
1M
SUPPLYVOLTAGE –V
FREQUENCY – Hz
TEMPERSTURE – ꢁC
TPC 12. Total Supply Current vs.
Supply Voltage
TPC 10. CMR vs. Frequency
TPC 11. Total Supply Current vs.
Supply Voltage
80
60
40
20
0
140
140
130
120
110
100
90
80
70
60
50
40
30
T
= 25ꢁC
130
120
110
100
90
80
70
60
50
40
30
T
= 25ꢁC
A
S
A
V
= 15V
–PSR
+PSR
20
10
0
20
10
0
–20
1
10 100 1k 10k 100k 1M 10M 100M
FREQUENCY – Hz
1k
10k
100k
FREQUENCY – Hz
1M
10M
1
10 100 1k 10k 100k 1M 10M 100M
FREQUENCY – Hz
TPC 14. Open-Loop Gain vs. Frequency
TPC 13. PSR vs. Frequency
TPC 15. Closed-Loop Gain vs.
Frequency
25
20
15
80
80
70
60
50
40
8
6
4
2
0
5000
T
= 25ꢁC
V = ꢂ15V
S
T
= 25ꢁC
A
PHASE
GAIN
A
S
R = 10kꢅ
L
V
= ꢂ15V 100
GBW
4000
3000
2000
1000
0
120
140
10
5
ꢆ
PHASE MARGIN
= 58ꢁ
160
180
200
220
0
–5
–10
–75 –50 –25
0
25 50 75 100 125 150
TEMPERATURE – ꢁC
0
ꢂ5
ꢂ10
ꢂ15
ꢂ20
ꢂ25
10
6 7 8 9
1
2
3
4
5
SUPPLYVOLTAGE –V
FREQUENCY – MHz
TPC 18. Gain-Bandwidth Product,
Phase Margin vs. Temperature
TPC 16. Open-Loop Gain, Phase
Shift vs. Frequency
TPC 17. Open-Loop Gain vs. Supply
Voltage
–7–
REV. B
OP470
28
24
20
16
12
8
20
18
100
80
T
= 25ꢁC
T
= 25ꢁC
A
S
A
S
T
= 25ꢁC
= ꢂ15V
= 100mV
= 1
A
S
IN
V
V
= ꢂ15V
V
= ꢂ15V
V
V
THD = 1%
16
14
12
10
8
A
POSITIVE
SWING
60
40
20
0
NEGATIVE
SWING
6
4
4
2
0
0
0
200
400
600
800
1000
1k
10k
100k
FREQUENCY – Hz
1M
10M
100
1k
LOAD RESISTANCE – ꢅ
10k
CAPACITIVE LOAD – pF
TPC 19. Maximum Output Swing vs.
Frequency
TPC 20. Maximum Output Voltage
vs. Load Resistance
TPC 21. Small-Signal Overshoot vs.
Capacitive Load
360
4.0
170
T
= 25ꢁC
T
= 25ꢁC
A
S
O
A
S
V
= ꢂ15V
160
150
140
130
120
110
S
V
V
= ꢂ15V
V
= ꢂ15V
300
240
180
120
3.5
3.0
2.5
2.0
= 20V p-pTO 10kHz
–SR
+SR
100
90
A
V
= 100
80
70
60
0
1.5
1.0
A
= 1
V
60
50
100
1k
10k 100k
FREQUENCY – Hz
1M
10M 100M
–75 –50 –25
0
25
50
75 100 125
10
100
1k
10k
100k
1M
10M
TEMPERATURE – ꢁC
FREQUENCY – Hz
TPC 23. Slew Rate vs. Temperature
TPC 22. Output Impedance vs.
Frequency
TPC 24. Channel Separation vs.
Frequency
1
T
= 25ꢁC
A
S
O
L
T
= 25ꢁC
= ꢂ15V
= 1
T
= 25ꢁC
= ꢂ15V
= 1
A
S
V
A
S
V
V
V
= ꢂ15V
= 10V p-p
= 2kꢅ
V
V
100
90
100
90
A
A
R
0.1
0.01
10
0%
10
0%
A
= –10
V
20µs
0.2µs
50mV
5V
A
= 1
V
0.001
10
100
1k
10k
FREQUENCY – Hz
TPC 27. Small-Signal Transient
Response
TPC 26. Large-Signal Transient
Response
TPC 25. Total Harmonic Distortion
vs. Frequency
–8–
REV. B
OP470
5kꢅ
The total noise is referred to the input and at the output would
be amplified by the circuit gain. Figure 4 shows the relationship
between total noise at 1 kHz and source resistance. For RS < 1 kW
the total noise is dominated by the voltage noise of the OP470.
As RS rises above 1 kW, total noise increases and is dominated
by resistor noise rather than by voltage or current noise of the
OP470. When RS exceeds 20 kW, current noise of the OP470
becomes the major contributor to total noise.
500ꢅ
1/4
V
V
20V p-p
1
OP470
50kꢅ
50ꢅ
Figure 5 also shows the relationship between total noise and
source resistance, but at 10 Hz. Total noise increases more
quickly than shown in Figure 4 because current noise is inversely
proportional to the square root of frequency. In Figure 5, current
noise of the OP470 dominates the total noise when RS > 5 kW.
1/4
2
OP470
V
1
CHANNEL SEPARATION = 20 LOG
V /1000
2
From Figures 4 and 5 it can be seen that to reduce total noise,
source resistance must be kept to a minimum. In applications
with a high source resistance, the OP400, with lower current
noise than the OP470, will provide lower total noise.
Figure 2. Channel Separation Test Circuit
+18V
2
3
6
5
100
4
1
7
A
B
D
+1V
–1V
+1V
–1V
11
–18V
OP11
OP400
OP471
10
9
13
12
8
14
C
10
OP470
RESISTOR
NOISE ONLY
Figure 3. Burn-In Circuit
1
100
1k
10k
100k
APPLICATIONS INFORMATION
Voltage and Current Noise
R
– SOURCE RESISTANCE –ꢅ
S
Figure 4. Total Noise vs. Source Resistance (Including
Resistor Noise) at 1 kHz
The OP470 is a very low-noise quad op amp, exhibiting a typi-
cal voltage noise of only 3.2 nV÷Hz @ 1 kHz. The exceptionally
low-noise characteristics of the OP470 are in part achieved by
operating the input transistors at high collector currents since
the voltage noise is inversely proportional to the square root of
the collector current. Current noise, however, is directly propor-
tional to the square root of the collector current. As a result, the
outstanding voltage noise performance of the OP470 is gained
at the expense of current noise performance, which is typical for
low noise amplifiers.
100
OP11
OP400
10
OP471
To obtain the best noise performance in a circuit, it is vital to
understand the relationship between voltage noise (en), current
noise (in), and resistor noise (et).
OP470
RESISTOR
NOISE ONLY
TOTAL NOISE AND SOURCE RESISTANCE
The total noise of an op amp can be calculated by:
1
100
1k
10k
100k
R
– SOURCE RESISTANCE –ꢅ
S
2
2
2
En =
e
+ i R
+ e
) ( )
( )
(
n
n
S
t
Figure 5. Total Noise vs. Source Resistance (Including
Resistor Noise) at 10 Hz
where:
En = total input referred noise
en = up amp voltage noise
in = op amp current noise
et = source resistance thermal noise
RS = source resistance
REV. B
–9–
OP470
Figure 6 shows peak-to-peak noise versus source resistance over
the 0.1 Hz to 10 Hz range. Once again, at low values of RS, the
voltage noise of the OP470 is the major contributor to peak-to-peak
noise with current noise the major contributor as RS increases.
The crossover point between the OP470 and the OP400 for
peak-to-peak noise is at RS = 17 kW.
Table I.
Device
Impedance
Source
Comments
Strain gage
<500 W
Typically used in
low frequency applications.
The OP471 is a higher speed version of the OP470, with a slew
rate of 8 V/ms. Noise of the OP471 is only slightly higher than
the OP470. Like the OP470, the OP471 is unity-gain stable.
Magnetic
tapehead
<1500 W
Low IB very important to reduce
self-magnetization problems
when direct coupling is used.
OP470 IB can be neglected.
1000
OP11
Magnetic
phonograph
cartridges
<1500 W
Similar need for low IB in direct
coupled applications. OP470
will not introduce any self-
magnetization problem.
OP400
OP471
Linear variable <1500 W
differential
transformer
Used in rugged servo-feedback
applications. Bandwidth of
interest is 400 Hz to 5 kHz.
100
OP470
For further information regarding noise calculations, see “Minimization of Noise
in Op Amp Applications,” Application Note AN-15.
RESISTOR
NOISE ONLY
NOISE MEASUREMENTS—
PEAK-TO-PEAK VOLTAGE NOISE
10
100
1k
10k
100k
The circuit of Figure 7 is a test setup for measuring peak-to-peak
voltage noise. To measure the 200 nV peak-to-peak noise speci-
fication of the OP470 in the 0.1 Hz to 10 Hz range, the following
precautions must be observed:
R
– SOURCE RESISTANCE –ꢅ
S
Figure 6. Peak-To-Peak Noise (0.1 Hz to 10 Hz) vs. Source
Resistance (Includes Resistor Noise)
1. The device must be warmed up for at least five minutes. As
shown in the warm-up drift curve, the offset voltage typi-
cally changes 5 mV due to increasing chip temperature after
power-up. In the 10-second measurement interval, these
temperature-induced effects can exceed tens of nanovolts.
For reference, typical source resistances of some signal sources
are listed in Table I.
2. For similar reasons, the device must be well-shielded from
air currents. Shielding also minimizes thermocouple effects.
3. Sudden motion in the vicinity of the device can also “feedthrough”
to increase the observed noise.
R3
1.24kꢅ
R1
5ꢅ
C1
OP470
DUT
R2
2ꢀF
5ꢅ
OP27E
C4
R6
0.22ꢀF
R5
909ꢅ
600kꢅ
R10
R11
65.4kꢅ
65.4kꢅ
R4
D1
D2
R14
OP15E
R9
200ꢅ
1N4148
1N4148
4.99kꢅ
C3
e
OUT
OP15E
0.22ꢀF
C5
306kꢅ
1ꢀF
R13
5.9kꢅ
R8
10kꢅ
C2
R12
0.032ꢀF
10kꢅ
GAIN = 50,000
= ꢂ5V
V
S
Figure 7. Peak-To-Peak Voltage Noise Test Circuit (0.1 Hz to 10 Hz)
–10–
REV. B
OP470
4. The test time to measure 0.1 Hz to 10 Hz noise should not ex-
ceed 10 seconds. As shown in the noise-tester frequency-response
curve of Figure 8, the 0.1 Hz corner is defined by only one pole.
The test time of 10 seconds acts as an additional pole to elimi-
nate noise contribution from the frequency band below 0.1 Hz.
The OP470 is a monolithic device with four identical amplifiers.
The noise voltage density of each individual amplifier will match,
giving:
Ê
2 ˆ
¯
eOUT = 101 4en
= 101 2e
n
(
)
Ë
5. A noise-voltage-density test is recommended when measuring
noise on a large number of units. A 10 Hz noise voltage-density
measurement will correlate well with a 0.1 Hz to 10 Hz
peak-to-peak noise reading, since both results are determined
by the white noise and the location of the 1/f corner frequency.
NOISE MEASUREMENT—CURRENT NOISE DENSITY
The test circuit shown in Figure 10 can be used to measure
current noise density. The formula relating the voltage output to
current noise density is:
6. Power should be supplied to the test circuit by well bypassed
low noise supplies, e.g. batteries. These will minimize output
noise introduced via the amplifier supply pins.
Ê ꢀnOUT ˆ2
2
- 40nV / Hz
Á
˜
(
)
G
Ë
¯
in =
100
80
60
40
20
0
RS
where:
G = gain of 10000
RS = 100 kW source resistance
R3
1.24kꢅ
R2
R1
100kꢅ
5ꢅ
OP470
DUT
e
OUT TO
OP27E
n
SPECTRUM ANALYZER
R5
8.06kꢅ
0.01
0.1
1
10
100
FREQUENCY – Hz
R4
200ꢅ
GAIN = 50,000
= ꢂ5V
Figure 8. 0.1 Hz to 10 Hz Peak-to-Peak Voltage Noise Test
Circuit Frequency Response
V
S
Figure 10. Current Noise Density Test Circuit
NOISE MEASUREMENT—NOISE VOLTAGE DENSITY
The circuit of Figure 9 shows a quick and reliable method of
measuring the noise voltage density of quad op amps. Each
individual amplifier is series-connected and is in unity-gain, save
the final amplifier which is in a noninverting gain of 101. Since
the ac noise voltages of each amplifier are uncorrelated, they
add in rms fashion to yield:
Ê
2 ˆ
¯
2
2
2
eOUT = 101 enA + enB + enC + enD
Ë
R1
R2
100ꢅ
10kꢅ
1/4
e
OUT
OP470
1/4
OP470
TO SPECTRUM ANALYZER
1/4
OP470
1/4
OP470
e
V
(nV Hz) = 101(2e )
n
OUT
= ꢂ15V
S
Figure 9. Noise Voltage Density Test Circuit
REV. B
–11–
OP470
R1
CAPACITIVE LOAD DRIVING AND POWER
SUPPLY CONSIDERATIONS
The OP470 is unity-gain stable and is capable of driving large
capacitive loads without oscillating. Nonetheless, good supply
bypassing is highly recommended. Proper supply bypassing
reduces problems caused by supply line noise and improves the
capacitive load driving capability of the OP470.
OP470
2V/ꢀs
In the standard feedback amplifier, the op amp’s output resistance
combines with the load capacitance to form a low pass filter that
adds phase shift in the feedback network and reduces stability.
A simple circuit to eliminate this effect is shown in Figure 11.
The added components, C1 and R3, decouple the amplifier
from the load capacitance and provide additional stability. The
values of C1 and R3 shown in Figure 11 are for a load capaci-
tance of up to 1000 pF when used with the OP470.
Figure 12. Pulsed Operation
During the fast feedthrough-like portion of the output, the input
protection diodes effectively short the output to the input, and a
current, limited only by the output short-circuit protection, will
be drawn by the signal generator. With Rf £ 500 W, the output
is capable of handling the current requirements (IL < 20 mA at
10 V); the amplifier will stay in its active mode and a smooth
transition will occur.
V+
C2
10ꢀF
+
When Rf > 3 kW, a pole created by Rf and the amplifier’s input
capacitance (2 pF) creates additional phase shift and reduces
phase margin. A small capacitor (20 pF to 50 pF) in parallel
with Rf helps eliminate this problem.
C3
0.1ꢀF
R2
APPLICATIONS
Low Noise Amplifier
C1
R1
1000pF
V
R3
IN
A simple method of reducing amplifier noise by paralleling
amplifiers is shown in Figure 13. Amplifier noise, depicted in
Figure 14, is around 2 nV/÷Hz @ 1 kHz (R.T.I.). Gain for each
paralleled amplifier and the entire circuit is 1000. The 200 W
resistors limit circulating currents and provide an effective out-
put resistance of 50 W. The amplifier is stable with a 10 nF
capacitive load and can supply up to 30 mA of output drive.
50ꢅ
V
OP470
OUT
100ꢅ*
C4
C
L
10ꢀF
1000pF
+
C5
0.1ꢀF
*
*SEETEXT
V–
PLACE SUPPLY DECOUPLING
CAPACITORS AT OP470
+15V
V
R3
IN
Figure 11. Driving Large Capacitive Loads
200ꢅ
1/4
R1
OP470E
In applications where the OP470’s inverting or noninverting
inputs are driven by a low source impedance (under 100 W) or
connected to ground, if V+ is applied before V–, or when V is
disconnected, excessive parasitic currents will flow. Most applica-
tions use dual tracking supplies and with the device supply pins
properly bypassed, power-up will not present a problem. A source
resistance of at least 100 W in series with all inputs (Figure 11)
will limit the parasitic currents to a safe level if V– is discon-
nected. It should be noted that any source resistance, even 100 W,
adds noise to the circuit. Where noise is required to be kept at a
minimum, a germanium or Schottky diode can be used to clamp
the V- pin and eliminate the parasitic current flow instead of
using series limiting resistors. For most applications, only one
diode clamp is required per board or system.
50ꢅ
R2
50kꢅ
–15V
R6
200ꢅ
1/4
R4
OP470E
50ꢅ
R5
50kꢅ
V
= 1000V
IN
OUT
R9
200ꢅ
1/4
R7
OP470E
50ꢅ
R8
50kꢅ
UNITY-GAIN BUFFER APPLICATIONS
When Rf £ 100 W and the input is driven with a fast, large
signal pulse(> 1 V), the output waveform will look as shown
in Figure 12.
R12
200ꢅ
1/4
R10
OP470E
50ꢅ
R11
50kꢅ
Figure 13. Low Noise Amplifier
–12–
REV. B
OP470
100
100
90
A OUT 90
10
10
A OUT
0%
0%
5V
5V
1ms
Figure 16. Digital Panning Control Output
Figure 14. Noise Density of Low Noise Amplifier, G = 1000
Gain error due to the mismatching between the internal DAC
ladder resistors and the current-to-voltage feedback resistors is
eliminated by using feedback resistors internal to the DAC. Of
the four DACs available in the DAC-8408, only two DACs, A
and C, actually pass a signal. DACs B and D are used to pro-
vide the additional feedback resistors needed in the circuit. If
the VREFB and VREFD inputs remain unconnected, the
current-to-voltage converters using RFBB and RFBD are unaf-
fected by digital data reaching DACs B and D.
DIGITAL PANNING CONTROL
Figure 15 uses a DAC-8408, quad 8-bit DAC to pan a signal
between two channels. The complementary DAC current out-
puts two of the DAC-8408’s four DACs drive current-to-voltage
converters built from a single quad OP470. The amplifiers have
complementary outputs with the amplitudes dependent upon
the digital code applied to the DAC. Figure 16 shows the comple-
mentary outputs for a 1 kHz input signal and digital ramp applied
to the DAC data inputs. Distortion of the digital panning con-
trol is less than 0.01%.
5V
DAC-8408GP
V
R A
FB
DD
+15V
20pF
V
A
I
OUT1A
REF
SIDE A IN
DAC A
DAC B
1/4
A OUT
OP470E
I
OUT2A/2B
–15V
I
OUT1B
1/4
A OUT
OP470E
20pF
20pF
R
B
FB
R
C
FB
V
C
REF
I
DAC C
DAC D
OUT1C
SIDE B IN
1/4
B OUT
OP470E
DAC DATA BUS
PINS 9 (LSB) – 16 (MSB)
I
OUT2C/2D
1kꢅ
5V
A/B
R/W
DS1
DS2
I
OUT1D
1/4
1kꢅ
B OUT
OP470E
20pF
R
D
DAC SELECT
FB
DGND
Figure 15. Digital Panning Control Circuit
REV. B
–13–
OP470
SQUELCH AMPLIFIER
FIVE-BAND LOW-NOISE STEREO GRAPHIC EQUALIZER
The graphic equalizer circuit shown in Figure 18 provides 15 dB
of boost or cut over a 5-band range. Signal-to-noise ratio over a
20 kHz bandwidth is better than 100 dB referred to a 3 V rms
input. Larger inductors can be replaced by active inductors but
this reduces the signal-to-noise ratio.
The circuit of Figure 17 is a simple squelch amplifier that uses a
FET switch to cut off the output when the input signal falls
below a preset limit.
The input signal is sampled by a peak detector with a time
constant set by C1 and R6. When the output of the peak detector
(Vp), falls below the threshold voltage, (VTH), set by R8, the
comparator formed by op amp C switches from V– to V+. This
drives the gate of the N-channel FET high, turning it ON, re-
ducing the gain of the inverting amplifier formed by op amp A
to zero.
C1
0.47ꢀF
V
IN
R2
1/4
3.3kꢅ
R1
R14
OP470E
47kꢅ
1/4
100ꢅ
V
OUT
OP470E
R4
R13
1kꢅ
C2
3.3kꢅ
L1
1H
R3
6.8ꢀF
D2
680ꢅ
+
R5
60Hz
1N4148
100kꢅ
TANTALUM
C3
R4
2N5434
1kꢅ
L2
1H
R5
1ꢀF
680ꢅ
+
R2
200Hz
10kꢅ
TANTALUM
C4
R1
R4
2kꢅ
1kꢅ
L3
1H
V
R7
IN
0.22ꢀF
1/4
680ꢅ
+
800Hz
V
– –5V
OP470E
A
OUT
IN
TANTALUM
C5
R4
1kꢅ
L4
1H
R4
R9
0.047ꢀF
10kꢅ
680ꢅ
+
3kHz
R3
2kꢅ
TANTALUM
C6
D1
1N4148
R4
1/4
1kꢅ
L5
1H
R11
OP470E
B
0.022ꢀF
680ꢅ
1/4
+
C1
R6
10kHz
1ꢀF
1Mꢅ
OP470E
C
TANTALUM
R4
10Mꢅ
Figure 18. Five-Band Low Noise Graphic Equalizer
ꢇ
= 1 SECOND
R7
10kꢅ
C2
10ꢀF
+
V+
R6
10kꢅ
Figure 17. Squelch Amplifier
–14–
REV. B
OP470
OUTLINE DIMENSIONS
14-Lead Ceramic Dip-Glass Hermetic Seal [CERDIP]
14-Lead Plastic Dual-in-Line Package [PDIP]
(Q-14)
(N-14)
Dimensions shown in inches and (millimeters)
Dimensions shown in inches and (millimeters)
0.685 (17.40)
0.665 (16.89)
0.645 (16.38)
0.098 (2.49) MAX
0.005 (0.13) MIN
0.295 (7.49)
0.285 (7.24)
0.275 (6.99)
14
8
0.310 (7.87)
0.220 (5.59)
PIN 1
14
1
8
7
1
7
0.320 (8.13)
0.290 (7.37)
0.100 (2.54) BSC
0.785 (19.94) MAX
0.100 (2.54)
BSC
0.060 (1.52)
0.015 (0.38)
0.325 (8.26)
0.310 (7.87)
0.300 (7.62)
0.200 (5.08)
MAX
0.200 (5.08)
0.125 (3.18)
0.015 (0.38)
MIN
0.150 (3.81)
0.135 (3.43)
0.120 (3.05)
0.150
(3.81)
MIN
0.180 (4.57)
MAX
0.150 (3.81)
0.130 (3.30)
0.110 (2.79)
0.015 (0.38)
0.008 (0.20)
SEATING
0.023 (0.58)
0.014 (0.36)
0.070 (1.78)
0.030 (0.76)
15
0
PLANE
SEATING
PLANE
0.015 (0.38)
0.010 (0.25)
0.008 (0.20)
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETERS DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
0.022 (0.56) 0.060 (1.52)
0.018 (0.46) 0.050 (1.27)
0.014 (0.36) 0.045 (1.14)
COMPLIANT TO JEDEC STANDARDS MO-095-AB
CONTROLLING DIMENSIONS ARE IN INCH; MILLIMETERS DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
16-Lead Standard Small Outline Package [SOIC]
Wide Body
(RW-16)
Dimensions shown in millimeters and (inches)
10.50 (0.4134)
10.10 (0.3976)
16
1
9
8
7.60 (0.2992)
7.40 (0.2913)
10.65 (0.4193)
10.00 (0.3937)
2.65 (0.1043)
2.35 (0.0925)
0.75 (0.0295)
0.25 (0.0098)
1.27 (0.0500)
BSC
ꢃ 45ꢁ
0.30 (0.0118)
0.10 (0.0039)
8ꢁ
0ꢁ
0.51 (0.0201)
0.33 (0.0130)
SEATING
PLANE
1.27 (0.0500)
0.40 (0.0157)
0.32 (0.0126)
0.23 (0.0091)
COPLANARITY
0.10
COMPLIANT TO JEDEC STANDARDS MS-013AA
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
REV. B
–15–
ADV611/ADV612
Revision History
Location
Page
10/02—Data Sheet changed from REV. A to REV. B.
Edits to 16-Lead SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Edits to ELECTRICAL CHARACTERISTICS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Edits to ABSOLUTE MAXIMUM RATINGS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Updated OUTLINE DIMENSIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
4/02—Data Sheet changed from REV. 0 to REV. A.
28-Lead LCC (RC-Suffix) deleted . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
28-Lead LCC (TC-Suffix) deleted . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Edits to ABSOLUTE MAXIMUM RATINGS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Edits to ORDERING GUIDE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Edits to PACKAGE TYPE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
–16–
REV. B
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