REF01HPZ2 [ADI]
10 V Precision Voltage Reference; 10 V精密基准电压源
| 型号： | REF01HPZ2 |
| 厂家： | 
ADI |
| 描述： | 10 V Precision Voltage Reference |
| 文件： | 总12页 (文件大小：339K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
10 V Precision
Voltage Reference
REF01
FEATURES
PIN CONFIGURATIONS
10 V output, 0.3ꢀ maximum
NC
8
Adjustment range, 3ꢀ minimum
Excellent temperature stability, 8.5 ppm/°C maximum
Low noise, 30 µV p-p maximum
Low supply current, 1.4 mA maximum
Wide input voltage range, 12 V to 40 V
High load driving capability, 10 mA
No external components
NC
NC
1
3
7
5
V
2
6
V
OUT
IN
NC
TRIM
4
GROUND
(CASE)
NC = NO CONNECT. DO NOT CONNECT ANYTHING
ON THESE PINS. SOME OF THEM ARE RESERVED
FOR FACTORY TESTING PURPOSES.
Short-circuit proof
Figure 1. TO-99 (J Suffix)
GENERAL DESCRIPTION
The REF01 precision voltage reference provides a stable 10 V
output that can be adjusted over a 3% range with minimal effect
on temperature stability. Single-supply operation over an input
voltage range of 12 V to 40 V, a low current drain of 1 mA, and
excellent temperature stability are achieved with an improved
band gap design. Low cost, low noise, and low power make the
REF01 an excellent choice whenever a stable voltage reference is
required. Applications include DACs and ADCs, portable
instrumentation, and digital voltmeters. Full military
NC
1
2
3
4
8
7
6
5
NC
NC
REF01
V
IN
TOP VIEW
NC
V
OUT
(Not to Scale)
GND
TRIM
NC = NO CONNECT. DO NOT CONNECT ANYTHING
ON THESE PINS. SOME OF THEM ARE RESERVED
FOR FACTORY TESTING PURPOSES.
Figure 2. 8-Lead PDIP (P-Suffix)
8-Lead CERDIP (Z-Suffix)
8-Lead SOIC (S-Suffix)
temperature range devices with screening to MIL-STD-883 are
available. For new designs, refer to ADR01.
INPUT
OUTPUT RESISTORS
R8
2
R7
R14
REF01 OPTION
R9
R11
R12
P AND S PACKAGES 18kΩ 4.5kΩ 33.3kΩ
Q15
J AND Z PACKAGES, 50kΩ 2kΩ
16.7kΩ
R15
Q19
Q14
Q13
Q8
Q7
Q9
AND 883C PRODUCT
Q18
Q12
Q11
Q16
Q21
C1
Q17
Q10
R6
Q5
Q6
OUTPUT
6
R13
R3
R4
R12*
R9*
Q4
Q3
TRIM
R5
≈1.23V
Q20
R10
Q2
5
4
Q1
R1
R11*
R2
GROUND
*SEE OUTPUT RESISTORS
Figure 3. Simplified Schematic
Rev. H
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registeredtrademarks arethe property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
www.analog.com
© 2005 Analog Devices, Inc. All rights reserved.
REF01
TABLE OF CONTENTS
Features .............................................................................................. 1
ESD Caution...................................................................................5
Typical Performance Characteristics ..............................................6
Applications........................................................................................8
Precision Current Source .......................................................... 10
Supply Bypassing........................................................................ 10
Reference Stack with Excellent Line Regulation.................... 10
Outline Dimensions....................................................................... 11
Ordering Guide .......................................................................... 12
General Description......................................................................... 1
Pin Configurations ........................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Electrical Specifications............................................................... 3
Absolute Maximum Ratings............................................................ 5
Thermal Resistance ...................................................................... 5
REVISION HISTORY
12/05—Rev. G to Rev. H
10/03—Rev. C to Rev. D
Changes to Figure 12........................................................................ 8
Changes to Ordering Guide .......................................................... 12
Changes to Features ..........................................................................1
Changes to Electrical Specifications ...............................................2
Deleted Figure 13...............................................................................3
Deleted Wafer Test Limits ................................................................4
Deleted Typical Electrical Characteristics......................................4
Changes to Ordering Guide.............................................................4
Updated Outline Dimensions..........................................................8
2/05—Rev. F to Rev. G
Changes to Electrical Specifications .............................................. 3
Changes to Electrical Specifications .............................................. 4
7/04—Rev. E to Rev. F
Updated Format..................................................................Universal
Changes to Simplified Schematic ................................................... 1
Changes to Specifications................................................................ 3
Changes to Specifications................................................................ 4
Changes to Applications .................................................................. 8
Changes to Ordering Guide ............................................................ 9
10/02—Rev. B to Rev. C
Edits to Features.................................................................................1
Delete RC-Suffix................................................................................1
Edits to Absolute Maximum Ratings..............................................5
Edits to Ordering Guide ...................................................................5
Edits to Package Type .......................................................................5
Delete CP-20 ......................................................................................9
Updated Outline Dimensions..........................................................9
2/04—Rev. D to Rev. E
Changes to Simplified Schematic .................................................. 1
Changes to Ordering Guide ............................................................ 4
Replaced Figure 6 ............................................................................. 5
Replaced Figure 7 ............................................................................. 5
Rev. H | Page 2 of 12
REF01
SPECIFICATIONS
ELECTRICAL SPECIFICATIONS
@ VIN = 15 V, TA = 25°C, unless otherwise noted.
Table 1.
REF01A/REF01E
REF01H
Typ
Parameter
Symbol
VO
Conditions
IL = 0 mA
Min
Typ
10.00
3.3
Max
Min
9.95
3.0
Max
Unit
V
Output Voltage
9.97
3.0
10.03
10.00
3.3
10.05
Output Adjustment Range
∆VTRIM
RP = 10 kΩ
%
Output Voltage Noise1
S, Z, P Packages
J, 883 Parts
en p-p
en p-p
0.1 Hz to 10 Hz
0.1 Hz to 10 Hz
VIN = 13 V to 33 V
IL = 0 mA to 10 mA
To 0.1% of final value
No load
30
35
0.006
0.005
5
30
35
0.006
0.006
5
µV p-p
µV p-p
%/V
%/mA
µs
mA
mA
mA
mA
Line Regulation2
0.010
0.008
0.010
0.010
Load Regulation2
Turn-On Settling Time3
Quiescent Supply Current
Load Current
Sink Current4
Short-Circuit Current
tON
ISY
IL
IS
ISC
1.0
1.4
1.0
1.4
10
−0.3
10
−0.3
−0.5
30
−0.5
30
VO = 0
1 Sample tested.
2 Line and load regulation specifications include the effect of self-heating.
3 Guaranteed by design, not production tested.
4 During sink current test, the device meets the output voltage specified.
@ VIN = 15 V, −55°C ≤ TA ≤ +125°C for REF01A/REF01E, and 0°C ≤ TA ≤ 70°C for REF01H, and IL = 0 mA, unless otherwise noted.
Table 2.
REF01A/REF01E
REF01H
Min Typ
Parameter
Symbol Conditions
Min Typ
0.02
Max
Max
0.17
0.45
25.0
Unit
%
%
Output Voltage Change
with Temperature1, 2
Output Voltage
∆VOT
0°C ≤ TA ≤ 70°C
0.06
0.15
8.5
0.07
0.18
10.0
−55°C ≤ TA ≤+ 125°C
0.06
TCVO
3.0
ppm/°C
Temperature Coefficient3
Change in VO Temperature Coefficient
with Output Adjustment
Line Regulation
RP = 10 kΩ
0.7
0.7
ppm/%
0°C ≤ TA ≤ 70°C
−55°C ≤ TA ≤ + 125°C
0°C ≤ TA ≤ 70°C
0.007 0.012
0.009 0.015
0.006 0.010
0.007 0.012
0.007 0.012 %/V
0.009 0.015 %/V
0.007 0.012 %/mA
0.009 0.015 %/mA
(VIN = 13 V to 33 V)4
Load Regulation
(IL = 0 mA to 8 mA)4
−55°C ≤ TA ≤ + 125°C
1 ∆VOT is defined as the absolute difference between the maximum output voltage and the minimum output voltage over the specified temperature range expressed as
a percentage of 10 V:
VMAX −VMIN
10V
∆VOT
=
× 100
2 ∆VOT specification applies trimmed to 10000 V or untrimmed.
3 TCVO is defined as ∆Var divided by the temperature range; therefore,
and
∆VOT
(
0°C to+ 70°C
)
∆VOT
(
− 55°C to + 125°C
180°C
)
TCVO
(
0°C to+ 70°C
)
=
TCVO − 55°C to + 125°C =
( )
70°C
4 Line and load regulation specifications include the effect of self-heating.
Rev. H | Page 3 of 12
REF01
@ VIN = 15 V, TA = 25°C, unless otherwise noted.
Table 3.
REF01C
Typ
Parameter
Symbol
VO
∆VTRIM
Conditions
IL = 0 mA
RP = 10 kΩ
Min
9.90
2.7
Max
Unit
V
%
Output Voltage
Output Adjustment Range
Output Voltage Noise1
10.00
3.3
10.10
e n p-p
e n p-p
0.1 Hz to 10 Hz
0.1 Hz to 10 Hz
VIN = 13 V to 33 V
IL = 0 mA to 8 mA
To 0.1% of final value
No load
30
35
µV p-p
µV p-p
S, Z, P Packages
J, 883 Parts
Line Regulation2
0.009
0.006
5
0.015
0.015
%/V
%/mA
µs
mA
mA
mA
mA
Load Regulation2
Turn-On Settling Time3
Quiescent Supply Current
Load Current
Sink Current4
Short-Circuit Current
tON
ISY
IL
IS
ISC
1.0
1.6
8
−0.3
−0.5
30
VO = 0
1 Sample tested.
2 Line and load regulation specifications include the effect of self-heating.
3 Guaranteed by design, not production tested.
4 During sink current test, the device meets the output voltage specified.
@ VIN = 15 V, 0°C ≤ TA ≤ +70°C for REF01CJ, REF01CZ, and −40°C ≤ TA ≤ +85°C for REF01CP and REF01CS, unless otherwise noted.
Table 4.
REF01C
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
Output Voltage Change
with Temperature1, 2
Output Voltage
∆VOT
0.14
0.45
%
TCVO
20
65
ppm/°C
Temperature Coefficient3
Change in VO Temperature
Coefficient with Output
Adjustment
RP = 10 kΩ
VIN =13 V to 30 V
IL = 0 to 5 mV
0.7
0.011
0.008
ppm/°C
%/V
%/mA
Line Regulation4
0.018
0.018
Load Regulation4
1 ∆VOT is defined as the absolute difference between the maximum output voltage and the minimum output voltage over the specified temperature range expressed as
a percentage of 10 V:
VMAX −VMIN
10V
∆VOT
=
×100
2 ∆VOT specification applies trimmed to +10,000 V or untrimmed.
3 TCVO is defined as ∆Var divided by the temperature range; therefore,
and
∆VOT
(
0°C to + 70°C
)
∆VOT
(
− 55°C to + 125°C
180°C
)
TCVO
(
0°C to + 70°C
)
=
TCVO − 55°C to + 125°C =
( )
70°C
4 Line and load regulation specifications include the effect of self-heating.
Rev. H | Page 4 of 12
REF01
ABSOLUTE MAXIMUM RATINGS
Table 5.
THERMAL RESISTANCE
Table 6.
Package Type
Parameter
Rating1
Input Voltage
40 V
1
θJA
θJC
24
26
50
44
Unit
°C/W
°C/W
°C/W
°C/W
Output Short-Circuit Duration
(to Ground or VIN)
Storage Temperature Range
J, S, and Z Packages
P Package
TO-99 (J)
170
162
110
160
Indefinite
8-Lead CERDIP (Z)
8-Lead PDIP (P)
8-Pin SOIC (S)
−65°C to +150°C
−65°C to +125°C
1 θJA is specified for worst-case mounting conditions; that is, θJA is specified for
device in socket for TO, CERDIP, and PDIP packages. θJA is specified for device
soldered to printed circuit board for SOIC package.
Operating Temperature Range
REF01A
REF01CJ
−55°C to +125°C
0°C to 70°C
REF01CP, REF01CS, REF01E, REF01H
Junction Temperature (TJ)
Lead Temperature (Soldering @ 60 sec)
−40°C to +85°C
−65°C to +150°C
300°C
1 Absolute maximum ratings apply to both DICE and packaged parts, unless
otherwise noted.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
Rev. H | Page 5 of 12
REF01
TYPICAL PERFORMANCE CHARACTERISTICS
0.0031
0.0100
0.0310
0.1000
0.3100
1.0000
3.1000
10.0000
76
66
56
46
36
26
16
0
20
19
18
17
16
15
14
T
= 25°C
A
V
T
= 15V
= 25°C
IN
A
10
100
1k
10k
100k
1M
10
15
20
25
30
35
40
FREQUENCY (Hz)
INPUT VOLTAGE (V)
Figure 4. Line Regulation vs. Frequency
Figure 7. Maximum Load Current vs. Input Voltage
1.4
1.3
1.2
1.1
1.0
0.9
0.8
0.7
0.6
10k
1k
V
T
= 15V
= 25°C
IN
A
V
= 15V
IN
100
10
–60 –40 –20
0
20
40
60
80
100 120 140
10
100
1k
10k
100k
1M
FREQUENCY (Hz)
TEMPERATURE (°C)
Figure 5. Output Wideband Noise vs. Bandwidth
(0.1 Hz to Frequency Indicated)
Figure 8. Normalized Load Regulation (∆IL = 10 mA) vs. Temperature
1.4
1.3
1.2
1.1
1.0
0.9
0.8
0.7
0.6
0.016
0.014
0.012
0.010
0.008
0.006
0.004
0.002
0
V
= 15V
IN
DEVICE IMMERSED
25°C
IN 75°C OIL BATH
–60 –40 –20
0
20
40
60
80
100 120 140
–10
0
10
20
30
40
50
TEMPERATURE (°C)
TIME (s)
Figure 9. Normalized Line Regulation vs. Temperature
Figure 6. Output Change due to Thermal Shock
Rev. H | Page 6 of 12
REF01
30
25
20
15
10
5
1.3
1.2
1.1
1.0
0.9
0.8
0.7
V
= 15V
V
= 15V
IN
IN
0
–60 –40 –20
0
20
40
60
80
100 120 140
–60 –40 –20
0
20
40
60
80
100 120 140
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 10. Maximum Load Current vs. Temperature
Figure 11. Quiescent Current vs. Temperature
Rev. H | Page 7 of 12
REF01
APPLICATIONS
1.1mA
U1
REF01
2
V
+
IN
6
5
V
V
9V
IN
V
V
O
V
IN
OUT
O
pot
10kΩ
0.1µF
TEMP TRIM
GND
REF01
R1
470kΩ
9V
TRIM
GND
100kΩ
10V
–
R2
1kΩ
4
Figure 15. Precision Calibration Standard
Figure 12. Output Adjustment
The REF01 trim terminal can be used to adjust the output
voltage over a 10 V 300 mV range. This feature lets the
system designer trim system errors by setting the reference
to a voltage other than 10 V. The output also can be set exactly
to 10.000 V or to 10.240 V for binary applications.
15V
VOLTAGE COMPLIANCE: –25V TO +3V
2
V
IN
6
5
V
O
REF01
Adjustment of the output does not significantly affect the
temperature performance of the device. The temperature
coefficient change is approximately 0.7 ppm/°C for 100 mV
of output adjustment.
10V
R
I
+ 1mA
=
OUT
TRIM
GND
R
4
+18V
I
OUT
V
IN
Figure 16. Current Source
ANALOG
INPUT
0V TO +10V
+15V
2
REF01
–15V +15V
+15V
0.01µF
V
6
IN
V
O
GND
C
C
5kΩ
3.9MΩ
13
0.1µF
REF01
5kΩ
16
3
3
2
5
14
8
CMP01C
–18V
I
O
O
TRIM
GND
7
DAC08
5kΩ
4
2
4
I
4
15
Figure 13. Burn-In Circuit
1
5
6
9
10 11 12
7 8 1
1kΩ
B1
B2
B3
B4
B5
B6
B7
B8
10kΩ
5kΩ
+15V
2
5kΩ
–15V
LSB
MSB
+15V
B1 B2 B3 B4 B5 B6 B7 B8
14 13 12 11
6
5
4
3
7
6
5
4
2
V
IN
V
l
1
O
O
SERIAL
OUTPUT
AM2592
CONNECT START TO
E
OP02
DAC08
O
SUCCESSIVE-
APPROXIMATION
REGISTER
CONVERSION COMPLETE
FOR CONTINUOUS
CONVERSION
l
0.1µF
10
O
REF01
V
START
C
C
LC
V+
V–
GND
4
5kΩ
9
2
CONVERSION TTL CLOCK
COMPLETE INPUT 2.25MHz
–15V
+15V
–15V
B1 B2 B3 B4 B5 B6 B7 B8
E
Figure 17. DAC Reference
POS. FULL SCALE –1LSB
ZERO SCALE
1
1
0
0
1
0
0
0
1
0
0
0
1
0
0
0
1
0
0
0
1
0
0
0
1
0
0
0
1
0
1
0
+4.960
0.000
–4.960
–5.000
NEG. FULL SCALE +1LSB
NEG. FULL SCALE
Figure 14. Burn-In Circuit
Rev. H | Page 8 of 12
REF01
+15V
2
V
IN
I
OUT
+10V
V
6
5
O
VOLTAGE COMPLIANCE: –3V TO +25V
2
V
IN
REF01
10kΩ 0.1%
10kΩ 0.1%
6
V
O
TRIM
GND
REF01
+15V
4
10V
R
5
0.1µF
I
=
+ 1mA
OUT
TRIM
GND
R
–10V
OP02
5kΩ
4
–15V
–15V
Figure 18. 10 V Reference
Figure 19. Current Sink
Rev. H | Page 9 of 12
REF01
PRECISION CURRENT SOURCE
SUPPLY BYPASSING
A current source with 25 V output compliance and excellent
output impedance can be obtained using this circuit. REF01
keeps the line voltage and power dissipation constant in the
device; the only important error consideration at room
temperature is the negative supply rejection of the op amp.
The typical 3 µV/V PSRR of the OP02E creates an 8 ppm
change (3 µV/V × 25 V/10 V) in output current over a 25 V
range. For example, a 10 mA current source can be built
(R = 1 kΩ) with 300 MΩ output impedance.
For best results, it is recommended that the power supply pin be
bypassed with a 0.1 µF disc ceramic capacitor.
REFERENCE STACK WITH EXCELLENT LINE
REGULATION
Three REF01s can be stacked to yield 10 V, 20 V, and 30 V
outputs. An additional advantage is near-perfect line regulation
of the 10.0 V and 20.0 V output. A 32 V to 60 V input change
produces an output change that is less than the noise voltage of
the devices. A load bypass resistor (RB) provides a path for the
supply current (ISY) of the 20 V regulator.
25 V
RO
=
8×10−6 ×10 mA
In general, any number of REF01s can be stacked this way.
For example, 10 devices will yield outputs of 10 V, 20 V,
30 V . . . 100 V. The line voltage can change from 105 V to
130 V. However, care must be taken to ensure that the total
load currents do not exceed the maximum usable current
(typically 21 mA).
+50V
2
32V TO 60V
V
IN
6
TRIMMED
OUTPUTS
V
O
2
V
IN
30V
REF01
6
5
V
O
2
REF01
GND
4
10kΩ
2
TRIM
GND
4
V
IN
6
V
O
2
R
REF01
20V
C
(TRIM FOR
CALIBRATION)
V
6
5
IN
V
O
1
GND
4
REF01
R
C
TRIM
GND
10kΩ
2
10V
4
V
6
IN
V
O
7
2
3
REF01
6
V
= 0V
O
OP02E
4
TO 25V
R
B
6.8kΩ
5
TRIM
10kΩ
–5
GND
4
RC = 10 SEC
10V
I
=
O
R
–5V
Figure 20. Precision Current Source
Figure 21. Reference Stack
Rev. H | Page 10 of 12
REF01
OUTLINE DIMENSIONS
0.005 (0.13)
MIN
0.055 (1.40)
MAX
8
1
5
5.00 (0.1968)
4.80 (0.1890)
0.310 (7.87)
0.220 (5.59)
4
8
1
5
4
6.20 (0.2440)
5.80 (0.2284)
4.00 (0.1574)
3.80 (0.1497)
0.100 (2.54) BSC
0.405 (10.29) MAX
0.320 (8.13)
0.290 (7.37)
1.27 (0.0500)
BSC
0.50 (0.0196)
0.25 (0.0099)
0.060 (1.52)
0.015 (0.38)
0.200 (5.08)
MAX
× 45°
1.75 (0.0688)
1.35 (0.0532)
0.25 (0.0098)
0.150 (3.81)
MIN
0.10 (0.0040)
0.200 (5.08)
0.125 (3.18)
8°
0.51 (0.0201)
0.31 (0.0122)
0.015 (0.38)
0.008 (0.20)
0° 1.27 (0.0500)
COPLANARITY
0.10
0.25 (0.0098)
0.17 (0.0067)
SEATING
PLANE
0.023 (0.58)
0.014 (0.36)
SEATING
PLANE
15°
0°
0.40 (0.0157)
0.070 (1.78)
0.030 (0.76)
COMPLIANT TO JEDEC STANDARDS MS-012-AA
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
Figure 24. 8-Lead Standard Small Outline Package [SOIC]
Figure 22. 8-Lead Ceramic Dual In-Line Package [CERDIP]
Narrow Body
(R-8)
S-Suffix
(Q-8)
Z-Suffix
Dimensions shown in inches and (millimeters)
Dimensions shown in millimeters and (inches
0.400 (10.16)
0.365 (9.27)
0.355 (9.02)
8
1
5
4
0.280 (7.11)
0.250 (6.35)
0.240 (6.10)
REFERENCE PLANE
0.5000 (12.70)
0.325 (8.26)
0.310 (7.87)
0.300 (7.62)
MIN
0.1850 (4.70)
0.1650 (4.19)
PIN 1
0.1000 (2.54)
BSC
0.2500 (6.35) MIN
0.0500 (1.27) MAX
0.100 (2.54)
0.1600 (4.06)
0.1400 (3.56)
BSC
0.060 (1.52)
MAX
0.195 (4.95)
0.130 (3.30)
0.115 (2.92)
0.210
(5.33)
MAX
5
0.015
(0.38)
MIN
6
8
4
0.150 (3.81)
0.130 (3.30)
0.115 (2.92)
0.015 (0.38)
GAUGE
0.2000
(5.08)
BSC
3
7
0.014 (0.36)
0.010 (0.25)
0.008 (0.20)
PLANE
SEATING
PLANE
0.0450 (1.14)
0.0270 (0.69)
2
0.022 (0.56)
0.018 (0.46)
0.014 (0.36)
1
0.430 (10.92)
MAX
0.005 (0.13)
MIN
0.1000
0.0190 (0.48)
0.0160 (0.41)
(2.54)
BSC
0.0340 (0.86)
0.0280 (0.71)
0.0400 (1.02) MAX
0.0210 (0.53)
0.0160 (0.41)
0.070 (1.78)
0.060 (1.52)
0.045 (1.14)
0.0400 (1.02)
0.0100 (0.25)
45° BSC
BASE & SEATING PLANE
COMPLIANT TO JEDEC STANDARDS MS-001-BA
COMPLIANT TO JEDEC STANDARDS MO-002-AK
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
CORNER LEADS MAY BE CONFIGURED AS WHOLE OR HALF LEADS.
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
Figure 23. 8-Lead Metal Header [TO-99]
Figure 25. 8-Lead Plastic Dual In-Line Package [PDIP]
(H-08)
J-Suffix
Narrow Body
(N-8)
P-Suffix
Dimensions shown in inches and (millimeters)
Dimensions shown in inches and (millimeters)
Rev. H | Page 11 of 12
REF01
ORDERING GUIDE
TA = 25° C
Model
∆VOS Max (mV)
Temperature Range (°C)
−55 to +125
−40 to +85
0 to 70
Package Description1
8-Lead TO-99
8-Lead TO-99
8-Lead TO-99
8-Lead CERDIP
8-Lead CERDIP
8-Lead CERDIP
8-Lead PDIP
8-Lead PDIP
8-Lead PDIP
8-Lead PDIP
8-Lead SOIC
8-Lead SOIC
8-Lead SOIC
8-Lead SOIC
8-Lead SOIC
8-Lead SOIC
8-Lead SOIC
8-Lead SOIC
8-Lead SOIC
8-Lead SOIC
Package Option
J-Suffix (H-08)
J-Suffix (H-08)
J-Suffix (H-08)
Z-Suffix (Q-8)
Z-Suffix (Q-8)
Z-Suffix (Q-8)
P-Suffix (N-8)
P-Suffix (N-8)
P-Suffix (N-8)
P-Suffix (N-8)
S-Suffix (R-8)
S-Suffix (R-8)
S-Suffix (R-8)
S-Suffix (R-8)
S-Suffix (R-8)
S-Suffix (R-8)
S-Suffix (R-8)
S-Suffix (R-8)
S-Suffix (R-8)
S-Suffix (R-8)
REF01AJ/883C
REF01EJ
REF01CJ
REF01EZ
REF01HZ
30
30
100
30
50
−40 to +85
−40 to +85
−55 to +125
−40 to +85
−40 to +85
−40 to +85
−40 to +85
−40 to +85
−40 to +85
−40 to +85
−40 to +85
−40 to +85
−40 to +85
−40 to +85
−40 to +85
−40 to +85
−40 to +85
REF01AZ/883C
30
REF01CP
100
100
50
50
50
50
50
50
100
100
100
100
100
100
REF01CPZ2
REF01HPZ2
REF01HP
REF01HS3
REF01HS-REEL3
REF01HSZ2, 3
REF01HSZ-REEL2, 3
REF01CS3
REF01CS-REEL3
REF01CS-REEL73
REF01CSZ-REEL2, 3
REF01CSZ-REEL72, 3
REF01CSZ2, 3
1 Burn-in is available on commercial and industrial temperature range parts in CERDIP, PDIP, and TO-99 packages.
2 Z = Pb-free part.
3 For availability and burn-in information on SOIC packages, contact your local Sales office.
©
2005 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
C00373-0-12/05(H)
Rev. H | Page 12 of 12
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