SSM2404P [ADI]
Quad Audio Switch; 四路音频开关
| 型号： | SSM2404P |
| 厂家： | 
ADI |
| 描述： | Quad Audio Switch |
| 文件： | 总8页 (文件大小：321K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
a
Quad Audio Switch
SSM2404
BLO CK D IAGRAM O F O NE SWITCH CH ANNEL
FEATURES
“CIickless” Bilateral Audio Sw itching
Four SPST Sw itches in a 20-Pin Package
Ultralow THD+N: 0.0008% @ 1 kHz (2 V rm s,
RL = 100 k⍀)
Low Charge Injection: 35 pC typ
High OFF Isolation: –100 dB typ (RL = 10 k⍀ @ 1 kHz)
Low Crosstalk: –94 dB typ (RL = 10 k⍀ @ 1 kHz)
Low ON Resistance: 28 ⍀ typ
V–
LOGIC INTERFACE
CONTROL
SW1 A
SW1 B
RAMP
GENERATOR
AND
BREAK-BEFORE-MAKE
CONTROL
DIGITAL
CONTROL
Low Supply Current: 900 A typ
Single or Dual Supply Operation: +11 V to +24 V or
؎5.5 V to ؎12 V
V+
Guaranteed Break-Before-Make
TTL and CMOS Com patible Logic Inputs
Low Cost-Per-Sw itch
P IN CO NNECTIO NS
Epoxy Mini-D IP (P Suffix)
and SO IC (S Suffix)
1
2
3
4
5
6
20
SW4 A
SW1 A
AGND
GENERAL D ESCRIP TIO N
SW1
SW4
19 AGND
T he SSM2404 integrates four SPST analog switches in a single
20-pin package. Developed specifically for high performance
audio applications, distortion and noise are negligible over the
full operating range of 20 Hz to 20 kHz. With very low charge
injection of 35 pC, “clickless” audio switching is possible, even
under the most demanding conditions.
18
SW1 B
DGND
SW4 B
17 V+
SSM2404
SW1 CONTROL
SW2 CONTROL
16 SW4 CONTROL
15 SW3 CONTROL
Switch control is realized by conventional T T L or CMOS
logic. Guaranteed “break-before-make” operation assures that
all switches in a large system will open before any switch
reaches the ON state.
NC
SW2 B
AGND
*
7
8
9
14
13 SW3 B
SW3 12 AGND
11
V–
SW2
Single or dual supply operation is possible. Additional features
include –100 dB OFF isolation, –94 dB crosstalk and 28 Ω ON
resistance. Optional current-mode switching permits an
extended signal-handling range. Although optimized for large
load impedances, the SSM2404 maintains good audio
performance even under low load impedance conditions.
SW2 A 10
SW3 A
NC = NO CONNECT
*
CONNECT TO ANALOG GROUND
FOR BEST NOISE ISOLATION
REV. B
Inform ation furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assum ed by Analog Devices for its
use, nor for any infringem ents of patents or other rights of third parties
which m ay result from its use. No license is granted by im plication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norw ood, MA 02062-9106, U.S.A.
Tel: 617/ 329-4700 Fax: 617/ 326-8703
(V = ؎12 V, T = +25؇C, unless otherwise noted.
S
A
SSM2404–SPECIFICATIONS
Typical specifications apply at T = +25؇C.)
A
P aram eter
Sym bol
Conditions
Min
Typ Max
Units
AUDIO PERFORMANCE
T otal Harmonic Distortion Plus Noise
T HD+N
@ 1 kHz, with 80 kHz Filter,
RL = 100 kΩ, VIN = 2 V rms
20 Hz to 20 kHz
0.0008
0.8
0.6
%
Spectral Noise Density
Wideband Noise Density
en
en p-p
nV/√Hz
µV p-p
20 Hz to 20 kHz
ANALOG SIGNAL SECT ION
Analog Voltage Range
Analog Current Range
ON Resistance
VA
IA
RON
RON Match
IS(ON)
IS(OFF)
Q
VINH = 2.4 V, IA = ±2 mA
VINH = 2.4 V, VA = 0 V
IA = ±10 mA, VA = ±10 V dc
IA = ±10 mA, VA = 0 V
VA = ±10 V
±12
±10
28
V
mA
Ω
45
RON Matching
1
%
ON Leakage Current
OFF Leakage Current
Charge Injection
ON-State Input Capacitance
OFF-State Input Capacitance
OFF Isolation
–20
–20
0.1
0.1
35
31
17
+20
+20
nA
nA
pC
pF
pF
dB
dB
VA = ±10 V
CON
VA = 5 V rms
VA = 5 V rms
VA = 50 mV rms, f = 1 kHz, RL = 10 kΩ
VA = 50 mV rms, f = 1 kHz, RL = 10 kΩ
COFF
ISO(OFF)
CT
–100
–94
Channel-to-Channel Crosstalk
CONT ROL SECT ION
Digital Input High
Digital Input Low
T urn-On T ime1
VINH
VINL
tON
tOFF
tON-tOFF
DGND = 0 V
DGND = 0 V
See T est Circuit
See T est Circuit
2.4
0
VS
0.8
50
30
20
V
V
ms
ms
ms
8
5
3
T urn-Off T ime2
Break-Before-Make T ime Delay
Logic Input Current
Logic HI
VINH = 2.4 V
VINL = 0.8 V
–1000 1.3
–1000 1.0
+1000 nA
+1000 nA
Logic LO
POWER SUPPLY
Supply Voltage Range
VS
Single Supply
Dual Supply
All Channels On
All Channels On
All Channels On
+11
±5.5
0.9
+24
±12
5
V
V
mA
mA
mA
Positive Supply Current
Negative Supply Current
Ground Current
ISY+
ISY–
–1.5
–2.0
–0.6
–0.3
NOT ES
1T urn-on time is measured from the time the logic input reaches the 50% point to the time the output reaches 50% of the final value.
2T urn-off time is measured from the time the logic input reaches the 50% point to the time the output reaches 50% of the initial value.
Specifications subject to change without notice.
ABSO LUTE MAXIMUM RATINGS
Supply Voltage
Single Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +27 V
Dual Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±13.5 V
Analog Input Voltage (VA) . . . . . . . . . . . . . . . . . . . . . . . . . . VS
O RD ERING GUID E
O perating
Tem perature
Range
P ackage
O ption*
Model
P ackage
Logic Input Voltage (VINL/INH
)
. . . . . . . . . . . . . . . . . . . . . . VS
SSM2404P –40°C to +85°C 20-Pin Plastic DIP N-20
Maximum Current T hrough Any Switch . . . . . . . . . . . 20 mA
Operating T emperature Range . . . . . . . . . . . . –40°C to +85°C
Storage T emperature Range . . . . . . . . . . . . –65°C to +150°C
Junction T emperature (TJ) . . . . . . . . . . . . . . . . . . . . +150°C
Lead T emperature (Soldering, 60 sec) . . . . . . . . . . . . +300°C
T hermal Resistance1
SSM2404S –40°C to +85°C 20-Pin SOIC
R-20
*N = Plastic DIP, R = SOIC.
20-Pin Plastic DIP (P): θJA = 74, θJC = 32 . . . . . . . . . °C/W
20-Pin SOIC (S): θJA = 90, θJC = 27 . . . . . . . . . . . . . . °C/W
NOT E
1θJA is specified for worst case mounting conditions, i.e., θJA is specified for device
in socket for P-DIP package.
–2–
REV. B
SSM2404
V
= 50mV
RMS
A (IN)
f = 20Hz TO 100kHz
V
A (OUT)
R
= 10kΩ AND 100kΩ
L
V
50Ω
A (IN)
V
A (OUT)
OFF ISOLATION = 20 LOG
V
A (IN)
OFF Isolation Test Circuit
HIGH
LOGIC
INPUT
tr 100ns
tf 100ns
1.4V
1.4V
LOW
LOW
Figure 2. Headroom (VS = ±12 V, f = 1 kHz, with
80 kHz Filter)
DC VOLTAGE
CLOSED
50%
V
A (IN)
50%
OPEN
OPEN
V
A (OUT)
1.0
0.1
tON
tOFF
tON/tOFF Tim ing Diagram
+12V
0.01
0.001
V+
V
A (IN)
V
A (OUT)
SWITCH
CONROL
GND
V–
0.0001
100
1k
10k
100k
–12V
LOAD RESISTANCE – Ω
Figure 3. THD+N vs. Load (VS = ±12 V, VA = 2 V rm s,
f = 1 kHz, with 80 kHz Filter)
Test Circuit for tON/tOFF Tim ing Specification, tON/tOFF
Switching Response, and ON/OFF Transition Photos
0.01
0.001
0.0001
0
±4
±8
±12
SUPPLY VOLTAGE – V
Figure 1. THD+N vs. Frequency (VS = ±12 V,
VA = 2 V rm s, with 80 kHz Filter)
Figure 4. THD+N vs. Supply Voltage (VA = 2 V rm s,
f = 1 kHz, RL = 100 kΩ, with 80 kHz Filter)
REV. B
–3–
SSM2404
9.5
9.0
8.5
8.0
T
= 25°C
= ±12V
A
V
S
f = 20kHz
7.5
7.0
6.5
6.0
100
1k
10k
100k
LOAD RESISTANCE – Ω
Figure 8. Output Voltage Swing vs. Load Resistance
Figure 5. Frequency Response (VS = ±12 V,
VA = 1 V rm s, RL = 100 kΩ)
10
9
8
CH A: 8.00µV FS
MKR: 0.11µV/ Hz
1.00µV/DIV
7
T
R
= 25°C
= 100kΩ
A
6
5
4
3
2
1
L
f = 20kHz
0.1% THD + N
0Hz
25kHz
MKR: 20 000Hz
BW: 150Hz
0
±4
±6
±8
SUPPLY VOLTAGE – Volts
±10
±12
Figure 9. Output Voltage Swing vs. Supply Voltage
Figure 6. SSM2404 Spectral Noise Density e
[5 Devices (20 Switches) Chained Together]
n
–20
T
= 25°C
= ±12V
= 50mV
A
–30
–40
–50
–60
–70
V
S
V
A
RMS
10V
R
= 100k
L
100
90
INPUT
0V
0V
–80
–90
R
= 10k
L
10
OUTPUT
–100
–110
–120
0%
5µs
10V
10
100
1k
10k
100k
FREQUENCY – Hz
Figure 7. Square Wave Response (TA = +25°C,
VS = ±12 V, RL = 100 kΩ, f = 20 kHz)
Figure 10. OFF-Isolation vs. Frequency
–4–
REV. B
SSM2404
50
40
0
–15
T
= 25°C
= ±12V
A
V
S
V
= 50mV
A
RMS
–30
V
= ±12V
S
V
= 0.8V
30
INL
–45
R
= ∞
L
–60
–40°C TO +85°C
R
= 100k
20
L
–75
10
R
= 10k
–90
L
–105
–120
–135
–150
0
–10
–20
–10
10
100
1k
10k
100k
–5
0
5
10
FREQUENCY – Hz
ANALOG INPUT VOLTAGE – Volts
Figure 11. Channel-to-Channel Crosstalk vs. Frequency
(Worst Case Conditions, as Measured Between
Switches 1 and 4, or 2 and 3)
Figure 14. Leakage Current vs. Analog Voltage
50
20
V
= ±12V
V
= ±12V
= ±5V
18
16
14
12
10
8
S
S
V
R
I
= ∞
= 10mA
L
A
40
30
20
10
0
R
=
∞
A
L
+85
°
C
+25°
C
T
ON
–40°C
6
T
OFF
4
2
0
–40
0
–10
–5
5
10
–20
0
20
40
60
80
100
ANALOG INPUT VOLTAGE – Volts
TEMPERATURE – °C
Figure 12. ON Resistance vs. Analog Voltage
Figure 15. Switching Tim e vs. Tem perature
90
80
70
60
50
40
30
20
10
0
1.0
0.8
T
= 25°C
= ±12V
A
I
V
SY+
S
R
= ∞
0.6
L
V
= ±12V
= GND
= 2.4V
S
0.4
0.2
V
A
V
INH
0
V
= 0.8V
IL
–0.2
–0.4
–0.6
–0.8
–1.0
I
I
SY–
GND
V
IH
= 2.4V
–10
–20
–40
–20
0
20
40
60
80
100
–15
–10
–5
0
5
10
15
TEMPERATURE – °C
ANALOG INPUT VOLTAGE – Volts
Figure 16. Supply Current vs. Tem perature
Figure 13. Overvoltage Characteristics
REV. B
–5–
SSM2404
SSM2404 can also be configured as a 4:1 multiplexer, or by
using additional packages, as 8:1 or 16:1 and up. T he break-
before-make feature is guaranteed from part to part allowing
such multiple-package applications.
10V
ANALOG
OUTPUT
100
90
5V
V
A (OUT)
0
As Figure 20 shows, the SSM2404 is easy to use, and no ad-
ditional devices are needed. The load resistors are recommended
for improved OFF-isolation and charge injection. T he ON
resistance of the switch is only 28 Ω typically, which causes very
little signal attenuation even with a load resistor.
LOGIC
INPUT
10
5V
0%
V
0
INL/INH
5ms/div
IN1
1
2
3
4
5
6
20
SW4 19
18
IN4
Figure 17. tON/tOFF Switching Response
SW1
R
R
L
L
OUT1
OUT4
+12V
17
DGND
SSM2404
16
15
14
13
12
11
SW1 CONTROL
SW2 CONTROL
SW4 CONTROL
SW3 CONTROL
–12V
100
90
7
8
CLOSED
(SWITCH ON)
OUT2
OUT3
R
L
R
L
SW
SWITCH
9
SW2
SW3
OPEN
CONTROL STATE
10
0%
(SWITCH OFF)
10
IN2
IN3
OFF
ON
0
1
50mV
50µs
R
IS OPTIONAL
L
Figure 18. Switch OFF-to-ON Transition (RL = 5 kΩ)
Figure 20. Basic Circuit Configuration
O P TIMIZING P ERFO RMANCE
As the performance curves show, the switch is optimized for
high impedance loads. T he distortion performance is at its best
when the switch has a load impedance of 100 kΩ or greater as
shown in Figure 1. However, even at lower values of load resis-
tances, the 1 kHz distortion performance is still excellent,
0.006% for a 10 kΩ load. T he main trade-off with T HD is
OFF-isolation and crosstalk. T his is shown in Figures 10 and
11, again with two different load conditions. As these graphs
show, the 10 kΩ load yields approximately a 16 dB improve-
ment in both characteristics.
100
90
CLOSED
(SWITCH ON)
OPEN
(SWITCH OFF)
10
0%
50mV
50µs
T hus, the optimum operating point depends on the most criti-
cal parameters. When T H D is critical then high load imped-
ances should be used; however, when crosstalk and OFF-
isolation are critical, lower impedances on the order of 10 kΩ
should be used. An additional benefit of using the smaller
load resistor is that any charge injected onto the output will be
shunted to ground through the resistor. If improved OFF-
isolation is needed, the SSM2404 dual audio switch should be
considered with its excellent 120 dB OFF-isolation at 20 kHz.
Figure 19. Switch ON-to-OFF Transition (RL = 5 kΩ)
AP P LICATIO NS INFO RMATIO N
T he SSM2404 integrates four analog CMOS switches with
guaranteed “break-before-make” operation to provide high
quality audio switching. Each switch has complementary
N-channel and P-channel MOSFET s to allow the analog input
voltage range to include the positive and negative rails and
improve linearity. In addition, the topology permits fully
bilateral switching. When using the SSM2404 there is full
flexibility in configuring the switches. For example, they can be
used individually as shown in Figure 20, or as a double-pole,
double-throw (DPDT ) switch, which is explained later. T he
It is important that all of the AGND pins be connected to the
system analog ground. T hese pins isolate the input and output
of each switch. Without connecting these pins, the OFF-
isolation will degrade significantly.
–6–
REV. B
SSM2404
voltages of N4 and P4 are changing, the ON resistance of each
switch is ramping from its OFF state to 28 Ω and vice versa.
T he actual rise and fall times are shown in Figures 18 and 19
for a 5 kΩ load. T hese times are significantly slower than
typical switches, minimizing the SSM2404’s charge injection
and giving it “clickless” performance.
D ETAILED SWITCH O P ERATIO N
A simplified circuit schematic with the functional sections is
shown in Figure 21. T he T T L interface has an internally
regulated 5 V to ensure T T L logic levels regardless of the supply
voltage. T he logic threshold is with respect to the DGND pin,
which can be offset. For example, if DGND is connected to the
negative supply, then the SSM2404 will operate with negative
rail logic. T he interface shifts the control logic down to the
negative supply and inverts it to drive N1.
D O UBLE-P O LE D O UBLE-TH RO W SWITCH
T he SSM2404 is ideal as a one-chip solution for a stereo
switch. T he schematic in Figure 22 shows the typical configura-
tion. T his circuit will select one of two stereo sources, channel
A or B. T he switch controls for the left and right input of each
channel are tied together so that both will be turned on or off
simultaneously. An inverter is inserted between the channel A
and B controls so that only one logic signal is needed. T he out-
puts can be configured many different ways, such as an invert-
ing or noninverting amplifier stage, and the 10 kΩ load resistors
are added to improve the OFF-isolation. T he performance of
this stereo switch is equivalent to each individual switch, yield-
ing a high quality audio switch that is virtually transparent to
the signal.
V+
100nA
100nA
P1
SW1 A
BIAS
–1
P2
P3
C1
15pF
N4
P4
C2
SW
15pF
TTL
CONTROL
–1
INTERFACE
DGND
V+
17
SW1 B
N2
N3
N1
V–
SSM2404
BREAK-BEFORE-MAKE
RAMP GENERATOR
10
1
8
3
SW2
L
L
INA
INB
Figure 21. Sim plified Schem atic
N1 in combination with C1 and the 100 nA current source
L
OUT
SW1
10kΩ
provides the break-before-make operation of the switch. When
the switch is on, N1 is off and C1 is charged up to the positive
rail. However, when the SW CONT ROL is turned off, then the
gate of N1 is pulled high. T his turns N1 on, providing a low
impedance path to quickly discharge C1 to the negative rail,
which quickly “breaks” the switch. On the other hand, when the
SW CONT ROL goes high again, the gate of N1 is pulled low,
turning it off. T his leaves C1 to be slowly charged up to the
positive rail by the 100 nA current source. T he difference in the
discharge and charging times ensures break-before-make
operation, even from device to device.
2
6
SW2 CONTROL
AGND
SWA/SWB
9
15
4
SW3 CONTROL
DGND
12
19
5
SW1 CONTROL
SW4 CONTROL
CHANNEL
SWA/SWB SELECTED
16
0
1
B
A
11
20
13
18
SW3
SW4
R
R
INA
INB
R
OUT
10kΩ
14
V–
T he voltage on C1 is inverted by P1 to drive the ramp generator
differential pair, consisting of P2, P3 and N2, N3. T his dif-
ferential pair steers the 100 nA of tail current to either charge or
discharge C2. As discussed above, when the switch is on, C1 is
charged up to the positive rail. P1 inverts this, putting a low
voltage equivalent to the negative supply on the gate of P2. T he
BIAS voltage is approximately equal to the midpoint of the two
supply voltages. T hus, when P2 is pulled down, it is turned on
and P3 is off. All of the 100 nA flows through N2 and is mir-
rored by N3. T hus, the 100 nA discharges C2 through N3.
When C2 is pulled low, the inverter turns N4 on by pulling its
gate high, and the second inverter turns P4 on. T o turn the
switch off the gate of P2 is pulled above the BIAS so that all
100 nA charges C2 through P3. T his is then inverted to turn off
N4 and P4.
Figure 22. Double-Pole, Double-Throw Stereo Switch
VIRTUAL GRO UND SWITCH ING
T he SSM2404 was built on a CMOS process with a 24 V
operating limit for the total supply voltage across the part. T his
leads to a corresponding limit on the analog voltage range. How-
ever, to achieve larger signal swings, the SSM2404 should be
configured in the virtual ground mode. As shown in Figure 23,
the output of the SSM2404 is connected to the inverting input
of an amplifier. Since the noninverting input is grounded, the
SSM2404 will also be biased at ground, and large voltage
swings on the circuit’s input will not significantly change the
voltage on the switch. T he only limitation is that the current
through the switch needs to be less than ±10 mA, and the voltage
range is limited only by the op amp and its supply voltages.
T he internal ramp has rise and fall times on the order of a few
milliseconds which is sped up by the inverters. As the gate
REV. B
–7–
SSM2404
T he circuit was tested with an SSM2131 high slew rate audio
amplifier and the results are shown in Figures 24 and 25. T his
configuration yields excellent T HD performance that is
primarily determined by the amplifier. Also, the headroom is
now +24 dBu (0 dBu = 0.775 V rms), which is due to the
amplifier’s output voltage swing. T hus, even though the
SSM2404 has a ±12 V limitation on its supplies, it can be used
in systems with much higher voltage ranges. For example, the
double-pole double-throw switch from Figure 22 can be
reconfigured in the virtual ground mode to allow higher voltage
swings, as shown in Figure 26. T his application realizes the
excellent performance of Figures 24 and 25 while providing a
low cost switching solution.
V+
17
SSM2404
5k
Ω
8
3
10
1
L
L
INA
INB
5k
Ω
SW2
5k
Ω
L
OUT
SW1
SSM2131
6
SW2 CONTROL
2
SWA/SWB
AGND
15
4
9
SW3 CONTROL
DGND
12
19
5
16
11
SW1 CONTROL
SW4 CONTROL
+12V
5k
5k
Ω
13
18
R2
5kΩ
R
INA
SW3
5k
Ω
SSM2404
SW1 A
+18V
SSM2131
–18V
R1
5kΩ
Ω
20
1
3
R
AUDIO
IN
INB
R
SW4
OUT
SW1 B
AUDIO
OUT
14
V–
SSM2131
1N914
–12V
Figure 26. Double-Pole, Double-Throw Stereo Switch
Using Virtual Ground Operation
Figure 23. Virtual Ground Switching
O UTLINE D IMENSIO NS
D imensions shown in inches and (mm).
Mini-D IP (P Suffix)
11
10
20
1
0.280 (7.11)
0.240 (6.10)
PIN 1
0.325 (8.25)
0.300 (7.62)
1.060 (26.90)
0.925 (23.50)
0.060 (1.52)
0.015 (0.38)
0.210
(5.33)
MAX
0.195 (4.95)
0.115 (2.93)
0.150
(3.81)
MIN
0.200 (5.05)
0.015 (0.381)
0.008 (0.204)
0.125 (3.18)
Figure 24. Virtual Ground Switch THD+N vs. Frequency
(VS = ±12 V, VA = 2 V rm s, with 80 kHz Filter)
0.022 (0.558)
0.014 (0.356)
0.100 (2.54)
BSC
0.070 (1.77)
0.045 (1.15)
SEATING
PLANE
SO IC (S Suffix)
0.5118 (13.00)
0.4961 (12.60)
20
11
0.2992 (7.60)
0.2914 (7.40)
PIN 1
0.4193 (10.65)
0.3937 (10.00)
1
10
0.1043 (2.65)
0.0926 (2.35)
0.0500 (1.27)
0.0291 (0.74)
0.0098 (0.25)
X
45
°
BSC
0
°- 8°
0.0500 (1.27)
0.0157 (0.40)
0.0118 (0.30)
0.0040 (0.10)
0.0192 (0.49)
0.0138 (0.35)
0.0125 (0.32)
0.0091 (0.23)
Figure 25. Virtual Ground Switch Headroom (VS = ±12 V
for SSM2404; VS = ±18 V for Op Am p, f = 1 kHz, with
80 kHz Filter)
–8–
REV. B
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