概述
数据手册
替代型号ADM13307-5ARZ-RL7 概述
Triple Processor Supervisors 三重处理器监事 电源监控芯片
ADM13307-5ARZ-RL7 数据手册
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PDF下载Triple Processor Supervisors
ADM13307
FUNCTIONAL BLOCK DIAGRAMS
FEATURES
Triple supervisory circuits
ADM13307-18
ADM13307-25
Supply voltage range of 2.0 V to 5.5 V
Pretrimmed threshold options: 1.8 V, 2.5 V, 3.3 V, and 5 V
Adjustable 0.6 V and 1.25 V voltage references
Maximum supply current of 40 μA
140 ms (minimum) reset timeout
V
ADM13307-33
DD
14kΩ
MR
RESET
SENSE1
RESET
LOGIC + TIMER
R1
R3
RESET valid from VDD ≥ 1.1 V
R2
Push-pull RESET and RESET outputs
8-lead, narrow body SOIC package
Temperature range: −40°C to +85°C
RESET
SENSE2
GND
R4
APPLICATIONS
1.25V
OSCILLATOR
Supervising DSPs/microcontrollers
Industrial and portable equipment
Wireless systems
SENSE3
Notebook/desktop computers
Figure 1.
GENERAL DESCRIPTION
The ADM13307 is a triple voltage supervisor designed to
monitor up to three voltage levels in DSP and microprocessor-
based systems.
ADM13307-4
ADM13307-5
V
DD
14kΩ
There are five models available, all of which feature a combina-
tion of internally pretrimmed undervoltage threshold options
for monitoring 1.8 V, 2.5 V, 3.3 V, and 5 V supplies. There are
also two adjustable input options with undervoltage thresholds of
either 0.6 V or 1.25 V.
MR
SENSE1
GND
RESET
RESET
RESET
LOGIC + TIMER
R1
R2
The ADM13307-18, ADM13307-25, and ADM13307-33
models have two internally fixed thresholds and one externally
programmable threshold via a resistor string. The ADM13307-4
and ADM13307-5 offer one internally fixed threshold and two
externally programmable thresholds. See the Ordering Guide
for a list of all available options.
SENSE2
0.6V
OSCILLATOR
SENSE3
During power-up,
is asserted when the supply voltage
RESET
exceeds 1.1 V. The device then monitors the SENSEv input
pins and holds the output low as long as the SENSEv
Figure 2.
RESET
pins remain below the rising threshold voltage, VIT+
.
The ADM13307 features both an active high RESET and an
RESET
Once the supplies monitored at the SENSEv inputs rise above
their associated thresholds, the reset signal remains low for the
reset timeout period before deasserting. Subsequently, if a volt-
age monitored by the SENSEv pins falls below its associated
active low
output.
The manual reset input of the ADM13307 can be used to initiate
a reset by means of an external push button or logic signal.
The ADM13307 is available in an 8-lead narrow body SOIC
package. The device operates over the extended industrial
temperature range of −40°C to +85°C.
falling input threshold voltage, VIT−, the
output asserts.
RESET
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registeredtrademarks arethe property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
www.analog.com
©2007 Analog Devices, Inc. All rights reserved.
ADM13307
TABLE OF CONTENTS
Features .............................................................................................. 1
Thermal Resistance.......................................................................6
ESD Caution...................................................................................6
Pin Configuration and Function Descriptions..............................7
Typical Performance Characteristics ..............................................8
Theory of Operation ...................................................................... 10
Input Configuration................................................................... 10
Reset Output ............................................................................... 10
Applications....................................................................................... 1
General Description......................................................................... 1
Functional Block Diagrams............................................................. 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Timing Requirements .................................................................. 5
Switching Characteristics ............................................................ 5
Functional Truth Table ................................................................ 5
Absolute Maximum Ratings............................................................ 6
MR
).................................................................... 10
Manual Reset (
Outline Dimensions....................................................................... 11
Ordering Guide .......................................................................... 11
REVISION HISTORY
8/07—Revision 0: Initial Version
Rev. 0 | Page 2 of 12
ADM13307
SPECIFICATIONS
VDD = 2.0 V to 5.5 V, −40°C ≤ TA ≤ +85°C, unless otherwise noted.
Table 1. ADM13307-18, ADM13307-25, and ADM13307-33
Parameter
Min
Typ
Max
5.5
Unit
V
Test Conditions/Comments
OPERATING VOLTAGE RANGE, VDD
SUPPLY CURRENT, IDD
2.0
40
μA
pF
INPUT CAPACITANCE, CI
RESET, RESET Output
10
VI = 0 V to VDD
High Level Output Voltage, VOH
VDD − 0.2
VDD − 0.4
VDD − 0.4
V
V
V
V
V
V
V
IOH = −20 μA
IOH = −2 mA, VDD = 3.3 V
IOH = −3 mA, VDD = 5.5 V
IOL = 20 μA
IOL = 2 mA, VDD = 3.3 V
IOL = 3 mA, VDD = 5.5 V
IOL = 20 μA, VDD ≥ 1.1 V
Low Level Output Voltage, VOL
0.2
0.4
0.4
0.4
Power-Up Reset Voltage1
SENSE INPUTS
Falling Input Threshold Voltage, VIT−
1.22
1.64
2.20
2.86
4.46
1.22
1.64
2.20
2.86
4.46
1.25
1.68
2.25
2.93
4.55
1.25
1.68
2.25
2.93
4.55
10
1.28
1.72
2.30
3.00
4.64
1.29
1.73
2.32
3.02
4.67
V
V
V
V
V
V
V
V
TA = 0°C to 85°C
TA = 0°C to 85°C
TA = 0°C to 85°C
TA = 0°C to 85°C
TA = 0°C to 85°C
TA = −40°C to +85°C
TA = −40°C to +85°C
TA = −40°C to +85°C
TA = −40°C to +85°C
TA = −40°C to +85°C
VIT− = 1.25 V
V
V
Hysteresis at SENSEv Inputs, VHYS
mV
mV
mV
mV
mV
15
20
30
40
VIT− = 1.68 V
VIT− = 2.25 V
VIT− = 2.93 V
VIT− = 4.55 V
MR
INPUT VOLTAGE AT
High Level, VIH
Low Level, VIL
0.7 × VDD
V
0.3 × VDD
50
V
INPUT TRANSITION RISE AND FALL RATE AT MR
ns/V
HIGH LEVEL INPUT CURRENT, IH
MR
−130
−180
8
9
μA
μA
μA
nA
MR = 0.7 × VDD, VDD = 5.5 V
SENSE1 = VDD = 5.5 V
SENSE2 = VDD = 5.5 V
SENSE3 = VDD
SENSE1
SENSE2
SENSE3
5
6
−25
−25
+25
LOW LEVEL INPUT CURRENT, IL
MR
−430
−600
+25
μA
nA
MR = 0 V, VDD = 5.5 V
SENSEv
SENSE1, SENSE2, SENSE3 = 0 V
1
RESET
The lowest supply voltage at which
becomes active. tr, VDD ≥ 15 μs/V.
Rev. 0 | Page 3 of 12
ADM13307
VDD = 2.0 V to 5.5 V, −40°C ≤ TA ≤ +85°C, unless otherwise noted.
Table 2. ADM13307-4 and ADM13307-5
Parameter
Min
Typ
Max
5.5
Unit
V
Test Conditions/Comments
OPERATING VOLTAGE RANGE, VDD
SUPPLY CURRENT, IDD
2.0
40
μA
pF
INPUT CAPACITANCE, CI
RESET, RESET Output
10
VI = 0 V to VDD
High Level Output Voltage, VOH
VDD − 0.2
VDD − 0.4
VDD − 0.4
V
V
V
V
V
V
V
IOH = −20 μA
IOH = −2 mA, VDD = 3.3 V
IOH = −3 mA, VDD = 5.5 V
IOL = 20 μA
IOL = 2 mA, VDD = 3.3 V
IOL = 3 mA, VDD = 5.5 V
IOL = 20 μA, VDD ≥ 1.1 V
Low Level Output Voltage, VOL
0.2
0.4
0.4
0.4
Power-Up Reset Voltage1
SENSE INPUTS
Falling Input Threshold Voltage, VIT−
0.5946
0.5952
2.23
0.6
0.6
2.25
2.93
0
0.6048
0.6048
2.29
V
V
V
V
mV
mV
mV
TA = −40°C to +85°C
TA = −40°C to +85°C, 2.35 V ≤ VDD ≤ 5.5 V
TA = −40°C to +85°C
TA = −40°C to +85°C
VIT− = 0.6 V
2.90
2.98
Hysteresis at SENSEv Inputs, VHYS
20
30
VIT− = 2.25 V
VIT− = 2.93 V
MR
INPUT VOLTAGE AT
High Level, VIH
Low Level, VIL
0.7 × VDD
V
0.3 × VDD
50
V
INPUT TRANSITION RISE AND FALL RATE AT MR
ns/V
HIGH LEVEL INPUT CURRENT, IH
MR
−130
5
−180
8
+50
+25
μA
μA
nA
nA
MR = 0.7 × VDD, VDD = 5.5 V
SENSE1 = VDD = 5.5 V
SENSE2 = VDD = 5.5 V
SENSE3 = VDD
SENSE1
SENSE2
SENSE3
−50
−25
LOW LEVEL INPUT CURRENT, IL
MR
−430
−600
+25
μA
nA
MR = 0 V, VDD = 5.5 V
SENSEv
−25
SENSE1, SENSE2, SENSE3 = 0 V
1
RESET
The lowest supply voltage at which
becomes active. tr, VDD ≥ 15 μs/V.
Rev. 0 | Page 4 of 12
ADM13307
TIMING REQUIREMENTS
VDD = 2.0 V to 5.5 V, RL = 1 MΩ, CL = 50 pF, TA = 25°C.
Table 3. ADM13307-18, ADM13307-25 and ADM13307-33
Parameter
Pulse Width (tw)
SENSEv
Min
Typ
Max
Unit
Test Conditions/Comments
6
100
μs
ns
VSENSEvL = VIT− − 0.3 V, VSENSEvH = VIT+ + 0.3 V
VIH = 0.7 × VDD, VIL = 0.3 × VDD
MR
Table 4. ADM13307-4 and ADM13307-5
Parameter
Pulse Width (tw)
SENSEv
Min
Typ
Max
Unit
Test Conditions/Comments
30
μs
ns
VSENSEvL = VIT− − 0.3 V, VSENSEvH = VIT+ + 0.3 V
VIH = 0.7 × VDD, VIL = 0.3 × VDD
MR
100
SWITCHING CHARACTERISTICS
VDD = 2.0 V to 5.5 V, RL = 1 MΩ, CL = 50 pF, TA = 25°C
Table 5. ADM13307-18, ADM13307-25 and ADM13307-33
Parameter
Min Typ Max Unit Test Conditions/Comments
Delay Time (td)
140 200 280
200 500
ms
ns
ns
μs
μs
VI(SENSEv) ≥ VIT+ + 0.2 V, MR ≥ 0.7 × VDD
Propagation Delay, High-to-Low, MR to RESET1/RESET (tPHL
Propagation Delay, Low-to-High, MR to RESET/RESET1 (tPLH
Propagation Delay, High-to-Low, SENSEv to RESET1/RESET (tPHL
Propagation Delay, Low-to-High, SENSEv to RESET/RESET1 (tPLH
)
VI(SENSEv) ≥ VIT+ + 0.2 V, VIH ≥ 0.7 × VDD, VIL ≥ 0.3 × VDD
)
200 500
VI(SENSEv) ≥ VIT+ + 0.2 V, VIH ≥ 0.7 × VDD, VIL ≥ 0.3 × VDD
)
1
1
5
5
VIH = VIT+ + 0.3 V, VIL = VIT− − 0.3 V, MR ≥ 0.7 × VDD
VIH = VIT+ + 0.3 V, VIL = VIT− − 0.3 V, MR ≥ 0.7 × VDD
)
1 The reset timeout delay of 200 ms masks the propagation delay
Table 6. ADM13307-4 and ADM13307-5
Parameter
Min Typ Max Unit Test Conditions/Comments
Delay Time (td)
Propagation Delay, High-to-Low, MR to RESET1/RESET (tPHL
Propagation Delay, Low-to-High, MR to RESET/RESET1 (tPLH
Propagation Delay, High-to-Low, SENSEv to RESET1/RESET (tPHL
Propagation Delay, Low-to-High, SENSEv to RESET/RESET1 (tPLH
140 200 280
ms
ns
ns
μs
μs
VI(SENSEv) ≥ VIT+ + 0.2 V, MR ≥ 0.7 × VDD
)
200 500
200 500
30
VI(SENSEv) ≥ VIT+ + 0.2 V, VIH ≥ 0.7 × VDD, VIL ≥ 0.3 × VDD
)
VI(SENSEv) ≥ VIT+ + 0.2 V, VIH ≥ 0.7 × VDD, VIL ≥ 0.3 × VDD
)
VIH = VIT+ + 0.3 V, VIL = VIT− − 0.3 V, MR ≥ 0.7 × VDD
VIH = VIT+ + 0.3 V, VIL = VIT− − 0.3 V, MR ≥ 0.7 × VDD
)
30
1 The reset timeout delay of 200 ms masks the propagation delay.
FUNCTIONAL TRUTH TABLE
Table 7.
MR
SENSE1 > VIT1
SENSE2 > VIT2
SENSE3 > VIT3
RESET
RESET
L
X1
0
0
0
0
1
1
1
1
X1
0
0
1
1
0
0
1
1
X1
0
1
0
1
0
1
0
1
L
L
L
L
L
L
L
L
H
H
H
H
H
H
H
H
H
L
H
H
H
H
H
H
H
H
1 X = don’t care.
Rev. 0 | Page 5 of 12
ADM13307
ABSOLUTE MAXIMUM RATINGS
Table 8.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Parameter
Rating
Supply Voltage Range, VDD
MR
−0.3 V to +6 V
−0.3 V to VDD + 0.3 V
(VDD + 0.3 V)VIT/VREF
−0.3 V to +6 V
5 mA
SENSE1, SENSE2, SENSE3
RESET, RESET
Maximum Low Output Current
Maximum High Output Current
Input Clamp Current (VI < 0 V, VI > VDD
−5 mA
20 mA
THERMAL RESISTANCE
)
Table 9.
Output Clamp Current (VO < 0 V, VO > VDD
Operating Temperature Range
Storage Temperature Range
Lead Temperature
)
20 mA
−40°C to +85°C
−65°C to +150°C
Package Type
θJA
Unit
8-Lead SOIC_N (R-8)
206
°C/W
Soldering (10 sec)
Vapor Phase (60 sec)
Infrared (15 sec)
300°C
215°C
220°C
ESD CAUTION
Rev. 0 | Page 6 of 12
ADM13307
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
SENSE1
SENSE2
SENSE3
GND
1
2
3
4
8
7
6
5
V
DD
ADM13307
MR
RESET
RESET
TOP VIEW
(Not to Scale)
Figure 3.Pin Configuration
Table 10. Pin Function Descriptions
Pin No.
Mnemonic
SENSE1
SENSE2
SENSE3
GND
RESET
RESET
MR
Description
1
2
3
4
5
6
7
8
Sense Voltage Input 1.
Sense Voltage Input 2.
Sense Voltage Input 3.
Ground.
Active Low Reset Output.
Active High Reset Output.
Manual Reset.
VDD
Supply Voltage.
Rev. 0 | Page 7 of 12
ADM13307
TYPICAL PERFORMANCE CHARACTERISTICS
0.6003
0.6001
0.5999
0.5997
0.5995
0.5993
0.5991
0.5989
10
9
8
7
6
5
4
3
2
1
0
V
= 5.5V
DD
MR = OPEN
T
= 25°C
= 2V
A
V
0.5987
0.5985
DD
MR = OPEN
–40
–20
0
20
40
60 80
0
100 200 300 400 500 600 700 800 900 1000
SENSE THRESHOLD OVERDRIVE (mV)
FREE AIR TEMPERATURE, T (°C)
A
Figure 7. ADM13307-18, ADM13307-25 and ADM13307-33 Minimum Pulse
Duration at Sense vs. Sense Threshold Overdrive
Figure 4. Sense Threshold Voltage vs. Free Air Temperature at VDD
40
35
30
25
20
15
10
5
40
V
= 5.5V
DD
39
38
37
36
35
34
33
32
31
30
MR = OPEN
0
SENSEv = 5.5V
MR = OPEN
–5
T
= 25°C
A
–10
–1.0
0
1.0
2.0
3.0
4.0
5.0
5.5
6.0
0
100 200 300 400 500 600 700 800 900 1000
SENSE THRESHOLD OVERDRIVE (mV)
–0.5
0.5
1.5
2.5
3.5
4.5
6.5
SUPPLY VOLTAGE, V (V)
DD
Figure 5. Supply Current vs. Supply Voltage
Figure 8. ADM13307-4 and ADM13307-5 Minimum Pulse Duration at Sense
vs. Sense Threshold Overdrive
2.50
2.00
1.50
1.00
200
100
0
–100
–200
–300
–400
–500
–600
–700
–800
–900
–40°C
0°C
+25°C
+85°C
0.50
0
V
= 2V
V
= 5.5V
DD
DD
MR = OPEN
T
= 25°C
A
0
–1
–2
–3
–4
–5
–6
–1.0
0
1.0
2.0
3.0
4.0
5.0
6.0
7.0
–0.5
0.5
1.5
2.5
3.5
4.5
I
5.5
6.5
HIGH LEVEL OUTPUT CURRENT, I (mA)
OH
INPUT VOLTAGE AT MR, V (V)
MR
Figure 9. High Level Output Voltage vs. High Level Output Current
Figure 6. Input Current vs. Input Voltage at
Rev. 0 | Page 8 of 12
ADM13307
6.0
5.5
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
–40°C
0°C
+25°C
+85°C
–40°C
0°C
+25°C
+85°C
V
= 5.5V
V
= 5.5V
DD
MR = OPEN
DD
MR = OPEN
0
–10
–20
–30
–40
–50
–60
0
5
10 15 20 25 30 35 40 45 50 55 60
LOW LEVEL OUTPUT CURRENT, I (mA)
HIGH LEVEL OUTPUT CURRENT, I (mA)
OH
OL
Figure 10. High Level Output Voltage vs. High Level Output Current
Figure 12. Low Level Output Voltage vs. Low Level Output Current
0.25
–40°C
0°C
+25°C
+85°C
0.20
0.15
0.10
0.05
0
V
= 2V
DD
MR = OPEN
0
1
2
3
4
5 6
LOW LEVEL OUTPUT CURRENT, I (mA)
OL
Figure 11. Low Level Output Voltage vs. Low Level Output Current
Rev. 0 | Page 9 of 12
ADM13307
THEORY OF OPERATION
RESET OUTPUT
The ADM13307 devices are triple voltage supervisors designed
to monitor up to three supplies and provide a reset signal to
DSP and microprocessor-based systems.
The reset outputs are guaranteed to be in the correct state for
RESET
VDD down to 1.1 V. During power up,
the supply voltage becomes greater than 1.1 V.
Once the supplies monitored at the SENSEv pins rise above their
RESET
is asserted when
There are five models available, all of which feature a combina-
tion of internally pretrimmed undervoltage threshold options
for monitoring 1.8 V, 2.5 V, 3.3 V, and 5 V supplies. There are
also adjustable input options with threshold voltages of either
0.6 V or 1.25 V.
associated threshold level, the
signal remains low for the
reset timeout period before deasserting. Subsequently, if a supply
monitored by the SENSEv pins falls below its associated thresh-
RESET
old, the
output reasserts.
ADM13307-18, ADM13307-25, and ADM13307-33 models
have two internally fixed thresholds and one externally
programmable threshold, via a resistor string, while the
ADM13307-4 and ADM13307-5 offer one internally fixed
threshold and two externally programmable thresholds via a
resistor string. See the Ordering Guide for a list of all available
options.
SENSEv
V
(NOM)
V
IT–
t
RESET
INPUT CONFIGURATION
1
0
The ADM13307 is powered through VDD. To increase noise
immunity in noisy applications, place a 0.1 μF capacitor
between the VDD input and ground.
t
td
td
The SENSEv inputs are resistant to short power supply glitches.
Do not allow unused SENSEv inputs to float or to be grounded,
instead connect it to a supply voltage greater than its specified
threshold voltage.
Figure 14. Reset Timing Diagram
RESET
The ADM13307 features both an active-low push-pull
output and active-high push-pull RESET output.
Typically, the threshold voltage at an adjustable SENSEv input
is either 0.6 V or 1.25 V. Refer to the Ordering Guide for details.
MANUAL RESET (MR)
The ADM13307 features a manual reset input, which when driven
MR
transitions from low to high, the reset remains asserted for the
duration of the reset active timeout period before deasserting.
For example, to monitor a voltage greater than 1.25 V, con-
nect a resistor divider network to the device as depicted in
Figure 13, where,
low, asserts the reset output, as shown in Figure 15. When
R1+ R2
⎛
⎜
⎝
⎞
⎟
⎠
MR
An external push-button switch can be connected between
and ground to allow the user to generate a reset.
VMONITERED =1.25 V
R2
MR
1
MONITORED VOLTAGE
R1
t
t
0
1
R2
RESET
V
= 1.25V
REF
0
Figure 13. Setting the Adjustable Monitor
td
Figure 15. Manual Reset Timing Diagram
Rev. 0 | Page 10 of 12
ADM13307
OUTLINE DIMENSIONS
5.00 (0.1968)
4.80 (0.1890)
8
1
5
4
6.20 (0.2441)
5.80 (0.2284)
4.00 (0.1574)
3.80 (0.1497)
0.50 (0.0196)
0.25 (0.0099)
1.27 (0.0500)
BSC
45°
1.75 (0.0688)
1.35 (0.0532)
0.25 (0.0098)
0.10 (0.0040)
8°
0°
0.51 (0.0201)
0.31 (0.0122)
COPLANARITY
0.10
1.27 (0.0500)
0.40 (0.0157)
0.25 (0.0098)
0.17 (0.0067)
SEATING
PLANE
COMPLIANT TO JEDEC STANDARDS MS-012-AA
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
Figure 16. 8-Lead Standard Small Outline Package [SOIC_N]
Narrow Body
(R-8)
Dimensions shown in millimeters and (inches).
ORDERING GUIDE
Nominal Input Voltage
Threshold Voltage (Typical)
Temperature
Range
Package
Description
Package
Option
Model
SENSE1
3.3 V
3.3 V
3.3 V
3.3 V
5 V
SENSE2 SENSE3 SENSE1 SENSE2 SENSE3
ADM13307-18ARZ1
ADM13307-18ARZ-RL71
ADM13307-25ARZ1
ADM13307-25ARZ-RL71
ADM13307-33ARZ1
ADM13307-33ARZ-RL71
ADM13307-4ARZ1
ADM13307-4ARZ-RL71
ADM13307-5ARZ1
ADM13307-5ARZ-RL71
1.8 V
1.8 V
2.5 V
2.5 V
3.3 V
3.3 V
Adj3
Adj3
Adj3
Adj3
Adj2
Adj2
Adj2
Adj2
Adj2
Adj2
Adj3
Adj3
Adj3
Adj3
2.93 V
2.93 V
2.93 V
2.93 V
4.55 V
4.55 V
2.25 V
2.25 V
2.93 V
2.93 V
1.68 V
1.68 V
2.25 V
2.25 V
2.93 V
2.93 V
0.6 V
1.25 V
1.25 V
1.25 V
1.25 V
1.25 V
1.25 V
0.6 V
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N
R-8
R-8
R-8
R-8
R-8
R-8
R-8
R-8
R-8
R-8
5 V
2.5 V
2.5 V
3.3 V
3.3 V
0.6 V
0.6 V
0.6 V
0.6 V
0.6 V
0.6 V
1 Z = RoHS Compliant Part.
2 1.25 V adjustable. External resistor divider determines the actual sense voltage.
3 0.6 V adjustable. External resistor divider determines the actual sense voltage.
Rev. 0 | Page 11 of 12
ADM13307
NOTES
©2007 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D06923-0-8/07(0)
Rev. 0 | Page 12 of 12
ADM13307-5ARZ-RL7 替代型号
| 型号 | 制造商 | 描述 | 替代类型 | 文档 |
| ADM13307-5ARZ | ADI | Triple Processor Supervisors | 功能相似 |
|
ADM13307-5ARZ-RL7 相关器件
| 型号 | 制造商 | 描述 | 价格 | 文档 |
| ADM13307-5ARZRL7 | ADI | Triple Processor Supervisors | 获取价格 |
|
| ADM1345AN | ADI | IC TRIPLE LINE TRANSCEIVER, PDIP28, PLASTIC, DIP-28, Line Driver or Receiver | 获取价格 |
|
| ADM1345AR | ADI | IC TRIPLE LINE TRANSCEIVER, PDSO28, SOIC-28, Line Driver or Receiver | 获取价格 |
|
| ADM1345JN | ADI | IC TRIPLE LINE TRANSCEIVER, PDIP28, PLASTIC, DIP-28, Line Driver or Receiver | 获取价格 |
|
| ADM1345JR | ADI | IC TRIPLE LINE TRANSCEIVER, PDSO28, SOIC-28, Line Driver or Receiver | 获取价格 |
|
| ADM1385 | ADI | Low Power, +3.3 V, RS-232 Line Drivers/Receivers | 获取价格 |
|
| ADM1385ARS | ADI | Low Power, +3.3 V, RS-232 Line Drivers/Receivers | 获取价格 |
|
| ADM1385ARS-REEL | ADI | IC DUAL LINE TRANSCEIVER, PDSO20, MO-150AE, SSOP-20, Line Driver or Receiver | 获取价格 |
|
| ADM1385ARS-REEL7 | ROCHESTER | DUAL LINE TRANSCEIVER, PDSO20, MO-150AE, SSOP-20 | 获取价格 |
|
| ADM1385ARS-REEL7 | ADI | 暂无描述 | 获取价格 |
|
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