ADP1614 [ADI]
650 kHz/1.3 MHz, 4 A, Step-Up; 650千赫/ 1.3兆赫， 4 A，升压
| 型号： | ADP1614 |
| 厂家： | 
ADI |
| 描述： | 650 kHz/1.3 MHz, 4 A, Step-Up |
| 文件： | 总16页 (文件大小：403K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
650 kHz/1.3 MHz, 4 A, Step-Up,
PWM, DC-to-DC Switching Converter
ADP1614
Data Sheet
FEATURES
TYPICAL APPLICATIONS CIRCUIT
L1
Adjustable current limit, up to 4 A
2.5 V to 5.5 V input voltage range
650 kHz or 1.3 MHz fixed frequency option
Adjustable output voltage, up to 20 V
Adjustable soft start
ADP1614
D1
V
V
OUT
IN
8
3
6
7
VIN
EN
SW
SW
ON
R1
R2
OFF
C
IN
2
FB
Undervoltage lockout
Thermal shutdown
9
CLRES
3 mm × 3 mm, 10-lead LFCSP
Supported by ADIsimPower design tool
10
1
SS
4
COMP
GND GND EP
C
OUT
R
R
COMP
C
SS
CL
5
11
C
COMP
APPLICATIONS
TFT LCD bias supplies
Figure 1. Step-Up Regulator Configuration
Portable applications
Industrial/instrumentation equipment
GENERAL DESCRIPTION
The ADP1614 is a step-up, dc-to-dc switching converter with
an integrated power switch capable of providing an output
voltage as high as 20 V. The ADP1614 is available with a pin-
adjustable current limit that is set via an external resistor. The
boost switching frequency is fixed to either 650 kHz or 1.3 MHz.
With a package height of 0.8 mm, the ADP1614 is optimal for
space constrained applications, such as portable devices or thin
film transistor (TFT) liquid crystal displays (LCDs).
The ADP1614 operates in current-mode pulse-width modulation
(PWM) with up to 94% efficiency. Adjustable soft start prevents
inrush currents when the part is enabled. The PWM current-mode
architecture allows excellent transient response, easy noise filtering,
and the use of small, cost-saving external inductors and capacitors.
Other key features include undervoltage lockout (UVLO), thermal
shutdown (TSD), and logic controlled enable.
The ADP1614 is available in a Pb-free, 10-lead lead frame chip
scale package (LFCSP).
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rightsof third parties that may result fromits use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks andregisteredtrademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
www.analog.com
©2012 Analog Devices, Inc. All rights reserved.
ADP1614
Data Sheet
TABLE OF CONTENTS
Features .............................................................................................. 1
Soft Start ...................................................................................... 11
Thermal Shutdown (TSD) ........................................................ 11
Undervoltage Lockout (UVLO) ............................................... 11
Shutdown Mode ......................................................................... 11
Applications Information .............................................................. 12
ADIsimPower Design Tool ....................................................... 12
Setting the Output Voltage........................................................ 12
Inductor Selection ...................................................................... 12
Choosing the Input and Output Capacitors ........................... 13
Diode Selection........................................................................... 13
Loop Compensation .................................................................. 13
Soft Start Capacitor.................................................................... 14
PCB Layout Guidelines.................................................................. 15
Outline Dimensions....................................................................... 16
Ordering Guide .......................................................................... 16
Applications....................................................................................... 1
General Description ......................................................................... 1
Typical Applications Circuit............................................................ 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Absolute Maximum Ratings............................................................ 4
Thermal Resistance ...................................................................... 4
ESD Caution.................................................................................. 4
Pin Configuration and Function Descriptions............................. 5
Typical Performance Characteristics ............................................. 6
Theory of Operation ...................................................................... 10
Current-Mode PWM Operation .............................................. 11
Adjustable Current Limit .......................................................... 11
Frequency Selection ................................................................... 11
REVISION HISTORY
6/12—Revision 0: Initial Version
Rev. 0 | Page 2 of 16
Data Sheet
ADP1614
SPECIFICATIONS
VIN = 3.6 V, unless otherwise noted. Minimum and maximum values are guaranteed for TJ = −40°C to +125°C. Typical values specified
are at TJ = 25°C. All limits at temperature extremes are guaranteed by correlation and characterization using standard statistical quality
control (SQC), unless otherwise noted.
Table 1.
Parameter
Symbol
Test Conditions/Comments
Min
Typ
Max
Unit
SUPPLY
Input Voltage
Quiescent Current
Shutdown
Nonswitching State
Switching State1
VIN
2.5
5.5
V
IQSHDN
IQ
IQSW
VEN = 0 V
0.25
700
5.5
3
1.5
1100
7
4.5
7
µA
µA
mA
mA
µA
VFB = 1.3 V, fSW = 1.3 MHz and 650 kHz
fSW = 1.3 MHz, no load
fSW = 650 kHz, no load
VEN = 3.6 V
Enable Pin Bias Current
IEN
3.4
UNDERVOLTAGE LOCKOUT (UVLO)
Undervoltage Lockout Threshold
VIN rising
VIN falling
2.33
2.20
2.5
20
V
V
2.0
VIN
OUTPUT
Output Voltage
Load Regulation
REFERENCE
VOUT
V
VOUT = 10 V, ILOAD = 1 mA to 1 A
0.005
mV/mA
Feedback Voltage
Line Regulation
ERROR AMPLIFIER
Transconductance
Voltage Gain
VFB
−1.6% 1.245 +1.6%
V
%/V
VIN = 2.5 V to 5.5 V
ΔI = 4 µA
0.02
0.2
50
GMEA
AV
150
80
1
µA/V
dB
nA
FB Pin Bias Current
SWITCH (SW)
VFB = 1.245 V
On Resistance
RDSON
ISW = 1.0 A
VSW = 20 V
RCL = 154 kΩ, duty cycle = 70%
RCL = 61.9 kΩ, VIN = 3.6 V, VOUT = 15 V
ICLRES = 5 µA
50
100
10
1.65
mΩ
µA
A
Leakage Current
Peak Current Limit2
Maximum Peak Current Limit3
CLRES VOLTAGE 4
0.1
1.3
4
0.95
A
1.225
1.18
1.27
1.22
1.315
1.25
V
V
ICLRES = 20 µA
OSCILLATOR
Oscillator Frequency
fSW
ADP1614ACPZ-1.3-R7
ADP1614ACPZ-650-R7
COMP = open, VFB = 1 V, fSW = 1.3 MHz and 650 kHz
VIN = 2.5 V to 5.5 V
1.1
500
88
1.3
650
92
1.4
720
MHz
kHz
%
Maximum Duty Cycle
EN LOGIC THRESHOLD
Input Voltage Low
Input Voltage High
SOFT START (SS)
DMAX
VIL
VIH
0.3
V
V
1.6
Charging Current
Pin Voltage
ISS
VSS
VSS = 0 V
VFB = 1.3 V
3.4
1.17
5.5
1.23
7
1.29
µA
V
THERMAL SHUTDOWN
Thermal Shutdown Threshold
Thermal Shutdown Hysteresis
150
20
°C
°C
1 This parameter specifies the average current when the device switches internally with the SW pins (Pin 6 and Pin 7) floating.
2 Current limit is a function of duty cycle. For the adjustable current limit versions, it is also a function of the resistor on the CLRES pin. See Figure 9 through Figure 12.
3 Guaranteed by design.
4 The CLRES pin cannot be controlled with a current source. An equivalent resistance should be used.
Rev. 0 | Page 3 of 16
ADP1614
Data Sheet
ABSOLUTE MAXIMUM RATINGS
Table 2.
THERMAL RESISTANCE
The junction-to-ambient thermal resistance (θJA) of the package
is specified for the worst-case conditions, that is, a device soldered
in a circuit board for surface-mount packages. The θJA is highly
dependent on the application and board layout. In applications
where high maximum power dissipation exists, attention to
thermal board design is required. The value of θJA may vary,
depending on the printed circuit board (PCB) material, layout,
and environmental conditions.
Parameter
Rating
VIN, EN, FB to GND
CLRES to GND
COMP to GND
SS to GND
SW to GND
Operating Junction Temperature Range
Storage Temperature Range
Soldering Conditions
−0.3 V to +6 V
−0.3 V to VIN
1.0 V to 1.6 V
−0.3 V to +1.3 V
21 V
−40°C to +125°C
−65°C to +150°C
JEDEC J-STD-020
The boundary conditions for the thermal resistance of the
ADP1614 are modeled under natural convection cooling at
25°C ambient temperature, JESD 51-9, and 1 W power input on a
4-layer board.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Table 3. Thermal Resistance1
Package Type
θJA
θJC
Unit
10-Lead LFCSP
47
7.22
°C/W
1 Thermal numbers per JEDEC standard JESD 51-9.
Absolute maximum ratings apply individually only, not in
combination.
ESD CAUTION
Rev. 0 | Page 4 of 16
Data Sheet
ADP1614
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
COMP 1
FB 2
10 SS
9
8
7
6
CLRES
ADP1614
TOP VIEW
(Not to Scale)
EN 3
VIN
SW
SW
GND 4
GND 5
NOTES
1. THE EXPOSED PAD IS NOT ELECTRICALLY
CONNECTED; CONNECT THIS PAD TO A GROUND
PLANE FOR BETTER HEAT DISTRIBUTION.
Figure 2. Pin Configuration
Table 4. Pin Function Descriptions
Pin No.
Mnemonic
COMP
FB
Description
1
2
Compensation Input. Connect a series resistor-capacitor network from COMP to GND to compensate the regulator.
Output Voltage Feedback Input. Connect a resistive voltage divider from the output voltage to FB to set the
regulator output voltage.
3
4, 5
6, 7
EN
GND
SW
Enable Input. Drive EN low to shut down the regulator; drive EN high to turn on the regulator.
Ground.
Switching Output. Connect the power inductor from the input voltage to SW and connect the external rectifier
from SW to the output voltage to complete the step-up converter.
8
VIN
Main Power Supply Input. VIN powers the ADP1614 internal circuitry. Connect VIN to the input source voltage.
Bypass VIN to GND with a 10 µF or greater capacitor as close to the ADP1614 as possible.
9
10
CLRES
SS
Connect a resistor to GND to set the peak inductor current.
Soft Start. A capacitor connected from SS to GND brings up the output slowly at power-up and reduces inrush
current.
11
EP
Exposed Die Attach Pad. The exposed pad is not electrically connected; connect this pad to a ground plane for
better heat distribution.
Rev. 0 | Page 5 of 16
ADP1614
Data Sheet
TYPICAL PERFORMANCE CHARACTERISTICS
100
100
90
80
70
60
50
40
30
20
10
0
V
f
R
= 5V
IN
= 1.3MHz
= 71.5kΩ
90
80
70
60
50
40
30
20
SW
CL
V
V
V
= 5V
V
V
V
= 10V
= 15V
= 20V
OUT
OUT
OUT
OUT
OUT
OUT
V
f
R
= 3.6V
IN
10
0
= 10V
= 15V
= 650kHz
= 71.5kΩ
SW
CL
1
10
100
1k
10k
1
10
100
1k
10k
LOAD CURRENT (mA)
LOAD CURRENT (mA)
Figure 3. Efficiency vs. Load Current, VIN = 3.6 V, fSW = 650 kHz
Figure 6. Efficiency vs. Load Current, VIN = 5 V, fSW = 1.3 MHz
100
90
80
70
60
50
40
30
20
10
0
4.0
V
f
R
= 3.6V
IN
= 1.3MHz
= 71.5kΩ
SW
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
CL
V
= 4.5V
= 3.5V
IN
V
IN
V
= 2.5V
105
IN
R
V
V
V
= 5V
= 10V
= 15V
OUT
OUT
OUT
V
= 5V
75
OUT
60
90
120
135
150
1
10
100
1k
10k
(kΩ)
LOAD CURRENT (mA)
CL
Figure 4. Efficiency vs. Load Current, VIN = 3.6 V, fSW = 1.3 MHz
Figure 7. Typical Maximum Continuous Output Current vs. RCL, VOUT = 5 V
100
90
80
70
60
50
40
30
20
10
0
1.4
1.2
1.0
V
f
R
= 5V
IN
= 650kHz
= 71.5kΩ
SW
CL
V
= 5.5V
IN
0.8
0.6
0.4
0.2
0
V
= 4.5V
IN
V
= 3.5V
IN
V
= 2.5V
IN
V
V
V
= 10V
= 15V
= 20V
OUT
OUT
OUT
V
= 15V
75
OUT
1
10
100
1k
10k
60
90
105
R (kΩ)
CL
120
135
150
LOAD CURRENT (mA)
Figure 5. Efficiency vs. Load Current, VIN = 5 V, fSW = 650 kHz
Figure 8. Typical Maximum Continuous Output Current vs. RCL, VOUT = 15 V
Rev. 0 | Page 6 of 16
Data Sheet
ADP1614
4.0
3.60
3.55
3.50
3.45
3.40
3.35
3.30
3.25
3.20
3.15
V
= 4.5V
IN
T
= –40°C
A
3.5
V
= 2.5V
IN
T
= +25°C
A
3.0
2.5
2.0
1.5
1.0
T
= +85°C
A
V
= 3.5V
IN
V
R
= 15V
OUT
= 71.5kΩ
V
= 5V
CL
OUT
2.5
3.0
3.5
4.0
4.5
4.0
5.5
60
75
90
105
(kΩ)
120
135
150
INPUT VOLTAGE (V)
R
CL
Figure 12. Peak Current Limit of Switch vs. VIN over Temperature, VOUT = 15 V
Figure 9. Peak Current Limit of Switch vs. RCL, VOUT = 5 V
80
3.90
3.85
3.80
3.75
3.70
3.65
3.60
I
= 1A
SW
70
60
50
40
30
T
= +125°C
A
T
= +85°C
A
T
= +25°C
A
A
T
= +25°C
A
T
= –40°C
A
V
R
= 5V
= 71.5kΩ
T
= –40°C
4.5
OUT
CL
2.5
3.0
3.5
INPUT VOLTAGE (V)
4.0
4.5
2.5
3.0
3.5
4.0
5.0
5.5
INPUT VOLTAGE (V)
Figure 10. Peak Current Limit of Switch vs. VIN over Temperature, VOUT = 5 V
Figure 13. Switch On Resistance vs. Input Voltage
4.0
3.5
94.5
94.0
93.5
93.0
92.5
92.0
91.5
91.0
T
= +125°C
A
V
= 2.5V
IN
3.0
2.5
2.0
1.5
1.0
V
= 3.5V
V
= 4.5V
IN
IN
T
= –40°C
T
= +25°C
A
A
V
= 5.5V
IN
V
= 15V
75
OUT
2.5
3.0
3.5
4.0
4.5
5.0
5.5
60
90
105
(kΩ)
120
135
150
INPUT VOLTAGE (V)
R
CL
Figure 11. Peak Current Limit of Switch vs. RCL, VOUT = 15 V
Figure 14. Maximum Duty Cycle vs. Input Voltage
Rev. 0 | Page 7 of 16
ADP1614
Data Sheet
780
760
740
720
700
680
660
640
620
600
7
6
5
4
3
2
1
0
T
= +125°C
T
= +125°C
A
A
T
= +25°C
A
T
= –40°C
A
T
= –40°C
A
T
= +25°C
A
580
2.5
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
EN PIN VOLTAGE (V)
3.0
3.5
4.0
4.5
5.0
5.5
INPUT VOLTAGE (V)
Figure 15. Nonswitching Quiescent Current vs. Input Voltage
Figure 18. EN Pin Current vs. EN Pin Voltage
6.0
5.8
5.6
5.4
5.2
5.0
4.8
4.5
f
= 650kHz
SW
V
= 2.5V
IN
4.0
3.5
3.0
2.5
2.0
V
= 5.5V
IN
T
= +125°C
A
V
= 3.6V
IN
T
= +25°C
A
T
= –40°C
A
2.5
3.0
3.5
4.0
4.5
5.0
5.5
–40
–10
20
50
80
110
INPUT VOLTAGE (V)
TEMPERATURE (°C)
Figure 16. Switching Quiescent Current vs. Input Voltage, fSW = 650 kHz
Figure 19. SS Pin Current vs. Temperature
9
V
V
= 3.6V
IN
f
= 1.3MHz
OUTPUT VOLTAGE (5V/DIV)
SW
= 15V
OUT
I
= 60Ω
LOAD
C
f
= 68nF
= 1.3MHz
8
7
6
5
4
3
SS
SW
SWITCH VOLTAGE (10V/DIV)
T
= +125°C
1
2
A
T
= +25°C
T = –40°C
A
A
INDUCTOR CURRENT (500mA/DIV)
4
3
EN PIN VOLTAGE (5V/DIV)
TIME (4ms/DIV)
2.5
3.0
3.5
4.0
4.5
5.0
5.5
INPUT VOLTAGE (V)
Figure 17. Switching Quiescent Current vs. Input Voltage, fSW = 1.3 MHz
Figure 20. Startup, CSS = 68 nF
Rev. 0 | Page 8 of 16
Data Sheet
ADP1614
V
V
f
= 3.6V
= 5V
= 650kHz
V
V
f
= 5V
= 15V
IN
IN
OUT
= 650kHz
OUTPUT VOLTAGE (100mV/DIV)
AC-COUPLED
OUT
OUTPUT VOLTAGE (100mV/DIV)
AC-COUPLED
SW
SW
L = 4.7µH
L = 15µH
1
1
LOAD CURRENT (50mA/DIV)
TIME (200µs/DIV)
LOAD CURRENT (50mA/DIV)
TIME (200µs/DIV)
3
3
Figure 21. 50 mA to 150 mA Load Transient,
Figure 23. 50 mA to 150 mA Load Transient,
VIN = 3.6 V, VOUT = 5 V, fSW = 650 kHz
VIN = 5 V, VOUT = 15 V, fSW = 650 kHz
V
V
f
= 3.6V
= 5V
= 1.3MHz
V
V
f
= 5V
= 15V
IN
IN
OUT
= 1.3MHz
OUTPUT VOLTAGE (200mV/DIV)
AC-COUPLED
OUT
OUTPUT VOLTAGE (100mV/DIV)
SW
SW
AC-COUPLED
L = 4.7µH
L = 10µH
1
1
LOAD CURRENT (50mA/DIV)
TIME (200µs/DIV)
LOAD CURRENT (50mA/DIV)
TIME (200µs/DIV)
3
3
Figure 22. 50 mA to 150 mA Load Transient,
IN = 3.6 V, VOUT = 5 V, fSW = 1.3 MHz
Figure 24. 50 mA to 150 mA Load Transient,
IN = 5 V, VOUT = 15 V, fSW = 1.3 MHz
V
V
Rev. 0 | Page 9 of 16
ADP1614
Data Sheet
THEORY OF OPERATION
The ADP1614 current-mode, step-up switching converter
boosts a 2.5 V to 5.5 V input voltage to an output voltage as
high as 20 V. The internal switch allows a high output current,
and the 650 kHz/1.3 MHz switching frequency allows the use of
tiny external components. The switch current is monitored on a
pulse-by-pulse basis to limit the current to the value set by the
R
CL resistor on the CLRES pin.
L1
V
IN
C
VIN
IN
8
D1
+
SW
SW
V
6
7
A
OUT
VIN
D
+
C
COMPARATOR
OUT
CURRENT
SENSING
V
OUT
PWM
COMPARATOR
D
REF
ERROR
R1
R2
AMPLIFIER
FB
2
1
OSCILLATOR
V
V
BG
UVLO
COMPARATOR
DRIVER
COMP
V
IN
S
R
Q
N1
R
UVLO
COMP
REF
SS
TSD
COMPARATOR
C
COMP
5.5µA
T
SENSE
BAND GAP
BG
SS
SOFT
START
RESET
T
REF
10
C
SS
AGND
GND
1.1MΩ
AGND
ADP1614
9
3
11
4
5
CLRES
EN
EP
GND
R
CL
>1.6V
<0.3V
Figure 25. Block Diagram with Step-Up Regulator Application Circuit
Rev. 0 | Page 10 of 16
Data Sheet
ADP1614
CURRENT-MODE PWM OPERATION
SOFT START
The ADP1614 utilizes a current-mode PWM control scheme to
regulate the output voltage over all load conditions. The output
voltage is monitored at FB through a resistive voltage divider. The
voltage at FB is compared with the internal 1.245 V reference by
the internal transconductance error amplifier to create an error
voltage at COMP. The current of the switch is internally measured
and added to the stabilizing ramp. The resulting sum is compared
with the error voltage at COMP to control the PWM modulator.
This current-mode regulation system allows fast transient response
while maintaining a stable output voltage. By selecting the proper
resistor-capacitor network from COMP to GND, the regulator
response is optimized for a wide range of input voltages, output
voltages, and load conditions.
To prevent input inrush current to the converter when the part
is enabled, connect a capacitor from SS to GND to set the soft
start period. After the ADP1614 is turned on, SS sources 5 µA
(typical) to the soft start capacitor (CSS) until it reaches 1.23 V
at startup. As the soft start capacitor charges, it limits the peak
current allowed by the part. By slowly charging the soft start
capacitor, the input current ramps slowly to prevent it from
overshooting excessively at startup. When the ADP1614 is
disabled, the SS pin is internally shorted to GND to discharge
the soft start capacitor.
THERMAL SHUTDOWN (TSD)
The ADP1614 includes TSD protection. If the die temperature
exceeds 150°C (typical), TSD turns off the NMOS power device,
significantly reducing power dissipation in the device and
preventing output voltage regulation. The NMOS power device
remains off until the die temperature is reduced to 130°C (typical).
The soft start capacitor is discharged during TSD to ensure low
output voltage overshoot and inrush currents when regulation
resumes.
ADJUSTABLE CURRENT LIMIT
A key feature of the ADP1614 is a pin-adjustable peak current
limit of up to 4 A (see Figure 9 to Figure 12 and Figure 26). This
adjustable current limit allows the other external components to
be selected specifically for the application. The current limit is set
via an external resistor connected from Pin 9 (CLRES) to ground.
4.0
UNDERVOLTAGE LOCKOUT (UVLO)
V
= 3.5V
IN
If the input voltage is below the UVLO threshold, the ADP1614
automatically turns off the power switch and places the part
into a low power consumption mode. This prevents potentially
erratic operation at low input voltages and prevents the power
device from turning on when the control circuitry cannot
operate it. The UVLO levels have ~100 mV of hysteresis to
ensure glitch-free startup.
3.5
3.0
2.5
2.0
1.5
1.0
V
= 5V
OUT
V
= 15V
OUT
SHUTDOWN MODE
The EN pin turns the ADP1614 regulator on or off. Drive EN
low to shut down the regulator and reduce the input current to
0.25 µA (typical). Drive EN high to turn on the regulator.
60
75
90
105
(kΩ)
120
135
150
R
CL
When the converter is in shutdown mode (EN ≤ 0.3 V), there is a
dc path from the input to the output through the inductor and
output rectifier. This causes the output voltage to remain slightly
below the input voltage by the forward voltage of the rectifier,
preventing the output voltage from dropping to ground when the
regulator is shut down.
Figure 26. Peak Current Limit of Switch vs. RCL
FREQUENCY SELECTION
The ADP1614 is internally programmed to operate at either
650 kHz or 1.3 MHz. Operation of the ADP1614 at 650 kHz
(ADP1614ACPZ-650-R7) optimizes the efficiency of the device,
whereas operation of the ADP1614 at 1.3 MHz (ADP1614ACPZ-
1.3-R7) enables the device to be used with smaller external
components.
Regardless of the state of the EN pin, when a voltage is applied to
the VIN pin, a large current spike occurs due to the nonisolated
path through the inductor and diode between VIN and VOUT. The
high current is a result of the output capacitor charging. The
peak value is dependent on the inductor, output capacitor, and
any load active on the output of the regulator.
Rev. 0 | Page 11 of 16
ADP1614
Data Sheet
APPLICATIONS INFORMATION
The duty cycle and switching frequency (fSW) can be used to
determine the on time:
ADIsimPower DESIGN TOOL
The ADP1614 is supported by the ADIsimPower™ design toolset.
ADIsimPower is a collection of tools that produce complete
power designs that are optimized for a specific design goal. The
tools enable the user to generate a full schematic and bill of
materials and to calculate performance in minutes. ADIsimPower
can optimize designs for cost, area, efficiency, and parts count
while taking into consideration the operating conditions and
limitations of the IC and the external components. For more
information about the ADIsimPower design tools, visit
www.analog.com/ADIsimPower. The toolset is available from
this website, and users can request an unpopulated board.
D
fSW
tON
=
(4)
The inductor ripple current (∆IL) in steady state is calculated by
VIN ×tON
∆IL =
(5)
L
Solve for the inductance value (L) as follows:
VIN × tON
L =
∆IL
(6)
Ensure that the peak inductor current (the maximum input
SETTING THE OUTPUT VOLTAGE
current plus half the inductor ripple current) is below the rated
saturation current of the inductor. Likewise, make sure that the
maximum rated rms current of the inductor is greater than the
maximum dc input current to the regulator.
The ADP1614 features an adjustable output voltage range of VIN
to 20 V. The output voltage is set by the resistor voltage divider,
R1 and R2 (see Figure 25), from the output voltage (VOUT) to the
1.245 V feedback input at FB. Use the following equation to
determine the output voltage:
For continuous current-mode (CCM) duty cycles greater than
50% that occur with input voltages less than one-half the output
voltage, slope compensation is required to maintain stability of
the current-mode regulator. For stable current-mode operation,
ensure that the selected inductance is equal to or greater than
the minimum calculated inductance, LMIN, for the application
parameters in the following equation:
VOUT = 1.245 × (1 + R1/R2)
(1)
Choose R1 based on the following equation:
V
−1.245
1.245
OUT
R1 = R2 ×
(2)
INDUCTOR SELECTION
(VOUT − 2 ×VIN )
(7)
L > LMIN
=
The inductor is an essential part of the step-up switching
converter. It stores energy during the on time of the power
switch and transfers that energy to the output through the
output rectifier during the off time. To balance the trade-offs
between small inductor current ripple and efficiency, induc-
tance values in the range of 4.7 µH to 22 µH are recommended.
In general, lower inductance values have higher saturation
current and lower series resistance for a given physical size.
However, lower inductance values result in higher peak current,
which can lead to reduced efficiency and greater input and/or
output ripple and noise. A peak-to-peak inductor ripple current
close to 30% of the maximum dc input current typically yields
an optimal compromise.
8× fSW
Inductors smaller than the 4.7 µH to 22 µH recommended
range can be used as long as Equation 7 is satisfied for the given
application. For input/output combinations that approach the
90% maximum duty cycle, doubling the inductor is recom-
mended to ensure stable operation. Table 5 suggests a series
of inductors for use with the ADP1614.
Table 5. Suggested Inductors
Manufacturer
Part Series
Coilcraft
XAL40xx, XAL50xx, XAL6060, DO3316P
TOKO Inc.
FDV06xx, DG6045C, FDSD0630, DEM8045C,
FDVE1040
For determining the inductor ripple current in continuous
operation, the input (VIN) and output (VOUT) voltages determine
the switch duty cycle (D) as follows:
Würth Elektronik
Vishay Dale
TDK Components
Taiyo Yuden
WE-HCI, WE-TPC, WE-PD, WE-PD2, WE -PDF
IHLP-2020, IHLP-2525, IHLP-3232, IHLP-4040
SPM6530, VLP8040, VLF10040, VLF10045
NRS8030, NRS8040
VOUT − VIN
D =
(3)
VOUT
Rev. 0 | Page 12 of 16
Data Sheet
ADP1614
diode is rated to handle the average output load current with
the minimum duty cycle. The minimum duty cycle in CCM of
the ADP1614 is
CHOOSING THE INPUT AND OUTPUT CAPACITORS
The ADP1614 requires input and output bypass capacitors to
supply transient currents while maintaining constant input
and output voltages. Use low equivalent series resistance (ESR)
capacitors of 10 µF or greater to prevent noise at the ADP1614
input. Place the capacitor between VIN and GND, as close as
possible to the ADP1614. Ceramic capacitors are preferable
because of their low ESR characteristics. Alternatively, use a
high value, medium ESR capacitor in parallel with a 0.1 µF low
ESR capacitor, placed as close as possible to the ADP1614.
VOUT −VIN(MAX)
DMIN
=
(12)
VOUT
where VIN(MAX) is the maximum input voltage.
The following are suggested Schottky diode manufacturers:
•
•
•
•
ON Semiconductor
Diodes, Inc.
Toshiba
The output capacitor maintains the output voltage and supplies
current to the load while the ADP1614 switch is on. The value
and characteristics of the output capacitor greatly affect the
output voltage ripple and stability of the regulator. A low ESR
ceramic dielectric capacitor is preferable. The output voltage
ripple (∆VOUT) is calculated as follows:
ROHM Semiconductor
LOOP COMPENSATION
The ADP1614 uses external components to compensate the
regulator loop, allowing optimization of the loop dynamics for a
given application.
QC
IOUT ×tON
COUT
(8)
∆VOUT
=
=
The step-up converter produces an undesirable right-half plane
zero in the regulation feedback loop. This requires compensating
the regulator such that the crossover frequency occurs well below
the frequency of the right-half plane zero. The right-half plane
zero is determined by the following equation:
COUT
where:
QC is the charge removed from the capacitor.
OUT is the output capacitance.
OUT is the output load current.
ON is the on time of the switch.
C
I
t
2
VIN
VOUT
RLOAD
2π× L
FZ (RHP) =
×
(13)
The on time of the switch is determined as follows:
D
fSW
where:
FZ(RHP) is the right-half plane zero.
LOAD is the equivalent load resistance or the output voltage
tON
=
(9)
R
The input (VIN) and output (VOUT) voltages determine the
switch duty cycle (D) as follows:
divided by the load current.
To stabilize the regulator, ensure that the regulator crossover
frequency is less than or equal to one-fifth of the right-half
plane zero.
VOUT −VIN
D =
(10)
VOUT
Choose the output capacitor based on the following equation:
The regulator loop gain is
IOUT × (VOUT −VIN )
fSW ×VOUT × ∆VOUT
VFB
VIN
(11)
(14)
× GMEA × ROUT ZCOMP × GCS × ZOUT
COUT
≥
AVL
=
×
VOUT VOUT
Multilayer ceramic capacitors are recommended for this
application.
where:
A
V
V
V
G
VL is the loop gain.
FB is the feedback regulation voltage, 1.245 V.
OUT is the regulated output voltage.
IN is the input voltage.
DIODE SELECTION
The output rectifier conducts the inductor current to the output
capacitor and load while the switch is off. For high efficiency,
minimize the forward voltage drop of the diode. For this reason,
using Schottky rectifiers is recommended. However, for high
voltage, high temperature applications, where the Schottky
rectifier reverse leakage current becomes significant and can
degrade efficiency, use an ultrafast junction diode.
MEA is the error amplifier transconductance gain.
ROUT = 67 MΩ.
Z
COMP is the impedance of the series RC network from COMP
to GND.
CS is the current sense transconductance gain (the inductor
G
current divided by the voltage at COMP), which is internally
set by the ADP1614.
Many diode manufacturers derate the current capability of the
diode as a function of the duty cycle. Verify that the output
ZOUT is the impedance of the load in parallel with the output
capacitor.
Rev. 0 | Page 13 of 16
ADP1614
Data Sheet
To determine the crossover frequency, it is important to note that
Capacitor C2 is chosen to cancel the zero introduced by the ESR
of the output capacitor.
at the crossover frequency the compensation impedance (ZCOMP
is dominated by a resistor, and the output impedance (ZOUT) is
dominated by the impedance of an output capacitor. Therefore,
when solving for the crossover frequency, the equation (by defi-
nition of the crossover frequency) is simplified to
)
Solve for C2 as follows:
ESR ×COUT
RCOMP
C2 =
(19)
VFB
VIN
VOUT VOUT
If a low ESR, ceramic output capacitor is used for COUT, C2 is
optional. For optimal transient performance, RCOMP and CCOMP
might need to be adjusted by observing the load transient response
of the ADP1614. For most applications, the compensation resistor
should be within the range of 1 kΩ to 100 kΩ, and the compen-
sation capacitor should be within the range of 100 pF to 10 nF.
AVL
=
×
×GMEA × RCOMP ×GCS ×
(15)
1
=1
2
π× fC ×COUT
where:
R
COMP is the compensation resistor.
fC is the crossover frequency.
SOFT START CAPACITOR
Upon startup (EN ≥ 1.6 V) or fault recovery, the voltage at SS
ramps up slowly by charging the soft start capacitor (CSS) with
an internal 5.5 µA current source (ISS). As the soft start
capacitor charges, it limits the peak current allowed by the part
to prevent excessive overshoot at startup. Use the following
equation to determine the necessary value of the soft start
capacitor (CSS) for a specific overshoot and start-up time when
the part is at the current limit with maximum load:
Solve for RCOMP as follows:
2
2π× fC ×COUT ×(VOUT
)
RCOMP
where:
=
(16)
(17)
VFB ×VIN ×GMEA ×GCS
V
G
G
FB = 1.245 V.
MEA = 150 µA/V.
CS = 7 A/V.
∆t
VSS
CSS = ISS
(20)
Therefore,
2
4806× fC ×COUT × (VOUT
)
where:
SS = 5.5 μA (typical).
Δt is the start-up time at the current limit.
SS = 1.23 V (typical).
RCOMP
=
VIN
I
After the compensation resistor is known, set the zero formed
by the compensation capacitor and resistor to one-fourth of the
crossover frequency, or
V
If the applied load does not place the part at the current limit,
the value of CSS can be reduced. A 68 nF soft start capacitor
results in negligible input current overshoot at startup and,
therefore, is suitable for most applications. If an unusually large
output capacitor is used, a longer soft start period is required to
prevent input inrush current.
2
CCOMP
=
(18)
π× fC × RCOMP
where CCOMP is the compensation capacitor.
ERROR
AMPLIFIER
COMP
1
2
FB
However, if fast startup is required, the soft start capacitor can
be reduced or removed, which allows the ADP1614 to start
quickly but with greater peak switch current.
g
m
V
BG
R
COMP
C2
C
COMP
Figure 27. Compensation Components
Rev. 0 | Page 14 of 16
Data Sheet
ADP1614
PCB LAYOUT GUIDELINES
For high efficiency, good regulation, and stability, a well designed
PCB layout is required.
Use the following guidelines when designing PCBs (see Figure 25
for a block diagram and Figure 2 for a pin configuration).
•
Keep the low ESR input capacitor (CIN), which is labeled as
C4 in Figure 28, close to VIN and GND. This minimizes
noise injected into the part from board parasitic inductance.
Keep the high current path from CIN through the L1 inductor
to SW and GND as short as possible.
Keep the high current path from VIN through the inductor
(L1), the rectifier (D1), and the output capacitor (COUT),
which is labeled as C7 in Figure 28, as short as possible.
Keep high current traces as short and as wide as possible.
Place the feedback resistors as close to FB as possible to
prevent noise pickup. Connect the ground of the feedback
network directly to an AGND plane that makes a Kelvin
connection to the GND pin.
•
•
•
•
Figure 28. ADP1614 Recommended Top Layer Layout for Boost Application
•
•
•
•
Place the compensation components as close as possible to
COMP. Connect the ground of the compensation network
directly to an AGND plane that makes a Kelvin connection
to the GND pin.
Connect the soft start capacitor (CSS), which is labeled as
C1 in Figure 28, as close as possible to the device. Connect
the ground of the soft start capacitor to an AGND plane
that makes a Kelvin connection to the GND pin.
Connect the current limit set resistor (RCL), which is
labeled as R4 in Figure 28, as close as possible to the device.
Connect the ground of the CL resistor to an AGND plane
that makes a Kelvin connection to the GND pin.
The PCB must be properly designed to conduct the heat
away from the package. This is achieved by adding thermal
vias to the PCB, which provide a thermal path to the inner
or bottom layers. Thermal vias should be placed on the
PCB underneath the exposed pad of the LFCSP and in the
GND plane around the ADP1614 package to improve
thermal performance of the package.
Figure 29. ADP1614 Recommended Bottom Layer Layout for Boost Application
Avoid routing high impedance traces from the compensation
and feedback resistors near any node connected to SW or near
the inductor to prevent radiated noise injection.
Rev. 0 | Page 15 of 16
ADP1614
Data Sheet
OUTLINE DIMENSIONS
2.48
2.38
2.23
3.10
3.00 SQ
2.90
0.50 BSC
6
10
PIN 1 INDEX
EXPOSED
PAD
1.74
1.64
1.49
AREA
0.50
0.40
0.30
5
1
PIN 1
INDICATOR
TOP VIEW
BOTTOM VIEW
(R 0.15)
FOR PROPER CONNECTION OF
THE EXPOSED PAD, REFER TO
THE PIN CONFIGURATION AND
FUNCTION DESCRIPTIONS
0.80
0.75
0.70
0.05 MAX
0.02 NOM
SECTION OF THIS DATA SHEET.
SEATING
PLANE
0.30
0.25
0.20
0.20 REF
Figure 30. 10-Lead Lead Frame Chip Scale Package [LFCSP_WD]
3 mm × 3 mm Body, Very Very Thin, Dual Lead
(CP-10-9)
Dimensions shown in millimeters
ORDERING GUIDE
Temperature
Range
Switching
Frequency Package Description
Package
Model1
Option
CP-10-9
CP-10-9
Branding
LM4
LM5
ADP1614ACPZ-1.3-R7
ADP1614ACPZ-650-R7 −40°C to +125°C
ADP1614-1.3-EVALZ
−40°C to +125°C
1.3 MHz
650 kHz
1.3 MHz
650 kHz
10-Lead Lead Frame Chip Scale Package [LFCSP_WD]
10-Lead Lead Frame Chip Scale Package [LFCSP_WD]
Evaluation Board, 15 V Output Voltage Configuration
Evaluation Board, 5 V Output Voltage Configuration
ADP1614-650-EVALZ
1 Z = RoHS Compliant Part.
©2012 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D10293-0-6/12(0)
Rev. 0 | Page 16 of 16
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